dma3.c

//                 /           /
//                /' .,,,,  ./         
//               /';'     ,/    
//              / /   ,,//,`'`      
//             ( ,, '_,  ,,,' ``   
//             |    /@  ,,, ;" `  
//            /    .   ,''/' `,``   
//           /   .     ./, `,, ` ; 
//        ,./  .   ,-,',` ,,/''\,'   
//       |   /; ./,,'`,,'' |   |     
//       |     /   ','    /    |  
//        \___/'   '     |     |  
//          `,,'  |      /     `\  
//               /      |        ~\  
//              '       (
//             :
//            ; .         \-- 
//          :   \         ;
//
// From the bowels of Arduino runtime code.
//            Here be dragons.

#define BUFFER_MOD_SIZE (6)

// The destination buffer must be a power of two
static volatile uint16_t adc_buffer[1 << BUFFER_MOD_SIZE]
                                    __attribute__ ((aligned (0x10))) = {0};

#define DMAMUX_CHCFG_SOURCE_ADC0 (40)

void initialise_dma(void) {
    SIM_SCGC7 |= SIM_SCGC7_DMA_MASK;
    SIM_SCGC6 |= SIM_SCGC6_DMAMUX_MASK;
    
    DMAMUX0_CHCFG0 = DMAMUX_CHCFG_ENBL_MASK | DMAMUX_CHCFG_SOURCE(DMAMUX_CHCFG_SOURCE_ADC0);
    
    DMA_TCD0_SADDR = (int)&ADC0_RA;
    DMA_TCD0_SOFF = 0;
    DMA_TCD0_SLAST = 0;
    
    DMA_TCD0_DADDR = (int)&adc_buffer[0];
    DMA_TCD0_NBYTES_MLNO = 2;
    DMA_TCD0_DOFF = 2;
    DMA_TCD0_DLASTSGA = -sizeof(adc_buffer);
    
    DMA_TCD0_BITER_ELINKNO = DMA_BITER_ELINKNO_BITER(1 << BUFFER_MOD_SIZE);
    DMA_TCD0_CITER_ELINKNO = DMA_CITER_ELINKNO_CITER(1 << BUFFER_MOD_SIZE);
    
    DMA_TCD0_ATTR = DMA_ATTR_SSIZE(1) | DMA_ATTR_DSIZE(1);
    
    DMA_TCD0_CSR = DMA_CSR_INTMAJOR_MASK;
    
    DMA_ERQ |= DMA_ERQ_ERQ0_MASK;
    
    NVIC_EnableIrq(INT_DMA0);
}

#define LOW_MASK (1 << 3)

void initialise_adc(void) {
    SIM_SCGC5 |= SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTD_MASK;
    SIM_SCGC6 |= SIM_SCGC6_ADC0_MASK;

    PORTB_PCR3 = PORT_PCR_MUX(1) | PORT_PCR_DSE_MASK | PORT_PCR_PE_MASK | PORT_PCR_PS_MASK;
    GPIOB_PDDR |= LOW_MASK;
    GPIOB_PCOR = LOW_MASK;
    
    ADC0_SC2 = ADC_SC2_DMAEN_MASK | ADC_SC2_ADTRG_MASK;
    ADC0_SC3 = 0x00;
    ADC0_CFG1 = ADC_CFG1_ADIV_MASK | ADC_CFG1_MODE(2) | ADC_CFG1_ADICLK(1);
    ADC0_CFG2 = ADC_CFG2_MUXSEL_MASK;
}

#define ADC0_DLYA 0x2000

void initialise_pdb(void) {
    SIM_SCGC6 |= SIM_SCGC6_PDB_MASK;
    
    PDB0_SC |= PDB_SC_PDBEN_MASK | PDB_SC_CONT_MASK | PDB_SC_TRGSEL(0xf);
    PDB0_MOD = PDB_MOD_MOD(0x1fff);
    
    //PDB0_IDLY = 0;
    
    PDB0_CH0C1 = PDB_C1_EN(0x1) | PDB_C1_TOS(0x1);
    PDB0_CH0DLY0 = 0;
    //PDB0_CH0C1 = PDB_C1_TOS(3) | PDB_C1_EN(3);
    //PDB0_CH0DLY0 = 0x1fff;
    

    
    //Enable interrupt
    PDB0_SC |= PDB_SC_PDBIE_MASK;
    PDB0_SC |= PDB_SC_PDBEIE_MASK;
    
    //SIM_SOPT7 &= ~(SIM_SOPT7_ADC0ALTTRGEN_MASK | SIM_SOPT7_ADC0ALTTRGEN_MASK);
    SIM_SOPT7 = SIM_SOPT7_ADC0TRGSEL(0);
    
    PDB0_SC |= PDB_SC_LDOK_MASK;
    
    NVIC_EnableIrq(INT_PDB0);
}

void initialise_pit(int interval) {
    SIM_SCGC6 |= SIM_SCGC6_PIT_MASK;
    
    PIT_MCR = PIT_MCR_FRZ_MASK;
    
    PIT_LDVAL(3) = interval - 1;
    PIT_TCTRL(3) = PIT_TCTRL_TEN_MASK | PIT_TCTRL_TIE_MASK;
    
    NVIC_EnableIrq(INT_PIT3);
}

int main(void) {
    initialise_adc();
    initialise_dma();
    //initialise_pit(700000);
    initialise_pdb();
    
    PDB0_SC |= PDB_SC_SWTRIG_MASK;
    
    for(;;) {
        asm("wfi");
        asm("nop");
    }
    
    return 0;
}

void DMA0_IRQHandler(void) {
    DMA_CINT = DMA_CINT_CINT(0);
    asm("nop");
}

void PDB_Handler(void) {
    // Disable PDB0
    PDB0_SC &= ~PDB_SC_PDBEN_MASK;
    
    // Check if pdb sequence error
    if(PDB0_CH0S & PDB_S_ERR(1))
    {
        PDB0_CH0S &= ~PDB_S_ERR(1);
        asm("bkpt"); // pretrigger 0 sequence error
    }
    if(PDB0_CH0S & PDB_S_ERR(2))
    {
        PDB0_CH0S &= ~PDB_S_ERR(2);
        asm("bkpt"); // pretrigger 1 sequence error
    }
    
    // Enable
    PDB0_SC |= PDB_SC_PDBEN_MASK;
}

void PIT_Ch3_IRQHandler(void) {
    PIT_TFLG3 = PIT_TFLG_TIF_MASK;
    ADC0_SC1A = ADC_SC1_ADCH(12);
}