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landonf/bcma_BCM4716_oobsel.txt

Last active August 26, 2016 03:51
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BCM43225 Interrupt / OOB Register Dump
Raw
bcma_BCM4716_oobsel.txt
bhnd0: <BCM4716 BCMA bus> at mem 0x18000000-0x180fffff on nexus0
Broadcom ChipCommon I/O Controller:
Inputs:
Bank A (width=0x1, ext_width=0x9)
A0: 0x00 (disabled)
Bank D (width=0x5, ext_width=0x8)
D0: 0x00 (disabled)
D1: 0x00 (disabled)
D2: 0x00 (disabled)
D3: 0x00 (disabled)
D4: 0x00 (disabled)
Outputs:
Bank A (width=0x1)
A0: 0x00 (enabled)
Bank C (width=0x8)
C0: 0x00 (disabled)
C1: 0x00 (disabled)
C2: 0x00 (disabled)
C3: 0x00 (disabled)
C4: 0x00 (disabled)
C5: 0x00 (disabled)
C6: 0x00 (disabled)
C7: 0x00 (disabled)
Broadcom 802.11 MAC/PHY/Radio:
Inputs:
Bank A (width=0x1, ext_width=0x9)
A0: 0x00 (disabled)
Bank D (width=0x7, ext_width=0x1)
D0: 0x00 (disabled)
D1: 0x00 (disabled)
D2: 0x00 (disabled)
D3: 0x00 (disabled)
D4: 0x00 (disabled)
D5: 0x00 (disabled)
D6: 0x00 (disabled)
Outputs:
Bank A (width=0x1)
A0: 0x01 (enabled)
Bank C (width=0x8)
C0: 0x00 (disabled)
C1: 0x00 (disabled)
C2: 0x00 (disabled)
C3: 0x00 (disabled)
C4: 0x00 (disabled)
C5: 0x00 (disabled)
C6: 0x00 (disabled)
C7: 0x00 (disabled)
Broadcom Gigabit MAC core:
Inputs:
Bank A (width=0x1, ext_width=0x9)
A0: 0x00 (disabled)
Bank D (width=0x7, ext_width=0x1)
D0: 0x00 (disabled)
D1: 0x00 (disabled)
D2: 0x00 (disabled)
D3: 0x00 (disabled)
D4: 0x00 (disabled)
D5: 0x00 (disabled)
D6: 0x00 (disabled)
Outputs:
Bank A (width=0x1)
A0: 0x02 (enabled)
Bank C (width=0x8)
C0: 0x00 (disabled)
C1: 0x00 (disabled)
C2: 0x00 (disabled)
C3: 0x00 (disabled)
C4: 0x00 (disabled)
C5: 0x00 (disabled)
C6: 0x00 (disabled)
C7: 0x00 (disabled)
MIPS MIPS74k CPU:
Inputs:
Bank A (width=0x8, ext_width=0x9)
A0: 0x00 (disabled)
A1: 0x01 (disabled)
A2: 0x02 (disabled)
A3: 0x03 (disabled)
A4: 0x04 (disabled)
A5: 0x05 (disabled)
A6: 0x06 (disabled)
A7: 0x08 (disabled)
Bank D (width=0x5, ext_width=0x1)
D0: 0x00 (disabled)
D1: 0x00 (disabled)
D2: 0x00 (disabled)
D3: 0x00 (disabled)
D4: 0x00 (disabled)
Outputs:
Bank A (width=0x1)
A0: 0x00 (disabled)
Bank C (width=0x8)
C0: 0x00 (disabled)
C1: 0x00 (disabled)
C2: 0x00 (disabled)
C3: 0x00 (disabled)
C4: 0x00 (disabled)
C5: 0x00 (disabled)
C6: 0x00 (disabled)
C7: 0x00 (disabled)
Broadcom USB 2.0 Host Controller:
Inputs:
Bank A (width=0x1, ext_width=0x9)
A0: 0x00 (disabled)
Bank D (width=0x7, ext_width=0x1)
D0: 0x00 (disabled)
D1: 0x00 (disabled)
D2: 0x00 (disabled)
D3: 0x00 (disabled)
D4: 0x00 (disabled)
D5: 0x00 (disabled)
D6: 0x00 (disabled)
Outputs:
Bank A (width=0x1)
A0: 0x04 (enabled)
Bank C (width=0x8)
C0: 0x00 (disabled)
C1: 0x00 (disabled)
C2: 0x00 (disabled)
C3: 0x00 (disabled)
C4: 0x00 (disabled)
C5: 0x00 (disabled)
C6: 0x00 (disabled)
C7: 0x00 (disabled)
Broadcom PCIe Bridge:
Inputs:
Bank A (width=0x8, ext_width=0x9)
A0: 0x00 (disabled)
A1: 0x01 (disabled)
A2: 0x02 (disabled)
A3: 0x03 (disabled)
A4: 0x04 (disabled)
A5: 0x05 (disabled)
A6: 0x06 (disabled)
A7: 0x08 (disabled)
Bank D (width=0x7, ext_width=0x1)
D0: 0x00 (disabled)
D1: 0x00 (disabled)
D2: 0x00 (disabled)
D3: 0x00 (disabled)
D4: 0x00 (disabled)
D5: 0x00 (disabled)
D6: 0x00 (disabled)
Outputs:
Bank A (width=0x1)
A0: 0x05 (enabled)
Bank C (width=0x8)
C0: 0x00 (disabled)
C1: 0x00 (disabled)
C2: 0x00 (disabled)
C3: 0x00 (disabled)
C4: 0x00 (disabled)
C5: 0x00 (disabled)
C6: 0x00 (disabled)
C7: 0x00 (disabled)
Broadcom I2S Digital Audio Interface:
Inputs:
Bank A (width=0x1, ext_width=0x9)
A0: 0x00 (disabled)
Bank D (width=0x5, ext_width=0x1)
D0: 0x00 (disabled)
D1: 0x00 (disabled)
D2: 0x00 (disabled)
D3: 0x00 (disabled)
D4: 0x00 (disabled)
Outputs:
Bank A (width=0x1)
A0: 0x08 (enabled)
Bank C (width=0x8)
C0: 0x00 (disabled)
C1: 0x00 (disabled)
C2: 0x00 (disabled)
C3: 0x00 (disabled)
C4: 0x00 (disabled)
C5: 0x00 (disabled)
C6: 0x00 (disabled)
C7: 0x00 (disabled)
ARM BP135 AMBA3 AXI to APB Bridge:
Inputs:
Outputs:
ARM BP135 AMBA3 AXI to APB Bridge:
Inputs:
Outputs:
ARM Unmapped Address Ranges:
Inputs:
Outputs:
Raw
bcma_oobsel.txt
Broadcom ChipCommon I/O Controller:
Inputs:
Bank A (width=0x1, ext_width=0x9)
A0: 0x00 (disabled)
Bank D (width=0x5, ext_width=0x8)
D0: 0x00 (disabled)
D1: 0x00 (disabled)
D2: 0x00 (disabled)
D3: 0x00 (disabled)
D4: 0x00 (disabled)
Outputs:
Bank A (width=0x1)
A0: 0x00 (enabled)
Bank C (width=0x8)
C0: 0x00 (disabled)
C1: 0x00 (disabled)
C2: 0x00 (disabled)
C3: 0x00 (disabled)
C4: 0x00 (disabled)
C5: 0x00 (disabled)
C6: 0x00 (disabled)
C7: 0x00 (disabled)
Broadcom 802.11 MAC/PHY/Radio:
Inputs:
Bank A (width=0x1, ext_width=0x9)
A0: 0x00 (disabled)
Bank D (width=0x7, ext_width=0x1)
D0: 0x00 (disabled)
D1: 0x00 (disabled)
D2: 0x00 (disabled)
D3: 0x00 (disabled)
D4: 0x00 (disabled)
D5: 0x00 (disabled)
D6: 0x00 (disabled)
Outputs:
Bank A (width=0x1)
A0: 0x01 (enabled)
Bank C (width=0x8)
C0: 0x00 (disabled)
C1: 0x00 (disabled)
C2: 0x00 (disabled)
C3: 0x00 (disabled)
C4: 0x00 (disabled)
C5: 0x00 (disabled)
C6: 0x00 (disabled)
C7: 0x00 (disabled)
Broadcom PCIe Bridge:
Inputs:
Bank A (width=0x8, ext_width=0x9)
A0: 0x00 (enabled)
A1: 0x01 (enabled)
A2: 0x02 (enabled)
A3: 0x03 (disabled)
A4: 0x04 (disabled)
A5: 0x05 (disabled)
A6: 0x06 (disabled)
A7: 0x07 (disabled)
Bank D (width=0x7, ext_width=0x1)
D0: 0x00 (disabled)
D1: 0x00 (disabled)
D2: 0x00 (disabled)
D3: 0x00 (disabled)
D4: 0x00 (disabled)
D5: 0x00 (disabled)
D6: 0x00 (disabled)
Outputs:
Bank A (width=0x1)
A0: 0x02 (enabled)
Bank C (width=0x8)
C0: 0x00 (disabled)
C1: 0x00 (disabled)
C2: 0x00 (disabled)
C3: 0x00 (disabled)
C4: 0x00 (disabled)
C5: 0x00 (disabled)
C6: 0x00 (disabled)
C7: 0x00 (disabled)
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