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June 13, 2022 23:05
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SM1:BL:511f6b:81ca2f;FEAT:A0F83180:20282000;POC:F;RCY:0;EMMC:0;READ:0;0.0;CHK:0; | |
bl2_stage_init 0x01 | |
bl2_stage_init 0x81 | |
hw id: 0x0000 - pwm id 0x01 | |
bl2_stage_init 0xc1 | |
bl2_stage_init 0x02 | |
L0:00000000 | |
L1:00000703 | |
L2:00008067 | |
L3:15000000 | |
S1:00000000 | |
B2:20282000 | |
B1:a0f83180 | |
TE: 162326 | |
BL2 Built : 15:21:48, Aug 28 2019. g12a g1bf2b53 - luan.yuan@droid15-sz | |
Board ID = 8 | |
Set cpu clk to 24M | |
Set clk81 to 24M | |
Use GP1_pll as DSU clk. | |
DSU clk: 1200 Mhz | |
CPU clk: 1200 MHz | |
Set clk81 to 166.6M | |
eMMC boot @ 0 | |
sw8 s | |
DDR driver_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 15:21:45 | |
board id: 8 | |
Load FIP HDR from eMMC, src: 0x00010200, des: 0xfffd0000, size: 0x00004000, part: 0 | |
fw parse done | |
Load ddrfw from eMMC, src: 0x00060200, des: 0xfffd0000, size: 0x0000c000, part: 0 | |
Load ddrfw from eMMC, src: 0x00038200, des: 0xfffd0000, size: 0x00004000, part: 0 | |
PIEI prepare done | |
fastboot data load | |
00000000 | |
emmc switch 1 ok | |
ddr saved addr:00016000 | |
Load ddr parameter from eMMC, src: 0x02c00000, des: 0xfffd0000, size: 0x00001000, part: 0 | |
00000000 | |
emmc switch 0 ok | |
fastboot data verify | |
verify result: 265 | |
Cfg max: 4, cur: 1. Board id: 255. Force loop cfg | |
LPDDR4 probe | |
ddr clk to 1608MHz | |
Load ddrfw from eMMC, src: 0x0003c200, des: 0xfffd0000, size: 0x0000c000, part: 0 | |
dmc_version 0001 | |
Check phy result | |
INFO : ERROR : Training has failed! | |
1D training failed | |
Cfg max: 4, cur: 2. Board id: 255. Force loop cfg | |
LPDDR4 probe | |
ddr clk to 1608MHz | |
Load ddrfw from eMMC, src: 0x0003c200, des: 0xfffd0000, size: 0x0000c000, part: 0 | |
dmc_version 0001 | |
Check phy result | |
INFO : End of CA training | |
INFO : End of initialization | |
INFO : Training has run successfully! | |
Check phy result | |
INFO : End of initialization | |
INFO : End of read enable training | |
INFO : End of fine write leveling | |
INFO : End of Write leveling coarse delay | |
INFO : Training has run successfully! | |
Check phy result | |
INFO : End of initialization | |
INFO : End of read dq deskew training | |
INFO : End of MPR read delay center optimization | |
INFO : End of write delay center optimization | |
INFO : End of read delay center optimization | |
INFO : End of max read latency training | |
INFO : Training has run successfully! | |
1D training succeed | |
Load ddrfw from eMMC, src: 0x00048200, des: 0xfffd0000, size: 0x0000c000, part: 0 | |
Check phy result | |
INFO : End of initialization | |
INFO : End of 2D read delay Voltage center optimization | |
INFO : End of 2D read delay Voltage center optimization | |
INFO : End of 2D write delay Voltage center optimization | |
INFO : End of 2D write delay Voltage center optimization | |
INFO : Training has run successfully! | |
channel==0 | |
RxClkDly_Margin_A0==58 ps 6 | |
TxDqDly_Margin_A0==97 ps 10 | |
RxClkDly_Margin_A1==0 ps 0 | |
TxDqDly_Margin_A1==0 ps 0 | |
TrainedVREFDQ_A0==30 | |
TrainedVREFDQ_A1==0 | |
VrefDac_Margin_A0==32 | |
DeviceVref_Margin_A0==30 | |
VrefDac_Margin_A1==0 | |
DeviceVref_Margin_A1==0 | |
channel==1 | |
RxClkDly_Margin_A0==106 ps 11 | |
TxDqDly_Margin_A0==97 ps 10 | |
RxClkDly_Margin_A1==0 ps 0 | |
TxDqDly_Margin_A1==0 ps 0 | |
TrainedVREFDQ_A0==30 | |
TrainedVREFDQ_A1==0 | |
VrefDac_Margin_A0==29 | |
DeviceVref_Margin_A0==30 | |
VrefDac_Margin_A1==0 | |
DeviceVref_Margin_A1==0 | |
dwc_ddrphy_apb_wr((0<<20)|(2<<16)|(0<<12)|(0xb0):0004 | |
soc_vref_reg_value 0x 00000027 00000029 00000026 00000026 00000027 00000028 00000028 00000029 00000027 00000026 00000025 00000026 00000029 00000028 00000028 00000027 00000027 00000026 00000025 00000024 00000024 00000025 00000025 00000026 00000027 00000025 00000026 00000028 00000025 00000028 00000026 00000026 dram_vref_reg_value 0x 00000013 | |
2D training succeed | |
aml_ddr_fw_vesion: LPDDR4_PHY_V_0_1_18 build time: Aug 28 2019 13:53:31 | |
auto size-- 65535DDR cs0 size: 2048MB | |
DDR cs1 size: 0MB | |
DMC_DDR_CTRL: 00c0002cDDR size: 2048MB | |
cs0 DataBus test pass | |
cs0 AddrBus test pass | |
100bdlr_step_size ps== 450 | |
result report | |
boot times 0Enable ddr reg access | |
00000000 | |
emmc switch 3 ok | |
BL2: rpmb counter: 0x00000024 | |
00000000 | |
emmc switch 0 ok | |
Load FIP HDR from eMMC, src: 0x00010200, des: 0x01700000, size: 0x00004000, part: 0 | |
Load BL3X from eMMC, src: 0x00078200, des: 0x01768000, size: 0x000cc000, part: 0 | |
bl2z: ptr: 05129330, size: 00001e40 | |
0.0;M3 CHK:0;cm4_sp_mode 0 | |
MVN_1=0x00000000 | |
MVN_2=0x00000000 | |
[Image: g12a_v1.1.3390-6ac5299 2019-09-26 14:09:46 luan.yuan@droid15-sz] | |
OPS=0x04 | |
ring efuse init | |
2b 0c 04 00 01 0c 04 00 00 08 38 38 37 50 43 50 | |
[0.017319 Inits done] | |
secure task start! | |
high task start! | |
low task start! | |
run into bl31 | |
NOTICE: BL31: v1.3(release):4fc40b1 | |
NOTICE: BL31: Built : 15:57:33, May 22 2019 | |
NOTICE: BL31: G12A normal boot! | |
NOTICE: BL31: BL33 decompress pass | |
ERROR: Error initializing runtime service opteed_fast | |
U-Boot 2015.01 (Dec 17 2021 - 18:21:21) | |
DRAM: 2 GiB | |
Relocation Offset is: 76e4c000 | |
spi_post_bind(spifc): req_seq = 0 | |
register usb cfg[0][1] = 0000000077f32410 | |
aml_i2c_init_port init regs for 0 | |
MCU version: 0x00 0x03 | |
MCU version is to low! Doesn't support froce boot from SD card. | |
MMC: aml_priv->desc_buf = 0x0000000073e3ce50 | |
aml_priv->desc_buf = 0x0000000073e3f190 | |
SDIO Port B: 0, SDIO Port C: 1 | |
co-phase 0x2, tx-dly 0, clock 400000 | |
co-phase 0x2, tx-dly 0, clock 400000 | |
co-phase 0x2, tx-dly 0, clock 400000 | |
emmc/sd response timeout, cmd8, status=0x3ff2800 | |
emmc/sd response timeout, cmd55, status=0x3ff2800 | |
co-phase 0x2, tx-dly 0, clock 400000 | |
co-phase 0x2, tx-dly 0, clock 40000000 | |
aml_sd_retry_refix[983]:delay = 0x0,gadjust =0x172000 | |
[mmc_startup] mmc refix success | |
init_part() 297: PART_TYPE_AML | |
[mmc_init] mmc init success | |
start dts,buffer=0000000073e41a00,dt_addr=0000000073e41a00 | |
get_partition_from_dts() 91: ret 0 | |
parts: 3 | |
00: logo 0000000000800000 1 | |
01: ramdisk 0000000002000000 1 | |
02: rootfs ffffffffffffffff 4 | |
init_part() 297: PART_TYPE_AML | |
eMMC/TSD partition table have been checked OK! | |
crc32_s:0x1577dad == storage crc_pattern:0x1577dad!!! | |
crc32_s:0xee152b83 == storage crc_pattern:0xee152b83!!! | |
crc32_s:0x79f50f07 == storage crc_pattern:0x79f50f07!!! | |
mmc env offset: 0x6c00000 | |
In: serial | |
Out: serial | |
Err: serial | |
reboot_mode=cold_boot | |
[store]To run cmd[emmc dtb_read 0x1000000 0x40000] | |
_verify_dtb_checksum()-3477: calc ddf7b96a, store ddf7b96a | |
_verify_dtb_checksum()-3477: calc ddf7b96a, store ddf7b96a | |
dtb_read()-3694: total valid 2 | |
update_old_dtb()-3675: do nothing | |
aml_i2c_init_port init regs for 0 | |
fusb302_init: Device ID: 0x91 | |
CC connected in 0 as UFP | |
fusb302 detect chip.port_num = 0 | |
amlkey_init() enter! | |
[EFUSE_MSG]keynum is 1 | |
vpu: clk_level in dts: 7 | |
vpu: vpu_power_on | |
vpu: set clk: 666667000Hz, readback: 666666667Hz(0x100) | |
vpu: vpu_module_init_config | |
vpp: vpp_init | |
vpp: vpp osd2 matrix rgb2yuv.............. | |
cvbs: cpuid:0x2b | |
LCD_RESET PIN: 0 | |
lcd: detect mode: tablet, key_valid: 0 | |
lcd: detect lcd_clk_path: 1 | |
lcd: load config from dts | |
lcd: pinctrl_version: 2 | |
lcd: use panel_type=lcd_0 | |
lcd: bl: pinctrl_version: 2 | |
lcd: bl: name: backlight_pwm, method: 1 | |
lcd: bl: aml_bl_power_ctrl: 0 | |
Net: dwmac.ff3f0000 | |
amlkey_init() enter! | |
amlkey_init() 71: already init! | |
[EFUSE_MSG]keynum is 1 | |
MACADDR:02:00:00:04:0c:01(from chipid) | |
upgrade_step=0 | |
reboot_mode:::: cold_boot | |
amlkey_init() enter! | |
amlkey_init() 71: already init! | |
[EFUSE_MSG]keynum is 1 | |
[KM]Error:f[key_manage_query_size]L515:key[usid] not programed yet | |
mac address: c8:63:14:72:56:b4 | |
[KM]Error:f[key_manage_query_size]L515:key[deviceid] not programed yet | |
edid preferred_mode is <NULL>[0] | |
hdr mode is 0 | |
dv mode is ver:0 len: 0 | |
hdr10+ mode is 0 | |
HDMI cable is NOT connected | |
hpd_state=0 | |
[OSD]load fb addr from dts:/meson-fb | |
[OSD]load fb addr from dts:/fb | |
[OSD]set initrd_high: 0x7f800000 | |
[OSD]fb_addr for logo: 0x7f800000 | |
[OSD]load fb addr from dts:/meson-fb | |
[OSD]load fb addr from dts:/fb | |
[OSD]fb_addr for logo: 0x7f800000 | |
[OSD]VPP_OFIFO_SIZE:0xfff01fff | |
[CANVAS]canvas init | |
[CANVAS]addr=0x7f800000 width=5760, height=2160 | |
card out | |
** Bad device mmc 0 ** | |
Failed to mount ext2 filesystem... | |
** Unrecognized filesystem type ** | |
1080138 bytes read in 44 ms (23.4 MiB/s) | |
[OSD]osd_hw.free_dst_data: 0,1079,0,1919 | |
[OSD]osd1_update_disp_freescale_enable | |
cvbs: outputmode[panel] is invalid | |
hdmitx: outputmode[panel] is invalid | |
vpp: vpp_matrix_update: 0 | |
vpp: g12a/b post2(bit12) matrix: YUV limit -> RGB .............. | |
lcd: enable: TS050, mipi, 1080x1920@47.6Hz | |
lcd: tablet driver init(ver 20180718): mipi | |
lcd: lcd_pll_wait_lock_g12a: path=1, pll_lock=1, wait_loop=1 | |
vpp: vpp_init_lcd_gamma_table | |
lcd: pixel_clk = 120.000MHz, bit_rate = 960.000MHz, lanebyteclk = 120.000MHz | |
lcd: Waiting STOP STATE LANE | |
lcd: dsi init on | |
lcd: bl: set level: 100, last level: 0 | |
lcd: bl: aml_bl_power_ctrl: 1 | |
lcd: clear mute | |
vpp: Rx hdr_info.hdr_sup_eotf_smpte_st_2084 = 0 | |
amlkey_init() enter! | |
amlkey_init() 71: already init! | |
[EFUSE_MSG]keynum is 1 | |
[KM]Error:f[key_manage_query_size]L515:key[usid] not programed yet | |
mac address: c8:63:14:72:56:b4 | |
[KM]Error:f[key_manage_query_size]L515:key[deviceid] not programed yet | |
gpio: pin GPIOAO_7 (gpio 7) value is 1 | |
saradc: 0x28a, hw_ver: 0x32 (VIM3.V12) | |
Product checking: pass! Hardware version: VIM3.V12 | |
normal power on | |
boot wol: disable | |
port mode is usb3.0 | |
Hit Enter or space or Ctrl+C key to stop autoboot -- : 1 0 | |
pll tsensor avg: 0x2019, u_efuse: 0x804e | |
temp1: 38 | |
ddr tsensor avg: 0x2041, u_efuse: 0x8087 | |
temp2: 39 | |
device cool done | |
cfgload: start ... | |
cfgload: reading /boot.ini from mmc 0:1 ... | |
card out | |
** Bad device mmc 0 ** | |
cfgload: no /boot.ini or empty file on mmc 0:1 | |
cfgload: reading /boot/boot.ini from mmc 0:1 ... | |
card out | |
** Bad device mmc 0 ** | |
cfgload: no /boot/boot.ini or empty file on mmc 0:1 | |
cfgload: reading /boot.ini from mmc 1:1 ... | |
Failed to mount ext2 filesystem... | |
** Unrecognized filesystem type ** | |
cfgload: no /boot.ini or empty file on mmc 1:1 | |
cfgload: reading /boot/boot.ini from mmc 1:1 ... | |
Failed to mount ext2 filesystem... | |
** Unrecognized filesystem type ** | |
cfgload: no /boot/boot.ini or empty file on mmc 1:1 | |
cfgload: reading /boot/boot.ini from mmc 1:5 ... | |
10134 bytes read in 5 ms (1.9 MiB/s) | |
cfgload: applying boot.ini... | |
[#] Script a:73e6c210 l:10114 c:0 s:0 - run | |
Starting boot.ini... | |
saradc: 0x28a, hw_ver: 0x32 (VIM3.V12) | |
uboot type: vendor | |
Scanning mmc 0:1... | |
card out | |
** Bad device mmc 0 ** | |
Scanning mmc 0:5... | |
card out | |
** Bad device mmc 0 ** | |
Scanning mmc 1:1... | |
** Unrecognized filesystem type ** | |
Scanning mmc 1:5... | |
12399127 bytes read in 358 ms (33 MiB/s) | |
23136264 bytes read in 659 ms (33.5 MiB/s) | |
89566 bytes read in 9 ms (9.5 MiB/s) | |
4362 bytes read in 5 ms (851.6 KiB/s) | |
Import env.txt | |
Can not get u-boot part UUID, set to NULL | |
Booting mainline kernel... | |
libfdt fdt_path_offset() returned FDT_ERR_NOTFOUND | |
port mode is usb3.0 | |
libfdt fdt_path_offset() returned FDT_ERR_NOTFOUND | |
libfdt fdt_path_offset() returned FDT_ERR_NOTFOUND | |
libfdt fdt_path_offset() returned FDT_ERR_NOTFOUND | |
libfdt fdt_path_offset() returned FDT_ERR_NOTFOUND | |
libfdt fdt_path_offset() returned FDT_ERR_NOTFOUND | |
libfdt fdt_path_offset() returned FDT_ERR_NOTFOUND | |
Apply dtbo uart3 | |
** File not found boot/dtb/amlogic/overlays/kvim3l/uart3.dtbo ** | |
Apply dtbo pwm_f | |
** File not found boot/dtb/amlogic/overlays/kvim3l/pwm_f.dtbo ** | |
Apply dtbo i2c3 | |
** File not found boot/dtb/amlogic/overlays/kvim3l/i2c3.dtbo ** | |
Apply dtbo i2s | |
** File not found boot/dtb/amlogic/overlays/kvim3l/i2s.dtbo ** | |
Apply dtbo watchdog | |
** File not found boot/dtb/amlogic/overlays/kvim3l/watchdog.dtbo ** | |
HDMI: Autodetect: 1080p60hz | |
## Loading init Ramdisk from Legacy Image at 13000000 ... | |
Image Name: uInitrd | |
Image Type: AArch64 Linux RAMDisk Image (uncompressed) | |
Data Size: 12399063 Bytes = 11.8 MiB | |
Load Address: 00000000 | |
Entry Point: 00000000 | |
Verifying Checksum ... OK | |
load dtb from 0x1000000 ...... | |
## Flattened Device Tree blob at 04080000 | |
Booting using the fdt blob at 0x4080000 | |
reserving fdt memory region: addr=4080000 size=16000 | |
Loading Ramdisk to 73266000, end 73e391d7 ... OK | |
Loading Device Tree to 000000001ffe7000, end 000000001fffffff ... OK | |
Starting kernel ... | |
uboot time: 5118021 us |
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