Created
October 20, 2020 06:26
-
-
Save lemmi/cc25ad8bf1d9940cd889e73102a11a7d to your computer and use it in GitHub Desktop.
ERPro-8 DTS
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
| /dts-v1/; | |
| / { | |
| compatible = "ubnt,e200"; | |
| model = "ubnt,e200"; | |
| interrupt-parent = <0x1>; | |
| #address-cells = <0x2>; | |
| #size-cells = <0x2>; | |
| soc@0 { | |
| compatible = "simple-bus"; | |
| ranges; | |
| #address-cells = <0x2>; | |
| #size-cells = <0x2>; | |
| i2c@1180000001200 { | |
| compatible = "cavium,octeon-3860-twsi"; | |
| #address-cells = <0x1>; | |
| interrupts = <0x0 0x3b>; | |
| #size-cells = <0x0>; | |
| reg = <0x11800 0x1200 0x0 0x200>; | |
| clock-frequency = <0x186a0>; | |
| }; | |
| mdio@1180000001800 { | |
| compatible = "cavium,octeon-3860-mdio"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| reg = <0x11800 0x1800 0x0 0x40>; | |
| ethernet-phy@4 { | |
| compatible = "broadcom,bcm", "ethernet-phy-ieee802.3-c22"; | |
| interrupt-parent = <0x2>; | |
| phandle = <0x3>; | |
| reg = <0x4>; | |
| linux,phandle = <0x3>; | |
| }; | |
| ethernet-phy@2 { | |
| compatible = "broadcom,bcm", "ethernet-phy-ieee802.3-c22"; | |
| interrupt-parent = <0x2>; | |
| phandle = <0xb>; | |
| reg = <0x2>; | |
| linux,phandle = <0xb>; | |
| }; | |
| ethernet-phy@0 { | |
| compatible = "broadcom,bcm", "ethernet-phy-ieee802.3-c22"; | |
| interrupt-parent = <0x2>; | |
| phandle = <0x9>; | |
| reg = <0x0>; | |
| linux,phandle = <0x9>; | |
| }; | |
| ethernet-phy@5 { | |
| compatible = "broadcom,bcm", "ethernet-phy-ieee802.3-c22"; | |
| interrupt-parent = <0x2>; | |
| phandle = <0x4>; | |
| reg = <0x5>; | |
| linux,phandle = <0x4>; | |
| }; | |
| ethernet-phy@3 { | |
| compatible = "broadcom,bcm", "ethernet-phy-ieee802.3-c22"; | |
| interrupt-parent = <0x2>; | |
| phandle = <0xc>; | |
| reg = <0x3>; | |
| linux,phandle = <0xc>; | |
| }; | |
| ethernet-phy@1 { | |
| compatible = "broadcom,bcm", "ethernet-phy-ieee802.3-c22"; | |
| interrupt-parent = <0x2>; | |
| phandle = <0xa>; | |
| reg = <0x1>; | |
| linux,phandle = <0xa>; | |
| }; | |
| }; | |
| serial@1180000000800 { | |
| current-speed = <0x1c200>; | |
| compatible = "cavium,octeon-3860-uart", "ns16550"; | |
| interrupts = <0x0 0x22>; | |
| reg = <0x11800 0x800 0x0 0x400>; | |
| clock-frequency = <0x23c34600>; | |
| reg-shift = <0x3>; | |
| }; | |
| uctl@118006f000000 { | |
| compatible = "cavium,octeon-6335-uctl"; | |
| refclk-frequency = <0xb71b00>; | |
| ranges; | |
| #address-cells = <0x2>; | |
| #size-cells = <0x2>; | |
| refclk-type = "crystal"; | |
| reg = <0x11800 0x6f000000 0x0 0x100>; | |
| ohci@16f0000000400 { | |
| compatible = "cavium,octeon-6335-ohci", "usb-ohci"; | |
| interrupts = <0x0 0x38>; | |
| big-endian-regs; | |
| reg = <0x16f00 0x400 0x0 0x100>; | |
| }; | |
| ehci@16f0000000000 { | |
| compatible = "cavium,octeon-6335-ehci", "usb-ehci"; | |
| interrupts = <0x0 0x38>; | |
| big-endian-regs; | |
| reg = <0x16f00 0x0 0x0 0x100>; | |
| }; | |
| }; | |
| dma-engine@1180000000108 { | |
| compatible = "cavium,octeon-5750-bootbus-dma"; | |
| interrupts = <0x0 0x3f>; | |
| reg = <0x11800 0x108 0x0 0x8>; | |
| }; | |
| bootbus@1180000000000 { | |
| compatible = "cavium,octeon-3860-bootbus"; | |
| ranges = <0x0 0x0 0x0 0x1f400000 0xc00000 0x1 0x0 0x10000 0x30000000 0x0 0x2 0x0 0x0 0x1d040000 0x10000 0x3 0x0 0x0 0x1d050000 0x10000 0x4 0x0 0x0 0x1d020000 0x10000 0x5 0x0 0x10000 0x40000000 0x0 0x6 0x0 0x10000 0x50000000 0x0 0x7 0x0 0x10000 0x90000000 0x0>; | |
| #address-cells = <0x2>; | |
| #size-cells = <0x1>; | |
| reg = <0x11800 0x0 0x0 0x200>; | |
| cavium,cs-config@3 { | |
| compatible = "cavium,octeon-3860-bootbus-config"; | |
| cavium,t-rd-dly = <0x0>; | |
| cavium,t-oe = <0x7d>; | |
| cavium,wait-mode; | |
| cavium,t-wait = <0x1e>; | |
| cavium,t-pause = <0x0>; | |
| cavium,t-we = <0x96>; | |
| cavium,t-page = <0x12c>; | |
| cavium,t-ce = <0x1e>; | |
| cavium,pages = <0x0>; | |
| cavium,bus-width = <0x10>; | |
| cavium,cs-index = <0x3>; | |
| cavium,t-wr-hld = <0x1e>; | |
| cavium,t-adr = <0x0>; | |
| cavium,t-rd-hld = <0x64>; | |
| }; | |
| cavium,cs-config@4 { | |
| compatible = "cavium,octeon-3860-bootbus-config"; | |
| cavium,t-rd-dly = <0xa>; | |
| cavium,t-oe = <0xa0>; | |
| cavium,t-wait = <0x12c>; | |
| cavium,t-pause = <0x32>; | |
| cavium,t-we = <0x64>; | |
| cavium,t-page = <0x12c>; | |
| cavium,t-ce = <0xa>; | |
| cavium,pages = <0x0>; | |
| cavium,bus-width = <0x8>; | |
| cavium,cs-index = <0x4>; | |
| cavium,t-wr-hld = <0x0>; | |
| cavium,t-adr = <0xa>; | |
| cavium,t-rd-hld = <0x0>; | |
| }; | |
| nor@0,0 { | |
| compatible = "cfi-flash"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| reg = <0x0 0x0 0x800000>; | |
| }; | |
| cavium,cs-config@2 { | |
| compatible = "cavium,octeon-3860-bootbus-config"; | |
| cavium,t-rd-dly = <0x0>; | |
| cavium,t-oe = <0x7d>; | |
| cavium,t-wait = <0x12c>; | |
| cavium,t-pause = <0x0>; | |
| cavium,t-we = <0x96>; | |
| cavium,t-page = <0x12c>; | |
| cavium,t-ce = <0x12c>; | |
| cavium,pages = <0x0>; | |
| cavium,bus-width = <0x10>; | |
| cavium,cs-index = <0x2>; | |
| cavium,t-wr-hld = <0x12c>; | |
| cavium,t-adr = <0x0>; | |
| cavium,t-rd-hld = <0x64>; | |
| }; | |
| cavium,cs-config@0 { | |
| compatible = "cavium,octeon-3860-bootbus-config"; | |
| cavium,t-rd-dly = <0x0>; | |
| cavium,t-oe = <0x32>; | |
| cavium,t-wait = <0x12c>; | |
| cavium,t-pause = <0x0>; | |
| cavium,t-we = <0x23>; | |
| cavium,t-page = <0x19>; | |
| cavium,t-ce = <0x32>; | |
| cavium,pages = <0x0>; | |
| cavium,bus-width = <0x8>; | |
| cavium,cs-index = <0x0>; | |
| cavium,t-wr-hld = <0x23>; | |
| cavium,t-adr = <0xa>; | |
| cavium,t-rd-hld = <0x19>; | |
| }; | |
| }; | |
| gpio-controller@1070000000800 { | |
| compatible = "cavium,octeon-3860-gpio"; | |
| gpio-controller; | |
| #interrupt-cells = <0x2>; | |
| interrupts = <0x0 0x10>; | |
| phandle = <0x2>; | |
| reg = <0x10700 0x800 0x0 0x100>; | |
| #gpio-cells = <0x2>; | |
| linux,phandle = <0x2>; | |
| interrupt-controller; | |
| }; | |
| serial@1180000000c00 { | |
| current-speed = <0x1c200>; | |
| compatible = "cavium,octeon-3860-uart", "ns16550"; | |
| interrupts = <0x0 0x23>; | |
| reg = <0x11800 0xc00 0x0 0x400>; | |
| clock-frequency = <0x23c34600>; | |
| reg-shift = <0x3>; | |
| }; | |
| interrupt-controller@1070000000000 { | |
| compatible = "cavium,octeon-3860-ciu"; | |
| #interrupt-cells = <0x2>; | |
| phandle = <0x1>; | |
| reg = <0x10700 0x0 0x0 0x7000>; | |
| linux,phandle = <0x1>; | |
| interrupt-controller; | |
| }; | |
| spi@1070000001000 { | |
| compatible = "cavium,octeon-3010-spi"; | |
| #address-cells = <0x1>; | |
| interrupts = <0x0 0x3a>; | |
| #size-cells = <0x0>; | |
| reg = <0x10700 0x1000 0x0 0x100>; | |
| }; | |
| dma-engine@1180000000100 { | |
| compatible = "cavium,octeon-5750-bootbus-dma"; | |
| interrupts = <0x0 0x3f>; | |
| reg = <0x11800 0x100 0x0 0x8>; | |
| }; | |
| mmc@1180000002000 { | |
| compatible = "cavium,octeon-6130-mmc"; | |
| #address-cells = <0x1>; | |
| interrupts = <0x1 0x13 0x0 0x3f>; | |
| #size-cells = <0x0>; | |
| reg = <0x11800 0x2000 0x0 0x100 0x11800 0x168 0x0 0x20>; | |
| mmc-slot@0 { | |
| compatible = "cavium,octeon-6130-mmc-slot", "mmc-spi-slot"; | |
| voltage-ranges = <0xce4 0xce4>; | |
| cavium,bus-max-width = <0x8>; | |
| reg = <0x0>; | |
| spi-max-frequency = <0x18cba80>; | |
| }; | |
| }; | |
| i2c@1180000001000 { | |
| compatible = "cavium,octeon-3860-twsi"; | |
| #address-cells = <0x1>; | |
| interrupts = <0x0 0x2d>; | |
| #size-cells = <0x0>; | |
| reg = <0x11800 0x1000 0x0 0x200>; | |
| clock-frequency = <0x186a0>; | |
| }; | |
| mdio@1180000001900 { | |
| compatible = "cavium,octeon-3860-mdio"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| reg = <0x11800 0x1900 0x0 0x40>; | |
| ethernet-phy@0 { | |
| compatible = "broadcom,bcm", "ethernet-phy-ieee802.3-c22"; | |
| interrupt-parent = <0x2>; | |
| phandle = <0x5>; | |
| reg = <0x0>; | |
| linux,phandle = <0x5>; | |
| }; | |
| ethernet-phy@1 { | |
| compatible = "broadcom,bcm", "ethernet-phy-ieee802.3-c22"; | |
| interrupt-parent = <0x2>; | |
| phandle = <0x6>; | |
| reg = <0x1>; | |
| linux,phandle = <0x6>; | |
| }; | |
| }; | |
| pip@11800a0000000 { | |
| compatible = "cavium,octeon-3860-pip"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| reg = <0x11800 0xa0000000 0x0 0x2000>; | |
| interface@1 { | |
| compatible = "cavium,octeon-3860-pip-interface"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| reg = <0x1>; | |
| ethernet@2 { | |
| phy-handle = <0xb>; | |
| compatible = "cavium,octeon-3860-pip-port"; | |
| local-mac-address = [fc ec da 05 eb 33]; | |
| reg = <0x2>; | |
| }; | |
| ethernet@0 { | |
| phy-handle = <0x9>; | |
| compatible = "cavium,octeon-3860-pip-port"; | |
| local-mac-address = [fc ec da 05 eb 31]; | |
| reg = <0x0>; | |
| }; | |
| ethernet@3 { | |
| phy-handle = <0xc>; | |
| compatible = "cavium,octeon-3860-pip-port"; | |
| local-mac-address = [fc ec da 05 eb 34]; | |
| reg = <0x3>; | |
| }; | |
| ethernet@1 { | |
| phy-handle = <0xa>; | |
| compatible = "cavium,octeon-3860-pip-port"; | |
| local-mac-address = [fc ec da 05 eb 32]; | |
| reg = <0x1>; | |
| }; | |
| }; | |
| interface@0 { | |
| compatible = "cavium,octeon-3860-pip-interface"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| reg = <0x0>; | |
| ethernet@2 { | |
| phy-handle = <0x5>; | |
| compatible = "cavium,octeon-3860-pip-port"; | |
| local-mac-address = [fc ec da 05 eb 37]; | |
| reg = <0x2>; | |
| }; | |
| ethernet@0 { | |
| phy-handle = <0x3>; | |
| compatible = "cavium,octeon-3860-pip-port"; | |
| local-mac-address = [fc ec da 05 eb 35]; | |
| reg = <0x0>; | |
| }; | |
| ethernet@3 { | |
| phy-handle = <0x6>; | |
| compatible = "cavium,octeon-3860-pip-port"; | |
| local-mac-address = [fc ec da 05 eb 38]; | |
| reg = <0x3>; | |
| }; | |
| ethernet@1 { | |
| phy-handle = <0x4>; | |
| compatible = "cavium,octeon-3860-pip-port"; | |
| local-mac-address = [fc ec da 05 eb 36]; | |
| reg = <0x1>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| aliases { | |
| twsi0 = "/soc@0/i2c@1180000001000"; | |
| smi0 = "/soc@0/mdio@1180000001800"; | |
| uart0 = "/soc@0/serial@1180000000800"; | |
| twsi1 = "/soc@0/i2c@1180000001200"; | |
| flash0 = "/soc@0/bootbus@1180000000000/nor@0,0"; | |
| pip = "/soc@0/pip@11800a0000000"; | |
| smi1 = "/soc@0/mdio@1180000001900"; | |
| uart1 = "/soc@0/serial@1180000000c00"; | |
| }; | |
| memory { | |
| device_type = "memory"; | |
| reg = <0x0 0x0 0x0 0x10000000 0x0 0x20000000 0x0 0x70000000>; | |
| }; | |
| }; |
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment