Lennart Heim lheim
lheim
/ python-serial-to-mcu.py
Created
June 16, 2020 15:56
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| import serial | |
| import time | |
| port = serial.Serial(port = '/dev/tty.usbmodem142403', baudrate=115200, timeout=2, write_timeout = 10, | |
| stopbits=serial.STOPBITS_ONE, bytesize=8) | |
| test_image = np.array(1024 * [0.5], np.float32) | |
| print(test_image.shape) |
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| interface=wlan0 | |
| driver=nl80211 | |
| ssid=Pi3B+ac | |
| hw_mode=a | |
| channel=36 | |
| ieee80211ac=1 | |
| wpa=2 | |
| wpa_passphrase=inetsinets | |
| wpa_key_mgmt=WPA-PSK | |
| wpa_pairwise=TKIP |
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| interface=wlan0 | |
| driver=nl80211 | |
| ssid=Pi3B+ac | |
| hw_mode=a | |
| channel=36 | |
| ieee80211ac=1 | |
| wpa=2 | |
| wpa_passphrase=inetsinets | |
| wpa_key_mgmt=WPA-PSK | |
| wmm_enabled=1 |
We can make this file beautiful and searchable if this error is corrected: It looks like row 8 should actually have 20 columns, instead of 1. in line 7.
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| container_name,rate (Msps),uhd_received,uhd_dropped,uhd_overflows,uhd_transmitted,uhd_sequence,uhd_underflows,uhd_late,uhd_timeouts,uhd_efficiency (rx/tx),idle_idle,io_idle,idle_load,io_load,load_diff,rx_idle (Mbits),tx_idle (Mbits),rx_load (Mbits),tx_load (Mbits) | |
| bench_CPU100perc_nop,10.000000,100104569,0,0,100229019,0,0,0,0,0.9988,97.1458,0.0625,94.588,0.078,2.5578,36.0,36.0,284.0,283.0 | |
| bench_CPU100perc_nop,10.000000,100105853,0,0,100229019,0,0,0,0,0.9988,97.185,0.1042,94.559,0.13,2.626,36.0,36.0,284.0,283.0 | |
| bench_CPU100perc_nop,14.285714,143004430,0,0,143092059,0,1,0,0,0.9994,97.0758,0.1267,92.576,0.076,4.4998,47.0,47.0,411.0,409.0 | |
| bench_CPU100perc_nop,14.285714,143006453,0,0,143092059,0,0,0,0,0.9994,96.9825,0.0833,92.725,0.077,4.2575,51.0,51.0,406.0,404.0 | |
| bench_CPU100perc_nop,14.285714,143010959,0,0,143092059,0,1,0,0,0.9994,97.13,0.0833,92.237,0.306,4.893,51.0,51.0,406.0,404.0 | |
| bench_CPU100perc_nop,14.285714,143020312,0,0,143092059,0,0,0,0,0.9995,96.8367,0.1467,92.374,0.157,4.4627,51.0,51.0,406.0,404.0 | |
| ben |
lheim
/ sample_data_1container_1usrp.csv
Last active
August 27, 2016 10:09
sample_data_1container_1usrp
We can make this file beautiful and searchable if this error is corrected: It looks like row 8 should actually have 19 columns, instead of 9. in line 7.
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| container_name,rate,uhd_received,uhd_dropped,uhd_overflows,uhd_transmitted,uhd_sequence,uhd_underflows,uhd_late,uhd_timeouts,uhd_efficiency (rx/tx),idle_idle,io_idle,idle_load,io_load,rx_idle,tx_idle,rx_load,tx_load | |
| bench_CPU100perc_nop,10.000000 Msps,100104569,0,0,100229019,0,0,0,0,0.9988,97.1458,0.0625,94.588,0.078,36.0,36.0,284.0,283.0 | |
| bench_CPU100perc_nop,10.000000 Msps,100105853,0,0,100229019,0,0,0,0,0.9988,97.185,0.1042,94.559,0.13,36.0,36.0,284.0,283.0 | |
| bench_CPU100perc_nop,14.285714 Msps,143004430,0,0,143092059,0,1,0,0,0.9994,97.0758,0.1267,92.576,0.076,47.0,47.0,411.0,409.0 | |
| bench_CPU100perc_nop,14.285714 Msps,143006453,0,0,143092059,0,0,0,0,0.9994,96.9825,0.0833,92.725,0.077,51.0,51.0,406.0,404.0 | |
| bench_CPU100perc_nop,14.285714 Msps,143010959,0,0,143092059,0,1,0,0,0.9994,97.13,0.0833,92.237,0.306,51.0,51.0,406.0,404.0 | |
| bench_CPU100perc_nop,14.285714 Msps,143020312,0,0,143092059,0,0,0,0,0.9995,96.8367,0.1467,92.374,0.157,51.0,51.0,406.0,404.0 | |
| bench_CPU100perc_nop,1.000000 Msps,10010233,0,0,10255839,0,0,0 |