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Created March 4, 2025 14:39
pw940030-p14000620
WARNING: line length of 101 exceeds 100 columns
#29: FILE: arch/riscv/kernel/unaligned_access_speed.c:371:
+ per_cpu(vector_misaligned_access, cpu) = RISCV_HWPROBE_MISALIGNED_VECTOR_UNSUPPORTED;
total: 0 errors, 1 warnings, 0 checks, 14 lines checked
NOTE: For some of the reported defects, checkpatch may be able to
mechanically convert to the typical style using --fix or --fix-inplace.
Commit b2ec8f190fd9 ("riscv: Fix riscv_online_cpu_vec") has style problems, please review.
NOTE: Ignored message types: ALLOC_SIZEOF_STRUCT CAMELCASE COMMIT_LOG_LONG_LINE GIT_COMMIT_ID MACRO_ARG_REUSE NO_AUTHOR_SIGN_OFF
NOTE: If any of the errors are false positives, please report
them to the maintainer, see CHECKPATCH in MAINTAINERS.
total: 0 errors, 1 warnings, 0 checks, 14 lines checked
WARNING: line length of 101 exceeds 100 columns
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