Basic Makefile for C

Makefile

TARGET = <binary name>

CFLAGS = -g -Wall -Wextra $(OPTFLAGS)
CC ?= llvm-gcc

BUILDDIR = build
DISTDIR = dist

HEADERS := $(wildcard src/**/*.h src/*.h)
SRC := $(wildcard src/**/*.c src/*.c)
OBJS := $(SRC:.c=.o)

.PHONY: all
all: $(TARGET)

$(TARGET): $(OBJS)
	$(CC) $(OBJS) -Wall $(LIBS) -o $@

%.o: %.c $(HEADERS)
	$(CC) $(CFLAGS) -c $< -o $@

.PHONY: clean
clean:
	@$(RM) -v $(OBJS) $(TARGET)