Created
October 22, 2018 09:09
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/* | |
* CAUTION: This file is automatically generated by Xilinx. | |
* Version: | |
* Today is: Mon Oct 22 17:53:19 2018 | |
*/ | |
/ { | |
amba_pl: amba_pl { | |
#address-cells = <1>; | |
#size-cells = <1>; | |
compatible = "simple-bus"; | |
ranges ; | |
axi_dynclk_0: axi_dynclk@43c20000 { | |
compatible = "xlnx,axi-dynclk-1.0"; | |
reg = <0x43c20000 0x10000>; | |
xlnx,s00-axi-addr-width = <0x5>; | |
xlnx,s00-axi-data-width = <0x20>; | |
}; | |
axi_gpio_eth: gpio@41230000 { | |
#gpio-cells = <2>; | |
compatible = "xlnx,xps-gpio-1.00.a"; | |
gpio-controller ; | |
reg = <0x41230000 0x10000>; | |
xlnx,all-inputs = <0x0>; | |
xlnx,all-inputs-2 = <0x0>; | |
xlnx,all-outputs = <0x0>; | |
xlnx,all-outputs-2 = <0x0>; | |
xlnx,dout-default = <0x00000000>; | |
xlnx,dout-default-2 = <0x00000000>; | |
xlnx,gpio-width = <0x1>; | |
xlnx,gpio2-width = <0x20>; | |
xlnx,interrupt-present = <0x0>; | |
xlnx,is-dual = <0x0>; | |
xlnx,tri-default = <0xFFFFFFFF>; | |
xlnx,tri-default-2 = <0xFFFFFFFF>; | |
}; | |
axi_gpio_led: gpio@41220000 { | |
#gpio-cells = <2>; | |
compatible = "xlnx,xps-gpio-1.00.a"; | |
gpio-controller ; | |
reg = <0x41220000 0x10000>; | |
xlnx,all-inputs = <0x0>; | |
xlnx,all-inputs-2 = <0x0>; | |
xlnx,all-outputs = <0x0>; | |
xlnx,all-outputs-2 = <0x0>; | |
xlnx,dout-default = <0x00000000>; | |
xlnx,dout-default-2 = <0x00000000>; | |
xlnx,gpio-width = <0x4>; | |
xlnx,gpio2-width = <0x20>; | |
xlnx,interrupt-present = <0x0>; | |
xlnx,is-dual = <0x0>; | |
xlnx,tri-default = <0xFFFFFFFF>; | |
xlnx,tri-default-2 = <0xFFFFFFFF>; | |
}; | |
axi_gpio_sw_btn: gpio@41210000 { | |
#gpio-cells = <2>; | |
compatible = "xlnx,xps-gpio-1.00.a"; | |
gpio-controller ; | |
reg = <0x41210000 0x10000>; | |
xlnx,all-inputs = <0x1>; | |
xlnx,all-inputs-2 = <0x1>; | |
xlnx,all-outputs = <0x0>; | |
xlnx,all-outputs-2 = <0x0>; | |
xlnx,dout-default = <0x00000000>; | |
xlnx,dout-default-2 = <0x00000000>; | |
xlnx,gpio-width = <0x4>; | |
xlnx,gpio2-width = <0x4>; | |
xlnx,interrupt-present = <0x0>; | |
xlnx,is-dual = <0x1>; | |
xlnx,tri-default = <0xFFFFFFFF>; | |
xlnx,tri-default-2 = <0xFFFFFFFF>; | |
}; | |
axi_gpio_video: gpio@41200000 { | |
#gpio-cells = <2>; | |
#interrupt-cells = <2>; | |
compatible = "xlnx,xps-gpio-1.00.a"; | |
gpio-controller ; | |
interrupt-controller ; | |
interrupt-parent = <&intc>; | |
interrupts = <0 33 4>; | |
reg = <0x41200000 0x10000>; | |
xlnx,all-inputs = <0x0>; | |
xlnx,all-inputs-2 = <0x1>; | |
xlnx,all-outputs = <0x1>; | |
xlnx,all-outputs-2 = <0x0>; | |
xlnx,dout-default = <0x00000000>; | |
xlnx,dout-default-2 = <0x00000000>; | |
xlnx,gpio-width = <0x1>; | |
xlnx,gpio2-width = <0x1>; | |
xlnx,interrupt-present = <0x1>; | |
xlnx,is-dual = <0x1>; | |
xlnx,tri-default = <0xFFFFFFFF>; | |
xlnx,tri-default-2 = <0xFFFFFFFF>; | |
}; | |
axi_i2s_adi_0: axi_i2s_adi@43c40000 { | |
compatible = "xlnx,axi-i2s-adi-1.0"; | |
reg = <0x43c40000 0x10000>; | |
xlnx,bclk-pol = <0x0>; | |
xlnx,dma-type = <0x1>; | |
xlnx,has-rx = <0x1>; | |
xlnx,has-tx = <0x1>; | |
xlnx,lrclk-pol = <0x0>; | |
xlnx,num-ch = <0x1>; | |
xlnx,s-axi-min-size = <0x000001FF>; | |
xlnx,slot-width = <0x18>; | |
}; | |
axi_iic_0: i2c@41600000 { | |
#address-cells = <1>; | |
#size-cells = <0>; | |
clock-names = "ref_clk"; | |
clocks = <&clkc 15>; | |
compatible = "xlnx,xps-iic-2.00.a"; | |
interrupt-parent = <&intc>; | |
interrupts = <0 52 4>; | |
reg = <0x41600000 0x10000>; | |
}; | |
axi_vdma_0: dma@43000000 { | |
#dma-cells = <1>; | |
clock-names = "s_axi_lite_aclk", "m_axi_s2mm_aclk", "m_axi_s2mm_aclk"; | |
clocks = <&clkc 15>, <&clkc 15>, <&clkc 15>; | |
compatible = "xlnx,axi-vdma-1.00.a"; | |
interrupt-parent = <&intc>; | |
interrupts = <0 30 4>; | |
reg = <0x43000000 0x10000>; | |
xlnx,addrwidth = <0x20>; | |
xlnx,flush-fsync = <0x1>; | |
xlnx,num-fstores = <0x1>; | |
dma-channel@43000030 { | |
compatible = "xlnx,axi-vdma-s2mm-channel"; | |
interrupts = <0 30 4>; | |
xlnx,datawidth = <0x18>; | |
xlnx,device-id = <0x0>; | |
xlnx,genlock-mode ; | |
xlnx,include-dre ; | |
}; | |
}; | |
axi_vdma_1: dma@43010000 { | |
#dma-cells = <1>; | |
clock-names = "s_axi_lite_aclk", "m_axi_mm2s_aclk", "m_axi_mm2s_aclk"; | |
clocks = <&clkc 15>, <&clkc 15>, <&clkc 15>; | |
compatible = "xlnx,axi-vdma-1.00.a"; | |
interrupt-parent = <&intc>; | |
interrupts = <0 29 4>; | |
reg = <0x43010000 0x10000>; | |
xlnx,addrwidth = <0x20>; | |
xlnx,flush-fsync = <0x1>; | |
xlnx,num-fstores = <0x1>; | |
dma-channel@43010000 { | |
compatible = "xlnx,axi-vdma-mm2s-channel"; | |
interrupts = <0 29 4>; | |
xlnx,datawidth = <0x18>; | |
xlnx,device-id = <0x1>; | |
xlnx,genlock-mode ; | |
xlnx,include-dre ; | |
}; | |
}; | |
axi_vdma_2: dma@43020000 { | |
#dma-cells = <1>; | |
clock-names = "s_axi_lite_aclk", "m_axi_s2mm_aclk", "m_axi_s2mm_aclk"; | |
clocks = <&clkc 15>, <&clkc 15>, <&clkc 15>; | |
compatible = "xlnx,axi-vdma-1.00.a"; | |
interrupt-parent = <&intc>; | |
interrupts = <0 36 4>; | |
reg = <0x43020000 0x10000>; | |
xlnx,addrwidth = <0x20>; | |
xlnx,flush-fsync = <0x1>; | |
xlnx,num-fstores = <0x3>; | |
dma-channel@43020030 { | |
compatible = "xlnx,axi-vdma-s2mm-channel"; | |
interrupts = <0 36 4>; | |
xlnx,datawidth = <0x8>; | |
xlnx,device-id = <0x2>; | |
xlnx,genlock-mode ; | |
}; | |
}; | |
mipi_csi2_rx_subsystem_0: mipi_csi2_rx_subsystem@43c60000 { | |
compatible = "xlnx,mipi-csi2-rx-subsystem-3.0"; | |
interrupt-parent = <&intc>; | |
interrupts = <0 35 4>; | |
reg = <0x43c60000 0x20000>; | |
xlnx,cal-mode = "FIXED"; | |
xlnx,clk-lane-io-position = <0x0>; | |
xlnx,csi-en-activelanes = "false"; | |
xlnx,csi-en-crc = "true"; | |
xlnx,csi-filter-userdatatype = "false"; | |
xlnx,csi-opt1-regs = "false"; | |
xlnx,csi2rx-dbg = <0x0>; | |
xlnx,data-lane0-io-position = <0x2>; | |
xlnx,data-lane1-io-position = <0x4>; | |
xlnx,data-lane2-io-position = <0x6>; | |
xlnx,data-lane3-io-position = <0x8>; | |
xlnx,dphy-lanes = <0x2>; | |
xlnx,dphy-mode = "SLAVE"; | |
xlnx,en-bg0-pin0 = "false"; | |
xlnx,en-bg0-pin6 = "false"; | |
xlnx,en-bg1-pin0 = "false"; | |
xlnx,en-bg1-pin6 = "false"; | |
xlnx,en-bg2-pin0 = "false"; | |
xlnx,en-bg2-pin6 = "false"; | |
xlnx,en-bg3-pin0 = "false"; | |
xlnx,en-bg3-pin6 = "false"; | |
xlnx,en-clk300m = "false"; | |
xlnx,exdes-board = "ZCU102"; | |
xlnx,exdes-config = "MIPI_Video_Pipe_Camera_to_Display"; | |
xlnx,exdes-fmc = "LI-IMX274MIPI-FMC V1.0 Single Sensor"; | |
xlnx,hs-line-rate = <0x320>; | |
xlnx,hs-settle-ns = <0x93>; | |
xlnx,idly-group-name = "mipi_csi2rx_idly_group"; | |
xlnx,idly-tap = <0x2>; | |
xlnx,init = <0x186a0>; | |
xlnx,is-7series = "true"; | |
xlnx,mipi-slv-int = <0x0>; | |
xlnx,share-idlyctrl = "true"; | |
}; | |
pwm_rgb: PWM@43c30000 { | |
compatible = "xlnx,PWM-2.0"; | |
reg = <0x43c30000 0x10000>; | |
xlnx,pwm-axi-addr-width = <0x7>; | |
xlnx,pwm-axi-data-width = <0x20>; | |
}; | |
v_tc_in: v_tc@43c00000 { | |
compatible = "xlnx,v-tc-6.1"; | |
interrupt-parent = <&intc>; | |
interrupts = <0 32 4>; | |
reg = <0x43c00000 0x10000>; | |
xlnx,det-achroma-en = <0x0>; | |
xlnx,det-avideo-en = <0x1>; | |
xlnx,det-fieldid-en = <0x0>; | |
xlnx,det-hblank-en = <0x0>; | |
xlnx,det-hsync-en = <0x1>; | |
xlnx,det-vblank-en = <0x0>; | |
xlnx,det-vsync-en = <0x1>; | |
xlnx,detect-en = <0x1>; | |
xlnx,fsync-hstart0 = <0x0>; | |
xlnx,fsync-hstart1 = <0x0>; | |
xlnx,fsync-hstart10 = <0x0>; | |
xlnx,fsync-hstart11 = <0x0>; | |
xlnx,fsync-hstart12 = <0x0>; | |
xlnx,fsync-hstart13 = <0x0>; | |
xlnx,fsync-hstart14 = <0x0>; | |
xlnx,fsync-hstart15 = <0x0>; | |
xlnx,fsync-hstart2 = <0x0>; | |
xlnx,fsync-hstart3 = <0x0>; | |
xlnx,fsync-hstart4 = <0x0>; | |
xlnx,fsync-hstart5 = <0x0>; | |
xlnx,fsync-hstart6 = <0x0>; | |
xlnx,fsync-hstart7 = <0x0>; | |
xlnx,fsync-hstart8 = <0x0>; | |
xlnx,fsync-hstart9 = <0x0>; | |
xlnx,fsync-vstart0 = <0x0>; | |
xlnx,fsync-vstart1 = <0x0>; | |
xlnx,fsync-vstart10 = <0x0>; | |
xlnx,fsync-vstart11 = <0x0>; | |
xlnx,fsync-vstart12 = <0x0>; | |
xlnx,fsync-vstart13 = <0x0>; | |
xlnx,fsync-vstart14 = <0x0>; | |
xlnx,fsync-vstart15 = <0x0>; | |
xlnx,fsync-vstart2 = <0x0>; | |
xlnx,fsync-vstart3 = <0x0>; | |
xlnx,fsync-vstart4 = <0x0>; | |
xlnx,fsync-vstart5 = <0x0>; | |
xlnx,fsync-vstart6 = <0x0>; | |
xlnx,fsync-vstart7 = <0x0>; | |
xlnx,fsync-vstart8 = <0x0>; | |
xlnx,fsync-vstart9 = <0x0>; | |
xlnx,gen-achroma-en = <0x0>; | |
xlnx,gen-achroma-polarity = <0x1>; | |
xlnx,gen-auto-switch = <0x0>; | |
xlnx,gen-avideo-en = <0x1>; | |
xlnx,gen-avideo-polarity = <0x1>; | |
xlnx,gen-cparity = <0x0>; | |
xlnx,gen-f0-vblank-hend = <0x500>; | |
xlnx,gen-f0-vblank-hstart = <0x500>; | |
xlnx,gen-f0-vframe-size = <0x2ee>; | |
xlnx,gen-f0-vsync-hend = <0x500>; | |
xlnx,gen-f0-vsync-hstart = <0x500>; | |
xlnx,gen-f0-vsync-vend = <0x2d9>; | |
xlnx,gen-f0-vsync-vstart = <0x2d4>; | |
xlnx,gen-f1-vblank-hend = <0x500>; | |
xlnx,gen-f1-vblank-hstart = <0x500>; | |
xlnx,gen-f1-vframe-size = <0x2ee>; | |
xlnx,gen-f1-vsync-hend = <0x500>; | |
xlnx,gen-f1-vsync-hstart = <0x500>; | |
xlnx,gen-f1-vsync-vend = <0x2d9>; | |
xlnx,gen-f1-vsync-vstart = <0x2d4>; | |
xlnx,gen-fieldid-en = <0x0>; | |
xlnx,gen-fieldid-polarity = <0x1>; | |
xlnx,gen-hactive-size = <0x500>; | |
xlnx,gen-hblank-en = <0x1>; | |
xlnx,gen-hblank-polarity = <0x1>; | |
xlnx,gen-hframe-size = <0x672>; | |
xlnx,gen-hsync-en = <0x1>; | |
xlnx,gen-hsync-end = <0x596>; | |
xlnx,gen-hsync-polarity = <0x1>; | |
xlnx,gen-hsync-start = <0x56e>; | |
xlnx,gen-interlaced = <0x0>; | |
xlnx,gen-vactive-size = <0x2d0>; | |
xlnx,gen-vblank-en = <0x1>; | |
xlnx,gen-vblank-polarity = <0x1>; | |
xlnx,gen-video-format = <0x2>; | |
xlnx,gen-vsync-en = <0x1>; | |
xlnx,gen-vsync-polarity = <0x1>; | |
xlnx,generate-en = <0x0>; | |
xlnx,has-axi4-lite = <0x1>; | |
xlnx,has-intc-if = <0x1>; | |
xlnx,interlace-en = <0x0>; | |
xlnx,max-lines = <0x1000>; | |
xlnx,max-pixels = <0x1000>; | |
xlnx,num-fsyncs = <0x1>; | |
xlnx,sync-en = <0x0>; | |
}; | |
v_tc_out: v_tc@43c10000 { | |
compatible = "xlnx,v-tc-6.1"; | |
interrupt-parent = <&intc>; | |
interrupts = <0 31 4>; | |
reg = <0x43c10000 0x10000>; | |
xlnx,det-achroma-en = <0x0>; | |
xlnx,det-avideo-en = <0x1>; | |
xlnx,det-fieldid-en = <0x0>; | |
xlnx,det-hblank-en = <0x1>; | |
xlnx,det-hsync-en = <0x1>; | |
xlnx,det-vblank-en = <0x1>; | |
xlnx,det-vsync-en = <0x1>; | |
xlnx,detect-en = <0x0>; | |
xlnx,fsync-hstart0 = <0x0>; | |
xlnx,fsync-hstart1 = <0x0>; | |
xlnx,fsync-hstart10 = <0x0>; | |
xlnx,fsync-hstart11 = <0x0>; | |
xlnx,fsync-hstart12 = <0x0>; | |
xlnx,fsync-hstart13 = <0x0>; | |
xlnx,fsync-hstart14 = <0x0>; | |
xlnx,fsync-hstart15 = <0x0>; | |
xlnx,fsync-hstart2 = <0x0>; | |
xlnx,fsync-hstart3 = <0x0>; | |
xlnx,fsync-hstart4 = <0x0>; | |
xlnx,fsync-hstart5 = <0x0>; | |
xlnx,fsync-hstart6 = <0x0>; | |
xlnx,fsync-hstart7 = <0x0>; | |
xlnx,fsync-hstart8 = <0x0>; | |
xlnx,fsync-hstart9 = <0x0>; | |
xlnx,fsync-vstart0 = <0x0>; | |
xlnx,fsync-vstart1 = <0x0>; | |
xlnx,fsync-vstart10 = <0x0>; | |
xlnx,fsync-vstart11 = <0x0>; | |
xlnx,fsync-vstart12 = <0x0>; | |
xlnx,fsync-vstart13 = <0x0>; | |
xlnx,fsync-vstart14 = <0x0>; | |
xlnx,fsync-vstart15 = <0x0>; | |
xlnx,fsync-vstart2 = <0x0>; | |
xlnx,fsync-vstart3 = <0x0>; | |
xlnx,fsync-vstart4 = <0x0>; | |
xlnx,fsync-vstart5 = <0x0>; | |
xlnx,fsync-vstart6 = <0x0>; | |
xlnx,fsync-vstart7 = <0x0>; | |
xlnx,fsync-vstart8 = <0x0>; | |
xlnx,fsync-vstart9 = <0x0>; | |
xlnx,gen-achroma-en = <0x0>; | |
xlnx,gen-achroma-polarity = <0x1>; | |
xlnx,gen-auto-switch = <0x0>; | |
xlnx,gen-avideo-en = <0x1>; | |
xlnx,gen-avideo-polarity = <0x1>; | |
xlnx,gen-cparity = <0x0>; | |
xlnx,gen-f0-vblank-hend = <0x500>; | |
xlnx,gen-f0-vblank-hstart = <0x500>; | |
xlnx,gen-f0-vframe-size = <0x2ee>; | |
xlnx,gen-f0-vsync-hend = <0x500>; | |
xlnx,gen-f0-vsync-hstart = <0x500>; | |
xlnx,gen-f0-vsync-vend = <0x2d9>; | |
xlnx,gen-f0-vsync-vstart = <0x2d4>; | |
xlnx,gen-f1-vblank-hend = <0x500>; | |
xlnx,gen-f1-vblank-hstart = <0x500>; | |
xlnx,gen-f1-vframe-size = <0x2ee>; | |
xlnx,gen-f1-vsync-hend = <0x500>; | |
xlnx,gen-f1-vsync-hstart = <0x500>; | |
xlnx,gen-f1-vsync-vend = <0x2d9>; | |
xlnx,gen-f1-vsync-vstart = <0x2d4>; | |
xlnx,gen-fieldid-en = <0x0>; | |
xlnx,gen-fieldid-polarity = <0x1>; | |
xlnx,gen-hactive-size = <0x500>; | |
xlnx,gen-hblank-en = <0x1>; | |
xlnx,gen-hblank-polarity = <0x1>; | |
xlnx,gen-hframe-size = <0x672>; | |
xlnx,gen-hsync-en = <0x1>; | |
xlnx,gen-hsync-end = <0x596>; | |
xlnx,gen-hsync-polarity = <0x1>; | |
xlnx,gen-hsync-start = <0x56e>; | |
xlnx,gen-interlaced = <0x0>; | |
xlnx,gen-vactive-size = <0x2d0>; | |
xlnx,gen-vblank-en = <0x1>; | |
xlnx,gen-vblank-polarity = <0x1>; | |
xlnx,gen-video-format = <0x2>; | |
xlnx,gen-vsync-en = <0x1>; | |
xlnx,gen-vsync-polarity = <0x1>; | |
xlnx,generate-en = <0x1>; | |
xlnx,has-axi4-lite = <0x1>; | |
xlnx,has-intc-if = <0x0>; | |
xlnx,interlace-en = <0x0>; | |
xlnx,max-lines = <0x1000>; | |
xlnx,max-pixels = <0x1000>; | |
xlnx,num-fsyncs = <0x1>; | |
xlnx,sync-en = <0x0>; | |
}; | |
xadc_wiz_0: xadc_wiz@43c50000 { | |
clock-names = "ref_clk"; | |
clocks = <&clkc 0>; | |
compatible = "xlnx,axi-xadc-1.00.a"; | |
interrupt-parent = <&intc>; | |
interrupts = <0 34 4>; | |
reg = <0x43c50000 0x10000>; | |
xlnx,alarm-limit-r0 = <0xb5ed>; | |
xlnx,alarm-limit-r1 = <0x57e4>; | |
xlnx,alarm-limit-r10 = <0x5555>; | |
xlnx,alarm-limit-r11 = <0x5111>; | |
xlnx,alarm-limit-r12 = <0x9999>; | |
xlnx,alarm-limit-r13 = <0x91eb>; | |
xlnx,alarm-limit-r14 = <0x6aaa>; | |
xlnx,alarm-limit-r15 = <0x6666>; | |
xlnx,alarm-limit-r2 = <0xa147>; | |
xlnx,alarm-limit-r3 = <0xca33>; | |
xlnx,alarm-limit-r4 = <0xa93a>; | |
xlnx,alarm-limit-r5 = <0x52c6>; | |
xlnx,alarm-limit-r6 = <0x9555>; | |
xlnx,alarm-limit-r7 = <0xae4e>; | |
xlnx,alarm-limit-r8 = <0x5999>; | |
xlnx,alarm-limit-r9 = <0x5111>; | |
xlnx,configuration-r0 = <0x1000>; | |
xlnx,configuration-r1 = <0x21af>; | |
xlnx,configuration-r2 = <0x400>; | |
xlnx,dclk-frequency = <0x64>; | |
xlnx,external-mux = "none"; | |
xlnx,external-mux-channel = "VP_VN"; | |
xlnx,external-muxaddr-enable = <0x0>; | |
xlnx,fifo-depth = <0x7>; | |
xlnx,has-axi = <0x1>; | |
xlnx,has-axi4stream = <0x0>; | |
xlnx,has-busy = <0x1>; | |
xlnx,has-channel = <0x1>; | |
xlnx,has-convst = <0x0>; | |
xlnx,has-convstclk = <0x0>; | |
xlnx,has-dclk = <0x1>; | |
xlnx,has-drp = <0x0>; | |
xlnx,has-eoc = <0x1>; | |
xlnx,has-eos = <0x1>; | |
xlnx,has-external-mux = <0x0>; | |
xlnx,has-jtagbusy = <0x0>; | |
xlnx,has-jtaglocked = <0x0>; | |
xlnx,has-jtagmodified = <0x0>; | |
xlnx,has-ot-alarm = <0x0>; | |
xlnx,has-reset = <0x0>; | |
xlnx,has-temp-bus = <0x0>; | |
xlnx,has-user-temp-alarm = <0x0>; | |
xlnx,has-vbram-alarm = <0x0>; | |
xlnx,has-vccaux-alarm = <0x0>; | |
xlnx,has-vccddro-alarm = <0x0>; | |
xlnx,has-vccint-alarm = <0x0>; | |
xlnx,has-vccpaux-alarm = <0x0>; | |
xlnx,has-vccpint-alarm = <0x0>; | |
xlnx,has-vn = <0x1>; | |
xlnx,has-vp = <0x1>; | |
xlnx,include-intr = <0x1>; | |
xlnx,sampling-rate = "961538.4615384615"; | |
xlnx,sequence-r0 = <0x77e1>; | |
xlnx,sequence-r1 = <0xc0c0>; | |
xlnx,sequence-r2 = <0x0>; | |
xlnx,sequence-r3 = <0x0>; | |
xlnx,sequence-r4 = <0x0>; | |
xlnx,sequence-r5 = <0x0>; | |
xlnx,sequence-r6 = <0x0>; | |
xlnx,sequence-r7 = <0x0>; | |
xlnx,sim-file-name = "design"; | |
xlnx,sim-file-rel-path = "./"; | |
xlnx,sim-file-sel = "Default"; | |
xlnx,vaux0 = <0x0>; | |
xlnx,vaux1 = <0x0>; | |
xlnx,vaux10 = <0x0>; | |
xlnx,vaux11 = <0x0>; | |
xlnx,vaux12 = <0x0>; | |
xlnx,vaux13 = <0x0>; | |
xlnx,vaux14 = <0x1>; | |
xlnx,vaux15 = <0x1>; | |
xlnx,vaux2 = <0x0>; | |
xlnx,vaux3 = <0x0>; | |
xlnx,vaux4 = <0x0>; | |
xlnx,vaux5 = <0x0>; | |
xlnx,vaux6 = <0x1>; | |
xlnx,vaux7 = <0x1>; | |
xlnx,vaux8 = <0x0>; | |
xlnx,vaux9 = <0x0>; | |
}; | |
yuyvy_0: yuyvy@43c80000 { | |
compatible = "xlnx,yuyvy-1.0"; | |
reg = <0x43c80000 0x10000>; | |
xlnx,s-axi-control-bus-addr-width = <0x5>; | |
xlnx,s-axi-control-bus-data-width = <0x20>; | |
}; | |
}; | |
}; |
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