Created
March 2, 2019 19:22
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dts with uart2 enabled
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| /dts-v1/; | |
| / { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x01 >; | |
| interrupt-parent = < 0x01 >; | |
| model = "Olimex A20-OLinuXino-LIME"; | |
| compatible = "olimex,a20-olinuxino-lime\0allwinner,sun7i-a20"; | |
| chosen { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x01 >; | |
| ranges; | |
| stdout-path = "serial0:115200n8"; | |
| framebuffer@0 { | |
| compatible = "allwinner,simple-framebuffer\0simple-framebuffer"; | |
| allwinner,pipeline = "de_be0-lcd0-hdmi"; | |
| clocks = < 0x02 0x38 0x02 0x3c 0x02 0x3e 0x02 0x90 0x02 0x9b 0x02 0x8c 0x02 0xa4 >; | |
| status = "disabled"; | |
| }; | |
| framebuffer@1 { | |
| compatible = "allwinner,simple-framebuffer\0simple-framebuffer"; | |
| allwinner,pipeline = "de_be0-lcd0"; | |
| clocks = < 0x02 0x38 0x02 0x3e 0x02 0x90 0x02 0x95 0x02 0x8c >; | |
| status = "disabled"; | |
| }; | |
| framebuffer@2 { | |
| compatible = "allwinner,simple-framebuffer\0simple-framebuffer"; | |
| allwinner,pipeline = "de_be0-lcd0-tve0"; | |
| clocks = < 0x02 0x36 0x02 0x38 0x02 0x3e 0x02 0x90 0x02 0x9b 0x02 0x87 0x02 0x8c >; | |
| status = "disabled"; | |
| }; | |
| }; | |
| aliases { | |
| ethernet0 = "/soc@1c00000/ethernet@1c50000"; | |
| serial0 = "/soc@1c00000/serial@1c28000"; | |
| }; | |
| memory { | |
| device_type = "memory"; | |
| reg = < 0x40000000 0x80000000 >; | |
| }; | |
| cpus { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| cpu@0 { | |
| compatible = "arm,cortex-a7"; | |
| device_type = "cpu"; | |
| reg = < 0x00 >; | |
| clocks = < 0x02 0x14 >; | |
| clock-latency = < 0x3b9b0 >; | |
| operating-points = < 0xea600 0x155cc0 0xdea80 0x155cc0 0xd2f00 0x13d620 0xafc80 0x124f80 0x80e80 0x10c8e0 0x4c2c0 0xf4240 0x23280 0xf4240 >; | |
| #cooling-cells = < 0x02 >; | |
| phandle = < 0x05 >; | |
| }; | |
| cpu@1 { | |
| compatible = "arm,cortex-a7"; | |
| device_type = "cpu"; | |
| reg = < 0x01 >; | |
| clocks = < 0x02 0x14 >; | |
| clock-latency = < 0x3b9b0 >; | |
| operating-points = < 0xea600 0x155cc0 0xdea80 0x155cc0 0xd2f00 0x13d620 0xafc80 0x124f80 0x80e80 0x10c8e0 0x4c2c0 0xf4240 0x23280 0xf4240 >; | |
| #cooling-cells = < 0x02 >; | |
| }; | |
| }; | |
| thermal-zones { | |
| cpu_thermal { | |
| polling-delay-passive = < 0xfa >; | |
| polling-delay = < 0x3e8 >; | |
| thermal-sensors = < 0x03 >; | |
| cooling-maps { | |
| map0 { | |
| trip = < 0x04 >; | |
| cooling-device = < 0x05 0xffffffff 0xffffffff >; | |
| }; | |
| }; | |
| trips { | |
| cpu_alert0 { | |
| temperature = < 0x124f8 >; | |
| hysteresis = < 0x7d0 >; | |
| type = "passive"; | |
| phandle = < 0x04 >; | |
| }; | |
| cpu_crit { | |
| temperature = < 0x186a0 >; | |
| hysteresis = < 0x7d0 >; | |
| type = "critical"; | |
| phandle = < 0x39 >; | |
| }; | |
| }; | |
| }; | |
| }; | |
| reserved-memory { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x01 >; | |
| ranges; | |
| cma@4a000000 { | |
| compatible = "shared-dma-pool"; | |
| size = < 0x6000000 >; | |
| alloc-ranges = < 0x4a000000 0x6000000 >; | |
| reusable; | |
| linux,cma-default; | |
| phandle = < 0x3a >; | |
| }; | |
| }; | |
| timer { | |
| compatible = "arm,armv7-timer"; | |
| interrupts = < 0x01 0x0d 0xf08 0x01 0x0e 0xf08 0x01 0x0b 0xf08 0x01 0x0a 0xf08 >; | |
| }; | |
| pmu { | |
| compatible = "arm,cortex-a7-pmu\0arm,cortex-a15-pmu"; | |
| interrupts = < 0x00 0x78 0x04 0x00 0x79 0x04 >; | |
| }; | |
| clocks { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x01 >; | |
| ranges; | |
| clk@1c20050 { | |
| #clock-cells = < 0x00 >; | |
| compatible = "fixed-clock"; | |
| clock-frequency = < 0x16e3600 >; | |
| clock-output-names = "osc24M"; | |
| phandle = < 0x21 >; | |
| }; | |
| clk@0 { | |
| #clock-cells = < 0x00 >; | |
| compatible = "fixed-clock"; | |
| clock-frequency = < 0x8000 >; | |
| clock-output-names = "osc32k"; | |
| phandle = < 0x22 >; | |
| }; | |
| clk@1 { | |
| #clock-cells = < 0x00 >; | |
| compatible = "fixed-clock"; | |
| clock-frequency = < 0x17d7840 >; | |
| clock-output-names = "mii_phy_tx"; | |
| phandle = < 0x06 >; | |
| }; | |
| clk@2 { | |
| #clock-cells = < 0x00 >; | |
| compatible = "fixed-clock"; | |
| clock-frequency = < 0x7735940 >; | |
| clock-output-names = "gmac_int_tx"; | |
| phandle = < 0x07 >; | |
| }; | |
| clk@1c20164 { | |
| #clock-cells = < 0x00 >; | |
| compatible = "allwinner,sun7i-a20-gmac-clk"; | |
| reg = < 0x1c20164 0x04 >; | |
| clocks = < 0x06 0x07 >; | |
| clock-output-names = "gmac_tx"; | |
| phandle = < 0x27 >; | |
| }; | |
| }; | |
| display-engine { | |
| compatible = "allwinner,sun7i-a20-display-engine"; | |
| allwinner,pipelines = < 0x08 0x09 >; | |
| status = "okay"; | |
| phandle = < 0x3b >; | |
| }; | |
| soc@1c00000 { | |
| compatible = "simple-bus"; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x01 >; | |
| ranges; | |
| system-control@1c00000 { | |
| compatible = "allwinner,sun7i-a20-system-control\0allwinner,sun4i-a10-system-control"; | |
| reg = < 0x1c00000 0x30 >; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x01 >; | |
| ranges; | |
| sram@0 { | |
| compatible = "mmio-sram"; | |
| reg = < 0x00 0xc000 >; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x01 >; | |
| ranges = < 0x00 0x00 0xc000 >; | |
| phandle = < 0x3c >; | |
| sram-section@8000 { | |
| compatible = "allwinner,sun7i-a20-sram-a3-a4\0allwinner,sun4i-a10-sram-a3-a4"; | |
| reg = < 0x8000 0x4000 >; | |
| status = "disabled"; | |
| phandle = < 0x0b >; | |
| }; | |
| }; | |
| sram@10000 { | |
| compatible = "mmio-sram"; | |
| reg = < 0x10000 0x1000 >; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x01 >; | |
| ranges = < 0x00 0x10000 0x1000 >; | |
| phandle = < 0x3d >; | |
| sram-section@0 { | |
| compatible = "allwinner,sun7i-a20-sram-d\0allwinner,sun4i-a10-sram-d"; | |
| reg = < 0x00 0x1000 >; | |
| status = "okay"; | |
| phandle = < 0x17 >; | |
| }; | |
| }; | |
| sram@1d00000 { | |
| compatible = "mmio-sram"; | |
| reg = < 0x1d00000 0xd0000 >; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x01 >; | |
| ranges = < 0x00 0x1d00000 0xd0000 >; | |
| phandle = < 0x3e >; | |
| sram-section@0 { | |
| compatible = "allwinner,sun7i-a20-sram-c1\0allwinner,sun4i-a10-sram-c1"; | |
| reg = < 0x00 0x80000 >; | |
| phandle = < 0x12 >; | |
| }; | |
| }; | |
| }; | |
| interrupt-controller@1c00030 { | |
| compatible = "allwinner,sun7i-a20-sc-nmi"; | |
| interrupt-controller; | |
| #interrupt-cells = < 0x02 >; | |
| reg = < 0x1c00030 0x0c >; | |
| interrupts = < 0x00 0x00 0x04 >; | |
| phandle = < 0x25 >; | |
| }; | |
| dma-controller@1c02000 { | |
| compatible = "allwinner,sun4i-a10-dma"; | |
| reg = < 0x1c02000 0x1000 >; | |
| interrupts = < 0x00 0x1b 0x04 >; | |
| clocks = < 0x02 0x20 >; | |
| #dma-cells = < 0x02 >; | |
| phandle = < 0x0a >; | |
| }; | |
| nand@1c03000 { | |
| compatible = "allwinner,sun4i-a10-nand"; | |
| reg = < 0x1c03000 0x1000 >; | |
| interrupts = < 0x00 0x25 0x04 >; | |
| clocks = < 0x02 0x27 0x02 0x60 >; | |
| clock-names = "ahb\0mod"; | |
| dmas = < 0x0a 0x01 0x03 >; | |
| dma-names = "rxtx"; | |
| status = "disabled"; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| phandle = < 0x3f >; | |
| }; | |
| spi@1c05000 { | |
| compatible = "allwinner,sun4i-a10-spi"; | |
| reg = < 0x1c05000 0x1000 >; | |
| interrupts = < 0x00 0x0a 0x04 >; | |
| clocks = < 0x02 0x2c 0x02 0x70 >; | |
| clock-names = "ahb\0mod"; | |
| dmas = < 0x0a 0x01 0x1b 0x0a 0x01 0x1a >; | |
| dma-names = "rx\0tx"; | |
| status = "disabled"; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| num-cs = < 0x04 >; | |
| phandle = < 0x40 >; | |
| }; | |
| spi@1c06000 { | |
| compatible = "allwinner,sun4i-a10-spi"; | |
| reg = < 0x1c06000 0x1000 >; | |
| interrupts = < 0x00 0x0b 0x04 >; | |
| clocks = < 0x02 0x2d 0x02 0x71 >; | |
| clock-names = "ahb\0mod"; | |
| dmas = < 0x0a 0x01 0x09 0x0a 0x01 0x08 >; | |
| dma-names = "rx\0tx"; | |
| status = "disabled"; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| num-cs = < 0x01 >; | |
| phandle = < 0x41 >; | |
| }; | |
| ethernet@1c0b000 { | |
| compatible = "allwinner,sun4i-a10-emac"; | |
| reg = < 0x1c0b000 0x1000 >; | |
| interrupts = < 0x00 0x37 0x04 >; | |
| clocks = < 0x02 0x2a >; | |
| allwinner,sram = < 0x0b 0x01 >; | |
| status = "disabled"; | |
| phandle = < 0x42 >; | |
| }; | |
| mdio@1c0b080 { | |
| compatible = "allwinner,sun4i-a10-mdio"; | |
| reg = < 0x1c0b080 0x14 >; | |
| status = "disabled"; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| phandle = < 0x43 >; | |
| }; | |
| lcd-controller@1c0c000 { | |
| compatible = "allwinner,sun7i-a20-tcon"; | |
| reg = < 0x1c0c000 0x1000 >; | |
| interrupts = < 0x00 0x2c 0x04 >; | |
| resets = < 0x02 0x0b >; | |
| reset-names = "lcd"; | |
| clocks = < 0x02 0x38 0x02 0x95 0x02 0x9b >; | |
| clock-names = "ahb\0tcon-ch0\0tcon-ch1"; | |
| clock-output-names = "tcon0-pixel-clock"; | |
| dmas = < 0x0a 0x01 0x0e >; | |
| phandle = < 0x44 >; | |
| ports { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| port@0 { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| reg = < 0x00 >; | |
| phandle = < 0x45 >; | |
| endpoint@0 { | |
| reg = < 0x00 >; | |
| remote-endpoint = < 0x0c >; | |
| phandle = < 0x34 >; | |
| }; | |
| endpoint@1 { | |
| reg = < 0x01 >; | |
| remote-endpoint = < 0x0d >; | |
| phandle = < 0x30 >; | |
| }; | |
| }; | |
| port@1 { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| reg = < 0x01 >; | |
| phandle = < 0x46 >; | |
| endpoint@1 { | |
| reg = < 0x01 >; | |
| remote-endpoint = < 0x0e >; | |
| allwinner,tcon-channel = < 0x01 >; | |
| phandle = < 0x1d >; | |
| }; | |
| }; | |
| }; | |
| }; | |
| lcd-controller@1c0d000 { | |
| compatible = "allwinner,sun7i-a20-tcon"; | |
| reg = < 0x1c0d000 0x1000 >; | |
| interrupts = < 0x00 0x2d 0x04 >; | |
| resets = < 0x02 0x0d >; | |
| reset-names = "lcd"; | |
| clocks = < 0x02 0x39 0x02 0x96 0x02 0x9d >; | |
| clock-names = "ahb\0tcon-ch0\0tcon-ch1"; | |
| clock-output-names = "tcon1-pixel-clock"; | |
| dmas = < 0x0a 0x01 0x0f >; | |
| phandle = < 0x47 >; | |
| ports { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| port@0 { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| reg = < 0x00 >; | |
| phandle = < 0x48 >; | |
| endpoint@0 { | |
| reg = < 0x00 >; | |
| remote-endpoint = < 0x0f >; | |
| phandle = < 0x35 >; | |
| }; | |
| endpoint@1 { | |
| reg = < 0x01 >; | |
| remote-endpoint = < 0x10 >; | |
| phandle = < 0x31 >; | |
| }; | |
| }; | |
| port@1 { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| reg = < 0x01 >; | |
| phandle = < 0x49 >; | |
| endpoint@1 { | |
| reg = < 0x01 >; | |
| remote-endpoint = < 0x11 >; | |
| allwinner,tcon-channel = < 0x01 >; | |
| phandle = < 0x1e >; | |
| }; | |
| }; | |
| }; | |
| }; | |
| video-codec@1c0e000 { | |
| compatible = "allwinner,sun7i-a20-video-engine"; | |
| reg = < 0x1c0e000 0x1000 >; | |
| clocks = < 0x02 0x34 0x02 0xa1 0x02 0x82 >; | |
| clock-names = "ahb\0mod\0ram"; | |
| resets = < 0x02 0x10 >; | |
| interrupts = < 0x00 0x35 0x04 >; | |
| allwinner,sram = < 0x12 0x01 >; | |
| }; | |
| mmc@1c0f000 { | |
| compatible = "allwinner,sun7i-a20-mmc"; | |
| reg = < 0x1c0f000 0x1000 >; | |
| clocks = < 0x02 0x22 0x02 0x62 0x02 0x63 0x02 0x64 >; | |
| clock-names = "ahb\0mmc\0output\0sample"; | |
| interrupts = < 0x00 0x20 0x04 >; | |
| status = "okay"; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x13 >; | |
| vmmc-supply = < 0x14 >; | |
| bus-width = < 0x04 >; | |
| cd-gpios = < 0x15 0x07 0x01 0x01 >; | |
| phandle = < 0x4a >; | |
| }; | |
| mmc@1c10000 { | |
| compatible = "allwinner,sun7i-a20-mmc"; | |
| reg = < 0x1c10000 0x1000 >; | |
| clocks = < 0x02 0x23 0x02 0x65 0x02 0x66 0x02 0x67 >; | |
| clock-names = "ahb\0mmc\0output\0sample"; | |
| interrupts = < 0x00 0x21 0x04 >; | |
| status = "disabled"; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| phandle = < 0x4b >; | |
| }; | |
| mmc@1c11000 { | |
| compatible = "allwinner,sun7i-a20-mmc"; | |
| reg = < 0x1c11000 0x1000 >; | |
| clocks = < 0x02 0x24 0x02 0x68 0x02 0x69 0x02 0x6a >; | |
| clock-names = "ahb\0mmc\0output\0sample"; | |
| interrupts = < 0x00 0x22 0x04 >; | |
| status = "disabled"; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| phandle = < 0x4c >; | |
| }; | |
| mmc@1c12000 { | |
| compatible = "allwinner,sun7i-a20-mmc"; | |
| reg = < 0x1c12000 0x1000 >; | |
| clocks = < 0x02 0x25 0x02 0x6b 0x02 0x6c 0x02 0x6d >; | |
| clock-names = "ahb\0mmc\0output\0sample"; | |
| interrupts = < 0x00 0x23 0x04 >; | |
| status = "disabled"; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| phandle = < 0x4d >; | |
| }; | |
| usb@1c13000 { | |
| compatible = "allwinner,sun4i-a10-musb"; | |
| reg = < 0x1c13000 0x400 >; | |
| clocks = < 0x02 0x1a >; | |
| interrupts = < 0x00 0x26 0x04 >; | |
| interrupt-names = "mc"; | |
| phys = < 0x16 0x00 >; | |
| phy-names = "usb"; | |
| extcon = < 0x16 0x00 >; | |
| allwinner,sram = < 0x17 0x01 >; | |
| status = "okay"; | |
| dr_mode = "otg"; | |
| phandle = < 0x4e >; | |
| }; | |
| phy@1c13400 { | |
| #phy-cells = < 0x01 >; | |
| compatible = "allwinner,sun7i-a20-usb-phy"; | |
| reg = < 0x1c13400 0x10 0x1c14800 0x04 0x1c1c800 0x04 >; | |
| reg-names = "phy_ctrl\0pmu1\0pmu2"; | |
| clocks = < 0x02 0x7d >; | |
| clock-names = "usb_phy"; | |
| resets = < 0x02 0x01 0x02 0x02 0x02 0x03 >; | |
| reset-names = "usb0_reset\0usb1_reset\0usb2_reset"; | |
| status = "okay"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x18 0x19 >; | |
| usb0_id_det-gpio = < 0x15 0x07 0x04 0x00 >; | |
| usb0_vbus_det-gpio = < 0x15 0x07 0x05 0x00 >; | |
| usb0_vbus-supply = < 0x1a >; | |
| usb1_vbus-supply = < 0x1b >; | |
| usb2_vbus-supply = < 0x1c >; | |
| phandle = < 0x16 >; | |
| }; | |
| usb@1c14000 { | |
| compatible = "allwinner,sun7i-a20-ehci\0generic-ehci"; | |
| reg = < 0x1c14000 0x100 >; | |
| interrupts = < 0x00 0x27 0x04 >; | |
| clocks = < 0x02 0x1b >; | |
| phys = < 0x16 0x01 >; | |
| phy-names = "usb"; | |
| status = "okay"; | |
| phandle = < 0x4f >; | |
| }; | |
| usb@1c14400 { | |
| compatible = "allwinner,sun7i-a20-ohci\0generic-ohci"; | |
| reg = < 0x1c14400 0x100 >; | |
| interrupts = < 0x00 0x40 0x04 >; | |
| clocks = < 0x02 0x7b 0x02 0x1c >; | |
| phys = < 0x16 0x01 >; | |
| phy-names = "usb"; | |
| status = "okay"; | |
| phandle = < 0x50 >; | |
| }; | |
| crypto-engine@1c15000 { | |
| compatible = "allwinner,sun7i-a20-crypto\0allwinner,sun4i-a10-crypto"; | |
| reg = < 0x1c15000 0x1000 >; | |
| interrupts = < 0x00 0x56 0x04 >; | |
| clocks = < 0x02 0x1f 0x02 0x6f >; | |
| clock-names = "ahb\0mod"; | |
| phandle = < 0x51 >; | |
| }; | |
| hdmi@1c16000 { | |
| compatible = "allwinner,sun7i-a20-hdmi\0allwinner,sun5i-a10s-hdmi"; | |
| reg = < 0x1c16000 0x1000 >; | |
| interrupts = < 0x00 0x3a 0x04 >; | |
| clocks = < 0x02 0x3c 0x02 0xa4 0x02 0x09 0x02 0x12 >; | |
| clock-names = "ahb\0mod\0pll-0\0pll-1"; | |
| dmas = < 0x0a 0x00 0x10 0x0a 0x00 0x10 0x0a 0x01 0x18 >; | |
| dma-names = "ddc-tx\0ddc-rx\0audio-tx"; | |
| status = "okay"; | |
| phandle = < 0x52 >; | |
| ports { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| port@0 { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| reg = < 0x00 >; | |
| phandle = < 0x53 >; | |
| endpoint@0 { | |
| reg = < 0x00 >; | |
| remote-endpoint = < 0x1d >; | |
| phandle = < 0x0e >; | |
| }; | |
| endpoint@1 { | |
| reg = < 0x01 >; | |
| remote-endpoint = < 0x1e >; | |
| phandle = < 0x11 >; | |
| }; | |
| }; | |
| port@1 { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| reg = < 0x01 >; | |
| phandle = < 0x54 >; | |
| endpoint { | |
| remote-endpoint = < 0x1f >; | |
| phandle = < 0x37 >; | |
| }; | |
| }; | |
| }; | |
| }; | |
| spi@1c17000 { | |
| compatible = "allwinner,sun4i-a10-spi"; | |
| reg = < 0x1c17000 0x1000 >; | |
| interrupts = < 0x00 0x0c 0x04 >; | |
| clocks = < 0x02 0x2e 0x02 0x72 >; | |
| clock-names = "ahb\0mod"; | |
| dmas = < 0x0a 0x01 0x1d 0x0a 0x01 0x1c >; | |
| dma-names = "rx\0tx"; | |
| status = "disabled"; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| num-cs = < 0x01 >; | |
| phandle = < 0x55 >; | |
| }; | |
| sata@1c18000 { | |
| compatible = "allwinner,sun4i-a10-ahci"; | |
| reg = < 0x1c18000 0x1000 >; | |
| interrupts = < 0x00 0x38 0x04 >; | |
| clocks = < 0x02 0x31 0x02 0x7a >; | |
| status = "okay"; | |
| target-supply = < 0x20 >; | |
| phandle = < 0x56 >; | |
| }; | |
| usb@1c1c000 { | |
| compatible = "allwinner,sun7i-a20-ehci\0generic-ehci"; | |
| reg = < 0x1c1c000 0x100 >; | |
| interrupts = < 0x00 0x28 0x04 >; | |
| clocks = < 0x02 0x1d >; | |
| phys = < 0x16 0x02 >; | |
| phy-names = "usb"; | |
| status = "okay"; | |
| phandle = < 0x57 >; | |
| }; | |
| usb@1c1c400 { | |
| compatible = "allwinner,sun7i-a20-ohci\0generic-ohci"; | |
| reg = < 0x1c1c400 0x100 >; | |
| interrupts = < 0x00 0x41 0x04 >; | |
| clocks = < 0x02 0x7c 0x02 0x1e >; | |
| phys = < 0x16 0x02 >; | |
| phy-names = "usb"; | |
| status = "okay"; | |
| phandle = < 0x58 >; | |
| }; | |
| spi@1c1f000 { | |
| compatible = "allwinner,sun4i-a10-spi"; | |
| reg = < 0x1c1f000 0x1000 >; | |
| interrupts = < 0x00 0x32 0x04 >; | |
| clocks = < 0x02 0x2f 0x02 0x7f >; | |
| clock-names = "ahb\0mod"; | |
| dmas = < 0x0a 0x01 0x1f 0x0a 0x01 0x1e >; | |
| dma-names = "rx\0tx"; | |
| status = "disabled"; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| num-cs = < 0x01 >; | |
| phandle = < 0x59 >; | |
| }; | |
| clock@1c20000 { | |
| compatible = "allwinner,sun7i-a20-ccu"; | |
| reg = < 0x1c20000 0x400 >; | |
| clocks = < 0x21 0x22 >; | |
| clock-names = "hosc\0losc"; | |
| #clock-cells = < 0x01 >; | |
| #reset-cells = < 0x01 >; | |
| phandle = < 0x02 >; | |
| }; | |
| pinctrl@1c20800 { | |
| compatible = "allwinner,sun7i-a20-pinctrl"; | |
| reg = < 0x1c20800 0x400 >; | |
| interrupts = < 0x00 0x1c 0x04 >; | |
| clocks = < 0x02 0x4a 0x21 0x22 >; | |
| clock-names = "apb\0hosc\0losc"; | |
| gpio-controller; | |
| interrupt-controller; | |
| #interrupt-cells = < 0x03 >; | |
| #gpio-cells = < 0x03 >; | |
| phandle = < 0x15 >; | |
| can0@0 { | |
| pins = "PH20\0PH21"; | |
| function = "can"; | |
| phandle = < 0x5a >; | |
| }; | |
| clk_out_a@0 { | |
| pins = "PI12"; | |
| function = "clk_out_a"; | |
| phandle = < 0x5b >; | |
| }; | |
| clk_out_b@0 { | |
| pins = "PI13"; | |
| function = "clk_out_b"; | |
| phandle = < 0x5c >; | |
| }; | |
| emac0@0 { | |
| pins = "PA0\0PA1\0PA2\0PA3\0PA4\0PA5\0PA6\0PA7\0PA8\0PA9\0PA10\0PA11\0PA12\0PA13\0PA14\0PA15\0PA16"; | |
| function = "emac"; | |
| phandle = < 0x5d >; | |
| }; | |
| gmac_mii@0 { | |
| pins = "PA0\0PA1\0PA2\0PA3\0PA4\0PA5\0PA6\0PA7\0PA8\0PA9\0PA10\0PA11\0PA12\0PA13\0PA14\0PA15\0PA16"; | |
| function = "gmac"; | |
| phandle = < 0x28 >; | |
| }; | |
| gmac_rgmii@0 { | |
| pins = "PA0\0PA1\0PA2\0PA3\0PA4\0PA5\0PA6\0PA7\0PA8\0PA10\0PA11\0PA12\0PA13\0PA15\0PA16"; | |
| function = "gmac"; | |
| drive-strength = < 0x28 >; | |
| phandle = < 0x5e >; | |
| }; | |
| i2c0@0 { | |
| pins = "PB0\0PB1"; | |
| function = "i2c0"; | |
| phandle = < 0x24 >; | |
| }; | |
| i2c1@0 { | |
| pins = "PB18\0PB19"; | |
| function = "i2c1"; | |
| phandle = < 0x26 >; | |
| }; | |
| i2c2@0 { | |
| pins = "PB20\0PB21"; | |
| function = "i2c2"; | |
| phandle = < 0x5f >; | |
| }; | |
| i2c3@0 { | |
| pins = "PI0\0PI1"; | |
| function = "i2c3"; | |
| phandle = < 0x60 >; | |
| }; | |
| ir0@0 { | |
| pins = "PB4"; | |
| function = "ir0"; | |
| phandle = < 0x61 >; | |
| }; | |
| ir0@1 { | |
| pins = "PB3"; | |
| function = "ir0"; | |
| phandle = < 0x62 >; | |
| }; | |
| ir1@0 { | |
| pins = "PB23"; | |
| function = "ir1"; | |
| phandle = < 0x63 >; | |
| }; | |
| ir1@1 { | |
| pins = "PB22"; | |
| function = "ir1"; | |
| phandle = < 0x64 >; | |
| }; | |
| mmc0@0 { | |
| pins = "PF0\0PF1\0PF2\0PF3\0PF4\0PF5"; | |
| function = "mmc0"; | |
| drive-strength = < 0x1e >; | |
| bias-pull-up; | |
| phandle = < 0x13 >; | |
| }; | |
| mmc2@0 { | |
| pins = "PC6\0PC7\0PC8\0PC9\0PC10\0PC11"; | |
| function = "mmc2"; | |
| drive-strength = < 0x1e >; | |
| bias-pull-up; | |
| phandle = < 0x65 >; | |
| }; | |
| mmc3@0 { | |
| pins = "PI4\0PI5\0PI6\0PI7\0PI8\0PI9"; | |
| function = "mmc3"; | |
| drive-strength = < 0x1e >; | |
| bias-pull-up; | |
| phandle = < 0x66 >; | |
| }; | |
| ps20@0 { | |
| pins = "PI20\0PI21"; | |
| function = "ps2"; | |
| phandle = < 0x67 >; | |
| }; | |
| ps21@0 { | |
| pins = "PH12\0PH13"; | |
| function = "ps2"; | |
| phandle = < 0x68 >; | |
| }; | |
| pwm0@0 { | |
| pins = "PB2"; | |
| function = "pwm"; | |
| phandle = < 0x69 >; | |
| }; | |
| pwm1@0 { | |
| pins = "PI3"; | |
| function = "pwm"; | |
| phandle = < 0x6a >; | |
| }; | |
| spdif@0 { | |
| pins = "PB13"; | |
| function = "spdif"; | |
| bias-pull-up; | |
| phandle = < 0x6b >; | |
| }; | |
| spi0@0 { | |
| pins = "PI11\0PI12\0PI13"; | |
| function = "spi0"; | |
| phandle = < 0x6c >; | |
| }; | |
| spi0_cs0@0 { | |
| pins = "PI10"; | |
| function = "spi0"; | |
| phandle = < 0x6d >; | |
| }; | |
| spi0_cs1@0 { | |
| pins = "PI14"; | |
| function = "spi0"; | |
| phandle = < 0x6e >; | |
| }; | |
| spi1@0 { | |
| pins = "PI17\0PI18\0PI19"; | |
| function = "spi1"; | |
| phandle = < 0x6f >; | |
| }; | |
| spi1_cs0@0 { | |
| pins = "PI16"; | |
| function = "spi1"; | |
| phandle = < 0x70 >; | |
| }; | |
| spi2@0 { | |
| pins = "PC20\0PC21\0PC22"; | |
| function = "spi2"; | |
| phandle = < 0x71 >; | |
| }; | |
| spi2@1 { | |
| pins = "PB15\0PB16\0PB17"; | |
| function = "spi2"; | |
| phandle = < 0x72 >; | |
| }; | |
| spi2_cs0@0 { | |
| pins = "PC19"; | |
| function = "spi2"; | |
| phandle = < 0x73 >; | |
| }; | |
| spi2_cs0@1 { | |
| pins = "PB14"; | |
| function = "spi2"; | |
| phandle = < 0x74 >; | |
| }; | |
| uart0@0 { | |
| pins = "PB22\0PB23"; | |
| function = "uart0"; | |
| phandle = < 0x23 >; | |
| }; | |
| uart2@0 { | |
| pins = "PI16\0PI17\0PI18\0PI19"; | |
| function = "uart2"; | |
| phandle = < 0x75 >; | |
| }; | |
| uart3@0 { | |
| pins = "PG6\0PG7\0PG8\0PG9"; | |
| function = "uart3"; | |
| phandle = < 0x76 >; | |
| }; | |
| uart3@1 { | |
| pins = "PH0\0PH1"; | |
| function = "uart3"; | |
| phandle = < 0x77 >; | |
| }; | |
| uart4@0 { | |
| pins = "PG10\0PG11"; | |
| function = "uart4"; | |
| phandle = < 0x78 >; | |
| }; | |
| uart4@1 { | |
| pins = "PH4\0PH5"; | |
| function = "uart4"; | |
| phandle = < 0x79 >; | |
| }; | |
| uart5@0 { | |
| pins = "PI10\0PI11"; | |
| function = "uart5"; | |
| phandle = < 0x7a >; | |
| }; | |
| uart6@0 { | |
| pins = "PI12\0PI13"; | |
| function = "uart6"; | |
| phandle = < 0x7b >; | |
| }; | |
| uart7@0 { | |
| pins = "PI20\0PI21"; | |
| function = "uart7"; | |
| phandle = < 0x7c >; | |
| }; | |
| ahci_pwr_pin@1 { | |
| pins = "PC3"; | |
| function = "gpio_out"; | |
| phandle = < 0x36 >; | |
| }; | |
| led_pins@0 { | |
| pins = "PH2"; | |
| function = "gpio_out"; | |
| drive-strength = < 0x14 >; | |
| phandle = < 0x38 >; | |
| }; | |
| usb0_id_detect_pin@0 { | |
| pins = "PH4"; | |
| function = "gpio_in"; | |
| bias-pull-up; | |
| phandle = < 0x18 >; | |
| }; | |
| usb0_vbus_detect_pin@0 { | |
| pins = "PH5"; | |
| function = "gpio_in"; | |
| bias-pull-down; | |
| phandle = < 0x19 >; | |
| }; | |
| }; | |
| timer@1c20c00 { | |
| compatible = "allwinner,sun4i-a10-timer"; | |
| reg = < 0x1c20c00 0x90 >; | |
| interrupts = < 0x00 0x16 0x04 0x00 0x17 0x04 0x00 0x18 0x04 0x00 0x19 0x04 0x00 0x43 0x04 0x00 0x44 0x04 >; | |
| clocks = < 0x21 >; | |
| }; | |
| watchdog@1c20c90 { | |
| compatible = "allwinner,sun4i-a10-wdt"; | |
| reg = < 0x1c20c90 0x10 >; | |
| phandle = < 0x7d >; | |
| }; | |
| rtc@1c20d00 { | |
| compatible = "allwinner,sun7i-a20-rtc"; | |
| reg = < 0x1c20d00 0x20 >; | |
| interrupts = < 0x00 0x18 0x04 >; | |
| phandle = < 0x7e >; | |
| }; | |
| pwm@1c20e00 { | |
| compatible = "allwinner,sun7i-a20-pwm"; | |
| reg = < 0x1c20e00 0x0c >; | |
| clocks = < 0x21 >; | |
| #pwm-cells = < 0x03 >; | |
| status = "disabled"; | |
| phandle = < 0x7f >; | |
| }; | |
| spdif@1c21000 { | |
| #sound-dai-cells = < 0x00 >; | |
| compatible = "allwinner,sun4i-a10-spdif"; | |
| reg = < 0x1c21000 0x400 >; | |
| interrupts = < 0x00 0x0d 0x04 >; | |
| clocks = < 0x02 0x46 0x02 0x78 >; | |
| clock-names = "apb\0spdif"; | |
| dmas = < 0x0a 0x00 0x02 0x0a 0x00 0x02 >; | |
| dma-names = "rx\0tx"; | |
| status = "disabled"; | |
| phandle = < 0x80 >; | |
| }; | |
| ir@1c21800 { | |
| compatible = "allwinner,sun4i-a10-ir"; | |
| clocks = < 0x02 0x4b 0x02 0x74 >; | |
| clock-names = "apb\0ir"; | |
| interrupts = < 0x00 0x05 0x04 >; | |
| reg = < 0x1c21800 0x40 >; | |
| status = "disabled"; | |
| phandle = < 0x81 >; | |
| }; | |
| ir@1c21c00 { | |
| compatible = "allwinner,sun4i-a10-ir"; | |
| clocks = < 0x02 0x4c 0x02 0x75 >; | |
| clock-names = "apb\0ir"; | |
| interrupts = < 0x00 0x06 0x04 >; | |
| reg = < 0x1c21c00 0x40 >; | |
| status = "disabled"; | |
| phandle = < 0x82 >; | |
| }; | |
| i2s@1c22000 { | |
| #sound-dai-cells = < 0x00 >; | |
| compatible = "allwinner,sun4i-a10-i2s"; | |
| reg = < 0x1c22000 0x400 >; | |
| interrupts = < 0x00 0x57 0x04 >; | |
| clocks = < 0x02 0x49 0x02 0x80 >; | |
| clock-names = "apb\0mod"; | |
| dmas = < 0x0a 0x00 0x04 0x0a 0x00 0x04 >; | |
| dma-names = "rx\0tx"; | |
| status = "disabled"; | |
| phandle = < 0x83 >; | |
| }; | |
| i2s@1c22400 { | |
| #sound-dai-cells = < 0x00 >; | |
| compatible = "allwinner,sun4i-a10-i2s"; | |
| reg = < 0x1c22400 0x400 >; | |
| interrupts = < 0x00 0x10 0x04 >; | |
| clocks = < 0x02 0x47 0x02 0x76 >; | |
| clock-names = "apb\0mod"; | |
| dmas = < 0x0a 0x00 0x03 0x0a 0x00 0x03 >; | |
| dma-names = "rx\0tx"; | |
| status = "disabled"; | |
| phandle = < 0x84 >; | |
| }; | |
| lradc@1c22800 { | |
| compatible = "allwinner,sun4i-a10-lradc-keys"; | |
| reg = < 0x1c22800 0x100 >; | |
| interrupts = < 0x00 0x1f 0x04 >; | |
| status = "disabled"; | |
| phandle = < 0x85 >; | |
| }; | |
| codec@1c22c00 { | |
| #sound-dai-cells = < 0x00 >; | |
| compatible = "allwinner,sun7i-a20-codec"; | |
| reg = < 0x1c22c00 0x40 >; | |
| interrupts = < 0x00 0x1e 0x04 >; | |
| clocks = < 0x02 0x45 0x02 0xa0 >; | |
| clock-names = "apb\0codec"; | |
| dmas = < 0x0a 0x00 0x13 0x0a 0x00 0x13 >; | |
| dma-names = "rx\0tx"; | |
| status = "disabled"; | |
| phandle = < 0x86 >; | |
| }; | |
| eeprom@1c23800 { | |
| compatible = "allwinner,sun7i-a20-sid"; | |
| reg = < 0x1c23800 0x200 >; | |
| phandle = < 0x87 >; | |
| }; | |
| i2s@1c24400 { | |
| #sound-dai-cells = < 0x00 >; | |
| compatible = "allwinner,sun4i-a10-i2s"; | |
| reg = < 0x1c24400 0x400 >; | |
| interrupts = < 0x00 0x5a 0x04 >; | |
| clocks = < 0x02 0x4d 0x02 0x81 >; | |
| clock-names = "apb\0mod"; | |
| dmas = < 0x0a 0x00 0x06 0x0a 0x00 0x06 >; | |
| dma-names = "rx\0tx"; | |
| status = "disabled"; | |
| phandle = < 0x88 >; | |
| }; | |
| rtp@1c25000 { | |
| compatible = "allwinner,sun5i-a13-ts"; | |
| reg = < 0x1c25000 0x100 >; | |
| interrupts = < 0x00 0x1d 0x04 >; | |
| #thermal-sensor-cells = < 0x00 >; | |
| phandle = < 0x03 >; | |
| }; | |
| serial@1c28000 { | |
| compatible = "snps,dw-apb-uart"; | |
| reg = < 0x1c28000 0x400 >; | |
| interrupts = < 0x00 0x01 0x04 >; | |
| reg-shift = < 0x02 >; | |
| reg-io-width = < 0x04 >; | |
| clocks = < 0x02 0x58 >; | |
| status = "okay"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x23 >; | |
| phandle = < 0x89 >; | |
| }; | |
| serial@1c28400 { | |
| compatible = "snps,dw-apb-uart"; | |
| reg = < 0x1c28400 0x400 >; | |
| interrupts = < 0x00 0x02 0x04 >; | |
| reg-shift = < 0x02 >; | |
| reg-io-width = < 0x04 >; | |
| clocks = < 0x02 0x59 >; | |
| status = "disabled"; | |
| phandle = < 0x8a >; | |
| }; | |
| serial@1c28800 { | |
| compatible = "snps,dw-apb-uart"; | |
| reg = < 0x1c28800 0x400 >; | |
| interrupts = < 0x00 0x03 0x04 >; | |
| reg-shift = < 0x02 >; | |
| reg-io-width = < 0x04 >; | |
| clocks = < 0x02 0x5a >; | |
| status = "okay"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x75 >; | |
| phandle = < 0x8b >; | |
| }; | |
| serial@1c28c00 { | |
| compatible = "snps,dw-apb-uart"; | |
| reg = < 0x1c28c00 0x400 >; | |
| interrupts = < 0x00 0x04 0x04 >; | |
| reg-shift = < 0x02 >; | |
| reg-io-width = < 0x04 >; | |
| clocks = < 0x02 0x5b >; | |
| status = "disabled"; | |
| phandle = < 0x8c >; | |
| }; | |
| serial@1c29000 { | |
| compatible = "snps,dw-apb-uart"; | |
| reg = < 0x1c29000 0x400 >; | |
| interrupts = < 0x00 0x11 0x04 >; | |
| reg-shift = < 0x02 >; | |
| reg-io-width = < 0x04 >; | |
| clocks = < 0x02 0x5c >; | |
| status = "disabled"; | |
| phandle = < 0x8d >; | |
| }; | |
| serial@1c29400 { | |
| compatible = "snps,dw-apb-uart"; | |
| reg = < 0x1c29400 0x400 >; | |
| interrupts = < 0x00 0x12 0x04 >; | |
| reg-shift = < 0x02 >; | |
| reg-io-width = < 0x04 >; | |
| clocks = < 0x02 0x5d >; | |
| status = "disabled"; | |
| phandle = < 0x8e >; | |
| }; | |
| serial@1c29800 { | |
| compatible = "snps,dw-apb-uart"; | |
| reg = < 0x1c29800 0x400 >; | |
| interrupts = < 0x00 0x13 0x04 >; | |
| reg-shift = < 0x02 >; | |
| reg-io-width = < 0x04 >; | |
| clocks = < 0x02 0x5e >; | |
| status = "disabled"; | |
| phandle = < 0x8f >; | |
| }; | |
| serial@1c29c00 { | |
| compatible = "snps,dw-apb-uart"; | |
| reg = < 0x1c29c00 0x400 >; | |
| interrupts = < 0x00 0x14 0x04 >; | |
| reg-shift = < 0x02 >; | |
| reg-io-width = < 0x04 >; | |
| clocks = < 0x02 0x5f >; | |
| status = "disabled"; | |
| phandle = < 0x90 >; | |
| }; | |
| ps2@1c2a000 { | |
| compatible = "allwinner,sun4i-a10-ps2"; | |
| reg = < 0x1c2a000 0x400 >; | |
| interrupts = < 0x00 0x3e 0x04 >; | |
| clocks = < 0x02 0x55 >; | |
| status = "disabled"; | |
| phandle = < 0x91 >; | |
| }; | |
| ps2@1c2a400 { | |
| compatible = "allwinner,sun4i-a10-ps2"; | |
| reg = < 0x1c2a400 0x400 >; | |
| interrupts = < 0x00 0x3f 0x04 >; | |
| clocks = < 0x02 0x56 >; | |
| status = "disabled"; | |
| phandle = < 0x92 >; | |
| }; | |
| i2c@1c2ac00 { | |
| compatible = "allwinner,sun7i-a20-i2c\0allwinner,sun4i-a10-i2c"; | |
| reg = < 0x1c2ac00 0x400 >; | |
| interrupts = < 0x00 0x07 0x04 >; | |
| clocks = < 0x02 0x4f >; | |
| status = "okay"; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x24 >; | |
| phandle = < 0x93 >; | |
| pmic@34 { | |
| compatible = "x-powers,axp209"; | |
| reg = < 0x34 >; | |
| interrupt-parent = < 0x25 >; | |
| interrupts = < 0x00 0x08 >; | |
| interrupt-controller; | |
| #interrupt-cells = < 0x01 >; | |
| phandle = < 0x94 >; | |
| }; | |
| }; | |
| i2c@1c2b000 { | |
| compatible = "allwinner,sun7i-a20-i2c\0allwinner,sun4i-a10-i2c"; | |
| reg = < 0x1c2b000 0x400 >; | |
| interrupts = < 0x00 0x08 0x04 >; | |
| clocks = < 0x02 0x50 >; | |
| status = "okay"; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x26 >; | |
| phandle = < 0x95 >; | |
| eeprom@50 { | |
| compatible = "atmel,24c16"; | |
| reg = < 0x50 >; | |
| pagesize = < 0x10 >; | |
| phandle = < 0x96 >; | |
| }; | |
| }; | |
| i2c@1c2b400 { | |
| compatible = "allwinner,sun7i-a20-i2c\0allwinner,sun4i-a10-i2c"; | |
| reg = < 0x1c2b400 0x400 >; | |
| interrupts = < 0x00 0x09 0x04 >; | |
| clocks = < 0x02 0x51 >; | |
| status = "disabled"; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| phandle = < 0x97 >; | |
| }; | |
| i2c@1c2b800 { | |
| compatible = "allwinner,sun7i-a20-i2c\0allwinner,sun4i-a10-i2c"; | |
| reg = < 0x1c2b800 0x400 >; | |
| interrupts = < 0x00 0x58 0x04 >; | |
| clocks = < 0x02 0x52 >; | |
| status = "disabled"; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| phandle = < 0x98 >; | |
| }; | |
| can@1c2bc00 { | |
| compatible = "allwinner,sun7i-a20-can\0allwinner,sun4i-a10-can"; | |
| reg = < 0x1c2bc00 0x400 >; | |
| interrupts = < 0x00 0x1a 0x04 >; | |
| clocks = < 0x02 0x53 >; | |
| status = "disabled"; | |
| phandle = < 0x99 >; | |
| }; | |
| i2c@1c2c000 { | |
| compatible = "allwinner,sun7i-a20-i2c\0allwinner,sun4i-a10-i2c"; | |
| reg = < 0x1c2c000 0x400 >; | |
| interrupts = < 0x00 0x59 0x04 >; | |
| clocks = < 0x02 0x57 >; | |
| status = "disabled"; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| phandle = < 0x9a >; | |
| }; | |
| gpu@1c40000 { | |
| compatible = "allwinner,sun7i-a20-mali\0arm,mali-400"; | |
| reg = < 0x1c40000 0x10000 >; | |
| interrupts = < 0x00 0x45 0x04 0x00 0x46 0x04 0x00 0x47 0x04 0x00 0x48 0x04 0x00 0x4a 0x04 0x00 0x4b 0x04 0x00 0x49 0x04 >; | |
| interrupt-names = "gp\0gpmmu\0pp0\0ppmmu0\0pp1\0ppmmu1\0pmu"; | |
| clocks = < 0x02 0x44 0x02 0xa5 >; | |
| clock-names = "bus\0core"; | |
| resets = < 0x02 0x13 >; | |
| assigned-clocks = < 0x02 0xa5 >; | |
| assigned-clock-rates = < 0x16e36000 >; | |
| phandle = < 0x9b >; | |
| }; | |
| ethernet@1c50000 { | |
| compatible = "allwinner,sun7i-a20-gmac"; | |
| reg = < 0x1c50000 0x10000 >; | |
| interrupts = < 0x00 0x55 0x04 >; | |
| interrupt-names = "macirq"; | |
| clocks = < 0x02 0x42 0x27 >; | |
| clock-names = "stmmaceth\0allwinner_gmac_tx"; | |
| snps,pbl = < 0x02 >; | |
| snps,fixed-burst; | |
| snps,force_sf_dma_mode; | |
| status = "okay"; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x28 >; | |
| phy = < 0x29 >; | |
| phy-mode = "mii"; | |
| phandle = < 0x9c >; | |
| ethernet-phy@1 { | |
| reg = < 0x01 >; | |
| phandle = < 0x29 >; | |
| }; | |
| }; | |
| hstimer@1c60000 { | |
| compatible = "allwinner,sun7i-a20-hstimer"; | |
| reg = < 0x1c60000 0x1000 >; | |
| interrupts = < 0x00 0x51 0x04 0x00 0x52 0x04 0x00 0x53 0x04 0x00 0x54 0x04 >; | |
| clocks = < 0x02 0x33 >; | |
| }; | |
| interrupt-controller@1c81000 { | |
| compatible = "arm,gic-400\0arm,cortex-a7-gic\0arm,cortex-a15-gic"; | |
| reg = < 0x1c81000 0x1000 0x1c82000 0x2000 0x1c84000 0x2000 0x1c86000 0x2000 >; | |
| interrupt-controller; | |
| #interrupt-cells = < 0x03 >; | |
| interrupts = < 0x01 0x09 0xf04 >; | |
| phandle = < 0x01 >; | |
| }; | |
| display-frontend@1e00000 { | |
| compatible = "allwinner,sun7i-a20-display-frontend"; | |
| reg = < 0x1e00000 0x20000 >; | |
| interrupts = < 0x00 0x2f 0x04 >; | |
| clocks = < 0x02 0x40 0x02 0x92 0x02 0x8b >; | |
| clock-names = "ahb\0mod\0ram"; | |
| resets = < 0x02 0x07 >; | |
| phandle = < 0x08 >; | |
| ports { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| port@1 { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| reg = < 0x01 >; | |
| phandle = < 0x9d >; | |
| endpoint@0 { | |
| reg = < 0x00 >; | |
| remote-endpoint = < 0x2a >; | |
| phandle = < 0x32 >; | |
| }; | |
| endpoint@1 { | |
| reg = < 0x01 >; | |
| remote-endpoint = < 0x2b >; | |
| phandle = < 0x2e >; | |
| }; | |
| }; | |
| }; | |
| }; | |
| display-frontend@1e20000 { | |
| compatible = "allwinner,sun7i-a20-display-frontend"; | |
| reg = < 0x1e20000 0x20000 >; | |
| interrupts = < 0x00 0x30 0x04 >; | |
| clocks = < 0x02 0x41 0x02 0x93 0x02 0x8a >; | |
| clock-names = "ahb\0mod\0ram"; | |
| resets = < 0x02 0x08 >; | |
| phandle = < 0x09 >; | |
| ports { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| port@1 { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| reg = < 0x01 >; | |
| phandle = < 0x9e >; | |
| endpoint@0 { | |
| reg = < 0x00 >; | |
| remote-endpoint = < 0x2c >; | |
| phandle = < 0x33 >; | |
| }; | |
| endpoint@1 { | |
| reg = < 0x01 >; | |
| remote-endpoint = < 0x2d >; | |
| phandle = < 0x2f >; | |
| }; | |
| }; | |
| }; | |
| }; | |
| display-backend@1e40000 { | |
| compatible = "allwinner,sun7i-a20-display-backend"; | |
| reg = < 0x1e40000 0x10000 >; | |
| interrupts = < 0x00 0x30 0x04 >; | |
| clocks = < 0x02 0x3f 0x02 0x91 0x02 0x8d >; | |
| clock-names = "ahb\0mod\0ram"; | |
| resets = < 0x02 0x06 >; | |
| phandle = < 0x9f >; | |
| ports { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| port@0 { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| reg = < 0x00 >; | |
| phandle = < 0xa0 >; | |
| endpoint@0 { | |
| reg = < 0x00 >; | |
| remote-endpoint = < 0x2e >; | |
| phandle = < 0x2b >; | |
| }; | |
| endpoint@1 { | |
| reg = < 0x01 >; | |
| remote-endpoint = < 0x2f >; | |
| phandle = < 0x2d >; | |
| }; | |
| }; | |
| port@1 { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| reg = < 0x01 >; | |
| phandle = < 0xa1 >; | |
| endpoint@0 { | |
| reg = < 0x00 >; | |
| remote-endpoint = < 0x30 >; | |
| phandle = < 0x0d >; | |
| }; | |
| endpoint@1 { | |
| reg = < 0x01 >; | |
| remote-endpoint = < 0x31 >; | |
| phandle = < 0x10 >; | |
| }; | |
| }; | |
| }; | |
| }; | |
| display-backend@1e60000 { | |
| compatible = "allwinner,sun7i-a20-display-backend"; | |
| reg = < 0x1e60000 0x10000 >; | |
| interrupts = < 0x00 0x2f 0x04 >; | |
| clocks = < 0x02 0x3e 0x02 0x90 0x02 0x8c >; | |
| clock-names = "ahb\0mod\0ram"; | |
| resets = < 0x02 0x05 >; | |
| phandle = < 0xa2 >; | |
| ports { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| port@0 { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| reg = < 0x00 >; | |
| phandle = < 0xa3 >; | |
| endpoint@0 { | |
| reg = < 0x00 >; | |
| remote-endpoint = < 0x32 >; | |
| phandle = < 0x2a >; | |
| }; | |
| endpoint@1 { | |
| reg = < 0x01 >; | |
| remote-endpoint = < 0x33 >; | |
| phandle = < 0x2c >; | |
| }; | |
| }; | |
| port@1 { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| reg = < 0x01 >; | |
| phandle = < 0xa4 >; | |
| endpoint@0 { | |
| reg = < 0x00 >; | |
| remote-endpoint = < 0x34 >; | |
| phandle = < 0x0c >; | |
| }; | |
| endpoint@1 { | |
| reg = < 0x01 >; | |
| remote-endpoint = < 0x35 >; | |
| phandle = < 0x0f >; | |
| }; | |
| }; | |
| }; | |
| }; | |
| }; | |
| ahci-5v { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "ahci-5v"; | |
| regulator-min-microvolt = < 0x4c4b40 >; | |
| regulator-max-microvolt = < 0x4c4b40 >; | |
| regulator-boot-on; | |
| enable-active-high; | |
| gpio = < 0x15 0x02 0x03 0x00 >; | |
| status = "okay"; | |
| pinctrl-0 = < 0x36 >; | |
| phandle = < 0x20 >; | |
| }; | |
| usb0-vbus { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "usb0-vbus"; | |
| regulator-min-microvolt = < 0x4c4b40 >; | |
| regulator-max-microvolt = < 0x4c4b40 >; | |
| enable-active-high; | |
| gpio = < 0x15 0x01 0x09 0x00 >; | |
| status = "okay"; | |
| phandle = < 0x1a >; | |
| }; | |
| usb1-vbus { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "usb1-vbus"; | |
| regulator-min-microvolt = < 0x4c4b40 >; | |
| regulator-max-microvolt = < 0x4c4b40 >; | |
| regulator-boot-on; | |
| enable-active-high; | |
| gpio = < 0x15 0x07 0x06 0x00 >; | |
| status = "okay"; | |
| phandle = < 0x1b >; | |
| }; | |
| usb2-vbus { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "usb2-vbus"; | |
| regulator-min-microvolt = < 0x4c4b40 >; | |
| regulator-max-microvolt = < 0x4c4b40 >; | |
| regulator-boot-on; | |
| enable-active-high; | |
| gpio = < 0x15 0x07 0x03 0x00 >; | |
| status = "okay"; | |
| phandle = < 0x1c >; | |
| }; | |
| vcc3v0 { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "vcc3v0"; | |
| regulator-min-microvolt = < 0x2dc6c0 >; | |
| regulator-max-microvolt = < 0x2dc6c0 >; | |
| phandle = < 0xa5 >; | |
| }; | |
| vcc3v3 { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "vcc3v3"; | |
| regulator-min-microvolt = < 0x325aa0 >; | |
| regulator-max-microvolt = < 0x325aa0 >; | |
| phandle = < 0x14 >; | |
| }; | |
| vcc5v0 { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "vcc5v0"; | |
| regulator-min-microvolt = < 0x4c4b40 >; | |
| regulator-max-microvolt = < 0x4c4b40 >; | |
| phandle = < 0xa6 >; | |
| }; | |
| hdmi-connector { | |
| compatible = "hdmi-connector"; | |
| type = [ 61 00 ]; | |
| port { | |
| endpoint { | |
| remote-endpoint = < 0x37 >; | |
| phandle = < 0x1f >; | |
| }; | |
| }; | |
| }; | |
| leds { | |
| compatible = "gpio-leds"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x38 >; | |
| green { | |
| label = "a20-olinuxino-lime:green:usr"; | |
| gpios = < 0x15 0x07 0x02 0x00 >; | |
| default-state = "on"; | |
| }; | |
| }; | |
| __symbols__ { | |
| cpu0 = "/cpus/cpu@0"; | |
| cpu_alert0 = "/thermal-zones/cpu_thermal/trips/cpu_alert0"; | |
| cpu_crit = "/thermal-zones/cpu_thermal/trips/cpu_crit"; | |
| cma_pool = "/reserved-memory/cma@4a000000"; | |
| osc24M = "/clocks/clk@1c20050"; | |
| osc32k = "/clocks/clk@0"; | |
| mii_phy_tx_clk = "/clocks/clk@1"; | |
| gmac_int_tx_clk = "/clocks/clk@2"; | |
| gmac_tx_clk = "/clocks/clk@1c20164"; | |
| de = "/display-engine"; | |
| sram_a = "/soc@1c00000/system-control@1c00000/sram@0"; | |
| emac_sram = "/soc@1c00000/system-control@1c00000/sram@0/sram-section@8000"; | |
| sram_d = "/soc@1c00000/system-control@1c00000/sram@10000"; | |
| otg_sram = "/soc@1c00000/system-control@1c00000/sram@10000/sram-section@0"; | |
| sram_c = "/soc@1c00000/system-control@1c00000/sram@1d00000"; | |
| ve_sram = "/soc@1c00000/system-control@1c00000/sram@1d00000/sram-section@0"; | |
| nmi_intc = "/soc@1c00000/interrupt-controller@1c00030"; | |
| dma = "/soc@1c00000/dma-controller@1c02000"; | |
| nfc = "/soc@1c00000/nand@1c03000"; | |
| spi0 = "/soc@1c00000/spi@1c05000"; | |
| spi1 = "/soc@1c00000/spi@1c06000"; | |
| emac = "/soc@1c00000/ethernet@1c0b000"; | |
| mdio = "/soc@1c00000/mdio@1c0b080"; | |
| tcon0 = "/soc@1c00000/lcd-controller@1c0c000"; | |
| tcon0_in = "/soc@1c00000/lcd-controller@1c0c000/ports/port@0"; | |
| tcon0_in_be0 = "/soc@1c00000/lcd-controller@1c0c000/ports/port@0/endpoint@0"; | |
| tcon0_in_be1 = "/soc@1c00000/lcd-controller@1c0c000/ports/port@0/endpoint@1"; | |
| tcon0_out = "/soc@1c00000/lcd-controller@1c0c000/ports/port@1"; | |
| tcon0_out_hdmi = "/soc@1c00000/lcd-controller@1c0c000/ports/port@1/endpoint@1"; | |
| tcon1 = "/soc@1c00000/lcd-controller@1c0d000"; | |
| tcon1_in = "/soc@1c00000/lcd-controller@1c0d000/ports/port@0"; | |
| tcon1_in_be0 = "/soc@1c00000/lcd-controller@1c0d000/ports/port@0/endpoint@0"; | |
| tcon1_in_be1 = "/soc@1c00000/lcd-controller@1c0d000/ports/port@0/endpoint@1"; | |
| tcon1_out = "/soc@1c00000/lcd-controller@1c0d000/ports/port@1"; | |
| tcon1_out_hdmi = "/soc@1c00000/lcd-controller@1c0d000/ports/port@1/endpoint@1"; | |
| mmc0 = "/soc@1c00000/mmc@1c0f000"; | |
| mmc1 = "/soc@1c00000/mmc@1c10000"; | |
| mmc2 = "/soc@1c00000/mmc@1c11000"; | |
| mmc3 = "/soc@1c00000/mmc@1c12000"; | |
| usb_otg = "/soc@1c00000/usb@1c13000"; | |
| usbphy = "/soc@1c00000/phy@1c13400"; | |
| ehci0 = "/soc@1c00000/usb@1c14000"; | |
| ohci0 = "/soc@1c00000/usb@1c14400"; | |
| crypto = "/soc@1c00000/crypto-engine@1c15000"; | |
| hdmi = "/soc@1c00000/hdmi@1c16000"; | |
| hdmi_in = "/soc@1c00000/hdmi@1c16000/ports/port@0"; | |
| hdmi_in_tcon0 = "/soc@1c00000/hdmi@1c16000/ports/port@0/endpoint@0"; | |
| hdmi_in_tcon1 = "/soc@1c00000/hdmi@1c16000/ports/port@0/endpoint@1"; | |
| hdmi_out = "/soc@1c00000/hdmi@1c16000/ports/port@1"; | |
| hdmi_out_con = "/soc@1c00000/hdmi@1c16000/ports/port@1/endpoint"; | |
| spi2 = "/soc@1c00000/spi@1c17000"; | |
| ahci = "/soc@1c00000/sata@1c18000"; | |
| ehci1 = "/soc@1c00000/usb@1c1c000"; | |
| ohci1 = "/soc@1c00000/usb@1c1c400"; | |
| spi3 = "/soc@1c00000/spi@1c1f000"; | |
| ccu = "/soc@1c00000/clock@1c20000"; | |
| pio = "/soc@1c00000/pinctrl@1c20800"; | |
| can0_pins_a = "/soc@1c00000/pinctrl@1c20800/can0@0"; | |
| clk_out_a_pins_a = "/soc@1c00000/pinctrl@1c20800/clk_out_a@0"; | |
| clk_out_b_pins_a = "/soc@1c00000/pinctrl@1c20800/clk_out_b@0"; | |
| emac_pins_a = "/soc@1c00000/pinctrl@1c20800/emac0@0"; | |
| gmac_pins_mii_a = "/soc@1c00000/pinctrl@1c20800/gmac_mii@0"; | |
| gmac_pins_rgmii_a = "/soc@1c00000/pinctrl@1c20800/gmac_rgmii@0"; | |
| i2c0_pins_a = "/soc@1c00000/pinctrl@1c20800/i2c0@0"; | |
| i2c1_pins_a = "/soc@1c00000/pinctrl@1c20800/i2c1@0"; | |
| i2c2_pins_a = "/soc@1c00000/pinctrl@1c20800/i2c2@0"; | |
| i2c3_pins_a = "/soc@1c00000/pinctrl@1c20800/i2c3@0"; | |
| ir0_rx_pins_a = "/soc@1c00000/pinctrl@1c20800/ir0@0"; | |
| ir0_tx_pins_a = "/soc@1c00000/pinctrl@1c20800/ir0@1"; | |
| ir1_rx_pins_a = "/soc@1c00000/pinctrl@1c20800/ir1@0"; | |
| ir1_tx_pins_a = "/soc@1c00000/pinctrl@1c20800/ir1@1"; | |
| mmc0_pins_a = "/soc@1c00000/pinctrl@1c20800/mmc0@0"; | |
| mmc2_pins_a = "/soc@1c00000/pinctrl@1c20800/mmc2@0"; | |
| mmc3_pins_a = "/soc@1c00000/pinctrl@1c20800/mmc3@0"; | |
| ps20_pins_a = "/soc@1c00000/pinctrl@1c20800/ps20@0"; | |
| ps21_pins_a = "/soc@1c00000/pinctrl@1c20800/ps21@0"; | |
| pwm0_pins_a = "/soc@1c00000/pinctrl@1c20800/pwm0@0"; | |
| pwm1_pins_a = "/soc@1c00000/pinctrl@1c20800/pwm1@0"; | |
| spdif_tx_pins_a = "/soc@1c00000/pinctrl@1c20800/spdif@0"; | |
| spi0_pins_a = "/soc@1c00000/pinctrl@1c20800/spi0@0"; | |
| spi0_cs0_pins_a = "/soc@1c00000/pinctrl@1c20800/spi0_cs0@0"; | |
| spi0_cs1_pins_a = "/soc@1c00000/pinctrl@1c20800/spi0_cs1@0"; | |
| spi1_pins_a = "/soc@1c00000/pinctrl@1c20800/spi1@0"; | |
| spi1_cs0_pins_a = "/soc@1c00000/pinctrl@1c20800/spi1_cs0@0"; | |
| spi2_pins_a = "/soc@1c00000/pinctrl@1c20800/spi2@0"; | |
| spi2_pins_b = "/soc@1c00000/pinctrl@1c20800/spi2@1"; | |
| spi2_cs0_pins_a = "/soc@1c00000/pinctrl@1c20800/spi2_cs0@0"; | |
| spi2_cs0_pins_b = "/soc@1c00000/pinctrl@1c20800/spi2_cs0@1"; | |
| uart0_pins_a = "/soc@1c00000/pinctrl@1c20800/uart0@0"; | |
| uart2_pins_a = "/soc@1c00000/pinctrl@1c20800/uart2@0"; | |
| uart3_pins_a = "/soc@1c00000/pinctrl@1c20800/uart3@0"; | |
| uart3_pins_b = "/soc@1c00000/pinctrl@1c20800/uart3@1"; | |
| uart4_pins_a = "/soc@1c00000/pinctrl@1c20800/uart4@0"; | |
| uart4_pins_b = "/soc@1c00000/pinctrl@1c20800/uart4@1"; | |
| uart5_pins_a = "/soc@1c00000/pinctrl@1c20800/uart5@0"; | |
| uart6_pins_a = "/soc@1c00000/pinctrl@1c20800/uart6@0"; | |
| uart7_pins_a = "/soc@1c00000/pinctrl@1c20800/uart7@0"; | |
| ahci_pwr_pin_olinuxinolime = "/soc@1c00000/pinctrl@1c20800/ahci_pwr_pin@1"; | |
| led_pins_olinuxinolime = "/soc@1c00000/pinctrl@1c20800/led_pins@0"; | |
| usb0_id_detect_pin = "/soc@1c00000/pinctrl@1c20800/usb0_id_detect_pin@0"; | |
| usb0_vbus_detect_pin = "/soc@1c00000/pinctrl@1c20800/usb0_vbus_detect_pin@0"; | |
| wdt = "/soc@1c00000/watchdog@1c20c90"; | |
| rtc = "/soc@1c00000/rtc@1c20d00"; | |
| pwm = "/soc@1c00000/pwm@1c20e00"; | |
| spdif = "/soc@1c00000/spdif@1c21000"; | |
| ir0 = "/soc@1c00000/ir@1c21800"; | |
| ir1 = "/soc@1c00000/ir@1c21c00"; | |
| i2s1 = "/soc@1c00000/i2s@1c22000"; | |
| i2s0 = "/soc@1c00000/i2s@1c22400"; | |
| lradc = "/soc@1c00000/lradc@1c22800"; | |
| codec = "/soc@1c00000/codec@1c22c00"; | |
| sid = "/soc@1c00000/eeprom@1c23800"; | |
| i2s2 = "/soc@1c00000/i2s@1c24400"; | |
| rtp = "/soc@1c00000/rtp@1c25000"; | |
| uart0 = "/soc@1c00000/serial@1c28000"; | |
| uart1 = "/soc@1c00000/serial@1c28400"; | |
| uart2 = "/soc@1c00000/serial@1c28800"; | |
| uart3 = "/soc@1c00000/serial@1c28c00"; | |
| uart4 = "/soc@1c00000/serial@1c29000"; | |
| uart5 = "/soc@1c00000/serial@1c29400"; | |
| uart6 = "/soc@1c00000/serial@1c29800"; | |
| uart7 = "/soc@1c00000/serial@1c29c00"; | |
| ps20 = "/soc@1c00000/ps2@1c2a000"; | |
| ps21 = "/soc@1c00000/ps2@1c2a400"; | |
| i2c0 = "/soc@1c00000/i2c@1c2ac00"; | |
| axp209 = "/soc@1c00000/i2c@1c2ac00/pmic@34"; | |
| i2c1 = "/soc@1c00000/i2c@1c2b000"; | |
| eeprom = "/soc@1c00000/i2c@1c2b000/eeprom@50"; | |
| i2c2 = "/soc@1c00000/i2c@1c2b400"; | |
| i2c3 = "/soc@1c00000/i2c@1c2b800"; | |
| can0 = "/soc@1c00000/can@1c2bc00"; | |
| i2c4 = "/soc@1c00000/i2c@1c2c000"; | |
| mali = "/soc@1c00000/gpu@1c40000"; | |
| gmac = "/soc@1c00000/ethernet@1c50000"; | |
| phy1 = "/soc@1c00000/ethernet@1c50000/ethernet-phy@1"; | |
| gic = "/soc@1c00000/interrupt-controller@1c81000"; | |
| fe0 = "/soc@1c00000/display-frontend@1e00000"; | |
| fe0_out = "/soc@1c00000/display-frontend@1e00000/ports/port@1"; | |
| fe0_out_be0 = "/soc@1c00000/display-frontend@1e00000/ports/port@1/endpoint@0"; | |
| fe0_out_be1 = "/soc@1c00000/display-frontend@1e00000/ports/port@1/endpoint@1"; | |
| fe1 = "/soc@1c00000/display-frontend@1e20000"; | |
| fe1_out = "/soc@1c00000/display-frontend@1e20000/ports/port@1"; | |
| fe1_out_be0 = "/soc@1c00000/display-frontend@1e20000/ports/port@1/endpoint@0"; | |
| fe1_out_be1 = "/soc@1c00000/display-frontend@1e20000/ports/port@1/endpoint@1"; | |
| be1 = "/soc@1c00000/display-backend@1e40000"; | |
| be1_in = "/soc@1c00000/display-backend@1e40000/ports/port@0"; | |
| be1_in_fe0 = "/soc@1c00000/display-backend@1e40000/ports/port@0/endpoint@0"; | |
| be1_in_fe1 = "/soc@1c00000/display-backend@1e40000/ports/port@0/endpoint@1"; | |
| be1_out = "/soc@1c00000/display-backend@1e40000/ports/port@1"; | |
| be1_out_tcon0 = "/soc@1c00000/display-backend@1e40000/ports/port@1/endpoint@0"; | |
| be1_out_tcon1 = "/soc@1c00000/display-backend@1e40000/ports/port@1/endpoint@1"; | |
| be0 = "/soc@1c00000/display-backend@1e60000"; | |
| be0_in = "/soc@1c00000/display-backend@1e60000/ports/port@0"; | |
| be0_in_fe0 = "/soc@1c00000/display-backend@1e60000/ports/port@0/endpoint@0"; | |
| be0_in_fe1 = "/soc@1c00000/display-backend@1e60000/ports/port@0/endpoint@1"; | |
| be0_out = "/soc@1c00000/display-backend@1e60000/ports/port@1"; | |
| be0_out_tcon0 = "/soc@1c00000/display-backend@1e60000/ports/port@1/endpoint@0"; | |
| be0_out_tcon1 = "/soc@1c00000/display-backend@1e60000/ports/port@1/endpoint@1"; | |
| reg_ahci_5v = "/ahci-5v"; | |
| reg_usb0_vbus = "/usb0-vbus"; | |
| reg_usb1_vbus = "/usb1-vbus"; | |
| reg_usb2_vbus = "/usb2-vbus"; | |
| reg_vcc3v0 = "/vcc3v0"; | |
| reg_vcc3v3 = "/vcc3v3"; | |
| reg_vcc5v0 = "/vcc5v0"; | |
| hdmi_con_in = "/hdmi-connector/port/endpoint"; | |
| }; | |
| }; |
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