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This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters. Learn more about bidirectional Unicode charactersOriginal file line number Diff line number Diff line change @@ -24,10 +24,10 @@ Found U-Boot script /boot.scr 653 bytes read in 3 ms (211.9 KiB/s) ## Executing script at 4fc00000 gpio: pin 114 (gpio 114) value is 1 170470 bytes read in 10 ms (16.3 MiB/s) Uncompressed size: 10317824 = 0x9D7000 36162 bytes read in 4 ms (8.6 MiB/s) 1078500 bytes read in 50 ms (20.6 MiB/s) ## Flattened Device Tree blob at 4fa00000 Booting using the fdt blob at 0x4fa00000 Loading Ramdisk to 49ef8000, end 49fff4e4 ... OK @@ -58,41 +58,24 @@ Configure PL10 for PWM Disable R_PWM *0x1f03800: clear 0x40, set 0x0 *0x1f03800 = 0x0 Configure R_PWM Period *0x1f03804 = 0x4af0437 Enable R_PWM *0x1f03800 = 0x5f Configure PH10 for Output *0x1c20900: clear 0x700, set 0x100 *0x1c20900 = 0x7177 Set PH10 to High *0x1c2090c: clear 0x400, set 0x400 *0x1c2090c = 0x400 backlight_enable: end a64_tcon0_init: Configure PLL_VIDEO0 a64_tcon0_init: Enable LDO1 and LDO2 a64_tcon0_init: Configure MIPI PLL a64_tcon0_init: Set TCON0 Clock Source to MIPI PLL a64_tcon0_init: Enable TCON0 Clock a64_tcon0_init: Deassert TCON0 Reset a64_tcon0_init: Disable TCON0 and Interrupts a64_tcon0_init: Enable Tristate Output a64_tcon0_init: Set DCLK to MIPI PLL / 6 a64_tcon0_init: Set CPU Panel Trigger @@ -160,19 +143,13 @@ Set DLDO2 Voltage to 1.8V *0x1f0342c = 0x4e *0x1f03430 = 0x2d0000 *0x1f03410 = 0x12 *0x1f0341c = 0xd9 *0x1f03400 = 0x80 Wait for power supply and power-on init display_board_init: end a64_mipi_dsi_enable: Enable MIPI DSI Bus a64_mipi_dsi_enable: Enable DSI Block a64_mipi_dsi_enable: Set Instructions a64_mipi_dsi_enable: Configure Jump Instructions a64_mipi_dsi_enable: Set Video Start Delay a64_mipi_dsi_enable: Set Burst @@ -191,19 +168,13 @@ Configure PD23 for Output *0x1c20874: clear 0x70000000, set 0x10000000 *0x1c20874 = 0x17711177 Set PD23 to High *0x1c2087c: clear 0x800000, set 0x800000 *0x1c2087c = 0x800000 wait for initialization panel_reset: end pinephone_panel_init: panel_init: start write_dcs: writeDcs: len=4 buf (0x40adf7c0): 0000 b9 f1 12 83 .... a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=4 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=4 @@ -535,4 +506,4 @@ Apply Settings applySettings: end renderGraphics: end nsh> nsh> . -
Dec 17, 2022 . 1 changed file with 50 additions and 27 deletions.There are no files selected for viewing
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters. Learn more about bidirectional Unicode charactersOriginal file line number Diff line number Diff line change @@ -21,10 +21,10 @@ switch to partitions #0, OK mmc0 is current device Scanning mmc 0:1... Found U-Boot script /boot.scr 653 bytes read in 3 ms (211.9 KiB/s) ## Executing script at 4fc00000 gpio: pin 114 (gpio 114) value is 1 170479 bytes read in 11 ms (14.8 MiB/s) Uncompressed size: 10317824 = 0x9D7000 36162 bytes read in 4 ms (8.6 MiB/s) 1078500 bytes read in 51 ms (20.2 MiB/s) @@ -58,24 +58,41 @@ Configure PL10 for PWM Disable R_PWM *0x1f03800: clear 0x40, set 0x0 *0x1f03800 = 0x0 Configure R_PWM Periao6d4 _ t c o*n00x_1ifn0i3t8:0 4C o=n f0ixg4uarfe0 4P3L7L _ VEInDaEbOl0e Ra_6P4W_Mt c o n 0*_0ixn1ift0:3 8E0n0a b=l e0 xL5DfO 1 Caonndf iLgDuOr2e PaH6140_ tfcoorn 0O_uitnpiutt: C o n*f0ixg1ucr2e0 9M0I0P:I cPlLeLa r a06x47_0t0c,o ns0e_ti n0ixt1:0 0S e t T*C0OxN10c 2C0l9o0c0k =S o0uxr7c1e7 7t o SMeItP IP HP1L0L t oa 6H4i_gthc o n 0 _*i0nxi1tc:2 0E9n0acb:l ec lTeCaOrN 00 xC4l0o0c,k s eat6 40_xt4c0o0n 0 _ i n*i0tx:1 cD2e0a9s0sce r=t 0TxC4O0N00 Rbeascektl i gah6t4__etncaobnl0e_:i neintd: Disable TCON0 and Interrupts a64_tcon0_init: Enable Tristate Output a64_tcon0_init: Set DCLK to MIPI PLL / 6 a64_tcon0_init: Set CPU Panel Trigger @@ -143,13 +160,19 @@ Set DLDO2 Voltage to 1.8V *0x1f0342c = 0x4e *0x1f03430 = 0x2d0000 *0x1f03410 = 0x12 *0x1fa06344_1mci p=i _0dxsdi9_ e n a b*l0ex:1 fE0n3a4b0l0e =M I0PxI8 0D S IW aBiuts f oar6 4p_omwiepri _sduspip_leyn aabnlde :p oEwnearb-loen DiSnIi tB l odciks p laa6y4__bmoiaprid__disnii_te:n aebnlde : Set Instructions a64_mipi_dsi_enable: Configure Jump Instructions a64_mipi_dsi_enable: Set Video Start Delay a64_mipi_dsi_enable: Set Burst -
Dec 17, 2022 . 1 changed file with 229 additions and 382 deletions.There are no files selected for viewing
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters. Learn more about bidirectional Unicode charactersOriginal file line number Diff line number Diff line change @@ -21,13 +21,13 @@ switch to partitions #0, OK mmc0 is current device Scanning mmc 0:1... Found U-Boot script /boot.scr 653 bytes read in 4 ms (159.2 KiB/s) ## Executing script at 4fc00000 gpio: pin 114 (gpio 114) value is 1 170436 bytes read in 11 ms (14.8 MiB/s) Uncompressed size: 10317824 = 0x9D7000 36162 bytes read in 4 ms (8.6 MiB/s) 1078500 bytes read in 51 ms (20.2 MiB/s) ## Flattened Device Tree blob at 4fa00000 Booting using the fdt blob at 0x4fa00000 Loading Ramdisk to 49ef8000, end 49fff4e4 ... OK @@ -143,19 +143,13 @@ Set DLDO2 Voltage to 1.8V *0x1f0342c = 0x4e *0x1f03430 = 0x2d0000 *0x1f03410 = 0x12 *0x1f0341c = 0xd9 *0x1f03400 = 0x80 Wait for power supply and power-on init display_board_init: end a64_mipi_dsi_enable: Enable MIPI DSI Bus a64_mipi_dsi_enable: Enable DSI Block a64_mipi_dsi_enable: Set Instructions a64_mipi_dsi_enable: Configure Jump Instructions a64_mipi_dsi_enable: Set Video Start Delay a64_mipi_dsi_enable: Set Burst @@ -174,374 +168,227 @@ Configure PD23 for Output *0x1c20874: clear 0x70000000, set 0x10000000 *0x1c20874 = 0x17711177 Set PD23 to High *0x1c2087c: clear 0x800000, set 0x80000p0i n e p h*o0nxe1_cp2a0n8e7lc_ i=n i0tx:8 0p0a0n0e0l _ iwnaiitt: fsotra ritn i twirailtiez_adtciso:n w rpiatneeDlc_sr:e sleetn:= 4e n db u f (0x40adf7c0): 0000 b9 f1 12 83 .... a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=4 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=4 a64_mipi_dsi_write: pktlen=10 pkt (0x40adf6d0): 0000 39 04 00 2c b9 f1 12 83 84 5d 9..,.....] write_dcs: ret=4 write_dcs: writeDcs: len=28 buf (0x40adf828): 0000 ba 33 81 05 f9 0e 0e 20 00 00 00 00 00 00 00 44 .3..... .......D 0010 25 00 91 0a 00 00 02 4f 11 00 00 37 %......O...7 a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=28 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=28 a64_mipi_dsi_write: pktlen=34 pkt (0x40adf6d0): 0000 39 1c 00 2f ba 33 81 05 f9 0e 0e 20 00 00 00 00 9../.3..... .... 0010 00 00 00 44 25 00 91 0a 00 00 02 4f 11 00 00 37 ...D%......O...7 0020 2c e2 ,. write_dcs: ret=28 write_dcs: writeDcs: len=5 buf (0x40adf7d8): 0000 b8 25 22 20 03 .%" . a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=5 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=5 a64_mipi_dsi_write: pktlen=11 pkt (0x40adf6d0): 0000 39 05 00 36 b8 25 22 20 03 03 72 9..6.%" ..r write_dcs: ret=5 write_dcs: writeDcs: len=11 buf (0x40adf7f8): 0000 b3 10 10 05 05 03 ff 00 00 00 00 ........... a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=11 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=11 a64_mipi_dsi_write: pktlen=17 pkt (0x40adf6d0): 0000 39 0b 00 2c b3 10 10 05 05 03 ff 00 00 00 00 6f 9..,...........o 0010 bc . write_dcs: ret=11 write_dcs: writeDcs: len=10 buf (0x40adf7e8): 0000 c0 73 73 50 50 00 c0 08 70 00 .ssPP...p. a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=10 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=10 a64_mipi_dsi_write: pktlen=16 pkt (0x40adf6d0): 0000 39 0a 00 36 c0 73 73 50 50 00 c0 08 70 00 1b 6a 9..6.ssPP...p..j write_dcs: ret=10 write_dcs: writeDcs: len=2 buf (0x40adf798): 0000 bc 4e .N a64_mipi_dsi_write: channel=0, cmd=0x15, txlen=2 mipi_dsi_short_packet: channel=0, cmd=0x15, txlen=2 a64_mipi_dsi_write: pktlen=4 pkt (0x40adf6d0): 0000 15 bc 4e 35 ..N5 write_dcs: ret=2 write_dcs: writeDcs: len=2 buf (0x40adf7a0): 0000 cc 0b .. a64_mipi_dsi_write: channel=0, cmd=0x15, txlen=2 mipi_dsi_short_packet: channel=0, cmd=0x15, txlen=2 a64_mipi_dsi_write: pktlen=4 pkt (0x40adf6d0): 0000 15 cc 0b 22 ..." write_dcs: ret=2 write_dcs: writeDcs: len=2 buf (0x40adf7a8): 0000 b4 80 .. a64_mipi_dsi_write: channel=0, cmd=0x15, txlen=2 mipi_dsi_short_packet: channel=0, cmd=0x15, txlen=2 a64_mipi_dsi_write: pktlen=4 pkt (0x40adf6d0): 0000 15 b4 80 22 ..." write_dcs: ret=2 write_dcs: writeDcs: len=4 buf (0x40adf7c8): 0000 b2 f0 12 f0 .... a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=4 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=4 a64_mipi_dsi_write: pktlen=10 pkt (0x40adf6d0): 0000 39 04 00 2c b2 f0 12 f0 51 86 9..,....Q. write_dcs: ret=4 write_dcs: writeDcs: len=15 buf (0x40adf818): 0000 e3 00 00 0b 0b 10 10 00 00 00 00 ff 00 c0 10 ............... a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=15 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=15 a64_mipi_dsi_write: pktlen=21 pkt (0x40adf6d0): 0000 39 0f 00 0f e3 00 00 0b 0b 10 10 00 00 00 00 ff 9............... 0010 00 c0 10 36 0f ...6. write_dcs: ret=15 write_dcs: writeDcs: len=6 buf (0x40adf7e0): 0000 c6 01 00 ff ff 00 ...... a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=6 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=6 a64_mipi_dsi_write: pktlen=12 pkt (0x40adf6d0): 0000 39 06 00 30 c6 01 00 ff ff 00 8e 25 9..0.......% write_dcs: ret=6 write_dcs: writeDcs: len=13 buf (0x40adf808): 0000 c1 74 00 32 32 77 f1 ff ff cc cc 77 77 .t.22w.....ww a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=13 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=13 a64_mipi_dsi_write: pktlen=19 pkt (0x40adf6d0): 0000 39 0d 00 13 c1 74 00 32 32 77 f1 ff ff cc cc 77 9....t.22w.....w 0010 77 69 e4 wi. write_dcs: ret=13 write_dcs: writeDcs: len=3 buf (0x40adf7b0): 0000 b5 07 07 ... a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=3 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=3 a64_mipi_dsi_write: pktlen=9 pkt (0x40adf6d0): 0000 39 03 00 09 b5 07 07 7b b3 9......{. write_dcs: ret=3 write_dcs: writeDcs: len=3 buf (0x40adf7b8): 0000 b6 2c 2c .,, a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=3 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=3 a64_mipi_dsi_write: pktlen=9 pkt (0x40adf6d0): 0000 39 03 00 09 b6 2c 2c 55 04 9....,,U. write_dcs: ret=3 write_dcs: writeDcs: len=4 buf (0x40adf7d0): 0000 bf 02 11 00 .... a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=4 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=4 a64_mipi_dsi_write: pktlen=10 pkt (0x40adf6d0): 0000 39 04 00 2c bf 02 11 00 b5 e9 9..,...... write_dcs: ret=4 write_dcs: writeDcs: len=64 buf (0x40adf8b0): 0000 e9 82 10 06 05 a2 0a a5 12 31 23 37 83 04 bc 27 .........1#7...' 0010 38 0c 00 03 00 00 00 0c 00 03 00 00 00 75 75 31 8............uu1 0020 88 88 88 88 88 88 13 88 64 64 20 88 88 88 88 88 ........dd ..... 0030 88 02 88 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=64 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=64 a64_mipi_dsi_write: pktlen=70 pkt (0x40adf6d0): 0000 39 40 00 25 e9 82 10 06 05 a2 0a a5 12 31 23 37 9@.%.........1#7 0010 83 04 bc 27 38 0c 00 03 00 00 00 0c 00 03 00 00 ...'8........... 0020 00 75 75 31 88 88 88 88 88 88 13 88 64 64 20 88 .uu1........dd . 0030 88 88 88 88 88 02 88 00 00 00 00 00 00 00 00 00 ................ 0040 00 00 00 00 65 03 ....e. write_dcs: ret=64 write_dcs: writeDcs: len=62 buf (0x40adf870): 0000 ea 02 21 00 00 00 00 00 00 00 00 00 00 02 46 02 ..!...........F. 0010 88 88 88 88 88 88 64 88 13 57 13 88 88 88 88 88 ......d..W...... 0020 88 75 88 23 14 00 00 02 00 00 00 00 00 00 00 00 .u.#............ 0030 00 00 00 00 00 00 00 03 0a a5 00 00 00 00 .............. a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=62 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=62 a64_mipi_dsi_write: pktlen=68 pkt (0x40adf6d0): 0000 39 3e 00 1a ea 02 21 00 00 00 00 00 00 00 00 00 9>....!......... 0010 00 02 46 02 88 88 88 88 88 88 64 88 13 57 13 88 ..F.......d..W.. 0020 88 88 88 88 88 75 88 23 14 00 00 02 00 00 00 00 .....u.#........ 0030 00 00 00 00 00 00 00 00 00 00 00 03 0a a5 00 00 ................ 0040 00 00 24 1b ..$. write_dcs: ret=62 write_dcs: writeDcs: len=35 buf (0x40adf848): 0000 e0 00 09 0d 23 27 3c 41 35 07 0d 0e 12 13 10 12 ....#'<A5....... 0010 12 18 00 09 0d 23 27 3c 41 35 07 0d 0e 12 13 10 .....#'<A5...... 0020 12 12 18 ... a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=35 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=35 a64_mipi_dsi_write: pktlen=41 pkt (0x40adf6d0): 0000 39 23 00 20 e0 00 09 0d 23 27 3c 41 35 07 0d 0e 9#. ....#'<A5... 0010 12 13 10 12 12 18 00 09 0d 23 27 3c 41 35 07 0d .........#'<A5.. 0020 0e 12 13 10 12 12 18 93 bf ......... write_dcs: ret=35 write_dcs: writeDcs: len=1 buf (0x40adf788): 0000 11 . a64_mipi_dsi_write: channel=0, cmd=0x5, txlen=1 mipi_dsi_short_packet: channel=0, cmd=0x5, txlen=1 a64_mipi_dsi_write: pktlen=4 pkt (0x40adf6d0): 0000 05 11 00 36 ...6 write_dcs: ret=1 write_dcs: writeDcs: len=1 buf (0x40adf790): 0000 29 ) a64_mipi_dsi_write: channel=0, cmd=0x5, txlen=1 mipi_dsi_short_packet: channel=0, cmd=0x5, txlen=1 a64_mipi_dsi_write: pktlen=4 pkt (0x40adf6d0): 0000 05 29 00 1c .).. write_dcs: ret=1 pinephone_panel_init: panel_init: end a64_mipi_dsi_start: Start HSC a64_mipi_dsi_start: Commit a64_mipi_dsi_start: Instruction Function Lane a64_mipi_dsi_start: Start HSD a64_mipi_dsi_start: Commit de2_init: start Set High Speed SRAM to DMA Mode *0x1c00004 = 0x0 @@ -665,4 +512,4 @@ Apply Settings applySettings: end renderGraphics: end nsh> nsh> -
Dec 17, 2022 . 1 changed file with 392 additions and 277 deletions.There are no files selected for viewing
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters. Learn more about bidirectional Unicode charactersOriginal file line number Diff line number Diff line change @@ -24,8 +24,8 @@ Found U-Boot script /boot.scr 653 bytes read in 3 ms (211.9 KiB/s) ## Executing script at 4fc00000 gpio: pin 114 (gpio 114) value is 1 169540 bytes read in 11 ms (14.7 MiB/s) Uncompressed size: 10317824 = 0x9D7000 36162 bytes read in 4 ms (8.6 MiB/s) 1078500 bytes read in 50 ms (20.6 MiB/s) ## Flattened Device Tree blob at 4fa00000 @@ -39,32 +39,17 @@ Starting kernel ... - Boot from EL2 - Boot from EL1 - Boot to C runtime for OS Initialize lib_cxx_initialize: _sinit: 0x400e8000 _einit: 0x400e8000 nsh: sysinit: fopen failed: 2 nsh: mkfatfs: command not found NuttShell (NSH) NuttX-11.0.0-pinephone nsh> nsh> nsh> uname -a NuttX 11.0.0-pinephone 893b147 Dec 14 2022 23:01:27 arm64 pinephone nsh> nsh> hello 0 pinephone-nuttx/render.zig: hello_main backlight_enable: start, percent=90 Configure PL10 for PWM @@ -73,41 +58,24 @@ Configure PL10 for PWM Disable R_PWM *0x1f03800: clear 0x40, set 0x0 *0x1f03800 = 0x0 Configure R_PWM Period *0x1f03804 = 0x4af0437 Enable R_PWM *0x1f03800 = 0x5f Configure PH10 for Output *0x1c20900: clear 0x700, set 0x100 *0x1c20900 = 0x7177 Set PH10 to High *0x1c2090c: clear 0x400, set 0x400 *0x1c2090c = 0x400 backlight_enable: end a64_tcon0_init: Configure PLL_VIDEO0 a64_tcon0_init: Enable LDO1 and LDO2 a64_tcon0_init: Configure MIPI PLL a64_tcon0_init: Set TCON0 Clock Source to MIPI PLL a64_tcon0_init: Enable TCON0 Clock a64_tcon0_init: Deassert TCON0 Reset a64_tcon0_init: Disable TCON0 and Interrupts a64_tcon0_init: Enable Tristate Output a64_tcon0_init: Set DCLK to MIPI PLL / 6 a64_tcon0_init: Set CPU Panel Trigger @@ -206,227 +174,374 @@ Configure PD23 for Output *0x1c20874: clear 0x70000000, set 0x10000000 *0x1c20874 = 0x17711177 Set PD23 to High *0x1c2087c: clear 0x800000, set 0x800000 *0x1c2087c = 0x800000 wait for initialization panel_reset: end panel_init: start writeDcs: len=4 b9 f1 12 83 mipi_dsi_dcs_write: channel=0, cmd=0x39, len=4 composeLongPacket: channel=0, cmd=0x39, len=4 packet: len=10 39 04 00 2c b9 f1 12 83 84 5d *0x1ca0300: clear 0xffffffff, set 0x2c000439 *0x1ca0304: clear 0xffffffff, set 0x8312f1b9 *0x1ca0308: clear 0xffffffff, set 0x5d84 *0x1ca0200: clear 0xff, set 0x9 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=28 ba 33 81 05 f9 0e 0e 20 00 00 00 00 00 00 00 44 25 00 91 0a 00 00 02 4f 11 00 00 37 mipi_dsi_dcs_write: channel=0, cmd=0x39, len=28 composeLongPacket: channel=0, cmd=0x39, len=28 packet: len=34 39 1c 00 2f ba 33 81 05 f9 0e 0e 20 00 00 00 00 00 00 00 44 25 00 91 0a 00 00 02 4f 11 00 00 37 2c e2 *0x1ca0300: clear 0xffffffff, set 0x2f001c39 *0x1ca0304: clear 0xffffffff, set 0x58133ba *0x1ca0308: clear 0xffffffff, set 0x200e0ef9 *0x1ca030c: clear 0xffffffff, set 0x0 *0x1ca0310: clear 0xffffffff, set 0x44000000 *0x1ca0314: clear 0xffffffff, set 0xa910025 *0x1ca0318: clear 0xffffffff, set 0x4f020000 *0x1ca031c: clear 0xffffffff, set 0x37000011 *0x1ca0320: clear 0xffffffff, set 0xe22c *0x1ca0200: clear 0xff, set 0x21 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=5 b8 25 22 20 03 mipi_dsi_dcs_write: channel=0, cmd=0x39, len=5 composeLongPacket: channel=0, cmd=0x39, len=5 packet: len=11 39 05 00 36 b8 25 22 20 03 03 72 *0x1ca0300: clear 0xffffffff, set 0x36000539 *0x1ca0304: clear 0xffffffff, set 0x202225b8 *0x1ca0308: clear 0xffffffff, set 0x720303 *0x1ca0200: clear 0xff, set 0xa *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=11 b3 10 10 05 05 03 ff 00 00 00 00 mipi_dsi_dcs_write: channel=0, cmd=0x39, len=11 composeLongPacket: channel=0, cmd=0x39, len=11 packet: len=17 39 0b 00 2c b3 10 10 05 05 03 ff 00 00 00 00 6f bc *0x1ca0300: clear 0xffffffff, set 0x2c000b39 *0x1ca0304: clear 0xffffffff, set 0x51010b3 *0x1ca0308: clear 0xffffffff, set 0xff0305 *0x1ca030c: clear 0xffffffff, set 0x6f000000 *0x1ca0310: clear 0xffffffff, set 0xbc *0x1ca0200: clear 0xff, set 0x10 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=10 c0 73 73 50 50 00 c0 08 70 00 mipi_dsi_dcs_write: channel=0, cmd=0x39, len=10 composeLongPacket: channel=0, cmd=0x39, len=10 packet: len=16 39 0a 00 36 c0 73 73 50 50 00 c0 08 70 00 1b 6a *0x1ca0300: clear 0xffffffff, set 0x36000a39 *0x1ca0304: clear 0xffffffff, set 0x507373c0 *0x1ca0308: clear 0xffffffff, set 0x8c00050 *0x1ca030c: clear 0xffffffff, set 0x6a1b0070 *0x1ca0200: clear 0xff, set 0xf *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=2 bc 4e mipi_dsi_dcs_write: channel=0, cmd=0x15, len=2 composeShortPacket: channel=0, cmd=0x15, len=2 packet: len=4 15 bc 4e 35 *0x1ca0300: clear 0xffffffff, set 0x354ebc15 *0x1ca0200: clear 0xff, set 0x3 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=2 cc 0b mipi_dsi_dcs_write: channel=0, cmd=0x15, len=2 composeShortPacket: channel=0, cmd=0x15, len=2 packet: len=4 15 cc 0b 22 *0x1ca0300: clear 0xffffffff, set 0x220bcc15 *0x1ca0200: clear 0xff, set 0x3 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=2 b4 80 mipi_dsi_dcs_write: channel=0, cmd=0x15, len=2 composeShortPacket: channel=0, cmd=0x15, len=2 packet: len=4 15 b4 80 22 *0x1ca0300: clear 0xffffffff, set 0x2280b415 *0x1ca0200: clear 0xff, set 0x3 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=4 b2 f0 12 f0 mipi_dsi_dcs_write: channel=0, cmd=0x39, len=4 composeLongPacket: channel=0, cmd=0x39, len=4 packet: len=10 39 04 00 2c b2 f0 12 f0 51 86 *0x1ca0300: clear 0xffffffff, set 0x2c000439 *0x1ca0304: clear 0xffffffff, set 0xf012f0b2 *0x1ca0308: clear 0xffffffff, set 0x8651 *0x1ca0200: clear 0xff, set 0x9 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=15 e3 00 00 0b 0b 10 10 00 00 00 00 ff 00 c0 10 mipi_dsi_dcs_write: channel=0, cmd=0x39, len=15 composeLongPacket: channel=0, cmd=0x39, len=15 packet: len=21 39 0f 00 0f e3 00 00 0b 0b 10 10 00 00 00 00 ff 00 c0 10 36 0f *0x1ca0300: clear 0xffffffff, set 0xf000f39 *0x1ca0304: clear 0xffffffff, set 0xb0000e3 *0x1ca0308: clear 0xffffffff, set 0x10100b *0x1ca030c: clear 0xffffffff, set 0xff000000 *0x1ca0310: clear 0xffffffff, set 0x3610c000 *0x1ca0314: clear 0xffffffff, set 0xf *0x1ca0200: clear 0xff, set 0x14 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=6 c6 01 00 ff ff 00 mipi_dsi_dcs_write: channel=0, cmd=0x39, len=6 composeLongPacket: channel=0, cmd=0x39, len=6 packet: len=12 39 06 00 30 c6 01 00 ff ff 00 8e 25 *0x1ca0300: clear 0xffffffff, set 0x30000639 *0x1ca0304: clear 0xffffffff, set 0xff0001c6 *0x1ca0308: clear 0xffffffff, set 0x258e00ff *0x1ca0200: clear 0xff, set 0xb *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=13 c1 74 00 32 32 77 f1 ff ff cc cc 77 77 mipi_dsi_dcs_write: channel=0, cmd=0x39, len=13 composeLongPacket: channel=0, cmd=0x39, len=13 packet: len=19 39 0d 00 13 c1 74 00 32 32 77 f1 ff ff cc cc 77 77 69 e4 *0x1ca0300: clear 0xffffffff, set 0x13000d39 *0x1ca0304: clear 0xffffffff, set 0x320074c1 *0x1ca0308: clear 0xffffffff, set 0xfff17732 *0x1ca030c: clear 0xffffffff, set 0x77ccccff *0x1ca0310: clear 0xffffffff, set 0xe46977 *0x1ca0200: clear 0xff, set 0x12 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=3 b5 07 07 mipi_dsi_dcs_write: channel=0, cmd=0x39, len=3 composeLongPacket: channel=0, cmd=0x39, len=3 packet: len=9 39 03 00 09 b5 07 07 7b b3 *0x1ca0300: clear 0xffffffff, set 0x9000339 *0x1ca0304: clear 0xffffffff, set 0x7b0707b5 *0x1ca0308: clear 0xffffffff, set 0xb3 *0x1ca0200: clear 0xff, set 0x8 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=3 b6 2c 2c mipi_dsi_dcs_write: channel=0, cmd=0x39, len=3 composeLongPacket: channel=0, cmd=0x39, len=3 packet: len=9 39 03 00 09 b6 2c 2c 55 04 *0x1ca0300: clear 0xffffffff, set 0x9000339 *0x1ca0304: clear 0xffffffff, set 0x552c2cb6 *0x1ca0308: clear 0xffffffff, set 0x4 *0x1ca0200: clear 0xff, set 0x8 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=4 bf 02 11 00 mipi_dsi_dcs_write: channel=0, cmd=0x39, len=4 composeLongPacket: channel=0, cmd=0x39, len=4 packet: len=10 39 04 00 2c bf 02 11 00 b5 e9 *0x1ca0300: clear 0xffffffff, set 0x2c000439 *0x1ca0304: clear 0xffffffff, set 0x1102bf *0x1ca0308: clear 0xffffffff, set 0xe9b5 *0x1ca0200: clear 0xff, set 0x9 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=64 e9 82 10 06 05 a2 0a a5 12 31 23 37 83 04 bc 27 38 0c 00 03 00 00 00 0c 00 03 00 00 00 75 75 31 88 88 88 88 88 88 13 88 64 64 20 88 88 88 88 88 88 02 88 00 00 00 00 00 00 00 00 00 00 00 00 00 mipi_dsi_dcs_write: channel=0, cmd=0x39, len=64 composeLongPacket: channel=0, cmd=0x39, len=64 packet: len=70 39 40 00 25 e9 82 10 06 05 a2 0a a5 12 31 23 37 83 04 bc 27 38 0c 00 03 00 00 00 0c 00 03 00 00 00 75 75 31 88 88 88 88 88 88 13 88 64 64 20 88 88 88 88 88 88 02 88 00 00 00 00 00 00 00 00 00 00 00 00 00 65 03 *0x1ca0300: clear 0xffffffff, set 0x25004039 *0x1ca0304: clear 0xffffffff, set 0x61082e9 *0x1ca0308: clear 0xffffffff, set 0xa50aa205 *0x1ca030c: clear 0xffffffff, set 0x37233112 *0x1ca0310: clear 0xffffffff, set 0x27bc0483 *0x1ca0314: clear 0xffffffff, set 0x3000c38 *0x1ca0318: clear 0xffffffff, set 0xc000000 *0x1ca031c: clear 0xffffffff, set 0x300 *0x1ca0320: clear 0xffffffff, set 0x31757500 *0x1ca0324: clear 0xffffffff, set 0x88888888 *0x1ca0328: clear 0xffffffff, set 0x88138888 *0x1ca032c: clear 0xffffffff, set 0x88206464 *0x1ca0330: clear 0xffffffff, set 0x88888888 *0x1ca0334: clear 0xffffffff, set 0x880288 *0x1ca0338: clear 0xffffffff, set 0x0 *0x1ca033c: clear 0xffffffff, set 0x0 *0x1ca0340: clear 0xffffffff, set 0x0 *0x1ca0344: clear 0xffffffff, set 0x365 *0x1ca0200: clear 0xff, set 0x45 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=62 ea 02 21 00 00 00 00 00 00 00 00 00 00 02 46 02 88 88 88 88 88 88 64 88 13 57 13 88 88 88 88 88 88 75 88 23 14 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 03 0a a5 00 00 00 00 mipi_dsi_dcs_write: channel=0, cmd=0x39, len=62 composeLongPacket: channel=0, cmd=0x39, len=62 packet: len=68 39 3e 00 1a ea 02 21 00 00 00 00 00 00 00 00 00 00 02 46 02 88 88 88 88 88 88 64 88 13 57 13 88 88 88 88 88 88 75 88 23 14 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 03 0a a5 00 00 00 00 24 1b *0x1ca0300: clear 0xffffffff, set 0x1a003e39 *0x1ca0304: clear 0xffffffff, set 0x2102ea *0x1ca0308: clear 0xffffffff, set 0x0 *0x1ca030c: clear 0xffffffff, set 0x0 *0x1ca0310: clear 0xffffffff, set 0x2460200 *0x1ca0314: clear 0xffffffff, set 0x88888888 *0x1ca0318: clear 0xffffffff, set 0x88648888 *0x1ca031c: clear 0xffffffff, set 0x88135713 *0x1ca0320: clear 0xffffffff, set 0x88888888 *0x1ca0324: clear 0xffffffff, set 0x23887588 *0x1ca0328: clear 0xffffffff, set 0x2000014 *0x1ca032c: clear 0xffffffff, set 0x0 *0x1ca0330: clear 0xffffffff, set 0x0 *0x1ca0334: clear 0xffffffff, set 0x0 *0x1ca0338: clear 0xffffffff, set 0x3000000 *0x1ca033c: clear 0xffffffff, set 0xa50a *0x1ca0340: clear 0xffffffff, set 0x1b240000 *0x1ca0200: clear 0xff, set 0x43 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=35 e0 00 09 0d 23 27 3c 41 35 07 0d 0e 12 13 10 12 12 18 00 09 0d 23 27 3c 41 35 07 0d 0e 12 13 10 12 12 18 mipi_dsi_dcs_write: channel=0, cmd=0x39, len=35 composeLongPacket: channel=0, cmd=0x39, len=35 packet: len=41 39 23 00 20 e0 00 09 0d 23 27 3c 41 35 07 0d 0e 12 13 10 12 12 18 00 09 0d 23 27 3c 41 35 07 0d 0e 12 13 10 12 12 18 93 bf *0x1ca0300: clear 0xffffffff, set 0x20002339 *0x1ca0304: clear 0xffffffff, set 0xd0900e0 *0x1ca0308: clear 0xffffffff, set 0x413c2723 *0x1ca030c: clear 0xffffffff, set 0xe0d0735 *0x1ca0310: clear 0xffffffff, set 0x12101312 *0x1ca0314: clear 0xffffffff, set 0x9001812 *0x1ca0318: clear 0xffffffff, set 0x3c27230d *0x1ca031c: clear 0xffffffff, set 0xd073541 *0x1ca0320: clear 0xffffffff, set 0x1013120e *0x1ca0324: clear 0xffffffff, set 0x93181212 *0x1ca0328: clear 0xffffffff, set 0xbf *0x1ca0200: clear 0xff, set 0x28 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=1 11 mipi_dsi_dcs_write: channel=0, cmd=0x5, len=1 composeShortPacket: channel=0, cmd=0x5, len=1 packet: len=4 05 11 00 36 *0x1ca0300: clear 0xffffffff, set 0x36001105 *0x1ca0200: clear 0xff, set 0x3 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=1 29 mipi_dsi_dcs_write: channel=0, cmd=0x5a,6 4l_emni=p1i _ dcsoim_psotsaerSth:o rSttPaarctk eHtS:C c haa6n4n_emli=p0i,_ dcsmid_=s0txa5r,t :l eCno=m1m i tp a cak6e4t_:m ilpein_=d4s i _0s5t a2r9t :0 0I n1sct r u c t i*o0nx 1Fcuan0c3t0i0o:n cLlaenaer 0ax6f4f_fmfifpfif_fd,s is_estt a0rxt1:c 0S0t2a9r0t5 H S D * 0ax614c_am0i2p0i0_:d scil_esatra r0tx:f fC,o msmeitt 0 x3 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 panel_init: end de2_init: start Set High Speed SRAM to DMA Mode *0x1c00004 = 0x0 @@ -492,7 +607,7 @@ initUiBlender: end initUiChannel: start Channel 1: Set Overlay (720 x 1440) *0x1103000 = 0xff000405 *0x1103010 = 0x40109000 *0x110300c = 0xb40 *0x1103004 = 0x59f02cf *0x1103088 = 0x59f02cf @@ -511,7 +626,7 @@ initUiChannel: end initUiChannel: start Channel 2: Set Overlay (600 x 600) *0x1104000 = 0xff000005 *0x1104010 = 0x404fe000 *0x110400c = 0x960 *0x1104004 = 0x2570257 *0x1104088 = 0x2570257 @@ -527,7 +642,7 @@ initUiChannel: end initUiChannel: start Channel 3: Set Overlay (720 x 1440) *0x1105000 = 0x7f000005 *0x1105010 = 0x4065e000 *0x110500c = 0xb40 *0x1105004 = 0x59f02cf *0x1105088 = 0x59f02cf -
Dec 16, 2022 . 1 changed file with 2 additions and 2 deletions.There are no files selected for viewing
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters. Learn more about bidirectional Unicode charactersOriginal file line number Diff line number Diff line change @@ -27,7 +27,7 @@ gpio: pin 114 (gpio 114) value is 1 173828 bytes read in 11 ms (15.1 MiB/s) Uncompressed size: 10326016 = 0x9D9000 36162 bytes read in 4 ms (8.6 MiB/s) 1078500 bytes read in 50 ms (20.6 MiB/s) ## Flattened Device Tree blob at 4fa00000 Booting using the fdt blob at 0x4fa00000 Loading Ramdisk to 49ef8000, end 49fff4e4 ... OK @@ -550,4 +550,4 @@ Apply Settings applySettings: end renderGraphics: end nsh> nsh> . -
Dec 15, 2022 . 1 changed file with 65 additions and 73 deletions.There are no files selected for viewing
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters. Learn more about bidirectional Unicode charactersOriginal file line number Diff line number Diff line change @@ -24,7 +24,7 @@ Found U-Boot script /boot.scr 653 bytes read in 3 ms (211.9 KiB/s) ## Executing script at 4fc00000 gpio: pin 114 (gpio 114) value is 1 173828 bytes read in 11 ms (15.1 MiB/s) Uncompressed size: 10326016 = 0x9D9000 36162 bytes read in 4 ms (8.6 MiB/s) 1078500 bytes read in 51 ms (20.2 MiB/s) @@ -73,55 +73,47 @@ Configure PL10 for PWM Disable R_PWM *0x1f03800: clear 0x40, set 0x0 *0x1f03800 = 0x0 Configure R_PWM Periao6d4 _ t c o*n00x_1ifn0i3t8:0 4C o=n f0ixg4uarfe0 4P3L7L _ VEInDaEbOl0e Ra_6P4W_Mt c o n 0*_0ixn1ift0:3 8E0n0a b=l e0 xL5DfO 1 Caonndf iLgDuOr2e PaH6140_ tfcoorn 0O_uitnpiutt: C o n*f0ixg1ucr2e0 9M0I0P:I cPlLeLa r a06x47_0t0c,o ns0e_ti n0ixt1:0 0S e t T*C0OxN10c 2C0l9o0c0k =S o0uxr7c1e7 7t o SMeItP IP HP1L0L t oa 6H4i_gthc o n 0 _*i0nxi1tc:2 0E9n0acb:l ec lTeCaOrN 00 xC4l0o0c,k s eat6 40_xt4c0o0n 0 _ i n*i0tx:1 cD2e0a9s0sce r=t 0TxC4O0N00 Rbeascektl i gah6t4__etncaobnl0e_:i neintd: Disable TCON0 and Interrupts a64_tcon0_init: Enable Tristate Output a64_tcon0_init: Set DCLK to MIPI PLL / 6 a64_tcon0_init: Set CPU Panel Trigger a64_tcon0_init: Set Safe Period a64_tcon0_init: Enable Output Triggers a64_tcon0_init: Enable TCON0 display_board_init: start Configure PD23 for Output *0x1c20874: clear 0x70000000, set 0x10000000 @@ -183,19 +175,19 @@ Set DLDO2 Voltage to 1.8V *0x1f0342c = 0x4e *0x1f03430 = 0x2d0000 *0x1f03410 = 0x12 *0x1fa06344_1mci p=i _0dxsdi9_ e n a b*l0ex:1 fE0n3a4b0l0e =M I0PxI8 0D S IW aBiuts f oar6 4p_omwiepri _sduspip_leyn aabnlde :p oEwnearb-loen DiSnIi tB l odciks p laa6y4__bmoiaprid__disnii_te:n aebnlde : Set Instructions a64_mipi_dsi_enable: Configure Jump Instructions a64_mipi_dsi_enable: Set Video Start Delay a64_mipi_dsi_enable: Set Burst @@ -214,19 +206,19 @@ Configure PD23 for Output *0x1c20874: clear 0x70000000, set 0x10000000 *0x1c20874 = 0x17711177 Set PD23 to High *0x1c2087c: clear 0x800000, set 0x80000p0i n e p h*o0nxe1_cp2a0n8e7lc_ i=n i0tx:8 0p0a0n0e0l _ iwnaiitt: fsotra ritn i twirailtiez_adtciso:n w rpiatneeDlc_sr:e sleetn:= 4e n db u f (0x40ae17d0): 0000 b9 f1 12 83 .... a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=4 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=4 -
Dec 15, 2022 . No changes.There are no files selected for viewing
-
Dec 15, 2022 . 1 changed file with 231 additions and 378 deletions.There are no files selected for viewing
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters. Learn more about bidirectional Unicode charactersOriginal file line number Diff line number Diff line change @@ -24,10 +24,10 @@ Found U-Boot script /boot.scr 653 bytes read in 3 ms (211.9 KiB/s) ## Executing script at 4fc00000 gpio: pin 114 (gpio 114) value is 1 173464 bytes read in 11 ms (15 MiB/s) Uncompressed size: 10326016 = 0x9D9000 36162 bytes read in 4 ms (8.6 MiB/s) 1078500 bytes read in 51 ms (20.2 MiB/s) ## Flattened Device Tree blob at 4fa00000 Booting using the fdt blob at 0x4fa00000 Loading Ramdisk to 49ef8000, end 49fff4e4 ... OK @@ -41,14 +41,14 @@ Starting kernel ... - Boot to C runtime for OS Initialize psci_detect: Detected PSCI v1.1 nx_start: Entry up_allocate_heap: heap_start=0x0x40a59000, heap_size=0x75a7000 gic_validate_dist_version: GICv2 detected up_timer_initialize: up_timer_initialize: cp15 timer(s) running at 24.00MHz, cycle 24000 uart_register: Registering /dev/console uart_register: Registering /dev/ttyS0 work_start_highpri: Starting high-priority kernel worker thread(s) nx_start_application: Starting init thread lib_cxx_initialize: _sinit: 0x400e9000 _einit: 0x400e9000 nsh: sysinit: fopen failed: 2 nshn:x _msktfaarttf:s :C PcUo0m:m aBnedg innonti nfgo uInddl e @@ -63,7 +63,7 @@ nsh> uname -a NuttX 11.0.0-pinephone 893b147 Dec 14 2022 23:01:27 arm64 pinephone nsh> nsh> hello 0 task_spawn: name=hello entry=0x400a0940 file_actions=0x40a5ea40 attr=0x40a5ea48 argv=0x40a5eb90 spawn_execattrs: Setting policy=2 priority=100 for pid=3 pinephone-nuttx/render.zig: hello_main backlight_enable: start, percent=90 @@ -214,374 +214,227 @@ Configure PD23 for Output *0x1c20874: clear 0x70000000, set 0x10000000 *0x1c20874 = 0x17711177 Set PD23 to High *0x1c2087c: clear 0x800000, set 0x8000p0i0n e p h o*n0ex_1pca2n0e8l7_ci n=i t0:x 8p0a0n0e0l0_ i nwiati:t sftoarr ti n iwtriiatlei_zdactsi:o nw r iptaenDecls_:r elseent=:4 e nbdu f (0x40ae17d0): 0000 b9 f1 12 83 .... a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=4 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=4 a64_mipi_dsi_write: pktlen=10 pkt (0x40ae16e0): 0000 39 04 00 2c b9 f1 12 83 84 5d 9..,.....] write_dcs: ret=4 write_dcs: writeDcs: len=28 buf (0x40ae1838): 0000 ba 33 81 05 f9 0e 0e 20 00 00 00 00 00 00 00 44 .3..... .......D 0010 25 00 91 0a 00 00 02 4f 11 00 00 37 %......O...7 a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=28 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=28 a64_mipi_dsi_write: pktlen=34 pkt (0x40ae16e0): 0000 39 1c 00 2f ba 33 81 05 f9 0e 0e 20 00 00 00 00 9../.3..... .... 0010 00 00 00 44 25 00 91 0a 00 00 02 4f 11 00 00 37 ...D%......O...7 0020 2c e2 ,. write_dcs: ret=28 write_dcs: writeDcs: len=5 buf (0x40ae17e8): 0000 b8 25 22 20 03 .%" . a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=5 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=5 a64_mipi_dsi_write: pktlen=11 pkt (0x40ae16e0): 0000 39 05 00 36 b8 25 22 20 03 03 72 9..6.%" ..r write_dcs: ret=5 write_dcs: writeDcs: len=11 buf (0x40ae1808): 0000 b3 10 10 05 05 03 ff 00 00 00 00 ........... a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=11 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=11 a64_mipi_dsi_write: pktlen=17 pkt (0x40ae16e0): 0000 39 0b 00 2c b3 10 10 05 05 03 ff 00 00 00 00 6f 9..,...........o 0010 bc . write_dcs: ret=11 write_dcs: writeDcs: len=10 buf (0x40ae17f8): 0000 c0 73 73 50 50 00 c0 08 70 00 .ssPP...p. a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=10 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=10 a64_mipi_dsi_write: pktlen=16 pkt (0x40ae16e0): 0000 39 0a 00 36 c0 73 73 50 50 00 c0 08 70 00 1b 6a 9..6.ssPP...p..j write_dcs: ret=10 write_dcs: writeDcs: len=2 buf (0x40ae17a8): 0000 bc 4e .N a64_mipi_dsi_write: channel=0, cmd=0x15, txlen=2 mipi_dsi_short_packet: channel=0, cmd=0x15, txlen=2 a64_mipi_dsi_write: pktlen=4 pkt (0x40ae16e0): 0000 15 bc 4e 35 ..N5 write_dcs: ret=2 write_dcs: writeDcs: len=2 buf (0x40ae17b0): 0000 cc 0b .. a64_mipi_dsi_write: channel=0, cmd=0x15, txlen=2 mipi_dsi_short_packet: channel=0, cmd=0x15, txlen=2 a64_mipi_dsi_write: pktlen=4 pkt (0x40ae16e0): 0000 15 cc 0b 22 ..." write_dcs: ret=2 write_dcs: writeDcs: len=2 buf (0x40ae17b8): 0000 b4 80 .. a64_mipi_dsi_write: channel=0, cmd=0x15, txlen=2 mipi_dsi_short_packet: channel=0, cmd=0x15, txlen=2 a64_mipi_dsi_write: pktlen=4 pkt (0x40ae16e0): 0000 15 b4 80 22 ..." write_dcs: ret=2 write_dcs: writeDcs: len=4 buf (0x40ae17d8): 0000 b2 f0 12 f0 .... a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=4 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=4 a64_mipi_dsi_write: pktlen=10 pkt (0x40ae16e0): 0000 39 04 00 2c b2 f0 12 f0 51 86 9..,....Q. write_dcs: ret=4 write_dcs: writeDcs: len=15 buf (0x40ae1828): 0000 e3 00 00 0b 0b 10 10 00 00 00 00 ff 00 c0 10 ............... a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=15 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=15 a64_mipi_dsi_write: pktlen=21 pkt (0x40ae16e0): 0000 39 0f 00 0f e3 00 00 0b 0b 10 10 00 00 00 00 ff 9............... 0010 00 c0 10 36 0f ...6. write_dcs: ret=15 write_dcs: writeDcs: len=6 buf (0x40ae17f0): 0000 c6 01 00 ff ff 00 ...... a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=6 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=6 a64_mipi_dsi_write: pktlen=12 pkt (0x40ae16e0): 0000 39 06 00 30 c6 01 00 ff ff 00 8e 25 9..0.......% write_dcs: ret=6 write_dcs: writeDcs: len=13 buf (0x40ae1818): 0000 c1 74 00 32 32 77 f1 ff ff cc cc 77 77 .t.22w.....ww a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=13 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=13 a64_mipi_dsi_write: pktlen=19 pkt (0x40ae16e0): 0000 39 0d 00 13 c1 74 00 32 32 77 f1 ff ff cc cc 77 9....t.22w.....w 0010 77 69 e4 wi. write_dcs: ret=13 write_dcs: writeDcs: len=3 buf (0x40ae17c0): 0000 b5 07 07 ... a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=3 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=3 a64_mipi_dsi_write: pktlen=9 pkt (0x40ae16e0): 0000 39 03 00 09 b5 07 07 7b b3 9......{. write_dcs: ret=3 write_dcs: writeDcs: len=3 buf (0x40ae17c8): 0000 b6 2c 2c .,, a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=3 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=3 a64_mipi_dsi_write: pktlen=9 pkt (0x40ae16e0): 0000 39 03 00 09 b6 2c 2c 55 04 9....,,U. write_dcs: ret=3 write_dcs: writeDcs: len=4 buf (0x40ae17e0): 0000 bf 02 11 00 .... a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=4 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=4 a64_mipi_dsi_write: pktlen=10 pkt (0x40ae16e0): 0000 39 04 00 2c bf 02 11 00 b5 e9 9..,...... write_dcs: ret=4 write_dcs: writeDcs: len=64 buf (0x40ae18c0): 0000 e9 82 10 06 05 a2 0a a5 12 31 23 37 83 04 bc 27 .........1#7...' 0010 38 0c 00 03 00 00 00 0c 00 03 00 00 00 75 75 31 8............uu1 0020 88 88 88 88 88 88 13 88 64 64 20 88 88 88 88 88 ........dd ..... 0030 88 02 88 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=64 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=64 a64_mipi_dsi_write: pktlen=70 pkt (0x40ae16e0): 0000 39 40 00 25 e9 82 10 06 05 a2 0a a5 12 31 23 37 9@.%.........1#7 0010 83 04 bc 27 38 0c 00 03 00 00 00 0c 00 03 00 00 ...'8........... 0020 00 75 75 31 88 88 88 88 88 88 13 88 64 64 20 88 .uu1........dd . 0030 88 88 88 88 88 02 88 00 00 00 00 00 00 00 00 00 ................ 0040 00 00 00 00 65 03 ....e. write_dcs: ret=64 write_dcs: writeDcs: len=62 buf (0x40ae1880): 0000 ea 02 21 00 00 00 00 00 00 00 00 00 00 02 46 02 ..!...........F. 0010 88 88 88 88 88 88 64 88 13 57 13 88 88 88 88 88 ......d..W...... 0020 88 75 88 23 14 00 00 02 00 00 00 00 00 00 00 00 .u.#............ 0030 00 00 00 00 00 00 00 03 0a a5 00 00 00 00 .............. a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=62 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=62 a64_mipi_dsi_write: pktlen=68 pkt (0x40ae16e0): 0000 39 3e 00 1a ea 02 21 00 00 00 00 00 00 00 00 00 9>....!......... 0010 00 02 46 02 88 88 88 88 88 88 64 88 13 57 13 88 ..F.......d..W.. 0020 88 88 88 88 88 75 88 23 14 00 00 02 00 00 00 00 .....u.#........ 0030 00 00 00 00 00 00 00 00 00 00 00 03 0a a5 00 00 ................ 0040 00 00 24 1b ..$. write_dcs: ret=62 write_dcs: writeDcs: len=35 buf (0x40ae1858): 0000 e0 00 09 0d 23 27 3c 41 35 07 0d 0e 12 13 10 12 ....#'<A5....... 0010 12 18 00 09 0d 23 27 3c 41 35 07 0d 0e 12 13 10 .....#'<A5...... 0020 12 12 18 ... a64_mipi_dsi_write: channel=0, cmd=0x39, txlen=35 mipi_dsi_long_packet: channel=0, cmd=0x39, txlen=35 a64_mipi_dsi_write: pktlen=41 pkt (0x40ae16e0): 0000 39 23 00 20 e0 00 09 0d 23 27 3c 41 35 07 0d 0e 9#. ....#'<A5... 0010 12 13 10 12 12 18 00 09 0d 23 27 3c 41 35 07 0d .........#'<A5.. 0020 0e 12 13 10 12 12 18 93 bf ......... write_dcs: ret=35 write_dcs: writeDcs: len=1 buf (0x40ae1798): 0000 11 . a64_mipi_dsi_write: channel=0, cmd=0x5, txlen=1 mipi_dsi_short_packet: channel=0, cmd=0x5, txlen=1 a64_mipi_dsi_write: pktlen=4 pkt (0x40ae16e0): 0000 05 11 00 36 ...6 write_dcs: ret=1 write_dcs: writeDcs: len=1 buf (0x40ae17a0): 0000 29 ) a64_mipi_dsi_write: channel=0, cmd=0x5, txlen=1 mipi_dsi_short_packet: channel=0, cmd=0x5, txlen=1 a64_mipi_dsi_write: pktlen=4 pkt (0x40ae16e0): 0000 05 29 00 1c .).. write_dcs: ret=1 pinephone_panel_init: panel_init: end a64_mipi_dsi_start: Start HSC a64_mipi_dsi_start: Commit a64_mipi_dsi_start: Instruction Function Lane a64_mipi_dsi_start: Start HSD a64_mipi_dsi_start: Commit de2_init: start Set High Speed SRAM to DMA Mode *0x1c00004 = 0x0 @@ -647,7 +500,7 @@ initUiBlender: end initUiChannel: start Channel 1: Set Overlay (720 x 1440) *0x1103000 = 0xff000405 *0x1103010 = 0x4010b000 *0x110300c = 0xb40 *0x1103004 = 0x59f02cf *0x1103088 = 0x59f02cf @@ -666,7 +519,7 @@ initUiChannel: end initUiChannel: start Channel 2: Set Overlay (600 x 600) *0x1104000 = 0xff000005 *0x1104010 = 0x40500000 *0x110400c = 0x960 *0x1104004 = 0x2570257 *0x1104088 = 0x2570257 @@ -682,7 +535,7 @@ initUiChannel: end initUiChannel: start Channel 3: Set Overlay (720 x 1440) *0x1105000 = 0x7f000005 *0x1105010 = 0x40660000 *0x110500c = 0xb40 *0x1105004 = 0x59f02cf *0x1105088 = 0x59f02cf @@ -705,4 +558,4 @@ Apply Settings applySettings: end renderGraphics: end nsh> nsh> -
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This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters. Learn more about bidirectional Unicode charactersOriginal file line number Diff line number Diff line change @@ -0,0 +1,708 @@ DRAM: 2048 MiB Trying to boot from MMC1 NOTICE: BL31: v2.2(release):v2.2-904-gf9ea3a629 NOTICE: BL31: Built : 15:32:12, Apr 9 2020 NOTICE: BL31: Detected Allwinner A64/H64/R18 SoC (1689) NOTICE: BL31: Found U-Boot DTB at 0x4064410, model: PinePhone NOTICE: PSCI: System suspend is unavailable U-Boot 2020.07 (Nov 08 2020 - 00:15:12 +0100) DRAM: 2 GiB MMC: Device 'mmc@1c11000': seq 1 is in use by 'mmc@1c10000' mmc@1c0f000: 0, mmc@1c10000: 2, mmc@1c11000: 1 Loading Environment from FAT... *** Warning - bad CRC, using default environment starting USB... No working controllers found Hit any key to stop autoboot: 0 switch to partitions #0, OK mmc0 is current device Scanning mmc 0:1... Found U-Boot script /boot.scr 653 bytes read in 3 ms (211.9 KiB/s) ## Executing script at 4fc00000 gpio: pin 114 (gpio 114) value is 1 172725 bytes read in 11 ms (15 MiB/s) Uncompressed size: 10321920 = 0x9D8000 36162 bytes read in 5 ms (6.9 MiB/s) 1078500 bytes read in 50 ms (20.6 MiB/s) ## Flattened Device Tree blob at 4fa00000 Booting using the fdt blob at 0x4fa00000 Loading Ramdisk to 49ef8000, end 49fff4e4 ... OK Loading Device Tree to 0000000049eec000, end 0000000049ef7d41 ... OK Starting kernel ... - Ready to Boot CPU - Boot from EL2 - Boot from EL1 - Boot to C runtime for OS Initialize psci_detect: Detected PSCI v1.1 nx_start: Entry up_allocate_heap: heap_start=0x0x40a58000, heap_size=0x75a8000 gic_validate_dist_version: GICv2 detected up_timer_initialize: up_timer_initialize: cp15 timer(s) running at 24.00MHz, cycle 24000 uart_register: Registering /dev/console uart_register: Registering /dev/ttyS0 work_start_highpri: Starting high-priority kernel worker thread(s) nx_start_application: Starting init thread lib_cxx_initialize: _sinit: 0x400e8000 _einit: 0x400e8000 nsh: sysinit: fopen failed: 2 nshn:x _msktfaarttf:s :C PcUo0m:m aBnedg innonti nfgo uInddl e L oNoupt t Shell (NSH) NuttX-11.0.0-pinephone nsh> nsh> nsh> uname -a NuttX 11.0.0-pinephone 893b147 Dec 14 2022 23:01:27 arm64 pinephone nsh> nsh> hello 0 task_spawn: name=hello entry=0x400a0940 file_actions=0x40a5da40 attr=0x40a5da48 argv=0x40a5db90 spawn_execattrs: Setting policy=2 priority=100 for pid=3 pinephone-nuttx/render.zig: hello_main backlight_enable: start, percent=90 Configure PL10 for PWM *0x1f02c04: clear 0x700, set 0x200 *0x1f02c04 = 0x77277 Disable R_PWM *0x1f03800: clear 0x40, set 0x0 *0x1f03800 = 0x0 Configure R_PWM Period *0x1f03804 = 0x4af0437 Enable R_PWM *0x1f03800 = 0x5f Configure PH10 for Output *0x1c20900: clear 0x700, set 0x100 *0x1c20900 = 0x7177 Set PH10 to High *0x1c2090c: clear 0x400, set 0x400 *0x1c2090c = 0x400 backlight_enable: end tcon0_init: start Configure PLL_VIDEO0 *0x1c20010 = 0x81006207 Enable LDO1 and LDO2 *0x1c20040 = 0xc00000 Configure MIPI PLL *0x1c20040 = 0x80c0071a Set TCON0 Clock Source to MIPI PLL *0x1c20118 = 0x80000000 Enable TCON0 Clock *0x1c20064 = 0x8 Deassert TCON0 Reset *0x1c202c4 = 0x8 Disable TCON0 and Interrupts *0x1c0c000 = 0x0 *0x1c0c004 = 0x0 *0x1c0c008 = 0x0 Enable Tristate Output *0x1c0c08c = 0xffffffff *0x1c0c0f4 = 0xffffffff Set DCLK to MIPI PLL / 6 *0x1c0c044 = 0x80000006 *0x1c0c040 = 0x81000000 *0x1c0c048 = 0x2cf059f *0x1c0c0f8 = 0x8 *0x1c0c060 = 0x10010005 Set CPU Panel Trigger *0x1c0c160 = 0x2f02cf *0x1c0c164 = 0x59f *0x1c0c168 = 0x1bc2000a Set Safe Period *0x1c0c1f0 = 0xbb80003 Enable Output Triggers *0x1c0c08c = 0xe0000000 Enable TCON0 *0x1c0c000: clear 0x80000000, set 0x80000000 *0x1c0c000 = 0x80000000 tcon0_init: end display_board_init: start Configure PD23 for Output *0x1c20874: clear 0x70000000, set 0x10000000 *0x1c20874 = 0x17711177 Set PD23 to Low *0x1c2087c: clear 0x800000, set 0x0 *0x1c2087c = 0x0 Set DLDO1 Voltage to 3.3V pmic_write: reg=0x15, val=0x1a rsb_write: rt_addr=0x2d, reg_addr=0x15, value=0x1a *0x1f0342c = 0x4e *0x1f03430 = 0x2d0000 *0x1f03410 = 0x15 *0x1f0341c = 0x1a *0x1f03400 = 0x80 pmic_clrsetbits: reg=0x12, clr_mask=0x0, set_mask=0x8 rsb_read: rt_addr=0x2d, reg_addr=0x12 *0x1f0342c = 0x8b *0x1f03430 = 0x2d0000 *0x1f03410 = 0x12 *0x1f03400 = 0x80 rsb_write: rt_addr=0x2d, reg_addr=0x12, value=0xd9 *0x1f0342c = 0x4e *0x1f03430 = 0x2d0000 *0x1f03410 = 0x12 *0x1f0341c = 0xd9 *0x1f03400 = 0x80 Set LDO Voltage to 3.3V pmic_write: reg=0x91, val=0x1a rsb_write: rt_addr=0x2d, reg_addr=0x91, value=0x1a *0x1f0342c = 0x4e *0x1f03430 = 0x2d0000 *0x1f03410 = 0x91 *0x1f0341c = 0x1a *0x1f03400 = 0x80 Enable LDO mode on GPIO0 pmic_write: reg=0x90, val=0x3 rsb_write: rt_addr=0x2d, reg_addr=0x90, value=0x3 *0x1f0342c = 0x4e *0x1f03430 = 0x2d0000 *0x1f03410 = 0x90 *0x1f0341c = 0x3 *0x1f03400 = 0x80 Set DLDO2 Voltage to 1.8V pmic_write: reg=0x16, val=0xb rsb_write: rt_addr=0x2d, reg_addr=0x16, value=0xb *0x1f0342c = 0x4e *0x1f03430 = 0x2d0000 *0x1f03410 = 0x16 *0x1f0341c = 0xb *0x1f03400 = 0x80 pmic_clrsetbits: reg=0x12, clr_mask=0x0, set_mask=0x10 rsb_read: rt_addr=0x2d, reg_addr=0x12 *0x1f0342c = 0x8b *0x1f03430 = 0x2d0000 *0x1f03410 = 0x12 *0x1f03400 = 0x80 rsb_write: rt_addr=0x2d, reg_addr=0x12, value=0xd9 *0x1f0342c = 0x4e *0x1f03430 = 0x2d0000 *0x1f03410 = 0x12 *0x1af6043_4m1icp i=_ d0sxid_9e n a b l*e0:x 1Efn0a3b4l0e0 M=I P0Ix 8D0S I WBauist fao6r4 _pmoiwpeir_ dssuip_pelnya balned: pEonwaebrl-eo nD SiIn iBtl o cdki s pal6a4y__mbiopair_dd_siin_ietn:a belned: Set Instructions a64_mipi_dsi_enable: Configure Jump Instructions a64_mipi_dsi_enable: Set Video Start Delay a64_mipi_dsi_enable: Set Burst a64_mipi_dsi_enable: Set Instruction Loop a64_mipi_dsi_enable: Set Pixel Format a64_mipi_dsi_enable: Set Sync Timings a64_mipi_dsi_enable: Set Basic Size a64_mipi_dsi_enable: Set Horizontal Blanking a64_mipi_dsi_enable: Set Vertical Blanking a64_mipi_dphy_enable: Set DSI Clock to 150 MHz a64_mipi_dphy_enable: Power on DPHY Tx a64_mipi_dphy_enable: Enable DPHY a64_mipi_dphy_enable: Enable LDOR, LDOC, LDOD panel_reset: start Configure PD23 for Output *0x1c20874: clear 0x70000000, set 0x10000000 *0x1c20874 = 0x17711177 Set PD23 to High *0x1c2087c: clear 0x800000, set 0x800000 *0x1c2087c = 0x800000 wait for initialization panel_reset: end panel_init: start writeDcs: len=4 b9 f1 12 83 mipi_dsi_dcs_write: channel=0, cmd=0x39, len=4 composeLongPacket: channel=0, cmd=0x39, len=4 packet: len=10 39 04 00 2c b9 f1 12 83 84 5d *0x1ca0300: clear 0xffffffff, set 0x2c000439 *0x1ca0304: clear 0xffffffff, set 0x8312f1b9 *0x1ca0308: clear 0xffffffff, set 0x5d84 *0x1ca0200: clear 0xff, set 0x9 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=28 ba 33 81 05 f9 0e 0e 20 00 00 00 00 00 00 00 44 25 00 91 0a 00 00 02 4f 11 00 00 37 mipi_dsi_dcs_write: channel=0, cmd=0x39, len=28 composeLongPacket: channel=0, cmd=0x39, len=28 packet: len=34 39 1c 00 2f ba 33 81 05 f9 0e 0e 20 00 00 00 00 00 00 00 44 25 00 91 0a 00 00 02 4f 11 00 00 37 2c e2 *0x1ca0300: clear 0xffffffff, set 0x2f001c39 *0x1ca0304: clear 0xffffffff, set 0x58133ba *0x1ca0308: clear 0xffffffff, set 0x200e0ef9 *0x1ca030c: clear 0xffffffff, set 0x0 *0x1ca0310: clear 0xffffffff, set 0x44000000 *0x1ca0314: clear 0xffffffff, set 0xa910025 *0x1ca0318: clear 0xffffffff, set 0x4f020000 *0x1ca031c: clear 0xffffffff, set 0x37000011 *0x1ca0320: clear 0xffffffff, set 0xe22c *0x1ca0200: clear 0xff, set 0x21 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=5 b8 25 22 20 03 mipi_dsi_dcs_write: channel=0, cmd=0x39, len=5 composeLongPacket: channel=0, cmd=0x39, len=5 packet: len=11 39 05 00 36 b8 25 22 20 03 03 72 *0x1ca0300: clear 0xffffffff, set 0x36000539 *0x1ca0304: clear 0xffffffff, set 0x202225b8 *0x1ca0308: clear 0xffffffff, set 0x720303 *0x1ca0200: clear 0xff, set 0xa *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=11 b3 10 10 05 05 03 ff 00 00 00 00 mipi_dsi_dcs_write: channel=0, cmd=0x39, len=11 composeLongPacket: channel=0, cmd=0x39, len=11 packet: len=17 39 0b 00 2c b3 10 10 05 05 03 ff 00 00 00 00 6f bc *0x1ca0300: clear 0xffffffff, set 0x2c000b39 *0x1ca0304: clear 0xffffffff, set 0x51010b3 *0x1ca0308: clear 0xffffffff, set 0xff0305 *0x1ca030c: clear 0xffffffff, set 0x6f000000 *0x1ca0310: clear 0xffffffff, set 0xbc *0x1ca0200: clear 0xff, set 0x10 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=10 c0 73 73 50 50 00 c0 08 70 00 mipi_dsi_dcs_write: channel=0, cmd=0x39, len=10 composeLongPacket: channel=0, cmd=0x39, len=10 packet: len=16 39 0a 00 36 c0 73 73 50 50 00 c0 08 70 00 1b 6a *0x1ca0300: clear 0xffffffff, set 0x36000a39 *0x1ca0304: clear 0xffffffff, set 0x507373c0 *0x1ca0308: clear 0xffffffff, set 0x8c00050 *0x1ca030c: clear 0xffffffff, set 0x6a1b0070 *0x1ca0200: clear 0xff, set 0xf *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=2 bc 4e mipi_dsi_dcs_write: channel=0, cmd=0x15, len=2 composeShortPacket: channel=0, cmd=0x15, len=2 packet: len=4 15 bc 4e 35 *0x1ca0300: clear 0xffffffff, set 0x354ebc15 *0x1ca0200: clear 0xff, set 0x3 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=2 cc 0b mipi_dsi_dcs_write: channel=0, cmd=0x15, len=2 composeShortPacket: channel=0, cmd=0x15, len=2 packet: len=4 15 cc 0b 22 *0x1ca0300: clear 0xffffffff, set 0x220bcc15 *0x1ca0200: clear 0xff, set 0x3 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=2 b4 80 mipi_dsi_dcs_write: channel=0, cmd=0x15, len=2 composeShortPacket: channel=0, cmd=0x15, len=2 packet: len=4 15 b4 80 22 *0x1ca0300: clear 0xffffffff, set 0x2280b415 *0x1ca0200: clear 0xff, set 0x3 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=4 b2 f0 12 f0 mipi_dsi_dcs_write: channel=0, cmd=0x39, len=4 composeLongPacket: channel=0, cmd=0x39, len=4 packet: len=10 39 04 00 2c b2 f0 12 f0 51 86 *0x1ca0300: clear 0xffffffff, set 0x2c000439 *0x1ca0304: clear 0xffffffff, set 0xf012f0b2 *0x1ca0308: clear 0xffffffff, set 0x8651 *0x1ca0200: clear 0xff, set 0x9 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=15 e3 00 00 0b 0b 10 10 00 00 00 00 ff 00 c0 10 mipi_dsi_dcs_write: channel=0, cmd=0x39, len=15 composeLongPacket: channel=0, cmd=0x39, len=15 packet: len=21 39 0f 00 0f e3 00 00 0b 0b 10 10 00 00 00 00 ff 00 c0 10 36 0f *0x1ca0300: clear 0xffffffff, set 0xf000f39 *0x1ca0304: clear 0xffffffff, set 0xb0000e3 *0x1ca0308: clear 0xffffffff, set 0x10100b *0x1ca030c: clear 0xffffffff, set 0xff000000 *0x1ca0310: clear 0xffffffff, set 0x3610c000 *0x1ca0314: clear 0xffffffff, set 0xf *0x1ca0200: clear 0xff, set 0x14 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=6 c6 01 00 ff ff 00 mipi_dsi_dcs_write: channel=0, cmd=0x39, len=6 composeLongPacket: channel=0, cmd=0x39, len=6 packet: len=12 39 06 00 30 c6 01 00 ff ff 00 8e 25 *0x1ca0300: clear 0xffffffff, set 0x30000639 *0x1ca0304: clear 0xffffffff, set 0xff0001c6 *0x1ca0308: clear 0xffffffff, set 0x258e00ff *0x1ca0200: clear 0xff, set 0xb *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=13 c1 74 00 32 32 77 f1 ff ff cc cc 77 77 mipi_dsi_dcs_write: channel=0, cmd=0x39, len=13 composeLongPacket: channel=0, cmd=0x39, len=13 packet: len=19 39 0d 00 13 c1 74 00 32 32 77 f1 ff ff cc cc 77 77 69 e4 *0x1ca0300: clear 0xffffffff, set 0x13000d39 *0x1ca0304: clear 0xffffffff, set 0x320074c1 *0x1ca0308: clear 0xffffffff, set 0xfff17732 *0x1ca030c: clear 0xffffffff, set 0x77ccccff *0x1ca0310: clear 0xffffffff, set 0xe46977 *0x1ca0200: clear 0xff, set 0x12 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=3 b5 07 07 mipi_dsi_dcs_write: channel=0, cmd=0x39, len=3 composeLongPacket: channel=0, cmd=0x39, len=3 packet: len=9 39 03 00 09 b5 07 07 7b b3 *0x1ca0300: clear 0xffffffff, set 0x9000339 *0x1ca0304: clear 0xffffffff, set 0x7b0707b5 *0x1ca0308: clear 0xffffffff, set 0xb3 *0x1ca0200: clear 0xff, set 0x8 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=3 b6 2c 2c mipi_dsi_dcs_write: channel=0, cmd=0x39, len=3 composeLongPacket: channel=0, cmd=0x39, len=3 packet: len=9 39 03 00 09 b6 2c 2c 55 04 *0x1ca0300: clear 0xffffffff, set 0x9000339 *0x1ca0304: clear 0xffffffff, set 0x552c2cb6 *0x1ca0308: clear 0xffffffff, set 0x4 *0x1ca0200: clear 0xff, set 0x8 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=4 bf 02 11 00 mipi_dsi_dcs_write: channel=0, cmd=0x39, len=4 composeLongPacket: channel=0, cmd=0x39, len=4 packet: len=10 39 04 00 2c bf 02 11 00 b5 e9 *0x1ca0300: clear 0xffffffff, set 0x2c000439 *0x1ca0304: clear 0xffffffff, set 0x1102bf *0x1ca0308: clear 0xffffffff, set 0xe9b5 *0x1ca0200: clear 0xff, set 0x9 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=64 e9 82 10 06 05 a2 0a a5 12 31 23 37 83 04 bc 27 38 0c 00 03 00 00 00 0c 00 03 00 00 00 75 75 31 88 88 88 88 88 88 13 88 64 64 20 88 88 88 88 88 88 02 88 00 00 00 00 00 00 00 00 00 00 00 00 00 mipi_dsi_dcs_write: channel=0, cmd=0x39, len=64 composeLongPacket: channel=0, cmd=0x39, len=64 packet: len=70 39 40 00 25 e9 82 10 06 05 a2 0a a5 12 31 23 37 83 04 bc 27 38 0c 00 03 00 00 00 0c 00 03 00 00 00 75 75 31 88 88 88 88 88 88 13 88 64 64 20 88 88 88 88 88 88 02 88 00 00 00 00 00 00 00 00 00 00 00 00 00 65 03 *0x1ca0300: clear 0xffffffff, set 0x25004039 *0x1ca0304: clear 0xffffffff, set 0x61082e9 *0x1ca0308: clear 0xffffffff, set 0xa50aa205 *0x1ca030c: clear 0xffffffff, set 0x37233112 *0x1ca0310: clear 0xffffffff, set 0x27bc0483 *0x1ca0314: clear 0xffffffff, set 0x3000c38 *0x1ca0318: clear 0xffffffff, set 0xc000000 *0x1ca031c: clear 0xffffffff, set 0x300 *0x1ca0320: clear 0xffffffff, set 0x31757500 *0x1ca0324: clear 0xffffffff, set 0x88888888 *0x1ca0328: clear 0xffffffff, set 0x88138888 *0x1ca032c: clear 0xffffffff, set 0x88206464 *0x1ca0330: clear 0xffffffff, set 0x88888888 *0x1ca0334: clear 0xffffffff, set 0x880288 *0x1ca0338: clear 0xffffffff, set 0x0 *0x1ca033c: clear 0xffffffff, set 0x0 *0x1ca0340: clear 0xffffffff, set 0x0 *0x1ca0344: clear 0xffffffff, set 0x365 *0x1ca0200: clear 0xff, set 0x45 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=62 ea 02 21 00 00 00 00 00 00 00 00 00 00 02 46 02 88 88 88 88 88 88 64 88 13 57 13 88 88 88 88 88 88 75 88 23 14 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 03 0a a5 00 00 00 00 mipi_dsi_dcs_write: channel=0, cmd=0x39, len=62 composeLongPacket: channel=0, cmd=0x39, len=62 packet: len=68 39 3e 00 1a ea 02 21 00 00 00 00 00 00 00 00 00 00 02 46 02 88 88 88 88 88 88 64 88 13 57 13 88 88 88 88 88 88 75 88 23 14 00 00 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 03 0a a5 00 00 00 00 24 1b *0x1ca0300: clear 0xffffffff, set 0x1a003e39 *0x1ca0304: clear 0xffffffff, set 0x2102ea *0x1ca0308: clear 0xffffffff, set 0x0 *0x1ca030c: clear 0xffffffff, set 0x0 *0x1ca0310: clear 0xffffffff, set 0x2460200 *0x1ca0314: clear 0xffffffff, set 0x88888888 *0x1ca0318: clear 0xffffffff, set 0x88648888 *0x1ca031c: clear 0xffffffff, set 0x88135713 *0x1ca0320: clear 0xffffffff, set 0x88888888 *0x1ca0324: clear 0xffffffff, set 0x23887588 *0x1ca0328: clear 0xffffffff, set 0x2000014 *0x1ca032c: clear 0xffffffff, set 0x0 *0x1ca0330: clear 0xffffffff, set 0x0 *0x1ca0334: clear 0xffffffff, set 0x0 *0x1ca0338: clear 0xffffffff, set 0x3000000 *0x1ca033c: clear 0xffffffff, set 0xa50a *0x1ca0340: clear 0xffffffff, set 0x1b240000 *0x1ca0200: clear 0xff, set 0x43 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=35 e0 00 09 0d 23 27 3c 41 35 07 0d 0e 12 13 10 12 12 18 00 09 0d 23 27 3c 41 35 07 0d 0e 12 13 10 12 12 18 mipi_dsi_dcs_write: channel=0, cmd=0x39, len=35 composeLongPacket: channel=0, cmd=0x39, len=35 packet: len=41 39 23 00 20 e0 00 09 0d 23 27 3c 41 35 07 0d 0e 12 13 10 12 12 18 00 09 0d 23 27 3c 41 35 07 0d 0e 12 13 10 12 12 18 93 bf *0x1ca0300: clear 0xffffffff, set 0x20002339 *0x1ca0304: clear 0xffffffff, set 0xd0900e0 *0x1ca0308: clear 0xffffffff, set 0x413c2723 *0x1ca030c: clear 0xffffffff, set 0xe0d0735 *0x1ca0310: clear 0xffffffff, set 0x12101312 *0x1ca0314: clear 0xffffffff, set 0x9001812 *0x1ca0318: clear 0xffffffff, set 0x3c27230d *0x1ca031c: clear 0xffffffff, set 0xd073541 *0x1ca0320: clear 0xffffffff, set 0x1013120e *0x1ca0324: clear 0xffffffff, set 0x93181212 *0x1ca0328: clear 0xffffffff, set 0xbf *0x1ca0200: clear 0xff, set 0x28 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=1 11 mipi_dsi_dcs_write: channel=0, cmd=0x5, len=1 composeShortPacket: channel=0, cmd=0x5, len=1 packet: len=4 05 11 00 36 *0x1ca0300: clear 0xffffffff, set 0x36001105 *0x1ca0200: clear 0xff, set 0x3 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 writeDcs: len=1 29 mipi_dsi_dcs_write: channel=0, cmd=0x5a,6 4l_emni=p1i _ dcsoim_psotsaerSth:o rSttPaarctk eHtS:C c haa6n4n_emli=p0i,_ dcsmid_=s0txa5r,t :l eCno=m1m i tp a cak6e4t_:m ilpein_=d4s i _0s5t a2r9t :0 0I n1sct r u c t i*o0nx 1Fcuan0c3t0i0o:n cLlaenaer 0ax6f4f_fmfifpfif_fd,s is_estt a0rxt1:c 0S0t2a9r0t5 H S D * 0ax614c_am0i2p0i0_:d scil_esatra r0tx:f fC,o msmeitt 0 x3 *0x1ca0010: clear 0x1, set 0x0 *0x1ca0010: clear 0x1, set 0x1 panel_init: end de2_init: start Set High Speed SRAM to DMA Mode *0x1c00004 = 0x0 Set Display Engine PLL to 297 MHz *0x1c20048 = 0x81001701 Wait for Display Engine PLL to be stable Set Special Clock to Display Engine PLL *0x1c20104: clear 0x87000000, set 0x81000000 *0x1c20104 = 0x81000000 Enable AHB for Display Engine: De-Assert Display Engine *0x1c202c4: clear 0x1000, set 0x1000 *0x1c202c4 = 0x1008 Enable AHB for Display Engine: Pass Display Engine *0x1c20064: clear 0x1000, set 0x1000 *0x1c20064 = 0x1008 Enable Clock for MIXER0: SCLK Clock Pass *0x1000000: clear 0x1, set 0x1 *0x1000000 = 0x1 Enable Clock for MIXER0: HCLK Clock Reset Off *0x1000008: clear 0x1, set 0x1 *0x1000008 = 0x1 Enable Clock for MIXER0: HCLK Clock Pass *0x1000004: clear 0x1, set 0x1 *0x1000004 = 0x1 Route MIXER0 to TCON0 *0x1000010: clear 0x1, set 0x0 *0x1000010 = 0x0 Clear MIXER0 Registers: GLB, BLD, OVL_V, OVL_UI *0x1100000 = 0x0 to *0x1105fff = 0x0 Disable MIXER0 VSU *0x1120000 = 0x0 Disable MIXER0 Undocumented *0x1130000 = 0x0 Disable MIXER0 UI_SCALER1 *0x1140000 = 0x0 Disable MIXER0 UI_SCALER2 *0x1150000 = 0x0 Disable MIXER0 FCE *0x11a0000 = 0x0 Disable MIXER0 BWS *0x11a2000 = 0x0 Disable MIXER0 LTI *0x11a4000 = 0x0 Disable MIXER0 PEAKING *0x11a6000 = 0x0 Disable MIXER0 ASE *0x11a8000 = 0x0 Disable MIXER0 FCC *0x11aa000 = 0x0 Disable MIXER0 DRC *0x11b0000 = 0x0 Enable MIXER0 *0x1100000 = 0x1 de2_init: end renderGraphics: start initUiBlender: start Set Blender Background *0x1101088 = 0xff000000 Set Blender Pre-Multiply *0x1101084 = 0x0 initUiBlender: end initUiChannel: start Channel 1: Set Overlay (720 x 1440) *0x1103000 = 0xff000405 *0x1103010 = 0x4010a000 *0x110300c = 0xb40 *0x1103004 = 0x59f02cf *0x1103088 = 0x59f02cf *0x1103008 = 0x0 Channel 1: Set Blender Output *0x110108c = 0x59f02cf *0x110000c = 0x59f02cf Channel 1: Set Blender Input Pipe 0 (720 x 1440) *0x1101008 = 0x59f02cf *0x1101004 = 0xff000000 *0x110100c = 0x0 *0x1101090 = 0x3010301 Channel 1: Disable Scaler *0x1140000 = 0x0 initUiChannel: end initUiChannel: start Channel 2: Set Overlay (600 x 600) *0x1104000 = 0xff000005 *0x1104010 = 0x404ff000 *0x110400c = 0x960 *0x1104004 = 0x2570257 *0x1104088 = 0x2570257 *0x1104008 = 0x0 Channel 2: Set Blender Input Pipe 1 (600 x 600) *0x1101018 = 0x2570257 *0x1101014 = 0xff000000 *0x110101c = 0x340034 *0x1101094 = 0x3010301 Channel 2: Disable Scaler *0x1150000 = 0x0 initUiChannel: end initUiChannel: start Channel 3: Set Overlay (720 x 1440) *0x1105000 = 0x7f000005 *0x1105010 = 0x4065f000 *0x110500c = 0xb40 *0x1105004 = 0x59f02cf *0x1105088 = 0x59f02cf *0x1105008 = 0x0 Channel 3: Set Blender Input Pipe 2 (720 x 1440) *0x1101028 = 0x59f02cf *0x1101024 = 0xff000000 *0x110102c = 0x0 *0x1101098 = 0x3010301 Channel 3: Disable Scaler *0x1160000 = 0x0 initUiChannel: end applySettings: start Set Blender Route *0x1101080 = 0x321 Enable Blender Pipes *0x1101000 = 0x701 Apply Settings *0x1100008 = 0x1 applySettings: end renderGraphics: end nsh> nsh> .