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@madushan1000
Last active January 31, 2024 04:25
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connect all the jtag pins and connect PU_CHIP pin to nReset/srst/sreset of the ftdi jtag adapter/rv debugger plus

and use the bellow config

pine64jtag.cfg

interface ftdi

#may need to change this to your adapters vid and pid
ftdi_vid_pid 0x0403 0x6014

ftdi_channel 0
transport select jtag
adapter_khz     4000

ftdi_layout_init 0x00f8 0x00fb
ftdi layout_signal nSRST -data 0x0020 -oe 0x0020

adapter_nsrst_delay 8

tgt_e907.cfg

set _CHIPNAME riscv
jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10000b6f

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME
$_TARGETNAME.0 configure -work-area-phys 0x40000000 -work-area-size 0x10000 -work-area-backup 0

echo "Ready for Remote Connections"

gdb_memory_map enable
gdb_flash_program disable

riscv set_prefer_sba off
reset_config srst_only srst_pulls_trst
riscv set_command_timeout_sec 3

init

then

openocd -f pine64jtag.cfg -f tgt_e907.cfg

in gdb

target extended-remote :3333
monitor reset init
monitor gdb_sync
si

PC should be somewhere in bootrom.

if you get bellow error, increase adapter_nsrst_delay

JTAG scan chain interrogation failed: all ones
Check JTAG interface, timings, target power, etc.
Trying to use configured scan chain anyway...
Bypassing JTAG setup events due to errors
@madushan1000
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This will work too

tgt_e907.cfg

set _CHIPNAME riscv
jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10000b6f

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME
$_TARGETNAME.0 configure -work-area-phys 0x40000000 -work-area-size 0x10000 -work-area-backup 0

echo "Ready for Remote Connections"

proc init_reset { mode } {
    set GLB_SWRST_CFG2 [read_memory 0x20000548 32 1]
    set outval [expr { $GLB_SWRST_CFG2 & ~(1 << 2) & ~(1 << 1) }]
    write_memory 0x20000548 32 $outval
    set GLB_SWRST_CFG2 [read_memory 0x20000548 32 1]
    set outval [expr { $GLB_SWRST_CFG2 | (1 << 3) | (1 << 2) | (1 << 1) }]
    write_memory 0x20000548 32 $outval
    # set *0x20000548 = *0x20000548 & ~(1 << 2) & ~(1 << 1)
    # set *0x20000548 = *0x20000548 | (1 << 3) | (1 << 2) | (1 << 1)
}

riscv set_prefer_sba off
reset_config srst_only srst_pulls_trst
riscv set_command_timeout_sec 3

init

@madushan1000
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To get additional csrs exposed, use this config, the most interesting one is mpcfifo

tgt_e907.cfg

set _CHIPNAME riscv
jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10000b6f

set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME.0 riscv -chain-position $_TARGETNAME
$_TARGETNAME.0 configure -work-area-phys 0x40000000 -work-area-size 0x10000 -work-area-backup 0

echo "Ready for Remote Connections"

proc init_reset { mode } {
    set GLB_SWRST_CFG2 [read_memory 0x20000548 32 1]
    set outval [expr { $GLB_SWRST_CFG2 & ~(1 << 2) & ~(1 << 1) }]
    write_memory 0x20000548 32 $outval
    set GLB_SWRST_CFG2 [read_memory 0x20000548 32 1]
    set outval [expr { $GLB_SWRST_CFG2 | (1 << 3) | (1 << 2) | (1 << 1) }]
    write_memory 0x20000548 32 $outval
    # set *0x20000548 = *0x20000548 & ~(1 << 2) & ~(1 << 1)
    # set *0x20000548 = *0x20000548 | (1 << 3) | (1 << 2) | (1 << 1)
}

riscv set_prefer_sba off
reset_config srst_only srst_pulls_trst
riscv set_command_timeout_sec 3

$_TARGETNAME.0 riscv expose_csrs 1984=mxstatus,1985=mhcr,1986=mcor,1987=mccr2,1988=mcer2,1989=mhint,1990=mrmr,1991=mrvbr,1992=mcer,1993=mcounterwen,1994=mcounterinten,1995=mcounterof,1996=mhint2,1997=mhint3,2016=mraddr,2017=mexstatus,2018=mnmicause,2019=mnmipc,2032=mhpmcr,2033=mhpmsr,2034=mhpmer,2035=msmpr,2036=mteecfg,2037=mzoneid,2038=ml2cpid,2039=ml2wp,2040=mdtcmcr,2001=usp,2002=mcins,2003=mcindex,2004=mcdata0,2005=mcdata1,2006=meicr,2007=meicr2,2008=mbeaddr,4032=mcpuid,4033=mapbaddr,4034=mwmsr,4064=mhaltcause,4065=mdbginfo,4066=mpcfifo,1472=sxstatus,1473=shcr,1474=scer2,1475=scer,1476=scounterinten,1477=scounterof,1478=shint,1479=shint2,1480=shpminhibit,1481=shpmcr,1482=shpmsr,1483=shpmer,1484=sl2cpid,1485=sl2wp,1488=sbeaddr,1504=scycle,1505=shpmcounter1,1506=shpmcounter2,1507=shpmcounter3,1508=shpmcounter4,1509=shpmcounter5,1510=shpmcounter6,1511=shpmcounter7,1512=shpmcounter8,1513=shpmcounter9,1514=shpmcounter10,1515=shpmcounter11,1516=shpmcounter12,1517=shpmcounter13,1518=shpmcounter14,1519=shpmcounter15,1520=shpmcounter16,1521=shpmcounter17,1522=shpmcounter18,1523=shpmcounter19,1524=shpmcounter20,1525=shpmcounter21,1526=shpmcounter22,1527=shpmcounter23,1528=shpmcounter24,1529=shpmcounter25,1530=shpmcounter26,1531=shpmcounter27,1532=shpmcounter28,1533=shpmcounter29,1534=shpmcounter30,1535=shpmcounter31,2048=fxcr,2496=smir,2497=smel,2498=smeh,2499=smcir,3040=mebr,3041=nt_mstatus,3042=nt_mie,3043=nt_mtvec,3044=nt_mtvt,3045=nt_mepc,3046=nt_mcause,3047=nt_mip,3048=nt_mintstate,3049=nt_mxstatus,3050=nt_mebr,3051=nt_msp,3052=t_usp,3053=t_mdcr,3054=t_mpcr,3055=pmpteecfg

init

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