Load 16MiB of random data into the LX9R3's SDRAM, read it back, compare

lx9r3-readback

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Building FPGALink & the readback example VHDL for MakeStuff LX9R3 on Linux:

# Install prerequisites:
sudo apt-get install build-essential libreadline-dev libusb-1.0-0-dev python-yaml
mkdir $HOME/20140524
cd $HOME/20140524
wget -qO- http://tiny.cc/msbil | tar zxf -

# Fetch and build flcli:
cd makestuff/apps
../scripts/msget.sh makestuff/flcli/20140524
cd flcli
make deps
cd ../../

# Fetch and build the VHDL version of the readback example:
scripts/msget.sh makestuff/hdlmake
cd hdlmake/apps
../bin/hdlmake.py -g makestuff/readback
../../../../bin/hdlmake.py -t ../templates/fx2min/vhdl -b lx9r3 -p fpga

# Load 16MiB of random data into SDRAM, read it back, compare
../../../../../apps/flcli/lin.x64/rel/flcli -i 04b4:8613 -v 1d50:602b:0002 -p J:A7A0A3A1:fpga.xsvf
dd if=/dev/urandom of=random.dat bs=1024 count=16384
../../../../../apps/flcli/lin.x64/rel/flcli -v 1d50:602b:0002 -a 'w0 0000000080800000;w0 "random.dat"'
../../../../../apps/flcli/lin.x64/rel/flcli -v 1d50:602b:0002 -a 'w0 0000000040800000;r0 1000000 "out.dat"'
diff out.dat random.dat