These instructions will take you through the step by step process of building and flashing a custom build of the Coreboot ROM to a Chromebook C201.
This guide expects you to have a Chromebook C201, and another ARM computer with Ubuntu installed. Specifically I used the Odroid XU2. You may be able to do this on an Intel platform, using a cross compiler. See the sidenotes section for more information.
Update your Ubuntu aptitude and install the dependancies we will need.
sudo apt update
sudo apt install git build-essential gnat flex bison libncurses5-dev wget zlib1g-dev git
Change into your ~/Documents directory and clone the coreboot git repository [1]
cd ~/Documents
git clone --recurse-submodules https://review.coreboot.org/coreboot.git
git submodule update --init --checkout
cd coreboot
There are a few tweaks to the coreboot sourcecode we need to do to make this work. I have asked about this on the coreboot mailing list [2].
If you are using the interactive menuconfig command you will want to add Depthcharge as a payload [3][4] option.
- Open the ~/Documents/coreboot/payloads/Kconfig file for editing
- Find the line
config PAYLOAD_ELF
. It should be near the top of the file around line 21. - Insert the following above it:
config PAYLOAD_DEPTHCHARGE
bool "Depthcharge"
help
Select this option if you want to set depthcharge as your primary
payload.
- Save the file
When you run make you are going to get an error message, something like below:
Your branch is up-to-date with 'origin/master'.
Switched to a new branch 'coreboot'
Error: ~/Documents/coreboot/payloads/libpayload/configs/config.veyron_speedy is not present
Makefile:65: recipe for target '~/Documents/coreboot/payloads/external/depthcharge/depthcharge/build/lp_veyron_speedy' failed
make[1]: *** [~/Documents/coreboot/payloads/external/depthcharge/depthcharge/build/lp_veyron_speedy] Error 1
payloads/external/Makefile.inc:112: recipe for target 'payloads/external/depthcharge/depthcharge/build/depthcharge.elf' failed
make: *** [payloads/external/depthcharge/depthcharge/build/depthcharge.elf] Error 2
There is very little documentation about the depthcharge and coreboot marriage, so I'm not really sure why this happening. At a guess, I would say there was an attempt to merge all the veyron configs into one which might require a new variable which I just can't find. So I have no doubt there is a better (proper) solution to this, but I've battled this for over an hour and the best I can come up with for now is to just duplicate the veyron config file below:
cp payloads/libpayload/configs/config.veyron payloads/libpayload/configs/config.veyron_speedy
You will only need to do this stage once to setup your environment. This installs the cross compiler. It's probably not nessisary as we are actually on an ARM machine, but I haven't quite worked that out yet.
Note this will take a long time, for me 15 minutes. Also, you will need to run it again if you clone the coreboot repository again.
make crossgcc-arm CPUS=12
The make menuconfig command gives an interactive method of configuring your coreboot build [5].
make menuconfig
There are quite a few options [6] in there, some which may be quite confusing. Thankfully coreboot normally includes a copy of the config file on your Chromebook. I will write up a guide of how to extract this from your Chromebook later on, as I'm writing the flashing guide. In the meantime I have included a copy of the .config
file that came with my ASUS c201 Chromebook. Lots of those variables have been renamed/moved so you'll have to do a bit of matching to work out what maps to what.
In the meantime, at a minimum, the options you will want to change are:
Setting location | value |
---|---|
Mainboard -> Mainboard vendor | |
Mainboard -> Mainboard vendor | Veyron_Speedy (ASUS C201 Chromebook) |
Mainboard -> ROM chip size | 4096 KB (4 MB) |
Payload -> Add a payload | Depthcharge |
Now that you have a .config
file you are ready to build coreboot.
make arm --jobs=12
You may be able to cross compile coreboot. This means, build the rom file on a none-arm machine. You will need to install the crossgcc tools, using the command below.
make crossgcc-arm CPUS=4
Sources:
- https://www.coreboot.org/Git
- https://mail.coreboot.org/pipermail/coreboot/2018-February/086242.html
- https://www.coreboot.org/Payloads
- https://code.georgi.software/coreboot/coreboot/commit/9125073d2af2e1c34977c9caeb5f9c5710d5b9c4?view=parallel
- https://www.coreboot.org/Build_HOWTO
- https://www.coreboot.org/Coreboot_Options