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matthewjasper/example.rs Secret

Created January 18, 2019 20:03
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example.rs
#![crate_type = "lib"]
#![feature(nll)]
fn change_from_zero_to_one(x: &mut Option<i32>) -> bool {
let u = 0; // So that the declaration of `z` shows up in the MIR dump.
match x {
&mut Some(ref mut z) if *z == 0 => { *z = 1; true },
_ => false,
}
}
Raw
mir-branch.mir
// MIR for `change_from_zero_to_one`
// source = MirSource { def_id: DefId(0/0:3 ~ simple_mir_match[8787]::change_from_zero_to_one[0]), promoted: None }
// pass_name = mir_map
// disambiguator = 0
fn change_from_zero_to_one(_1: &mut std::option::Option<i32>) -> bool{
let mut _0: bool; // return place
scope 1 {
let _3: &mut i32; // "z" in scope 1 at src/simple-mir-match.rs:7:19: 7:28
let _4: &&mut i32; // "z" in scope 1 at src/simple-mir-match.rs:7:19: 7:28
scope 3 {
}
}
scope 2 {
let _2: i32; // "u" in scope 2 at src/simple-mir-match.rs:5:9: 5:10
}
let mut _5: isize;
let mut _6: bool;
let mut _7: i32;
let mut _8: &&mut std::option::Option<i32>;
let mut _9: &std::option::Option<i32>;
bb0: {
StorageLive(_2); // bb0[0]: scope 0 at src/simple-mir-match.rs:5:9: 5:10
_2 = const 0i32; // bb0[1]: scope 0 at src/simple-mir-match.rs:5:13: 5:14
// ty::Const
// + ty: i32
// + val: Scalar(Bits { size: 4, bits: 0 })
// mir::Constant
// + span: src/simple-mir-match.rs:5:13: 5:14
// + ty: i32
// + literal: Evaluated(Const { ty: i32, val: Scalar(Bits { size: 4, bits: 0 }) })
FakeRead(ForLet, _2); // bb0[2]: scope 0 at src/simple-mir-match.rs:5:9: 5:10
FakeRead(ForMatchedPlace, _1); // bb0[3]: scope 1 at src/simple-mir-match.rs:6:11: 6:12
_5 = discriminant((*_1)); // bb0[4]: scope 1 at src/simple-mir-match.rs:7:14: 7:29
_8 = &guard _1; // bb0[5]: scope 1 at src/simple-mir-match.rs:6:11: 6:12
FakeRead(ForFakeBorrowPlace, _1); // bb0[6]: scope 1 at src/simple-mir-match.rs:6:11: 6:12
_9 = &guard (*_1); // bb0[7]: scope 1 at src/simple-mir-match.rs:6:11: 6:12
FakeRead(ForFakeBorrowPlace, (*_1)); // bb0[8]: scope 1 at src/simple-mir-match.rs:6:11: 6:12
switchInt(move _5) -> [1isize: bb10, otherwise: bb9]; // bb0[9]: scope 1 at src/simple-mir-match.rs:7:14: 7:29
}
bb1: { // cleanup
resume; // bb1[0]: scope 0 at src/simple-mir-match.rs:4:1: 10:2
}
bb2: {
(*_3) = const 1i32; // bb2[0]: scope 3 at src/simple-mir-match.rs:7:46: 7:52
// ty::Const
// + ty: i32
// + val: Scalar(Bits { size: 4, bits: 1 })
// mir::Constant
// + span: src/simple-mir-match.rs:7:51: 7:52
// + ty: i32
// + literal: Evaluated(Const { ty: i32, val: Scalar(Bits { size: 4, bits: 1 }) })
_0 = const true; // bb2[1]: scope 3 at src/simple-mir-match.rs:7:54: 7:58
// ty::Const
// + ty: bool
// + val: Scalar(Bits { size: 1, bits: 1 })
// mir::Constant
// + span: src/simple-mir-match.rs:7:54: 7:58
// + ty: bool
// + literal: Evaluated(Const { ty: bool, val: Scalar(Bits { size: 1, bits: 1 }) })
goto -> bb16; // bb2[2]: scope 1 at src/simple-mir-match.rs:6:5: 9:6
}
bb3: {
_0 = const false; // bb3[0]: scope 1 at src/simple-mir-match.rs:8:14: 8:19
// ty::Const
// + ty: bool
// + val: Scalar(Bits { size: 1, bits: 0 })
// mir::Constant
// + span: src/simple-mir-match.rs:8:14: 8:19
// + ty: bool
// + literal: Evaluated(Const { ty: bool, val: Scalar(Bits { size: 1, bits: 0 }) })
goto -> bb16; // bb3[1]: scope 1 at src/simple-mir-match.rs:6:5: 9:6
}
bb4: {
FakeRead(ForMatchGuard, _8); // bb4[0]: scope 1 at src/simple-mir-match.rs:7:9: 7:29
FakeRead(ForMatchGuard, _9); // bb4[1]: scope 1 at src/simple-mir-match.rs:7:9: 7:29
falseEdges -> [real: bb7, imaginary: bb5]; // bb4[2]: scope 1 at src/simple-mir-match.rs:7:9: 7:29
}
bb5: {
FakeRead(ForMatchGuard, _8); // bb5[0]: scope 1 at src/simple-mir-match.rs:8:9: 8:10
FakeRead(ForMatchGuard, _9); // bb5[1]: scope 1 at src/simple-mir-match.rs:8:9: 8:10
falseEdges -> [real: bb8, imaginary: bb6]; // bb5[2]: scope 1 at src/simple-mir-match.rs:8:9: 8:10
}
bb6: {
unreachable; // bb6[0]: scope 1 at src/simple-mir-match.rs:6:5: 9:6
}
bb7: {
StorageLive(_4); // bb7[0]: scope 1 at src/simple-mir-match.rs:7:19: 7:28
StorageLive(_3); // bb7[1]: scope 1 at src/simple-mir-match.rs:7:19: 7:28
_3 = &mut (((*_1) as Some).0: i32); // bb7[2]: scope 1 at src/simple-mir-match.rs:7:19: 7:28
_4 = &_3; // bb7[3]: scope 1 at src/simple-mir-match.rs:7:19: 7:28
_8 = &guard _1; // bb7[4]: scope 1 at src/simple-mir-match.rs:6:11: 6:12
_9 = &guard (*_1); // bb7[5]: scope 1 at src/simple-mir-match.rs:6:11: 6:12
goto -> bb11; // bb7[6]: scope 1 at src/simple-mir-match.rs:7:9: 7:29
}
bb8: {
goto -> bb3; // bb8[0]: scope 1 at src/simple-mir-match.rs:8:9: 8:10
}
bb9: {
goto -> bb15; // bb9[0]: scope 1 at src/simple-mir-match.rs:6:11: 6:12
}
bb10: {
goto -> bb4; // bb10[0]: scope 1 at src/simple-mir-match.rs:7:9: 7:29
}
bb11: {
StorageLive(_6); // bb11[0]: scope 1 at src/simple-mir-match.rs:7:33: 7:40
StorageLive(_7); // bb11[1]: scope 1 at src/simple-mir-match.rs:7:33: 7:35
_7 = (*(*_4)); // bb11[2]: scope 1 at src/simple-mir-match.rs:7:33: 7:35
_6 = Eq(move _7, const 0i32); // bb11[3]: scope 1 at src/simple-mir-match.rs:7:33: 7:40
// ty::Const
// + ty: i32
// + val: Scalar(Bits { size: 4, bits: 0 })
// mir::Constant
// + span: src/simple-mir-match.rs:7:39: 7:40
// + ty: i32
// + literal: Evaluated(Const { ty: i32, val: Scalar(Bits { size: 4, bits: 0 }) })
StorageDead(_7); // bb11[4]: scope 1 at src/simple-mir-match.rs:7:39: 7:40
switchInt(move _6) -> [false: bb12, otherwise: bb13]; // bb11[5]: scope 1 at src/simple-mir-match.rs:7:33: 7:40
}
bb12: {
falseEdges -> [real: bb14, imaginary: bb5]; // bb12[0]: scope 1 at src/simple-mir-match.rs:7:33: 7:40
}
bb13: {
goto -> bb2; // bb13[0]: scope 1 at src/simple-mir-match.rs:7:33: 7:40
}
bb14: {
goto -> bb15; // bb14[0]: scope 1 at src/simple-mir-match.rs:6:11: 6:12
}
bb15: {
goto -> bb5; // bb15[0]: scope 1 at src/simple-mir-match.rs:8:9: 8:10
}
bb16: {
StorageDead(_6); // bb16[0]: scope 1 at src/simple-mir-match.rs:9:5: 9:6
StorageDead(_3); // bb16[1]: scope 1 at src/simple-mir-match.rs:9:5: 9:6
StorageDead(_4); // bb16[2]: scope 1 at src/simple-mir-match.rs:9:5: 9:6
StorageDead(_2); // bb16[3]: scope 0 at src/simple-mir-match.rs:10:1: 10:2
goto -> bb17; // bb16[4]: scope 0 at src/simple-mir-match.rs:10:2: 10:2
}
bb17: {
return; // bb17[0]: scope 0 at src/simple-mir-match.rs:10:2: 10:2
}
}
Raw
mir-nightly.mir
// MIR for `change_from_zero_to_one`
// source = MirSource { def_id: DefId(0/0:3 ~ simple_mir_match[8787]::change_from_zero_to_one[0]), promoted: None }
// pass_name = mir_map
// disambiguator = 0
fn change_from_zero_to_one(_1: &mut std::option::Option<i32>) -> bool{
let mut _0: bool; // return place
scope 1 {
let _3: &mut i32; // "z" in scope 1 at src/simple-mir-match.rs:7:19: 7:28
let _4: &mut i32; // "z" in scope 1 at src/simple-mir-match.rs:7:19: 7:28
let _5: &&mut i32; // "z" in scope 1 at src/simple-mir-match.rs:7:19: 7:28
scope 3 {
}
}
scope 2 {
let _2: i32; // "u" in scope 2 at src/simple-mir-match.rs:5:9: 5:10
}
let mut _6: isize;
let mut _7: bool;
let mut _8: i32;
let mut _9: &&mut std::option::Option<i32>;
let mut _10: &std::option::Option<i32>;
let mut _11: &i32;
bb0: {
StorageLive(_2); // bb0[0]: scope 0 at src/simple-mir-match.rs:5:9: 5:10
_2 = const 0i32; // bb0[1]: scope 0 at src/simple-mir-match.rs:5:13: 5:14
// ty::Const
// + ty: i32
// + val: Scalar(Bits { size: 4, bits: 0 })
// mir::Constant
// + span: src/simple-mir-match.rs:5:13: 5:14
// + ty: i32
// + literal: Evaluated(Const { ty: i32, val: Scalar(Bits { size: 4, bits: 0 }) })
FakeRead(ForLet, _2); // bb0[2]: scope 0 at src/simple-mir-match.rs:5:9: 5:10
FakeRead(ForMatchedPlace, _1); // bb0[3]: scope 1 at src/simple-mir-match.rs:6:11: 6:12
_6 = discriminant((*_1)); // bb0[4]: scope 1 at src/simple-mir-match.rs:7:14: 7:29
_9 = &shallow _1; // bb0[5]: scope 1 at src/simple-mir-match.rs:6:11: 6:12
_10 = &shallow (*_1); // bb0[6]: scope 1 at src/simple-mir-match.rs:6:11: 6:12
_11 = &(((*_1) as Some).0: i32); // bb0[7]: scope 1 at src/simple-mir-match.rs:6:11: 6:12
switchInt(move _6) -> [1isize: bb8, otherwise: bb7]; // bb0[8]: scope 1 at src/simple-mir-match.rs:7:14: 7:29
}
bb1: { // cleanup
resume; // bb1[0]: scope 0 at src/simple-mir-match.rs:4:1: 10:2
}
bb2: {
(*_3) = const 1i32; // bb2[0]: scope 3 at src/simple-mir-match.rs:7:46: 7:52
// ty::Const
// + ty: i32
// + val: Scalar(Bits { size: 4, bits: 1 })
// mir::Constant
// + span: src/simple-mir-match.rs:7:51: 7:52
// + ty: i32
// + literal: Evaluated(Const { ty: i32, val: Scalar(Bits { size: 4, bits: 1 }) })
_0 = const true; // bb2[1]: scope 3 at src/simple-mir-match.rs:7:54: 7:58
// ty::Const
// + ty: bool
// + val: Scalar(Bits { size: 1, bits: 1 })
// mir::Constant
// + span: src/simple-mir-match.rs:7:54: 7:58
// + ty: bool
// + literal: Evaluated(Const { ty: bool, val: Scalar(Bits { size: 1, bits: 1 }) })
goto -> bb15; // bb2[2]: scope 1 at src/simple-mir-match.rs:6:5: 9:6
}
bb3: {
_0 = const false; // bb3[0]: scope 1 at src/simple-mir-match.rs:8:14: 8:19
// ty::Const
// + ty: bool
// + val: Scalar(Bits { size: 1, bits: 0 })
// mir::Constant
// + span: src/simple-mir-match.rs:8:14: 8:19
// + ty: bool
// + literal: Evaluated(Const { ty: bool, val: Scalar(Bits { size: 1, bits: 0 }) })
goto -> bb15; // bb3[1]: scope 1 at src/simple-mir-match.rs:6:5: 9:6
}
bb4: {
FakeRead(ForMatchGuard, _9); // bb4[0]: scope 1 at src/simple-mir-match.rs:7:9: 7:29
FakeRead(ForMatchGuard, _10); // bb4[1]: scope 1 at src/simple-mir-match.rs:7:9: 7:29
FakeRead(ForMatchGuard, _11); // bb4[2]: scope 1 at src/simple-mir-match.rs:7:9: 7:29
falseEdges -> [real: bb9, imaginary: bb5]; // bb4[3]: scope 1 at src/simple-mir-match.rs:7:9: 7:29
}
bb5: {
FakeRead(ForMatchGuard, _9); // bb5[0]: scope 1 at src/simple-mir-match.rs:8:9: 8:10
FakeRead(ForMatchGuard, _10); // bb5[1]: scope 1 at src/simple-mir-match.rs:8:9: 8:10
FakeRead(ForMatchGuard, _11); // bb5[2]: scope 1 at src/simple-mir-match.rs:8:9: 8:10
falseEdges -> [real: bb14, imaginary: bb6]; // bb5[3]: scope 1 at src/simple-mir-match.rs:8:9: 8:10
}
bb6: {
unreachable; // bb6[0]: scope 1 at src/simple-mir-match.rs:6:5: 9:6
}
bb7: {
goto -> bb13; // bb7[0]: scope 1 at src/simple-mir-match.rs:6:11: 6:12
}
bb8: {
goto -> bb4; // bb8[0]: scope 1 at src/simple-mir-match.rs:7:9: 7:29
}
bb9: {
StorageLive(_5); // bb9[0]: scope 1 at src/simple-mir-match.rs:7:19: 7:28
StorageLive(_4); // bb9[1]: scope 1 at src/simple-mir-match.rs:7:19: 7:28
_4 = &mut (2phase) (((*_1) as Some).0: i32); // bb9[2]: scope 1 at src/simple-mir-match.rs:7:19: 7:28
_5 = &_4; // bb9[3]: scope 1 at src/simple-mir-match.rs:7:19: 7:28
StorageLive(_7); // bb9[4]: scope 1 at src/simple-mir-match.rs:7:33: 7:40
StorageLive(_8); // bb9[5]: scope 1 at src/simple-mir-match.rs:7:33: 7:35
_8 = (*(*_5)); // bb9[6]: scope 1 at src/simple-mir-match.rs:7:33: 7:35
_7 = Eq(move _8, const 0i32); // bb9[7]: scope 1 at src/simple-mir-match.rs:7:33: 7:40
// ty::Const
// + ty: i32
// + val: Scalar(Bits { size: 4, bits: 0 })
// mir::Constant
// + span: src/simple-mir-match.rs:7:39: 7:40
// + ty: i32
// + literal: Evaluated(Const { ty: i32, val: Scalar(Bits { size: 4, bits: 0 }) })
StorageDead(_8); // bb9[8]: scope 1 at src/simple-mir-match.rs:7:39: 7:40
switchInt(move _7) -> [false: bb10, otherwise: bb11]; // bb9[9]: scope 1 at src/simple-mir-match.rs:7:33: 7:40
}
bb10: {
falseEdges -> [real: bb12, imaginary: bb5]; // bb10[0]: scope 1 at src/simple-mir-match.rs:7:33: 7:40
}
bb11: {
StorageLive(_3); // bb11[0]: scope 1 at src/simple-mir-match.rs:7:19: 7:28
_3 = &mut (((*_1) as Some).0: i32); // bb11[1]: scope 1 at src/simple-mir-match.rs:7:19: 7:28
goto -> bb2; // bb11[2]: scope 1 at src/simple-mir-match.rs:7:33: 7:40
}
bb12: {
goto -> bb13; // bb12[0]: scope 1 at src/simple-mir-match.rs:6:11: 6:12
}
bb13: {
goto -> bb5; // bb13[0]: scope 1 at src/simple-mir-match.rs:8:9: 8:10
}
bb14: {
goto -> bb3; // bb14[0]: scope 1 at src/simple-mir-match.rs:8:9: 8:10
}
bb15: {
StorageDead(_3); // bb15[0]: scope 1 at src/simple-mir-match.rs:9:5: 9:6
StorageDead(_7); // bb15[1]: scope 1 at src/simple-mir-match.rs:9:5: 9:6
StorageDead(_4); // bb15[2]: scope 1 at src/simple-mir-match.rs:9:5: 9:6
StorageDead(_5); // bb15[3]: scope 1 at src/simple-mir-match.rs:9:5: 9:6
StorageDead(_2); // bb15[4]: scope 0 at src/simple-mir-match.rs:10:1: 10:2
goto -> bb16; // bb15[5]: scope 0 at src/simple-mir-match.rs:10:2: 10:2
}
bb16: {
return; // bb16[0]: scope 0 at src/simple-mir-match.rs:10:2: 10:2
}
}
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