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mattytrentini/stm32l1_micropython_wip.patch

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stm32l1_micropython_wip.patch
diff --git a/.gitmodules b/.gitmodules
index ceaa5342b..7a2fe6bb3 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -13,8 +13,8 @@
url = https://github.com/pfalcon/berkeley-db-1.xx
[submodule "lib/stm32lib"]
path = lib/stm32lib
- url = https://github.com/micropython/stm32lib
- branch = work-F4-1.13.1+F7-1.5.0+L4-1.3.0
+ url = https://www.funkthat.com/gitea/jmg/stm32lib.git
+ branch = work-f1-1.10.2
[submodule "lib/nrfx"]
path = lib/nrfx
url = https://github.com/NordicSemiconductor/nrfx.git
diff --git a/ports/stm32/boards/NODE_151/mpconfigboard.h b/ports/stm32/boards/NODE_151/mpconfigboard.h
index dcaa4db6a..99ffc1f70 100644
--- a/ports/stm32/boards/NODE_151/mpconfigboard.h
+++ b/ports/stm32/boards/NODE_151/mpconfigboard.h
@@ -1,12 +1,12 @@
-#define MICROPY_HW_BOARD_NAME "Node151v2.2"
-#define MICROPY_HW_MCU_NAME "STM32L151CCU"
+#define MICROPY_HW_BOARD_NAME "Node151v2.2"
+#define MICROPY_HW_MCU_NAME "STM32L151CCU"
#define MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE (0)
-#define MICROPY_HW_ENABLE_ADC (0)
-#define MICROPY_HW_ENABLE_DMA (0)
-#define MICROPY_HW_HAS_SWITCH (1)
-#define MICROPY_HW_HAS_FLASH (1)
-#define MICROPY_HW_ENABLE_USB (1)
+#define MICROPY_HW_ENABLE_ADC (0)
+#define MICROPY_HW_ENABLE_DMA (0)
+#define MICROPY_HW_HAS_SWITCH (0) // Ought to be able to turn back on
+#define MICROPY_HW_HAS_FLASH (1)
+#define MICROPY_HW_ENABLE_USB (0)
// HSE is 8MHz XXX - fix defines (copied from F411DISC)
#define MICROPY_HW_CLK_PLLM (5)
@@ -15,52 +15,52 @@
#define MICROPY_HW_CLK_PLLQ (7)
// The pyboard has a 32kHz crystal for the RTC
-#define MICROPY_HW_RTC_USE_LSE (1)
-#define MICROPY_HW_RTC_USE_US (0)
-#define MICROPY_HW_RTC_USE_CALOUT (1)
+#define MICROPY_HW_RTC_USE_LSE (1)
+#define MICROPY_HW_RTC_USE_US (0)
+#define MICROPY_HW_RTC_USE_CALOUT (1)
// 1 wait states XXX - correct?
-#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_1
+#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_1
// UART config
-#define MICROPY_HW_UART1_NAME "XB"
-#define MICROPY_HW_UART1_TX (pin_B6)
-#define MICROPY_HW_UART1_RX (pin_B7)
-#define MICROPY_HW_UART2_TX (pin_A2)
-#define MICROPY_HW_UART2_RX (pin_A3)
-#define MICROPY_HW_UART2_RTS (pin_A1)
-#define MICROPY_HW_UART2_CTS (pin_A0)
-#define MICROPY_HW_UART3_NAME "YB"
-#define MICROPY_HW_UART3_TX (pin_B10)
-#define MICROPY_HW_UART3_RX (pin_B11)
-#define MICROPY_HW_UART3_RTS (pin_B14)
-#define MICROPY_HW_UART3_CTS (pin_B13)
-#define MICROPY_HW_UART4_NAME "XA"
-#define MICROPY_HW_UART4_TX (pin_A0)
-#define MICROPY_HW_UART4_RX (pin_A1)
-#define MICROPY_HW_UART6_NAME "YA"
-#define MICROPY_HW_UART6_TX (pin_C6)
-#define MICROPY_HW_UART6_RX (pin_C7)
+#define MICROPY_HW_UART1_NAME "XB"
+#define MICROPY_HW_UART1_TX (pin_B6)
+#define MICROPY_HW_UART1_RX (pin_B7)
+#define MICROPY_HW_UART2_TX (pin_A2)
+#define MICROPY_HW_UART2_RX (pin_A3)
+#define MICROPY_HW_UART2_RTS (pin_A1)
+#define MICROPY_HW_UART2_CTS (pin_A0)
+#define MICROPY_HW_UART3_NAME "YB"
+#define MICROPY_HW_UART3_TX (pin_B10)
+#define MICROPY_HW_UART3_RX (pin_B11)
+#define MICROPY_HW_UART3_RTS (pin_B14)
+#define MICROPY_HW_UART3_CTS (pin_B13)
+// #define MICROPY_HW_UART4_NAME "XA"
+// #define MICROPY_HW_UART4_TX (pin_A0)
+// #define MICROPY_HW_UART4_RX (pin_A1)
+// #define MICROPY_HW_UART6_NAME "YA"
+// #define MICROPY_HW_UART6_TX (pin_C6)
+// #define MICROPY_HW_UART6_RX (pin_C7)
// I2C busses
-#define MICROPY_HW_I2C1_NAME "X"
-#define MICROPY_HW_I2C1_SCL (pin_B6)
-#define MICROPY_HW_I2C1_SDA (pin_B7)
-#define MICROPY_HW_I2C2_NAME "Y"
-#define MICROPY_HW_I2C2_SCL (pin_B10)
-#define MICROPY_HW_I2C2_SDA (pin_B11)
+// #define MICROPY_HW_I2C1_NAME "X"
+// #define MICROPY_HW_I2C1_SCL (pin_B6)
+// #define MICROPY_HW_I2C1_SDA (pin_B7)
+// #define MICROPY_HW_I2C2_NAME "Y"
+// #define MICROPY_HW_I2C2_SCL (pin_B10)
+// #define MICROPY_HW_I2C2_SDA (pin_B11)
// SPI busses
-#define MICROPY_HW_SPI1_NAME "X"
-#define MICROPY_HW_SPI1_NSS (pin_A4) // X5
-#define MICROPY_HW_SPI1_SCK (pin_A5) // X6
-#define MICROPY_HW_SPI1_MISO (pin_A6) // X7
-#define MICROPY_HW_SPI1_MOSI (pin_A7) // X8
-#define MICROPY_HW_SPI2_NAME "Y"
-#define MICROPY_HW_SPI2_NSS (pin_B12) // Y5
-#define MICROPY_HW_SPI2_SCK (pin_B13) // Y6
-#define MICROPY_HW_SPI2_MISO (pin_B14) // Y7
-#define MICROPY_HW_SPI2_MOSI (pin_B15) // Y8
+// #define MICROPY_HW_SPI1_NAME "X"
+// #define MICROPY_HW_SPI1_NSS (pin_A4) // X5
+// #define MICROPY_HW_SPI1_SCK (pin_A5) // X6
+// #define MICROPY_HW_SPI1_MISO (pin_A6) // X7
+// #define MICROPY_HW_SPI1_MOSI (pin_A7) // X8
+// #define MICROPY_HW_SPI2_NAME "Y"
+// #define MICROPY_HW_SPI2_NSS (pin_B12) // Y5
+// #define MICROPY_HW_SPI2_SCK (pin_B13) // Y6
+// #define MICROPY_HW_SPI2_MISO (pin_B14) // Y7
+// #define MICROPY_HW_SPI2_MOSI (pin_B15) // Y8
// USRSW has no pullup or pulldown, and pressing the switch makes the input go low
//#define MICROPY_HW_USRSW_PIN (pin_B3)
@@ -69,14 +69,14 @@
//#define MICROPY_HW_USRSW_PRESSED (0)
// The pyboard has 4 LEDs
-#define MICROPY_HW_LED1 (pin_B8) // red
+#define MICROPY_HW_LED1 (pin_B8) // red
//#define MICROPY_HW_LED2 (pin_A14) // green
//#define MICROPY_HW_LED3 (pin_A15) // yellow
//#define MICROPY_HW_LED4 (pin_B4) // blue
//#define MICROPY_HW_LED3_PWM { TIM2, 2, TIM_CHANNEL_1, GPIO_AF1_TIM2 }
//#define MICROPY_HW_LED4_PWM { TIM3, 3, TIM_CHANNEL_1, GPIO_AF2_TIM3 }
-#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin))
-#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin))
+#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin))
+#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin))
// SD card detect switch
//#define MICROPY_HW_SDCARD_DETECT_PIN (pin_A8)
@@ -84,7 +84,7 @@
//#define MICROPY_HW_SDCARD_DETECT_PRESENT (GPIO_PIN_RESET)
// USB config
-#define MICROPY_HW_USB_FS (0)
+#define MICROPY_HW_USB_FS (0)
//#define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9)
//#define MICROPY_HW_USB_OTG_ID_PIN (pin_A10)
diff --git a/ports/stm32/boards/stm32l151xc.ld b/ports/stm32/boards/stm32l151xc.ld
index 5ebc1ee97..31ee63e6e 100644
--- a/ports/stm32/boards/stm32l151xc.ld
+++ b/ports/stm32/boards/stm32l151xc.ld
@@ -25,3 +25,6 @@ _sstack = _estack - 4K;
/* RAM extents for the main heap */
_heap_start = _ebss;
_heap_end = _sstack;
+
+_flash_fs_start = ORIGIN(FLASH);
+_flash_fs_end = ORIGIN(FLASH) + LENGTH(FLASH);
diff --git a/ports/stm32/dma.c b/ports/stm32/dma.c
index 6f19b4e7b..718cd5d60 100644
--- a/ports/stm32/dma.c
+++ b/ports/stm32/dma.c
@@ -34,6 +34,8 @@
#include "dma.h"
#include "irq.h"
+#if DMA_ENABLED
+
#define DMA_IDLE_ENABLED() (dma_idle.enabled != 0)
#define DMA_SYSTICK_LOG2 (3)
#define DMA_SYSTICK_MASK ((1 << DMA_SYSTICK_LOG2) - 1)
@@ -1168,3 +1170,33 @@ void dma_nohal_start(const dma_descr_t *descr, uint32_t src_addr, uint32_t dst_a
}
#endif
+
+#else // If DMA is not enabled stub out methods
+
+void dma_init(DMA_HandleTypeDef *dma, const dma_descr_t *dma_descr, uint32_t dir, void *data) {
+}
+
+void dma_init_handle(DMA_HandleTypeDef *dma, const dma_descr_t *dma_descr, uint32_t dir, void *data){
+
+}
+
+void dma_deinit(const dma_descr_t *dma_descr) {
+
+}
+
+void dma_invalidate_channel(const dma_descr_t *dma_descr) {
+
+}
+
+void dma_nohal_init(const dma_descr_t *descr, uint32_t config) {
+}
+
+void dma_nohal_deinit(const dma_descr_t *descr) {
+
+}
+
+void dma_nohal_start(const dma_descr_t *descr, uint32_t src_addr, uint32_t dst_addr, uint16_t len) {
+
+}
+
+#endif // DMA_ENABLED
\ No newline at end of file
diff --git a/ports/stm32/dma.h b/ports/stm32/dma.h
index 5a17276a4..38a902b86 100644
--- a/ports/stm32/dma.h
+++ b/ports/stm32/dma.h
@@ -28,6 +28,9 @@
typedef struct _dma_descr_t dma_descr_t;
+#define DMA_ENABLED 0
+#if DMA_ENABLED
+
#if defined(STM32F0) || defined(STM32F4) || defined(STM32F7) || defined(STM32H7)
extern const dma_descr_t dma_I2C_1_RX;
@@ -97,6 +100,7 @@ extern const dma_descr_t dma_I2C_4_TX;
extern const dma_descr_t dma_I2C_4_RX;
#endif
+#endif // DMA_ENABLED
void dma_init(DMA_HandleTypeDef *dma, const dma_descr_t *dma_descr, uint32_t dir, void *data);
void dma_init_handle(DMA_HandleTypeDef *dma, const dma_descr_t *dma_descr, uint32_t dir, void *data);
diff --git a/ports/stm32/extint.c b/ports/stm32/extint.c
index 695655f09..bb3c9622f 100644
--- a/ports/stm32/extint.c
+++ b/ports/stm32/extint.c
@@ -87,37 +87,38 @@
#if defined(STM32F4) || defined(STM32L4)
// These MCUs have bitband support so define macros to atomically set/clear bits in IMR/EMR and SWIER
#define EXTI_OFFSET (EXTI_BASE - PERIPH_BASE)
-#define EXTI_MODE_BB(mode, line) (*(__IO uint32_t *)(PERIPH_BB_BASE + ((EXTI_OFFSET + (mode)) * 32) + ((line) * 4)))
-#define EXTI_SWIER_BB(line) (*(__IO uint32_t *)(PERIPH_BB_BASE + ((EXTI_OFFSET + offsetof(EXTI_TypeDef, SWIER)) * 32) + ((line) * 4)))
+#define EXTI_MODE_BB(mode, line) (*(__IO uint32_t *)(PERIPH_BB_BASE + ((EXTI_OFFSET + (mode)) * 32) + ((line)*4)))
+#define EXTI_SWIER_BB(line) (*(__IO uint32_t *)(PERIPH_BB_BASE + ((EXTI_OFFSET + offsetof(EXTI_TypeDef, SWIER)) * 32) + ((line)*4)))
#endif
#if defined(STM32L4) || defined(STM32WB)
// The L4 MCU supports 40 Events/IRQs lines of the type configurable and direct.
// Here we only support configurable line types. Details, see page 330 of RM0351, Rev 1.
// The USB_FS_WAKUP event is a direct type and there is no support for it.
-#define EXTI_Mode_Interrupt offsetof(EXTI_TypeDef, IMR1)
-#define EXTI_Mode_Event offsetof(EXTI_TypeDef, EMR1)
-#define EXTI_Trigger_Rising offsetof(EXTI_TypeDef, RTSR1)
-#define EXTI_Trigger_Falling offsetof(EXTI_TypeDef, FTSR1)
+#define EXTI_Mode_Interrupt offsetof(EXTI_TypeDef, IMR1)
+#define EXTI_Mode_Event offsetof(EXTI_TypeDef, EMR1)
+#define EXTI_Trigger_Rising offsetof(EXTI_TypeDef, RTSR1)
+#define EXTI_Trigger_Falling offsetof(EXTI_TypeDef, FTSR1)
#define EXTI_RTSR EXTI->RTSR1
#define EXTI_FTSR EXTI->FTSR1
#elif defined(STM32H7)
-#define EXTI_Mode_Interrupt offsetof(EXTI_Core_TypeDef, IMR1)
-#define EXTI_Mode_Event offsetof(EXTI_Core_TypeDef, EMR1)
-#define EXTI_Trigger_Rising offsetof(EXTI_Core_TypeDef, RTSR1)
-#define EXTI_Trigger_Falling offsetof(EXTI_Core_TypeDef, FTSR1)
+#define EXTI_Mode_Interrupt offsetof(EXTI_Core_TypeDef, IMR1)
+#define EXTI_Mode_Event offsetof(EXTI_Core_TypeDef, EMR1)
+#define EXTI_Trigger_Rising offsetof(EXTI_Core_TypeDef, RTSR1)
+#define EXTI_Trigger_Falling offsetof(EXTI_Core_TypeDef, FTSR1)
#define EXTI_RTSR EXTI->RTSR1
#define EXTI_FTSR EXTI->FTSR1
#else
-#define EXTI_Mode_Interrupt offsetof(EXTI_TypeDef, IMR)
-#define EXTI_Mode_Event offsetof(EXTI_TypeDef, EMR)
-#define EXTI_Trigger_Rising offsetof(EXTI_TypeDef, RTSR)
-#define EXTI_Trigger_Falling offsetof(EXTI_TypeDef, FTSR)
+#define EXTI_Mode_Interrupt offsetof(EXTI_TypeDef, IMR)
+#define EXTI_Mode_Event offsetof(EXTI_TypeDef, EMR)
+#define EXTI_Trigger_Rising offsetof(EXTI_TypeDef, RTSR)
+#define EXTI_Trigger_Falling offsetof(EXTI_TypeDef, FTSR)
#define EXTI_RTSR EXTI->RTSR
#define EXTI_FTSR EXTI->FTSR
#endif
-typedef struct {
+typedef struct
+{
mp_obj_base_t base;
mp_int_t line;
} extint_obj_t;
@@ -129,27 +130,39 @@ STATIC bool pyb_extint_hard_irq[EXTI_NUM_VECTORS];
STATIC mp_obj_t pyb_extint_callback_arg[EXTI_NUM_VECTORS];
#if !defined(ETH)
-#define ETH_WKUP_IRQn 62 // Some MCUs don't have ETH, but we want a value to put in our table
+#define ETH_WKUP_IRQn 62 // Some MCUs don't have ETH, but we want a value to put in our table
#endif
#if !defined(OTG_HS_WKUP_IRQn)
-#define OTG_HS_WKUP_IRQn 76 // Some MCUs don't have HS, but we want a value to put in our table
+#define OTG_HS_WKUP_IRQn 76 // Some MCUs don't have HS, but we want a value to put in our table
#endif
#if !defined(OTG_FS_WKUP_IRQn)
-#define OTG_FS_WKUP_IRQn 42 // Some MCUs don't have FS IRQ, but we want a value to put in our table
+#define OTG_FS_WKUP_IRQn 42 // Some MCUs don't have FS IRQ, but we want a value to put in our table
#endif
STATIC const uint8_t nvic_irq_channel[EXTI_NUM_VECTORS] = {
- #if defined(STM32F0) || defined(STM32L0)
-
- EXTI0_1_IRQn, EXTI0_1_IRQn, EXTI2_3_IRQn, EXTI2_3_IRQn,
- EXTI4_15_IRQn, EXTI4_15_IRQn, EXTI4_15_IRQn, EXTI4_15_IRQn,
- EXTI4_15_IRQn, EXTI4_15_IRQn, EXTI4_15_IRQn, EXTI4_15_IRQn,
- EXTI4_15_IRQn, EXTI4_15_IRQn, EXTI4_15_IRQn, EXTI4_15_IRQn,
- #if defined(STM32L0)
+#if defined(STM32F0) || defined(STM32L0)
+
+ EXTI0_1_IRQn,
+ EXTI0_1_IRQn,
+ EXTI2_3_IRQn,
+ EXTI2_3_IRQn,
+ EXTI4_15_IRQn,
+ EXTI4_15_IRQn,
+ EXTI4_15_IRQn,
+ EXTI4_15_IRQn,
+ EXTI4_15_IRQn,
+ EXTI4_15_IRQn,
+ EXTI4_15_IRQn,
+ EXTI4_15_IRQn,
+ EXTI4_15_IRQn,
+ EXTI4_15_IRQn,
+ EXTI4_15_IRQn,
+ EXTI4_15_IRQn,
+#if defined(STM32L0)
PVD_IRQn,
- #else
+#else
PVD_VDDIO2_IRQn,
- #endif
+#endif
RTC_IRQn,
0, // internal USB wakeup event
RTC_IRQn,
@@ -157,62 +170,86 @@ STATIC const uint8_t nvic_irq_channel[EXTI_NUM_VECTORS] = {
ADC1_COMP_IRQn,
ADC1_COMP_IRQn,
- #else
+#else
- EXTI0_IRQn, EXTI1_IRQn, EXTI2_IRQn, EXTI3_IRQn, EXTI4_IRQn,
- EXTI9_5_IRQn, EXTI9_5_IRQn, EXTI9_5_IRQn, EXTI9_5_IRQn, EXTI9_5_IRQn,
- EXTI15_10_IRQn, EXTI15_10_IRQn, EXTI15_10_IRQn, EXTI15_10_IRQn, EXTI15_10_IRQn,
+ EXTI0_IRQn,
+ EXTI1_IRQn,
+ EXTI2_IRQn,
+ EXTI3_IRQn,
+ EXTI4_IRQn,
+ EXTI9_5_IRQn,
+ EXTI9_5_IRQn,
+ EXTI9_5_IRQn,
+ EXTI9_5_IRQn,
+ EXTI9_5_IRQn,
+ EXTI15_10_IRQn,
+ EXTI15_10_IRQn,
+ EXTI15_10_IRQn,
+ EXTI15_10_IRQn,
+ EXTI15_10_IRQn,
EXTI15_10_IRQn,
- #if defined(STM32H7)
+#if defined(STM32H7)
PVD_AVD_IRQn,
RTC_Alarm_IRQn,
TAMP_STAMP_IRQn,
RTC_WKUP_IRQn,
- #elif defined(STM32WB)
+#elif defined(STM32WB)
PVD_PVM_IRQn,
RTC_Alarm_IRQn,
TAMP_STAMP_LSECSS_IRQn,
RTC_WKUP_IRQn,
- #else
- #if defined(STM32L4)
+#else
+#if defined(STM32L4)
PVD_PVM_IRQn,
- #else
+#else
PVD_IRQn,
- #endif
- #if defined(STM32L4)
+#endif
+#if defined(STM32L4)
OTG_FS_WKUP_IRQn,
RTC_Alarm_IRQn,
- #else
+#else
RTC_Alarm_IRQn,
OTG_FS_WKUP_IRQn,
- #endif
+#endif
ETH_WKUP_IRQn,
OTG_HS_WKUP_IRQn,
+
+#if defined(STM32L1)
+ TAMPER_STAMP_IRQn,
+#else
TAMP_STAMP_IRQn,
+#endif
+
RTC_WKUP_IRQn,
- #endif
+#endif
- #endif
+#endif
};
// Set override_callback_obj to true if you want to unconditionally set the
// callback function.
-uint extint_register(mp_obj_t pin_obj, uint32_t mode, uint32_t pull, mp_obj_t callback_obj, bool override_callback_obj) {
+uint extint_register(mp_obj_t pin_obj, uint32_t mode, uint32_t pull, mp_obj_t callback_obj, bool override_callback_obj)
+{
const pin_obj_t *pin = NULL;
uint v_line;
- if (mp_obj_is_int(pin_obj)) {
+ if (mp_obj_is_int(pin_obj))
+ {
// If an integer is passed in, then use it to identify lines 16 thru 22
// We expect lines 0 thru 15 to be passed in as a pin, so that we can
// get both the port number and line number.
v_line = mp_obj_get_int(pin_obj);
- if (v_line < 16) {
+ if (v_line < 16)
+ {
mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("ExtInt vector %d < 16, use a Pin object"), v_line);
}
- if (v_line >= EXTI_NUM_VECTORS) {
+ if (v_line >= EXTI_NUM_VECTORS)
+ {
mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("ExtInt vector %d >= max of %d"), v_line, EXTI_NUM_VECTORS);
}
- } else {
+ }
+ else
+ {
pin = pin_find(pin_obj);
v_line = pin->pin;
}
@@ -221,17 +258,20 @@ uint extint_register(mp_obj_t pin_obj, uint32_t mode, uint32_t pull, mp_obj_t ca
mode != GPIO_MODE_IT_RISING_FALLING &&
mode != GPIO_MODE_EVT_RISING &&
mode != GPIO_MODE_EVT_FALLING &&
- mode != GPIO_MODE_EVT_RISING_FALLING) {
+ mode != GPIO_MODE_EVT_RISING_FALLING)
+ {
mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("invalid ExtInt Mode: %d"), mode);
}
if (pull != GPIO_NOPULL &&
pull != GPIO_PULLUP &&
- pull != GPIO_PULLDOWN) {
+ pull != GPIO_PULLDOWN)
+ {
mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("invalid ExtInt Pull: %d"), pull);
}
mp_obj_t *cb = &MP_STATE_PORT(pyb_extint_callback)[v_line];
- if (!override_callback_obj && *cb != mp_const_none && callback_obj != mp_const_none) {
+ if (!override_callback_obj && *cb != mp_const_none && callback_obj != mp_const_none)
+ {
mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("ExtInt vector %d is already in use"), v_line);
}
@@ -242,17 +282,22 @@ uint extint_register(mp_obj_t pin_obj, uint32_t mode, uint32_t pull, mp_obj_t ca
*cb = callback_obj;
pyb_extint_mode[v_line] = (mode & 0x00010000) ? // GPIO_MODE_IT == 0x00010000
- EXTI_Mode_Interrupt : EXTI_Mode_Event;
+ EXTI_Mode_Interrupt
+ : EXTI_Mode_Event;
- if (*cb != mp_const_none) {
+ if (*cb != mp_const_none)
+ {
pyb_extint_hard_irq[v_line] = true;
pyb_extint_callback_arg[v_line] = MP_OBJ_NEW_SMALL_INT(v_line);
- if (pin == NULL) {
+ if (pin == NULL)
+ {
// pin will be NULL for non GPIO EXTI lines
extint_trigger_mode(v_line, mode);
extint_enable(v_line);
- } else {
+ }
+ else
+ {
mp_hal_gpio_clock_enable(pin->gpio);
GPIO_InitTypeDef exti;
exti.Pin = pin->pin_mask;
@@ -272,18 +317,23 @@ uint extint_register(mp_obj_t pin_obj, uint32_t mode, uint32_t pull, mp_obj_t ca
}
// This function is intended to be used by the Pin.irq() method
-void extint_register_pin(const pin_obj_t *pin, uint32_t mode, bool hard_irq, mp_obj_t callback_obj) {
+void extint_register_pin(const pin_obj_t *pin, uint32_t mode, bool hard_irq, mp_obj_t callback_obj)
+{
uint32_t line = pin->pin;
// Check if the ExtInt line is already in use by another Pin/ExtInt
mp_obj_t *cb = &MP_STATE_PORT(pyb_extint_callback)[line];
- if (*cb != mp_const_none && MP_OBJ_FROM_PTR(pin) != pyb_extint_callback_arg[line]) {
- if (mp_obj_is_small_int(pyb_extint_callback_arg[line])) {
+ if (*cb != mp_const_none && MP_OBJ_FROM_PTR(pin) != pyb_extint_callback_arg[line])
+ {
+ if (mp_obj_is_small_int(pyb_extint_callback_arg[line]))
+ {
mp_raise_msg_varg(&mp_type_OSError, MP_ERROR_TEXT("ExtInt vector %d is already in use"), line);
- } else {
+ }
+ else
+ {
const pin_obj_t *other_pin = MP_OBJ_TO_PTR(pyb_extint_callback_arg[line]);
mp_raise_msg_varg(&mp_type_OSError,
- MP_ERROR_TEXT("IRQ resource already taken by Pin('%q')"), other_pin->name);
+ MP_ERROR_TEXT("IRQ resource already taken by Pin('%q')"), other_pin->name);
}
}
@@ -291,21 +341,22 @@ void extint_register_pin(const pin_obj_t *pin, uint32_t mode, bool hard_irq, mp_
*cb = callback_obj;
pyb_extint_mode[line] = (mode & 0x00010000) ? // GPIO_MODE_IT == 0x00010000
- EXTI_Mode_Interrupt : EXTI_Mode_Event;
+ EXTI_Mode_Interrupt
+ : EXTI_Mode_Event;
- if (*cb != mp_const_none) {
+ if (*cb != mp_const_none)
+ {
// Configure and enable the callback
pyb_extint_hard_irq[line] = hard_irq;
pyb_extint_callback_arg[line] = MP_OBJ_FROM_PTR(pin);
- // Route the GPIO to EXTI
- #if !defined(STM32WB)
+// Route the GPIO to EXTI
+#if !defined(STM32WB)
__HAL_RCC_SYSCFG_CLK_ENABLE();
- #endif
+#endif
SYSCFG->EXTICR[line >> 2] =
- (SYSCFG->EXTICR[line >> 2] & ~(0x0f << (4 * (line & 0x03))))
- | ((uint32_t)(GPIO_GET_INDEX(pin->gpio)) << (4 * (line & 0x03)));
+ (SYSCFG->EXTICR[line >> 2] & ~(0x0f << (4 * (line & 0x03)))) | ((uint32_t)(GPIO_GET_INDEX(pin->gpio)) << (4 * (line & 0x03)));
extint_trigger_mode(line, mode);
@@ -318,7 +369,8 @@ void extint_register_pin(const pin_obj_t *pin, uint32_t mode, bool hard_irq, mp_
}
}
-void extint_set(const pin_obj_t *pin, uint32_t mode) {
+void extint_set(const pin_obj_t *pin, uint32_t mode)
+{
uint32_t line = pin->pin;
mp_obj_t *cb = &MP_STATE_PORT(pyb_extint_callback)[line];
@@ -328,7 +380,8 @@ void extint_set(const pin_obj_t *pin, uint32_t mode) {
*cb = MP_OBJ_SENTINEL;
pyb_extint_mode[line] = (mode & 0x00010000) ? // GPIO_MODE_IT == 0x00010000
- EXTI_Mode_Interrupt : EXTI_Mode_Event;
+ EXTI_Mode_Interrupt
+ : EXTI_Mode_Event;
{
// Configure and enable the callback
@@ -336,25 +389,30 @@ void extint_set(const pin_obj_t *pin, uint32_t mode) {
pyb_extint_hard_irq[line] = 1;
pyb_extint_callback_arg[line] = MP_OBJ_FROM_PTR(pin);
- // Route the GPIO to EXTI
- #if !defined(STM32WB)
+// Route the GPIO to EXTI
+#if !defined(STM32WB)
__HAL_RCC_SYSCFG_CLK_ENABLE();
- #endif
+#endif
SYSCFG->EXTICR[line >> 2] =
- (SYSCFG->EXTICR[line >> 2] & ~(0x0f << (4 * (line & 0x03))))
- | ((uint32_t)(GPIO_GET_INDEX(pin->gpio)) << (4 * (line & 0x03)));
+ (SYSCFG->EXTICR[line >> 2] & ~(0x0f << (4 * (line & 0x03)))) | ((uint32_t)(GPIO_GET_INDEX(pin->gpio)) << (4 * (line & 0x03)));
// Enable or disable the rising detector
- if ((mode & GPIO_MODE_IT_RISING) == GPIO_MODE_IT_RISING) {
+ if ((mode & GPIO_MODE_IT_RISING) == GPIO_MODE_IT_RISING)
+ {
EXTI_RTSR |= 1 << line;
- } else {
+ }
+ else
+ {
EXTI_RTSR &= ~(1 << line);
}
// Enable or disable the falling detector
- if ((mode & GPIO_MODE_IT_FALLING) == GPIO_MODE_IT_FALLING) {
+ if ((mode & GPIO_MODE_IT_FALLING) == GPIO_MODE_IT_FALLING)
+ {
EXTI_FTSR |= 1 << line;
- } else {
+ }
+ else
+ {
EXTI_FTSR &= ~(1 << line);
}
@@ -367,113 +425,131 @@ void extint_set(const pin_obj_t *pin, uint32_t mode) {
}
}
-void extint_enable(uint line) {
- if (line >= EXTI_NUM_VECTORS) {
+void extint_enable(uint line)
+{
+ if (line >= EXTI_NUM_VECTORS)
+ {
return;
}
- #if !defined(EXTI_MODE_BB)
+#if !defined(EXTI_MODE_BB)
// This MCU doesn't have bitband support.
mp_uint_t irq_state = disable_irq();
- if (pyb_extint_mode[line] == EXTI_Mode_Interrupt) {
- #if defined(STM32H7)
+ if (pyb_extint_mode[line] == EXTI_Mode_Interrupt)
+ {
+#if defined(STM32H7)
EXTI_D1->IMR1 |= (1 << line);
- #elif defined(STM32WB)
+#elif defined(STM32WB)
EXTI->IMR1 |= (1 << line);
- #else
+#else
EXTI->IMR |= (1 << line);
- #endif
- } else {
- #if defined(STM32H7)
+#endif
+ }
+ else
+ {
+#if defined(STM32H7)
EXTI_D1->EMR1 |= (1 << line);
- #elif defined(STM32WB)
+#elif defined(STM32WB)
EXTI->EMR1 |= (1 << line);
- #else
+#else
EXTI->EMR |= (1 << line);
- #endif
+#endif
}
enable_irq(irq_state);
- #else
+#else
// Since manipulating IMR/EMR is a read-modify-write, and we want this to
// be atomic, we use the bit-band area to just affect the bit we're
// interested in.
EXTI_MODE_BB(pyb_extint_mode[line], line) = 1;
- #endif
+#endif
}
-void extint_disable(uint line) {
- if (line >= EXTI_NUM_VECTORS) {
+void extint_disable(uint line)
+{
+ if (line >= EXTI_NUM_VECTORS)
+ {
return;
}
- #if !defined(EXTI_MODE_BB)
+#if !defined(EXTI_MODE_BB)
// This MCU doesn't have bitband support.
mp_uint_t irq_state = disable_irq();
- #if defined(STM32H7)
+#if defined(STM32H7)
EXTI_D1->IMR1 &= ~(1 << line);
EXTI_D1->EMR1 &= ~(1 << line);
- #elif defined(STM32WB)
+#elif defined(STM32WB)
EXTI->IMR1 &= ~(1 << line);
EXTI->EMR1 &= ~(1 << line);
- #else
+#else
EXTI->IMR &= ~(1 << line);
EXTI->EMR &= ~(1 << line);
- #endif
+#endif
enable_irq(irq_state);
- #else
+#else
// Since manipulating IMR/EMR is a read-modify-write, and we want this to
// be atomic, we use the bit-band area to just affect the bit we're
// interested in.
EXTI_MODE_BB(EXTI_Mode_Interrupt, line) = 0;
EXTI_MODE_BB(EXTI_Mode_Event, line) = 0;
- #endif
+#endif
}
-void extint_swint(uint line) {
- if (line >= EXTI_NUM_VECTORS) {
+void extint_swint(uint line)
+{
+ if (line >= EXTI_NUM_VECTORS)
+ {
return;
}
- // we need 0 to 1 transition to trigger the interrupt
- #if defined(STM32L4) || defined(STM32H7) || defined(STM32WB)
+// we need 0 to 1 transition to trigger the interrupt
+#if defined(STM32L4) || defined(STM32H7) || defined(STM32WB)
EXTI->SWIER1 &= ~(1 << line);
EXTI->SWIER1 |= (1 << line);
- #else
+#else
EXTI->SWIER &= ~(1 << line);
EXTI->SWIER |= (1 << line);
- #endif
+#endif
}
-void extint_trigger_mode(uint line, uint32_t mode) {
- if (line >= EXTI_NUM_VECTORS) {
+void extint_trigger_mode(uint line, uint32_t mode)
+{
+ if (line >= EXTI_NUM_VECTORS)
+ {
return;
}
- #if !defined(EXTI_MODE_BB)
+#if !defined(EXTI_MODE_BB)
// This MCU doesn't have bitband support.
mp_uint_t irq_state = disable_irq();
// Enable or disable the rising detector
- if ((mode & GPIO_MODE_IT_RISING) == GPIO_MODE_IT_RISING) {
+ if ((mode & GPIO_MODE_IT_RISING) == GPIO_MODE_IT_RISING)
+ {
EXTI_RTSR |= (1 << line);
- } else {
+ }
+ else
+ {
EXTI_RTSR &= ~(1 << line);
}
// Enable or disable the falling detector
- if ((mode & GPIO_MODE_IT_FALLING) == GPIO_MODE_IT_FALLING) {
+ if ((mode & GPIO_MODE_IT_FALLING) == GPIO_MODE_IT_FALLING)
+ {
EXTI_FTSR |= 1 << line;
- } else {
+ }
+ else
+ {
EXTI_FTSR &= ~(1 << line);
}
enable_irq(irq_state);
- #else
+#else
// Since manipulating FTSR/RTSR is a read-modify-write, and we want this to
// be atomic, we use the bit-band area to just affect the bit we're
// interested in.
EXTI_MODE_BB(EXTI_Trigger_Rising, line) = (mode & GPIO_MODE_IT_RISING) == GPIO_MODE_IT_RISING;
EXTI_MODE_BB(EXTI_Trigger_Falling, line) = (mode & GPIO_MODE_IT_FALLING) == GPIO_MODE_IT_FALLING;
- #endif
+#endif
}
/// \method line()
/// Return the line number that the pin is mapped to.
-STATIC mp_obj_t extint_obj_line(mp_obj_t self_in) {
+STATIC mp_obj_t extint_obj_line(mp_obj_t self_in)
+{
extint_obj_t *self = MP_OBJ_TO_PTR(self_in);
return MP_OBJ_NEW_SMALL_INT(self->line);
}
@@ -481,7 +557,8 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_1(extint_obj_line_obj, extint_obj_line);
/// \method enable()
/// Enable a disabled interrupt.
-STATIC mp_obj_t extint_obj_enable(mp_obj_t self_in) {
+STATIC mp_obj_t extint_obj_enable(mp_obj_t self_in)
+{
extint_obj_t *self = MP_OBJ_TO_PTR(self_in);
extint_enable(self->line);
return mp_const_none;
@@ -491,7 +568,8 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_1(extint_obj_enable_obj, extint_obj_enable);
/// \method disable()
/// Disable the interrupt associated with the ExtInt object.
/// This could be useful for debouncing.
-STATIC mp_obj_t extint_obj_disable(mp_obj_t self_in) {
+STATIC mp_obj_t extint_obj_disable(mp_obj_t self_in)
+{
extint_obj_t *self = MP_OBJ_TO_PTR(self_in);
extint_disable(self->line);
return mp_const_none;
@@ -500,18 +578,20 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_1(extint_obj_disable_obj, extint_obj_disable);
/// \method swint()
/// Trigger the callback from software.
-STATIC mp_obj_t extint_obj_swint(mp_obj_t self_in) {
+STATIC mp_obj_t extint_obj_swint(mp_obj_t self_in)
+{
extint_obj_t *self = MP_OBJ_TO_PTR(self_in);
extint_swint(self->line);
return mp_const_none;
}
-STATIC MP_DEFINE_CONST_FUN_OBJ_1(extint_obj_swint_obj, extint_obj_swint);
+STATIC MP_DEFINE_CONST_FUN_OBJ_1(extint_obj_swint_obj, extint_obj_swint);
// TODO document as a staticmethod
/// \classmethod regs()
/// Dump the values of the EXTI registers.
-STATIC mp_obj_t extint_regs(void) {
- #if defined(STM32L4) || defined(STM32WB)
+STATIC mp_obj_t extint_regs(void)
+{
+#if defined(STM32L4) || defined(STM32WB)
printf("EXTI_IMR1 %08x\n", (unsigned int)EXTI->IMR1);
printf("EXTI_IMR2 %08x\n", (unsigned int)EXTI->IMR2);
printf("EXTI_EMR1 %08x\n", (unsigned int)EXTI->EMR1);
@@ -524,7 +604,7 @@ STATIC mp_obj_t extint_regs(void) {
printf("EXTI_SWIER2 %08x\n", (unsigned int)EXTI->SWIER2);
printf("EXTI_PR1 %08x\n", (unsigned int)EXTI->PR1);
printf("EXTI_PR2 %08x\n", (unsigned int)EXTI->PR2);
- #elif defined(STM32H7)
+#elif defined(STM32H7)
printf("EXTI_IMR1 %08x\n", (unsigned int)EXTI_D1->IMR1);
printf("EXTI_IMR2 %08x\n", (unsigned int)EXTI_D1->IMR2);
printf("EXTI_IMR3 %08x\n", (unsigned int)EXTI_D1->IMR3);
@@ -543,14 +623,14 @@ STATIC mp_obj_t extint_regs(void) {
printf("EXTI_PR1 %08x\n", (unsigned int)EXTI_D1->PR1);
printf("EXTI_PR2 %08x\n", (unsigned int)EXTI_D1->PR2);
printf("EXTI_PR3 %08x\n", (unsigned int)EXTI_D1->PR3);
- #else
+#else
printf("EXTI_IMR %08x\n", (unsigned int)EXTI->IMR);
printf("EXTI_EMR %08x\n", (unsigned int)EXTI->EMR);
printf("EXTI_RTSR %08x\n", (unsigned int)EXTI->RTSR);
printf("EXTI_FTSR %08x\n", (unsigned int)EXTI->FTSR);
printf("EXTI_SWIER %08x\n", (unsigned int)EXTI->SWIER);
printf("EXTI_PR %08x\n", (unsigned int)EXTI->PR);
- #endif
+#endif
return mp_const_none;
}
STATIC MP_DEFINE_CONST_FUN_OBJ_0(extint_regs_fun_obj, extint_regs);
@@ -572,14 +652,15 @@ STATIC MP_DEFINE_CONST_STATICMETHOD_OBJ(extint_regs_obj, MP_ROM_PTR(&extint_regs
/// callback function must accept exactly 1 argument, which is the line that
/// triggered the interrupt.
STATIC const mp_arg_t pyb_extint_make_new_args[] = {
- { MP_QSTR_pin, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
- { MP_QSTR_mode, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} },
- { MP_QSTR_pull, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0} },
- { MP_QSTR_callback, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL} },
+ {MP_QSTR_pin, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL}},
+ {MP_QSTR_mode, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0}},
+ {MP_QSTR_pull, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 0}},
+ {MP_QSTR_callback, MP_ARG_REQUIRED | MP_ARG_OBJ, {.u_obj = MP_OBJ_NULL}},
};
#define PYB_EXTINT_MAKE_NEW_NUM_ARGS MP_ARRAY_SIZE(pyb_extint_make_new_args)
-STATIC mp_obj_t extint_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) {
+STATIC mp_obj_t extint_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args)
+{
// type_in == extint_obj_type
// parse args
@@ -593,68 +674,80 @@ STATIC mp_obj_t extint_make_new(const mp_obj_type_t *type, size_t n_args, size_t
return MP_OBJ_FROM_PTR(self);
}
-STATIC void extint_obj_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
+STATIC void extint_obj_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind)
+{
extint_obj_t *self = MP_OBJ_TO_PTR(self_in);
mp_printf(print, "<ExtInt line=%u>", self->line);
}
STATIC const mp_rom_map_elem_t extint_locals_dict_table[] = {
- { MP_ROM_QSTR(MP_QSTR_line), MP_ROM_PTR(&extint_obj_line_obj) },
- { MP_ROM_QSTR(MP_QSTR_enable), MP_ROM_PTR(&extint_obj_enable_obj) },
- { MP_ROM_QSTR(MP_QSTR_disable), MP_ROM_PTR(&extint_obj_disable_obj) },
- { MP_ROM_QSTR(MP_QSTR_swint), MP_ROM_PTR(&extint_obj_swint_obj) },
- { MP_ROM_QSTR(MP_QSTR_regs), MP_ROM_PTR(&extint_regs_obj) },
+ {MP_ROM_QSTR(MP_QSTR_line), MP_ROM_PTR(&extint_obj_line_obj)},
+ {MP_ROM_QSTR(MP_QSTR_enable), MP_ROM_PTR(&extint_obj_enable_obj)},
+ {MP_ROM_QSTR(MP_QSTR_disable), MP_ROM_PTR(&extint_obj_disable_obj)},
+ {MP_ROM_QSTR(MP_QSTR_swint), MP_ROM_PTR(&extint_obj_swint_obj)},
+ {MP_ROM_QSTR(MP_QSTR_regs), MP_ROM_PTR(&extint_regs_obj)},
// class constants
/// \constant IRQ_RISING - interrupt on a rising edge
/// \constant IRQ_FALLING - interrupt on a falling edge
/// \constant IRQ_RISING_FALLING - interrupt on a rising or falling edge
- { MP_ROM_QSTR(MP_QSTR_IRQ_RISING), MP_ROM_INT(GPIO_MODE_IT_RISING) },
- { MP_ROM_QSTR(MP_QSTR_IRQ_FALLING), MP_ROM_INT(GPIO_MODE_IT_FALLING) },
- { MP_ROM_QSTR(MP_QSTR_IRQ_RISING_FALLING), MP_ROM_INT(GPIO_MODE_IT_RISING_FALLING) },
- { MP_ROM_QSTR(MP_QSTR_EVT_RISING), MP_ROM_INT(GPIO_MODE_EVT_RISING) },
- { MP_ROM_QSTR(MP_QSTR_EVT_FALLING), MP_ROM_INT(GPIO_MODE_EVT_FALLING) },
- { MP_ROM_QSTR(MP_QSTR_EVT_RISING_FALLING), MP_ROM_INT(GPIO_MODE_EVT_RISING_FALLING) },
+ {MP_ROM_QSTR(MP_QSTR_IRQ_RISING), MP_ROM_INT(GPIO_MODE_IT_RISING)},
+ {MP_ROM_QSTR(MP_QSTR_IRQ_FALLING), MP_ROM_INT(GPIO_MODE_IT_FALLING)},
+ {MP_ROM_QSTR(MP_QSTR_IRQ_RISING_FALLING), MP_ROM_INT(GPIO_MODE_IT_RISING_FALLING)},
+ {MP_ROM_QSTR(MP_QSTR_EVT_RISING), MP_ROM_INT(GPIO_MODE_EVT_RISING)},
+ {MP_ROM_QSTR(MP_QSTR_EVT_FALLING), MP_ROM_INT(GPIO_MODE_EVT_FALLING)},
+ {MP_ROM_QSTR(MP_QSTR_EVT_RISING_FALLING), MP_ROM_INT(GPIO_MODE_EVT_RISING_FALLING)},
};
STATIC MP_DEFINE_CONST_DICT(extint_locals_dict, extint_locals_dict_table);
const mp_obj_type_t extint_type = {
- { &mp_type_type },
+ {&mp_type_type},
.name = MP_QSTR_ExtInt,
.print = extint_obj_print,
.make_new = extint_make_new,
.locals_dict = (mp_obj_dict_t *)&extint_locals_dict,
};
-void extint_init0(void) {
- for (int i = 0; i < PYB_EXTI_NUM_VECTORS; i++) {
- if (MP_STATE_PORT(pyb_extint_callback)[i] == MP_OBJ_SENTINEL) {
+void extint_init0(void)
+{
+ for (int i = 0; i < PYB_EXTI_NUM_VECTORS; i++)
+ {
+ if (MP_STATE_PORT(pyb_extint_callback)[i] == MP_OBJ_SENTINEL)
+ {
continue;
}
- MP_STATE_PORT(pyb_extint_callback)[i] = mp_const_none;
+ MP_STATE_PORT(pyb_extint_callback)
+ [i] = mp_const_none;
pyb_extint_mode[i] = EXTI_Mode_Interrupt;
}
}
// Interrupt handler
-void Handle_EXTI_Irq(uint32_t line) {
- if (__HAL_GPIO_EXTI_GET_FLAG(1 << line)) {
+void Handle_EXTI_Irq(uint32_t line)
+{
+ if (__HAL_GPIO_EXTI_GET_FLAG(1 << line))
+ {
__HAL_GPIO_EXTI_CLEAR_FLAG(1 << line);
- if (line < EXTI_NUM_VECTORS) {
+ if (line < EXTI_NUM_VECTORS)
+ {
mp_obj_t *cb = &MP_STATE_PORT(pyb_extint_callback)[line];
- #if MICROPY_PY_NETWORK_CYW43 && defined(pyb_pin_WL_HOST_WAKE)
- if (pyb_extint_callback_arg[line] == MP_OBJ_FROM_PTR(pyb_pin_WL_HOST_WAKE)) {
+#if MICROPY_PY_NETWORK_CYW43 && defined(pyb_pin_WL_HOST_WAKE)
+ if (pyb_extint_callback_arg[line] == MP_OBJ_FROM_PTR(pyb_pin_WL_HOST_WAKE))
+ {
extern void (*cyw43_poll)(void);
- if (cyw43_poll) {
+ if (cyw43_poll)
+ {
pendsv_schedule_dispatch(PENDSV_DISPATCH_CYW43, cyw43_poll);
}
return;
}
- #endif
- if (*cb != mp_const_none) {
+#endif
+ if (*cb != mp_const_none)
+ {
// If it's a soft IRQ handler then just schedule callback for later
- if (!pyb_extint_hard_irq[line]) {
+ if (!pyb_extint_hard_irq[line])
+ {
mp_sched_schedule(*cb, pyb_extint_callback_arg[line]);
return;
}
@@ -664,10 +757,13 @@ void Handle_EXTI_Irq(uint32_t line) {
// any memory allocations. We must also catch any exceptions.
gc_lock();
nlr_buf_t nlr;
- if (nlr_push(&nlr) == 0) {
+ if (nlr_push(&nlr) == 0)
+ {
mp_call_function_1(*cb, pyb_extint_callback_arg[line]);
nlr_pop();
- } else {
+ }
+ else
+ {
// Uncaught exception; disable the callback so it doesn't run again.
*cb = mp_const_none;
extint_disable(line);
diff --git a/ports/stm32/flash.c b/ports/stm32/flash.c
index 83ae812d2..997f5e490 100644
--- a/ports/stm32/flash.c
+++ b/ports/stm32/flash.c
@@ -29,6 +29,7 @@
#include "py/mphal.h"
#include "flash.h"
+#if 0
#if MICROPY_HW_STM32WB_FLASH_SYNCRONISATION
// See WB55 specific documentation in AN5289 Rev 3, and in particular, Figure 10.
@@ -461,3 +462,5 @@ void flash_erase_and_write(uint32_t flash_dest, const uint32_t *src, uint32_t nu
HAL_FLASH_Lock();
}
*/
+
+#endif
\ No newline at end of file
diff --git a/ports/stm32/flash.h b/ports/stm32/flash.h
index ecda923db..25779bdd8 100644
--- a/ports/stm32/flash.h
+++ b/ports/stm32/flash.h
@@ -25,10 +25,10 @@
*/
#ifndef MICROPY_INCLUDED_STM32_FLASH_H
#define MICROPY_INCLUDED_STM32_FLASH_H
-
+#if 0
bool flash_is_valid_addr(uint32_t addr);
int32_t flash_get_sector_info(uint32_t addr, uint32_t *start_addr, uint32_t *size);
int flash_erase(uint32_t flash_dest, uint32_t num_word32);
int flash_write(uint32_t flash_dest, const uint32_t *src, uint32_t num_word32);
-
+#endif
#endif // MICROPY_INCLUDED_STM32_FLASH_H
diff --git a/ports/stm32/flashbdev.c b/ports/stm32/flashbdev.c
index 4153a713c..077ac2c18 100644
--- a/ports/stm32/flashbdev.c
+++ b/ports/stm32/flashbdev.c
@@ -113,7 +113,7 @@ STATIC byte flash_cache_mem[0x4000] __attribute__((aligned(4))); // 16k
#elif defined(STM32L432xx) || \
defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx) || \
defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L496xx) || \
- defined(STM32WB)
+ defined(STM32WB) || defined(STM32L1)
// The STM32L4xx doesn't have CCRAM, so we use SRAM2 for this, although
// actual location and size is defined by the linker script.
diff --git a/ports/stm32/machine_adc.c b/ports/stm32/machine_adc.c
index d9e5a64da..204e483cd 100644
--- a/ports/stm32/machine_adc.c
+++ b/ports/stm32/machine_adc.c
@@ -27,14 +27,14 @@
#include "py/runtime.h"
#include "py/mphal.h"
#include "adc.h"
-
+#if 0
#if defined(STM32F0) || defined(STM32H7) || defined(STM32L0) || defined(STM32L4) || defined(STM32WB)
#define ADC_V2 (1)
#else
#define ADC_V2 (0)
#endif
-#if defined(STM32F4) || defined(STM32L4)
+#if defined(STM32F4) || defined(STM32L4) || defined(STM32L1)
#define ADCx_COMMON ADC_COMMON_REGISTER(0)
#elif defined(STM32F7)
#define ADCx_COMMON ADC123_COMMON
@@ -52,7 +52,7 @@
#if defined(STM32F0)
#define ADC_SAMPLETIME_DEFAULT ADC_SAMPLETIME_13CYCLES_5
#define ADC_SAMPLETIME_DEFAULT_INT ADC_SAMPLETIME_239CYCLES_5
-#elif defined(STM32F4) || defined(STM32F7)
+#elif defined(STM32F4) || defined(STM32F7) || defined(STM32L1)
#define ADC_SAMPLETIME_DEFAULT ADC_SAMPLETIME_15CYCLES
#define ADC_SAMPLETIME_DEFAULT_INT ADC_SAMPLETIME_480CYCLES
#elif defined(STM32H7)
@@ -128,7 +128,7 @@ STATIC void adc_config(ADC_TypeDef *adc, uint32_t bits) {
// Configure clock mode
#if defined(STM32F0)
adc->CFGR2 = 2 << ADC_CFGR2_CKMODE_Pos; // PCLK/4 (synchronous clock mode)
- #elif defined(STM32F4) || defined(STM32F7) || defined(STM32L4)
+ #elif defined(STM32F4) || defined(STM32F7) || defined(STM32L4) || defined(STM32L1)
ADCx_COMMON->CCR = 0; // ADCPR=PCLK/2
#elif defined(STM32H7)
ADC12_COMMON->CCR = 3 << ADC_CCR_CKMODE_Pos;
@@ -197,7 +197,7 @@ STATIC void adc_config(ADC_TypeDef *adc, uint32_t bits) {
uint32_t cfgr1 = res << ADC_CFGR1_RES_Pos;
adc->CFGR1 = (adc->CFGR1 & ~cfgr1_clr) | cfgr1;
- #elif defined(STM32F4) || defined(STM32F7)
+ #elif defined(STM32F4) || defined(STM32F7) || defined(STM32L1)
uint32_t cr1_clr = ADC_CR1_RES;
uint32_t cr1 = res << ADC_CR1_RES_Pos;
@@ -224,7 +224,7 @@ STATIC void adc_config(ADC_TypeDef *adc, uint32_t bits) {
STATIC int adc_get_bits(ADC_TypeDef *adc) {
#if defined(STM32F0) || defined(STM32L0)
uint32_t res = (adc->CFGR1 & ADC_CFGR1_RES) >> ADC_CFGR1_RES_Pos;
- #elif defined(STM32F4) || defined(STM32F7)
+ #elif defined(STM32F4) || defined(STM32F7) || defined(STM32L1)
uint32_t res = (adc->CR1 & ADC_CR1_RES) >> ADC_CR1_RES_Pos;
#elif defined(STM32H7) || defined(STM32L4) || defined(STM32WB)
uint32_t res = (adc->CFGR & ADC_CFGR_RES) >> ADC_CFGR_RES_Pos;
@@ -267,7 +267,7 @@ STATIC void adc_config_channel(ADC_TypeDef *adc, uint32_t channel, uint32_t samp
adc->SMPR = sample_time << ADC_SMPR_SMP_Pos; // select sample time
adc->CHSELR = 1 << channel; // select channel for conversion
- #elif defined(STM32F4) || defined(STM32F7)
+ #elif defined(STM32F4) || defined(STM32F7) || defined(STM32L1)
if (channel == ADC_CHANNEL_VREFINT || channel == ADC_CHANNEL_TEMPSENSOR) {
ADCx_COMMON->CCR = (ADCx_COMMON->CCR & ~ADC_CCR_VBATE) | ADC_CCR_TSVREFE;
@@ -462,3 +462,4 @@ const mp_obj_type_t machine_adc_type = {
.make_new = machine_adc_make_new,
.locals_dict = (mp_obj_dict_t *)&machine_adc_locals_dict,
};
+#endif
\ No newline at end of file
diff --git a/ports/stm32/modmachine.c b/ports/stm32/modmachine.c
index f9fd1d9a6..eae7b22b2 100644
--- a/ports/stm32/modmachine.c
+++ b/ports/stm32/modmachine.c
@@ -57,7 +57,7 @@
#include "uart.h"
#include "wdt.h"
-#if defined(STM32L0)
+#if defined(STM32L0) || defined(STM32L1)
// L0 does not have a BOR, so use POR instead
#define RCC_CSR_BORRSTF RCC_CSR_PORRSTF
#endif
@@ -68,71 +68,87 @@
#endif
#if defined(STM32H7)
-#define RCC_SR RSR
+#define RCC_SR RSR
#define RCC_SR_IWDGRSTF RCC_RSR_IWDG1RSTF
#define RCC_SR_WWDGRSTF RCC_RSR_WWDG1RSTF
-#define RCC_SR_PORRSTF RCC_RSR_PORRSTF
-#define RCC_SR_BORRSTF RCC_RSR_BORRSTF
-#define RCC_SR_PINRSTF RCC_RSR_PINRSTF
-#define RCC_SR_RMVF RCC_RSR_RMVF
+#define RCC_SR_PORRSTF RCC_RSR_PORRSTF
+#define RCC_SR_BORRSTF RCC_RSR_BORRSTF
+#define RCC_SR_PINRSTF RCC_RSR_PINRSTF
+#define RCC_SR_RMVF RCC_RSR_RMVF
#else
-#define RCC_SR CSR
+#define RCC_SR CSR
#define RCC_SR_IWDGRSTF RCC_CSR_IWDGRSTF
#define RCC_SR_WWDGRSTF RCC_CSR_WWDGRSTF
-#define RCC_SR_PORRSTF RCC_CSR_PORRSTF
-#define RCC_SR_BORRSTF RCC_CSR_BORRSTF
-#define RCC_SR_PINRSTF RCC_CSR_PINRSTF
-#define RCC_SR_RMVF RCC_CSR_RMVF
+#define RCC_SR_PORRSTF RCC_CSR_PORRSTF
+#define RCC_SR_BORRSTF RCC_CSR_BORRSTF
+#define RCC_SR_PINRSTF RCC_CSR_PINRSTF
+#define RCC_SR_RMVF RCC_CSR_RMVF
#endif
-#define PYB_RESET_SOFT (0)
-#define PYB_RESET_POWER_ON (1)
-#define PYB_RESET_HARD (2)
-#define PYB_RESET_WDT (3)
+#define PYB_RESET_SOFT (0)
+#define PYB_RESET_POWER_ON (1)
+#define PYB_RESET_HARD (2)
+#define PYB_RESET_WDT (3)
#define PYB_RESET_DEEPSLEEP (4)
STATIC uint32_t reset_cause;
-void machine_init(void) {
- #if defined(STM32F4)
- if (PWR->CSR & PWR_CSR_SBF) {
+void machine_init(void)
+{
+#if defined(STM32F4)
+ if (PWR->CSR & PWR_CSR_SBF)
+ {
// came out of standby
reset_cause = PYB_RESET_DEEPSLEEP;
PWR->CR |= PWR_CR_CSBF;
- } else
- #elif defined(STM32F7)
- if (PWR->CSR1 & PWR_CSR1_SBF) {
+ }
+ else
+#elif defined(STM32F7)
+ if (PWR->CSR1 & PWR_CSR1_SBF)
+ {
// came out of standby
reset_cause = PYB_RESET_DEEPSLEEP;
PWR->CR1 |= PWR_CR1_CSBF;
- } else
- #elif defined(STM32H7)
- if (PWR->CPUCR & PWR_CPUCR_SBF || PWR->CPUCR & PWR_CPUCR_STOPF) {
+ }
+ else
+#elif defined(STM32H7)
+ if (PWR->CPUCR & PWR_CPUCR_SBF || PWR->CPUCR & PWR_CPUCR_STOPF)
+ {
// came out of standby or stop mode
reset_cause = PYB_RESET_DEEPSLEEP;
PWR->CPUCR |= PWR_CPUCR_CSSF;
- } else
- #elif defined(STM32L4)
- if (PWR->SR1 & PWR_SR1_SBF) {
+ }
+ else
+#elif defined(STM32L4)
+ if (PWR->SR1 & PWR_SR1_SBF)
+ {
// came out of standby
reset_cause = PYB_RESET_DEEPSLEEP;
PWR->SCR |= PWR_SCR_CSBF;
- } else
- #endif
+ }
+ else
+#endif
{
// get reset cause from RCC flags
uint32_t state = RCC->RCC_SR;
- if (state & RCC_SR_IWDGRSTF || state & RCC_SR_WWDGRSTF) {
+ if (state & RCC_SR_IWDGRSTF || state & RCC_SR_WWDGRSTF)
+ {
reset_cause = PYB_RESET_WDT;
- } else if (state & RCC_SR_PORRSTF
- #if !defined(STM32F0) && !defined(STM32F412Zx)
- || state & RCC_SR_BORRSTF
- #endif
- ) {
+ }
+ else if (state & RCC_SR_PORRSTF
+#if !defined(STM32F0) && !defined(STM32F412Zx)
+ || state & RCC_SR_BORRSTF
+#endif
+ )
+ {
reset_cause = PYB_RESET_POWER_ON;
- } else if (state & RCC_SR_PINRSTF) {
+ }
+ else if (state & RCC_SR_PINRSTF)
+ {
reset_cause = PYB_RESET_HARD;
- } else {
+ }
+ else
+ {
// default is soft reset
reset_cause = PYB_RESET_SOFT;
}
@@ -141,14 +157,16 @@ void machine_init(void) {
RCC->RCC_SR |= RCC_SR_RMVF;
}
-void machine_deinit(void) {
+void machine_deinit(void)
+{
// we are doing a soft-reset so change the reset_cause
reset_cause = PYB_RESET_SOFT;
}
// machine.info([dump_alloc_table])
// Print out lots of information about the board.
-STATIC mp_obj_t machine_info(size_t n_args, const mp_obj_t *args) {
+STATIC mp_obj_t machine_info(size_t n_args, const mp_obj_t *args)
+{
// get and print unique id; 96 bits
{
byte *id = (byte *)MP_HAL_UNIQUE_ID_ADDRESS;
@@ -160,18 +178,18 @@ STATIC mp_obj_t machine_info(size_t n_args, const mp_obj_t *args) {
// get and print clock speeds
// SYSCLK=168MHz, HCLK=168MHz, PCLK1=42MHz, PCLK2=84MHz
{
- #if defined(STM32F0)
+#if defined(STM32F0)
printf("S=%u\nH=%u\nP1=%u\n",
- (unsigned int)HAL_RCC_GetSysClockFreq(),
- (unsigned int)HAL_RCC_GetHCLKFreq(),
- (unsigned int)HAL_RCC_GetPCLK1Freq());
- #else
+ (unsigned int)HAL_RCC_GetSysClockFreq(),
+ (unsigned int)HAL_RCC_GetHCLKFreq(),
+ (unsigned int)HAL_RCC_GetPCLK1Freq());
+#else
printf("S=%u\nH=%u\nP1=%u\nP2=%u\n",
- (unsigned int)HAL_RCC_GetSysClockFreq(),
- (unsigned int)HAL_RCC_GetHCLKFreq(),
- (unsigned int)HAL_RCC_GetPCLK1Freq(),
- (unsigned int)HAL_RCC_GetPCLK2Freq());
- #endif
+ (unsigned int)HAL_RCC_GetSysClockFreq(),
+ (unsigned int)HAL_RCC_GetHCLKFreq(),
+ (unsigned int)HAL_RCC_GetPCLK1Freq(),
+ (unsigned int)HAL_RCC_GetPCLK2Freq());
+#endif
}
// to print info about memory
@@ -209,9 +227,11 @@ STATIC mp_obj_t machine_info(size_t n_args, const mp_obj_t *args) {
// free space on flash
{
- #if MICROPY_VFS_FAT
- for (mp_vfs_mount_t *vfs = MP_STATE_VM(vfs_mount_table); vfs != NULL; vfs = vfs->next) {
- if (strncmp("/flash", vfs->str, vfs->len) == 0) {
+#if MICROPY_VFS_FAT
+ for (mp_vfs_mount_t *vfs = MP_STATE_VM(vfs_mount_table); vfs != NULL; vfs = vfs->next)
+ {
+ if (strncmp("/flash", vfs->str, vfs->len) == 0)
+ {
// assumes that it's a FatFs filesystem
fs_user_mount_t *vfs_fat = MP_OBJ_TO_PTR(vfs->obj);
DWORD nclst;
@@ -220,14 +240,15 @@ STATIC mp_obj_t machine_info(size_t n_args, const mp_obj_t *args) {
break;
}
}
- #endif
+#endif
}
- #if MICROPY_PY_THREAD
+#if MICROPY_PY_THREAD
pyb_thread_dump();
- #endif
+#endif
- if (n_args == 1) {
+ if (n_args == 1)
+ {
// arg given means dump gc allocation table
gc_dump_alloc_table();
}
@@ -237,43 +258,49 @@ STATIC mp_obj_t machine_info(size_t n_args, const mp_obj_t *args) {
MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_info_obj, 0, 1, machine_info);
// Returns a string of 12 bytes (96 bits), which is the unique ID for the MCU.
-STATIC mp_obj_t machine_unique_id(void) {
+STATIC mp_obj_t machine_unique_id(void)
+{
byte *id = (byte *)MP_HAL_UNIQUE_ID_ADDRESS;
return mp_obj_new_bytes(id, 12);
}
MP_DEFINE_CONST_FUN_OBJ_0(machine_unique_id_obj, machine_unique_id);
// Resets the pyboard in a manner similar to pushing the external RESET button.
-STATIC mp_obj_t machine_reset(void) {
+STATIC mp_obj_t machine_reset(void)
+{
powerctrl_mcu_reset();
return mp_const_none;
}
MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset);
-STATIC mp_obj_t machine_soft_reset(void) {
+STATIC mp_obj_t machine_soft_reset(void)
+{
pyexec_system_exit = PYEXEC_FORCED_EXIT;
mp_raise_type(&mp_type_SystemExit);
}
MP_DEFINE_CONST_FUN_OBJ_0(machine_soft_reset_obj, machine_soft_reset);
// Activate the bootloader without BOOT* pins.
-STATIC NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args) {
- #if MICROPY_HW_ENABLE_USB
+STATIC NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args)
+{
+#if MICROPY_HW_ENABLE_USB
pyb_usb_dev_deinit();
- #endif
- #if MICROPY_HW_ENABLE_STORAGE
+#endif
+#if MICROPY_HW_ENABLE_STORAGE
storage_flush();
- #endif
+#endif
__disable_irq();
- #if MICROPY_HW_USES_BOOTLOADER
- if (n_args == 0 || !mp_obj_is_true(args[0])) {
+#if MICROPY_HW_USES_BOOTLOADER
+ if (n_args == 0 || !mp_obj_is_true(args[0]))
+ {
// By default, with no args given, we enter the custom bootloader (mboot)
powerctrl_enter_bootloader(0x70ad0000, 0x08000000);
}
- if (n_args == 1 && mp_obj_is_str_or_bytes(args[0])) {
+ if (n_args == 1 && mp_obj_is_str_or_bytes(args[0]))
+ {
// With a string/bytes given, pass its data to the custom bootloader
size_t len;
const char *data = mp_obj_str_get_data(args[0], &len);
@@ -281,70 +308,82 @@ STATIC NORETURN mp_obj_t machine_bootloader(size_t n_args, const mp_obj_t *args)
memmove(mboot_region, data, len);
powerctrl_enter_bootloader(0x70ad0080, 0x08000000);
}
- #endif
+#endif
- #if defined(STM32F7) || defined(STM32H7)
+#if defined(STM32F7) || defined(STM32H7)
powerctrl_enter_bootloader(0, 0x1ff00000);
- #else
+#else
powerctrl_enter_bootloader(0, 0x00000000);
- #endif
+#endif
- while (1) {
+ while (1)
+ {
;
}
}
MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_bootloader_obj, 0, 1, machine_bootloader);
// get or set the MCU frequencies
-STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) {
- if (n_args == 0) {
+STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args)
+{
+ if (n_args == 0)
+ {
// get
mp_obj_t tuple[] = {
mp_obj_new_int(HAL_RCC_GetSysClockFreq()),
mp_obj_new_int(HAL_RCC_GetHCLKFreq()),
mp_obj_new_int(HAL_RCC_GetPCLK1Freq()),
- #if !defined(STM32F0)
+#if !defined(STM32F0)
mp_obj_new_int(HAL_RCC_GetPCLK2Freq()),
- #endif
+#endif
};
return mp_obj_new_tuple(MP_ARRAY_SIZE(tuple), tuple);
- } else {
- // set
- #if defined(STM32F0) || defined(STM32L0) || defined(STM32L4)
+ }
+ else
+ {
+// set
+#if defined(STM32F0) || defined(STM32L0) || defined(STM32L4) || defined(STM32L1)
mp_raise_NotImplementedError(MP_ERROR_TEXT("machine.freq set not supported yet"));
- #else
+#else
mp_int_t sysclk = mp_obj_get_int(args[0]);
mp_int_t ahb = sysclk;
- #if defined(STM32H7)
- if (ahb > 200000000) {
+#if defined(STM32H7)
+ if (ahb > 200000000)
+ {
ahb /= 2;
}
- #endif
- #if defined(STM32WB)
+#endif
+#if defined(STM32WB)
mp_int_t apb1 = ahb;
mp_int_t apb2 = ahb;
- #else
+#else
mp_int_t apb1 = ahb / 4;
mp_int_t apb2 = ahb / 2;
- #endif
- if (n_args > 1) {
+#endif
+ if (n_args > 1)
+ {
ahb = mp_obj_get_int(args[1]);
- if (n_args > 2) {
+ if (n_args > 2)
+ {
apb1 = mp_obj_get_int(args[2]);
- if (n_args > 3) {
+ if (n_args > 3)
+ {
apb2 = mp_obj_get_int(args[3]);
}
}
}
int ret = powerctrl_set_sysclk(sysclk, ahb, apb1, apb2);
- if (ret == -MP_EINVAL) {
+ if (ret == -MP_EINVAL)
+ {
mp_raise_ValueError(MP_ERROR_TEXT("invalid freq"));
- } else if (ret < 0) {
+ }
+ else if (ret < 0)
+ {
void NORETURN __fatal_error(const char *msg);
__fatal_error("can't change freq");
}
return mp_const_none;
- #endif
+#endif
}
}
MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj, 0, 4, machine_freq);
@@ -352,14 +391,17 @@ MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_freq_obj, 0, 4, machine_freq);
// idle()
// This executies a wfi machine instruction which reduces power consumption
// of the MCU until an interrupt occurs, at which point execution continues.
-STATIC mp_obj_t machine_idle(void) {
+STATIC mp_obj_t machine_idle(void)
+{
__WFI();
return mp_const_none;
}
MP_DEFINE_CONST_FUN_OBJ_0(machine_idle_obj, machine_idle);
-STATIC mp_obj_t machine_lightsleep(size_t n_args, const mp_obj_t *args) {
- if (n_args != 0) {
+STATIC mp_obj_t machine_lightsleep(size_t n_args, const mp_obj_t *args)
+{
+ if (n_args != 0)
+ {
mp_obj_t args2[2] = {MP_OBJ_NULL, args[0]};
pyb_rtc_wakeup(2, args2);
}
@@ -368,8 +410,10 @@ STATIC mp_obj_t machine_lightsleep(size_t n_args, const mp_obj_t *args) {
}
MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_lightsleep_obj, 0, 1, machine_lightsleep);
-STATIC mp_obj_t machine_deepsleep(size_t n_args, const mp_obj_t *args) {
- if (n_args != 0) {
+STATIC mp_obj_t machine_deepsleep(size_t n_args, const mp_obj_t *args)
+{
+ if (n_args != 0)
+ {
mp_obj_t args2[2] = {MP_OBJ_NULL, args[0]};
pyb_rtc_wakeup(2, args2);
}
@@ -378,63 +422,64 @@ STATIC mp_obj_t machine_deepsleep(size_t n_args, const mp_obj_t *args) {
}
MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_deepsleep_obj, 0, 1, machine_deepsleep);
-STATIC mp_obj_t machine_reset_cause(void) {
+STATIC mp_obj_t machine_reset_cause(void)
+{
return MP_OBJ_NEW_SMALL_INT(reset_cause);
}
STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause);
STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
- { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_umachine) },
- { MP_ROM_QSTR(MP_QSTR_info), MP_ROM_PTR(&machine_info_obj) },
- { MP_ROM_QSTR(MP_QSTR_unique_id), MP_ROM_PTR(&machine_unique_id_obj) },
- { MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&machine_reset_obj) },
- { MP_ROM_QSTR(MP_QSTR_soft_reset), MP_ROM_PTR(&machine_soft_reset_obj) },
- { MP_ROM_QSTR(MP_QSTR_bootloader), MP_ROM_PTR(&machine_bootloader_obj) },
- { MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&machine_freq_obj) },
- #if MICROPY_HW_ENABLE_RNG
- { MP_ROM_QSTR(MP_QSTR_rng), MP_ROM_PTR(&pyb_rng_get_obj) },
- #endif
- { MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&machine_idle_obj) },
- { MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&machine_lightsleep_obj) },
- { MP_ROM_QSTR(MP_QSTR_lightsleep), MP_ROM_PTR(&machine_lightsleep_obj) },
- { MP_ROM_QSTR(MP_QSTR_deepsleep), MP_ROM_PTR(&machine_deepsleep_obj) },
- { MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) },
- #if 0
+ {MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_umachine)},
+ {MP_ROM_QSTR(MP_QSTR_info), MP_ROM_PTR(&machine_info_obj)},
+ {MP_ROM_QSTR(MP_QSTR_unique_id), MP_ROM_PTR(&machine_unique_id_obj)},
+ {MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&machine_reset_obj)},
+ {MP_ROM_QSTR(MP_QSTR_soft_reset), MP_ROM_PTR(&machine_soft_reset_obj)},
+ {MP_ROM_QSTR(MP_QSTR_bootloader), MP_ROM_PTR(&machine_bootloader_obj)},
+ {MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&machine_freq_obj)},
+#if MICROPY_HW_ENABLE_RNG
+ {MP_ROM_QSTR(MP_QSTR_rng), MP_ROM_PTR(&pyb_rng_get_obj)},
+#endif
+ {MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&machine_idle_obj)},
+ {MP_ROM_QSTR(MP_QSTR_sleep), MP_ROM_PTR(&machine_lightsleep_obj)},
+ {MP_ROM_QSTR(MP_QSTR_lightsleep), MP_ROM_PTR(&machine_lightsleep_obj)},
+ {MP_ROM_QSTR(MP_QSTR_deepsleep), MP_ROM_PTR(&machine_deepsleep_obj)},
+ {MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj)},
+#if 0
{ MP_ROM_QSTR(MP_QSTR_wake_reason), MP_ROM_PTR(&machine_wake_reason_obj) },
- #endif
-
- { MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&machine_disable_irq_obj) },
- { MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&machine_enable_irq_obj) },
-
- #if MICROPY_PY_MACHINE_PULSE
- { MP_ROM_QSTR(MP_QSTR_time_pulse_us), MP_ROM_PTR(&machine_time_pulse_us_obj) },
- #endif
-
- { MP_ROM_QSTR(MP_QSTR_mem8), MP_ROM_PTR(&machine_mem8_obj) },
- { MP_ROM_QSTR(MP_QSTR_mem16), MP_ROM_PTR(&machine_mem16_obj) },
- { MP_ROM_QSTR(MP_QSTR_mem32), MP_ROM_PTR(&machine_mem32_obj) },
-
- { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&pin_type) },
- { MP_ROM_QSTR(MP_QSTR_Signal), MP_ROM_PTR(&machine_signal_type) },
-
- { MP_ROM_QSTR(MP_QSTR_RTC), MP_ROM_PTR(&pyb_rtc_type) },
- { MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&machine_adc_type) },
- #if MICROPY_PY_MACHINE_I2C
- #if MICROPY_HW_ENABLE_HW_I2C
- { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&machine_hard_i2c_type) },
- #else
- { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&mp_machine_soft_i2c_type) },
- #endif
- { MP_ROM_QSTR(MP_QSTR_SoftI2C), MP_ROM_PTR(&mp_machine_soft_i2c_type) },
- #endif
- #if MICROPY_PY_MACHINE_SPI
- { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&machine_hard_spi_type) },
- { MP_ROM_QSTR(MP_QSTR_SoftSPI), MP_ROM_PTR(&mp_machine_soft_spi_type) },
- #endif
- { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&pyb_uart_type) },
- { MP_ROM_QSTR(MP_QSTR_WDT), MP_ROM_PTR(&pyb_wdt_type) },
- { MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&machine_timer_type) },
- #if 0
+#endif
+
+ {MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&machine_disable_irq_obj)},
+ {MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&machine_enable_irq_obj)},
+
+#if MICROPY_PY_MACHINE_PULSE
+ {MP_ROM_QSTR(MP_QSTR_time_pulse_us), MP_ROM_PTR(&machine_time_pulse_us_obj)},
+#endif
+
+ {MP_ROM_QSTR(MP_QSTR_mem8), MP_ROM_PTR(&machine_mem8_obj)},
+ {MP_ROM_QSTR(MP_QSTR_mem16), MP_ROM_PTR(&machine_mem16_obj)},
+ {MP_ROM_QSTR(MP_QSTR_mem32), MP_ROM_PTR(&machine_mem32_obj)},
+
+ {MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&pin_type)},
+ {MP_ROM_QSTR(MP_QSTR_Signal), MP_ROM_PTR(&machine_signal_type)},
+
+ {MP_ROM_QSTR(MP_QSTR_RTC), MP_ROM_PTR(&pyb_rtc_type)},
+ {MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&machine_adc_type)},
+#if MICROPY_PY_MACHINE_I2C
+#if MICROPY_HW_ENABLE_HW_I2C
+ {MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&machine_hard_i2c_type)},
+#else
+ {MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&mp_machine_soft_i2c_type)},
+#endif
+ {MP_ROM_QSTR(MP_QSTR_SoftI2C), MP_ROM_PTR(&mp_machine_soft_i2c_type)},
+#endif
+#if MICROPY_PY_MACHINE_SPI
+ {MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&machine_hard_spi_type)},
+ {MP_ROM_QSTR(MP_QSTR_SoftSPI), MP_ROM_PTR(&mp_machine_soft_spi_type)},
+#endif
+ {MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&pyb_uart_type)},
+ {MP_ROM_QSTR(MP_QSTR_WDT), MP_ROM_PTR(&pyb_wdt_type)},
+ {MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&machine_timer_type)},
+#if 0
{ MP_ROM_QSTR(MP_QSTR_HeartBeat), MP_ROM_PTR(&pyb_heartbeat_type) },
{ MP_ROM_QSTR(MP_QSTR_SD), MP_ROM_PTR(&pyb_sd_type) },
@@ -442,23 +487,22 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
{ MP_ROM_QSTR(MP_QSTR_IDLE), MP_ROM_INT(PYB_PWR_MODE_ACTIVE) },
{ MP_ROM_QSTR(MP_QSTR_SLEEP), MP_ROM_INT(PYB_PWR_MODE_LPDS) },
{ MP_ROM_QSTR(MP_QSTR_DEEPSLEEP), MP_ROM_INT(PYB_PWR_MODE_HIBERNATE) },
- #endif
- { MP_ROM_QSTR(MP_QSTR_PWRON_RESET), MP_ROM_INT(PYB_RESET_POWER_ON) },
- { MP_ROM_QSTR(MP_QSTR_HARD_RESET), MP_ROM_INT(PYB_RESET_HARD) },
- { MP_ROM_QSTR(MP_QSTR_WDT_RESET), MP_ROM_INT(PYB_RESET_WDT) },
- { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP_RESET), MP_ROM_INT(PYB_RESET_DEEPSLEEP) },
- { MP_ROM_QSTR(MP_QSTR_SOFT_RESET), MP_ROM_INT(PYB_RESET_SOFT) },
- #if 0
+#endif
+ {MP_ROM_QSTR(MP_QSTR_PWRON_RESET), MP_ROM_INT(PYB_RESET_POWER_ON)},
+ {MP_ROM_QSTR(MP_QSTR_HARD_RESET), MP_ROM_INT(PYB_RESET_HARD)},
+ {MP_ROM_QSTR(MP_QSTR_WDT_RESET), MP_ROM_INT(PYB_RESET_WDT)},
+ {MP_ROM_QSTR(MP_QSTR_DEEPSLEEP_RESET), MP_ROM_INT(PYB_RESET_DEEPSLEEP)},
+ {MP_ROM_QSTR(MP_QSTR_SOFT_RESET), MP_ROM_INT(PYB_RESET_SOFT)},
+#if 0
{ MP_ROM_QSTR(MP_QSTR_WLAN_WAKE), MP_ROM_INT(PYB_SLP_WAKED_BY_WLAN) },
{ MP_ROM_QSTR(MP_QSTR_PIN_WAKE), MP_ROM_INT(PYB_SLP_WAKED_BY_GPIO) },
{ MP_ROM_QSTR(MP_QSTR_RTC_WAKE), MP_ROM_INT(PYB_SLP_WAKED_BY_RTC) },
- #endif
+#endif
};
STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table);
const mp_obj_module_t machine_module = {
- .base = { &mp_type_module },
+ .base = {&mp_type_module},
.globals = (mp_obj_dict_t *)&machine_module_globals,
};
-
diff --git a/ports/stm32/rtc.c b/ports/stm32/rtc.c
index 02b0f2dbd..cf767512c 100644
--- a/ports/stm32/rtc.c
+++ b/ports/stm32/rtc.c
@@ -82,7 +82,7 @@ STATIC bool rtc_use_lse = false;
STATIC uint32_t rtc_startup_tick;
STATIC bool rtc_need_init_finalise = false;
-#if defined(STM32L0)
+#if defined(STM32L0) || defined(STM32L1)
#define BDCR CSR
#define RCC_BDCR_RTCEN RCC_CSR_RTCEN
#define RCC_BDCR_RTCSEL RCC_CSR_RTCSEL
diff --git a/ports/stm32/system_stm32.c b/ports/stm32/system_stm32.c
index 2160e0ac9..6264290a1 100644
--- a/ports/stm32/system_stm32.c
+++ b/ports/stm32/system_stm32.c
@@ -78,7 +78,7 @@
#include "py/mphal.h"
#include "powerctrl.h"
-#if defined(STM32F4) || defined(STM32F7) || defined(STM32H7) || defined(STM32L4)
+#if defined(STM32F4) || defined(STM32F7) || defined(STM32H7) || defined(STM32L4) || defined(STM32L1)
void __fatal_error(const char *msg);
@@ -190,7 +190,7 @@ void SystemClock_Config(void) {
clocked below the maximum system frequency, to update the voltage scaling value
regarding system frequency refer to product datasheet. */
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
- #elif defined(STM32L4)
+ #elif defined(STM32L4) || defined(STM32L1)
// Configure LSE Drive Capability
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
#endif
@@ -211,7 +211,7 @@ void SystemClock_Config(void) {
RCC_OscInitStruct.CSIState = RCC_CSI_OFF;
#endif
RCC_OscInitStruct.PLL.PLLSource = MICROPY_HW_RCC_PLL_SRC;
- #elif defined(STM32L4)
+ #elif defined(STM32L4) || defined(STM32L1)
#if MICROPY_HW_CLK_USE_HSE
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
@@ -293,7 +293,7 @@ void SystemClock_Config(void) {
RCC_OscInitStruct.PLL.PLLN = MICROPY_HW_CLK_PLLN;
RCC_OscInitStruct.PLL.PLLP = MICROPY_HW_CLK_PLLP;
RCC_OscInitStruct.PLL.PLLQ = MICROPY_HW_CLK_PLLQ;
- #if defined(STM32L4) || defined(STM32H7)
+ #if defined(STM32L4) || defined(STM32H7) || defined(STM32L1)
RCC_OscInitStruct.PLL.PLLR = MICROPY_HW_CLK_PLLR;
#endif
@@ -307,7 +307,7 @@ void SystemClock_Config(void) {
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
- #elif defined(STM32L4)
+ #elif defined(STM32L4) || defined(STM32L1)
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
@@ -370,7 +370,7 @@ void SystemClock_Config(void) {
HAL_PWREx_EnableUSBVoltageDetector();
#endif
- #if defined(STM32L4)
+ #if defined(STM32L4) || defined(STM32L1)
// Enable MSI-Hardware auto calibration mode with LSE
HAL_RCCEx_EnableMSIPLLMode();
diff --git a/ports/stm32/uart.c b/ports/stm32/uart.c
index d40a883c5..43a81eb5f 100644
--- a/ports/stm32/uart.c
+++ b/ports/stm32/uart.c
@@ -38,7 +38,7 @@
#include "irq.h"
#include "pendsv.h"
-#if defined(STM32F4)
+#if defined(STM32F4) || defined(STM32L1)
#define UART_RXNE_IS_SET(uart) ((uart)->SR & USART_SR_RXNE)
#elif defined(STM32H7)
#define UART_RXNE_IS_SET(uart) ((uart)->ISR & USART_ISR_RXNE_RXFNE)
@@ -57,7 +57,7 @@
#define USART_CR2_IE_ALL (USART_CR2_IE_BASE)
#define USART_CR3_IE_ALL (USART_CR3_IE_BASE | USART_CR3_WUFIE)
-#elif defined(STM32F4)
+#elif defined(STM32F4) || defined(STM32L1)
#define USART_CR1_IE_ALL (USART_CR1_IE_BASE)
#define USART_CR2_IE_ALL (USART_CR2_IE_BASE)
#define USART_CR3_IE_ALL (USART_CR3_IE_BASE)
@@ -76,6 +76,7 @@
#define USART_CR2_IE_ALL (USART_CR2_IE_BASE)
#define USART_CR3_IE_ALL (USART_CR3_IE_BASE | USART_CR3_RXFTIE | USART_CR3_TCBGTIE | USART_CR3_TXFTIE | USART_CR3_WUFIE)
+// The STM32L1 should be defined more correctly! Just making it the same as the L0 to get started...
#elif defined(STM32L0)
#define USART_CR1_IE_ALL (USART_CR1_IE_BASE | USART_CR1_EOBIE | USART_CR1_RTOIE | USART_CR1_CMIE)
#define USART_CR2_IE_ALL (USART_CR2_IE_BASE)
@@ -291,7 +292,7 @@ bool uart_init(pyb_uart_obj_t *uart_obj,
irqn = USART4_5_IRQn;
__HAL_RCC_USART4_CLK_ENABLE();
#else
- UARTx = UART4;
+ UARTx = USART4;
irqn = UART4_IRQn;
__HAL_RCC_UART4_CLK_ENABLE();
#endif
@@ -808,7 +809,7 @@ STATIC bool uart_wait_flag_set(pyb_uart_obj_t *self, uint32_t flag, uint32_t tim
// an interrupt and the flag can be set quickly if the baudrate is large.
uint32_t start = HAL_GetTick();
for (;;) {
- #if defined(STM32F4)
+ #if defined(STM32F4) || defined(STM32L1)
if (self->uartx->SR & flag) {
return true;
}
@@ -863,7 +864,7 @@ size_t uart_tx_data(pyb_uart_obj_t *self, const void *src_in, size_t num_chars,
} else {
data = *src++;
}
- #if defined(STM32F4)
+ #if defined(STM32F4) || defined(STM32L1)
uart->DR = data;
#else
uart->TDR = data;
@@ -926,7 +927,7 @@ void uart_irq_handler(mp_uint_t uart_id) {
}
}
// If RXNE is clear but ORE set then clear the ORE flag (it's tied to RXNE IRQ)
- #if defined(STM32F4)
+ #if defined(STM32F4) || defined(STM32L1)
else if (self->uartx->SR & USART_SR_ORE) {
(void)self->uartx->DR;
}
@@ -938,7 +939,7 @@ void uart_irq_handler(mp_uint_t uart_id) {
// Set user IRQ flags
self->mp_irq_flags = 0;
- #if defined(STM32F4)
+ #if defined(STM32F4) || defined(STM32L1)
if (self->uartx->SR & USART_SR_IDLE) {
(void)self->uartx->SR;
(void)self->uartx->DR;
diff --git a/ports/stm32/usb.c b/ports/stm32/usb.c
index 5003bb27c..9933c6ee1 100644
--- a/ports/stm32/usb.c
+++ b/ports/stm32/usb.c
@@ -62,7 +62,7 @@
#define MAX_ENDPOINT(dev_id) (7)
#elif defined(STM32L4)
#define MAX_ENDPOINT(dev_id) (5)
-#elif defined(STM32F4)
+#elif defined(STM32F4) || defined(STM32L1) // No idea if this is correct for L1
#define MAX_ENDPOINT(dev_id) ((dev_id) == USB_PHY_FS_ID ? 3 : 5)
#elif defined(STM32F7)
#define MAX_ENDPOINT(dev_id) ((dev_id) == USB_PHY_FS_ID ? 5 : 8)
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