Simple verilog file where a switch is used to control the state of an LED through an fpga. 100 MHZ clock is used, this doesn't matter though.

led_switch.v

`timescale 1ns / 1ps

module led_switch(
    output reg led0_r,
    input CLK100MHZ,
    input  btn
    );
    
    reg tickedLastFrame = 1'b0;
    
    always@ (posedge CLK100MHZ) begin
    
    if(btn)
    begin 
        if(!tickedLastFrame) begin
        led0_r = ~led0_r;
        tickedLastFrame = 1'b1;
        end
    end
    else begin
    tickedLastFrame = 1'b0;
    end
    
    
  
    end
    
endmodule