address-decoder-1.pld

Name     address-decoder-16v8 ;
PartNo   00 ;
Date     2014-10-20 ;
Revision 01 ;
Designer Maciej Bartosiak ;
Company  m ;
Assembly None ;
Location  ;
Device   g16v8a;

/* *************** INPUT PINS ***************************/
pin	1 = PHI2	; /* clock PHI2 		*/ 
pin	2 = RW		; /* RW signala from 65c02	*/ 
pin	[3..5] = [A15..A13];


/* *************** OUTPUT PINS ***************************/

pin 14 = !RAM   ; /* RAM   0000 7FFF 0... .... .... .... */
pin 15 = LCD    ; /* LCD   8000 9FFF 100. .... .... .... */
pin 16 = !VIA_1 ; /* VIA_1 A000 CFFF 101. .... .... .... */
pin 17 = !VIA_2 ; /* VIA_2 D000 DFFF 110. .... .... .... */
pin 18 = !ROM   ; /* ROM   E000 FFFF 111. .... .... .... */
pin 19 = !OE    ; /* */

/* *************** LOGIC *********************************/

OE = RW;

RAM	= !A15 & PHI2;
LCD	= A15 & !A14 & !A13 & PHI2;
VIA_1	= A15 & !A14 &  A13;
VIA_2	= A15 &  A14 & !A13;
ROM	= A15 &  A14 &  A13;