Patches that add MIPS machine SoC_up to QEMU

0001-add-mips-soc_up-machine.patch

From e0e288c703dd03301ea23dee05a4ca235e119a7e Mon Sep 17 00:00:00 2001
From: Jiang XueQian <jiangxueqian@gmail.com>
Date: Fri, 6 Apr 2018 20:32:35 +0800
Subject: [PATCH] add mips soc_up machine

---
 default-configs/mips-softmmu-common.mak |   4 +
 hw/mips/Makefile.objs                   |   2 +-
 hw/mips/mips_socup.c                    | 310 ++++++++++++++++++++++++++++++++
 3 files changed, 315 insertions(+), 1 deletion(-)
 create mode 100644 hw/mips/mips_socup.c

diff --git a/default-configs/mips-softmmu-common.mak b/default-configs/mips-softmmu-common.mak
index 7d8f5db..9aa0331 100644
--- a/default-configs/mips-softmmu-common.mak
+++ b/default-configs/mips-softmmu-common.mak
@@ -34,3 +34,7 @@ CONFIG_ISA_TESTDEV=y
 CONFIG_EMPTY_SLOT=y
 CONFIG_MIPS_CPS=y
 CONFIG_MIPS_ITU=y
+
+CONFIG_PTIMER=y
+CONFIG_XILINX=y
+CONFIG_XILINX_AXI=y
diff --git a/hw/mips/Makefile.objs b/hw/mips/Makefile.objs
index 17a311a..907bf72 100644
--- a/hw/mips/Makefile.objs
+++ b/hw/mips/Makefile.objs
@@ -1,4 +1,4 @@
-obj-y += mips_r4k.o mips_malta.o mips_mipssim.o
+obj-y += mips_r4k.o mips_malta.o mips_mipssim.o mips_socup.o
 obj-y += addr.o mips_int.o
 obj-$(CONFIG_JAZZ) += mips_jazz.o
 obj-$(CONFIG_FULONG) += mips_fulong2e.o
diff --git a/hw/mips/mips_socup.c b/hw/mips/mips_socup.c
new file mode 100644
index 0000000..2dedc0c
--- /dev/null
+++ b/hw/mips/mips_socup.c
@@ -0,0 +1,310 @@
+/*
+ * Virtual machine similar to loongson soc_up, based on mipssim.
+ * Apr 4, 2018 Jiang XueQian <jiangxueqian@gmail.com>
+ *
+ * Memory map:
+ *    +------------+------------+-----------------------------+--------+
+ *    |    begin   |     end    |             desc            | status |
+ *    +------------+------------+-----------------------------+--------+
+ *    | 0xbfc00000 | 0xbfcfffff | SPI flash (1MB)             |   o    |
+ *    | 0xbfd00000 | 0xbfd0ffff | GPIO (64KB)                 |   x    |
+ *    | 0xbfd01160 |      x     | Nand flash DMA control      |   x    |
+ *    | 0xbfe40000 | 0xbfe43fff | UART 16550 (16KB)           |   o    |
+ *    | 0xbfe78000 | 0xbfe7bfff | Nand flash (16KB)           |   x    |
+ *    | 0xbff00000 | 0xbff0ffff | Network interface (64KB)    |   o    |
+ *    |      x     |  x + 128MB | Remain space mapped to DDR3 |   o    |
+ *    +------------+------------+-----------------------------+--------+
+ *
+ * Interrupts:
+ *    +-----+----------+
+ *    | int |   desc   |
+ *    +-----+----------+
+ *    | IP6 | dma_int  |
+ *    | IP5 | nand_int |
+ *    | IP4 | spi_int  |
+ *    | IP3 | uart_int |
+ *    | IP2 | nic_int  |
+ *    +-----+----------+
+ *
+ * Copyright (c) 2007 Thiemo Seufer
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "qemu-common.h"
+#include "cpu.h"
+#include "hw/hw.h"
+#include "hw/mips/mips.h"
+#include "hw/mips/cpudevs.h"
+#include "hw/char/serial.h"
+#include "hw/isa/isa.h"
+#include "net/net.h"
+#include "sysemu/sysemu.h"
+#include "hw/boards.h"
+#include "hw/mips/bios.h"
+#include "hw/loader.h"
+#include "elf.h"
+#include "hw/sysbus.h"
+#include "exec/address-spaces.h"
+#include "qemu/error-report.h"
+#include "sysemu/qtest.h"
+
+#define SPI_FLASH_SIZE (1024 * 1024) // 1MB
+
+typedef struct ResetData {
+    MIPSCPU *cpu;
+    uint64_t vector;
+} ResetData;
+
+static struct _loaderparams {
+    int ram_size;
+    const char *kernel_filename;
+    const char *kernel_cmdline;
+    const char *initrd_filename;
+} loaderparams;
+
+static int64_t load_kernel(void)
+{
+    int64_t entry, kernel_high;
+    long kernel_size;
+    long initrd_size;
+    ram_addr_t initrd_offset;
+    int big_endian;
+
+#ifdef TARGET_WORDS_BIGENDIAN
+    big_endian = 1;
+#else
+    big_endian = 0;
+#endif
+
+    kernel_size = load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys,
+            NULL, (uint64_t *) & entry, NULL,
+            (uint64_t *) & kernel_high, big_endian,
+            EM_MIPS, 1, 0);
+    if (kernel_size >= 0) {
+        if ((entry & ~0x7fffffffULL) == 0x80000000)
+            entry = (int32_t) entry;
+    } else {
+        fprintf(stderr, "qemu: could not load kernel '%s'\n",
+                loaderparams.kernel_filename);
+        exit(1);
+    }
+
+    /* load initrd */
+    initrd_size = 0;
+    initrd_offset = 0;
+    if (loaderparams.initrd_filename) {
+        initrd_size = get_image_size(loaderparams.initrd_filename);
+        if (initrd_size > 0) {
+            initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK;
+            if (initrd_offset + initrd_size > loaderparams.ram_size) {
+                fprintf(stderr,
+                        "qemu: memory too small for initial ram disk '%s'\n",
+                        loaderparams.initrd_filename);
+                exit(1);
+            }
+            initrd_size = load_image_targphys(loaderparams.initrd_filename,
+                    initrd_offset, loaderparams.ram_size - initrd_offset);
+        }
+        if (initrd_size == (target_ulong) - 1) {
+            fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
+                    loaderparams.initrd_filename);
+            exit(1);
+        }
+    }
+    return entry;
+}
+
+static void main_cpu_reset(void *opaque)
+{
+    ResetData *s = (ResetData *) opaque;
+    CPUMIPSState *env = &s->cpu->env;
+
+    cpu_reset(CPU(s->cpu));
+    env->active_tc.PC = s->vector & ~(target_ulong) 1;
+    if (s->vector & 1) {
+        env->hflags |= MIPS_HFLAG_M16;
+    }
+}
+
+static void socup_net_init(hwaddr base, qemu_irq irq, NICInfo *nd)
+{
+    DeviceState *dev;
+    SysBusDevice *s;
+
+    dev = qdev_create(NULL, "xlnx.axi-ethernet");
+    qdev_set_nic_properties(dev, nd);
+    qdev_init_nofail(dev);
+
+    s = SYS_BUS_DEVICE(dev);
+    sysbus_connect_irq(s, 0, irq);
+    memory_region_add_subregion(get_system_memory(),
+            base,
+            sysbus_mmio_get_region(s, 0));
+}
+
+static void
+mips_socup_init(MachineState *machine)
+{
+    if (machine->ram_size != (128 << 20)) {
+        error_report("soc_up have 128 MB ram!\n");
+        exit(1);
+    };
+    ram_addr_t ram_size = machine->ram_size;
+    const char *kernel_filename = machine->kernel_filename;
+    const char *kernel_cmdline = machine->kernel_cmdline;
+    const char *initrd_filename = machine->initrd_filename;
+    char *filename;
+    MemoryRegion *address_space_mem = get_system_memory();
+    MemoryRegion *ram = g_new(MemoryRegion, 1);
+    MemoryRegion *bios = g_new(MemoryRegion, 1);
+    MemoryRegion *biosmapped = g_new(MemoryRegion, 1);
+    MemoryRegion *uartmapped = g_new(MemoryRegion, 1);
+    MIPSCPU *cpu;
+    CPUMIPSState *env;
+    ResetData *reset_info;
+    int bios_size;
+
+    /* Init CPUs. */
+    cpu = MIPS_CPU(cpu_create(machine->cpu_type));
+    env = &cpu->env;
+
+    reset_info = g_malloc0(sizeof (ResetData));
+    reset_info->cpu = cpu;
+    reset_info->vector = 0xbfc00000;
+    qemu_register_reset(main_cpu_reset, reset_info);
+
+    /* Allocate RAM. */
+    memory_region_allocate_system_memory(ram, NULL, "soc_up.ram",
+            ram_size);
+    memory_region_init_ram(bios, NULL, "soc_up.spiflash", SPI_FLASH_SIZE,
+            &error_fatal);
+    memory_region_init_alias(biosmapped, NULL, "soc_up.spiflash_hi", bios,
+            0, SPI_FLASH_SIZE);
+    memory_region_set_readonly(bios, true);
+
+    /* Map the BIOS / boot exception handler. */
+    memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
+    memory_region_add_subregion(address_space_mem, 0xbfc00000LL, biosmapped);
+    /* Load a BIOS / boot exception handler image. */
+    if (bios_name == NULL)
+        bios_name = BIOS_FILENAME;
+    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
+    if (filename) {
+        bios_size = load_image_targphys(filename, 0x1fc00000LL, SPI_FLASH_SIZE);
+        g_free(filename);
+    } else {
+        bios_size = -1;
+    }
+    if (bios_size < 0 && kernel_filename == NULL) {
+        /* Bail out if we have neither a kernel image nor boot vector code. */
+        error_report("Could not load SPI flash image '%s' as BIOS", bios_name);
+        exit(1);
+    } else if (bios_size > SPI_FLASH_SIZE) {
+        error_report("bios '%s' too big to fit in spi flash!", bios_name);
+    };
+
+    /* Boot from SPI flash */
+    env->active_tc.PC = (target_long) (int32_t) 0xbfc00000;
+
+    /* Init CPU internal devices. */
+    cpu_mips_irq_init_cpu(cpu);
+    cpu_mips_clock_init(cpu);
+
+    /* 16550 compatible UART */
+    SerialState *uart;
+    if (serial_hds[0]) {
+        uart = serial_init(0x1fe40000U, env->irq[3], 115200, serial_hds[0],
+                get_system_memory());
+        memory_region_init_alias(uartmapped, NULL, "soc_up.uart_hi", &uart->io,
+                0, 1024 * 16);
+        memory_region_add_subregion(address_space_mem,
+                0xbfe40000LL, uartmapped);
+    }
+
+    /* NIC */
+    if (nd_table[0].used)
+        socup_net_init(0xbff00000, env->irq[2], &nd_table[0]);
+
+    /* map memory to all addresses */
+    memory_region_add_subregion_overlap(address_space_mem,
+            0x00000000LL, ram, -100);
+    MemoryRegion *rammap;
+#define MEMMAP_ADD(n) \
+    rammap = g_new(MemoryRegion, 1); \
+    memory_region_init_alias(rammap, NULL, "soc_up.memmap" #n, \
+            ram, 0, 0x8000000); \
+    memory_region_add_subregion_overlap(address_space_mem, \
+            0x08000000LL * n, rammap, -100);
+
+    MEMMAP_ADD(1);
+    MEMMAP_ADD(2);
+    MEMMAP_ADD(3);
+    MEMMAP_ADD(4);
+    MEMMAP_ADD(5);
+    MEMMAP_ADD(6);
+    MEMMAP_ADD(7);
+    MEMMAP_ADD(8);
+    MEMMAP_ADD(9);
+    MEMMAP_ADD(10);
+    MEMMAP_ADD(11);
+    MEMMAP_ADD(12);
+    MEMMAP_ADD(13);
+    MEMMAP_ADD(14);
+    MEMMAP_ADD(15);
+    MEMMAP_ADD(16);
+    MEMMAP_ADD(17);
+    MEMMAP_ADD(18);
+    MEMMAP_ADD(19);
+    MEMMAP_ADD(20);
+    MEMMAP_ADD(21);
+    MEMMAP_ADD(22);
+    MEMMAP_ADD(23);
+    MEMMAP_ADD(24);
+    MEMMAP_ADD(25);
+    MEMMAP_ADD(26);
+    MEMMAP_ADD(27);
+    MEMMAP_ADD(28);
+    MEMMAP_ADD(29);
+    MEMMAP_ADD(30);
+    MEMMAP_ADD(31);
+
+    /* Load kernel */
+    if (kernel_filename) {
+        loaderparams.ram_size = ram_size;
+        loaderparams.kernel_filename = kernel_filename;
+        loaderparams.kernel_cmdline = kernel_cmdline;
+        loaderparams.initrd_filename = initrd_filename;
+        reset_info->vector = load_kernel();
+    }
+}
+
+static void mips_socup_machine_init(MachineClass *mc)
+{
+    mc->desc = "Loongson SoC_up";
+    mc->init = mips_socup_init;
+#ifdef TARGET_MIPS64
+    mc->default_cpu_type = MIPS_CPU_TYPE_NAME("5Kf");
+#else
+    mc->default_cpu_type = MIPS_CPU_TYPE_NAME("24Kf");
+#endif
+}
+
+DEFINE_MACHINE("soc_up", mips_socup_machine_init)
-- 
2.16.1

This patch applies to QEMU 2.11.1.