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/************************************************ | |
The Verilog HDL code example is from the book | |
Computer Principles and Design in Verilog HDL | |
by Yamin Li, published by A JOHN WILEY & SONS | |
************************************************/ | |
module display_scan_codes (sys_clk,clrn,ps2_clk,ps2_data,r,g,b,hs,vs, | |
vga_clk,blankn,syncn); // display key scan codes | |
input sys_clk, clrn; // sys_clk: 50MHz | |
input ps2_clk, ps2_data; // kbd clk and data | |
output [7:0] r, g, b; // vga red,green,blue colors |