minimal zig0 run...

basic.zig

export fn entry() void {
    var a: u32 = 88 + 99;
}

pub fn panic(msg: []const u8, error_return_trace: ?*@import("builtin").StackTrace) noreturn {
    while (true) {}
}

zig0 basic.zig \
    -target native \
    -mcpu=baseline \
    --name basic \
    --override-lib-dir ./lib \
    -femit-bin=basic1.o \
    -lc \
    --pkg-begin build_options _build/config.zig \
    --pkg-end \
    --pkg-begin compiler_rt ./lib/std/special/compiler_rt.zig \
    --pkg-end \
    --verbose-llvm-ir \
    --strip

• output from: zig0 built against llvm12 12.0.0-rc5

; ModuleID = 'basic'
source_filename = "basic"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%"[]u8" = type { i8*, i64 }
%std.builtin.StackTrace = type { i64, %"[]usize" }
%"[]usize" = type { i64*, i64 }

@panic.1 = internal unnamed_addr constant void (%"[]u8"*, %std.builtin.StackTrace*)* @panic, align 8
@zig_is_stage2 = internal unnamed_addr constant i1 false, align 1
@output_mode = internal unnamed_addr constant i2 -2, align 1

; Function Attrs: nobuiltin noredzone noreturn nounwind sspstrong
define internal fastcc void @panic(%"[]u8"* nonnull readonly align 8 %0, %std.builtin.StackTrace* align 8 %1) unnamed_addr #0 {
Entry:
  %error_return_trace = alloca %std.builtin.StackTrace*, align 8
  store %std.builtin.StackTrace* %1, %std.builtin.StackTrace** %error_return_trace, align 8
  br label %WhileCond

WhileCond:                                        ; preds = %WhileCond, %Entry
  br label %WhileCond
}

; Function Attrs: nobuiltin noredzone nounwind sspstrong
define void @entry() #1 {
Entry:
  %a = alloca i32, align 4
  store i32 187, i32* %a, align 4
  ret void
}

attributes #0 = { nobuiltin noredzone noreturn nounwind sspstrong "frame-pointer"="all" "stack-protector-buffer-size"="4" }
attributes #1 = { nobuiltin noredzone nounwind sspstrong "frame-pointer"="all" "stack-protector-buffer-size"="4" }

!llvm.module.flags = !{!0, !1, !2}
!llvm.dbg.cu = !{!3}

!0 = !{i32 2, !"Debug Info Version", i32 3}
!1 = !{i32 2, !"Dwarf Version", i32 4}
!2 = !{i32 7, !"PIC Level", i32 2}
!3 = distinct !DICompileUnit(language: DW_LANG_C99, file: !4, producer: "zig 0.8.0", isOptimized: false, runtimeVersion: 0, emissionKind: NoDebug, enums: !5)
!4 = !DIFile(filename: "basic", directory: ".")
!5 = !{!6}
!6 = !DICompositeType(tag: DW_TAG_enumeration_type, name: "std.builtin.OutputMode", scope: !7, file: !7, line: 443, baseType: !8, size: 8, align: 8, elements: !9)
!7 = !DIFile(filename: "builtin.zig", directory: "/home/mike/project/zig/work/llvm12/lib/std")
!8 = !DIBasicType(name: "u2", size: 8, encoding: DW_ATE_unsigned)
!9 = !{!10, !11, !12}
!10 = !DIEnumerator(name: "Exe", value: 0)
!11 = !DIEnumerator(name: "Lib", value: 1)
!12 = !DIEnumerator(name: "Obj", value: 2)

diff --git a/lib/std/target.zig b/lib/std/target.zig
index 3372f617a..33be415d3 100644
--- a/lib/std/target.zig
+++ b/lib/std/target.zig
@@ -717,6 +717,7 @@ pub const Target = struct {
             bpfeb,
             csky,
             hexagon,
+            m68k,
             mips,
             mipsel,
             mips64,
@@ -832,6 +833,7 @@ pub const Target = struct {
                     .armeb => ._ARM,
                     .hexagon => ._HEXAGON,
                     .le32 => ._NONE,
+                    .m68k => ._68K,
                     .mips => ._MIPS,
                     .mipsel => ._MIPS_RS3_LE,
                     .powerpc, .powerpcle => ._PPC,
@@ -892,6 +894,7 @@ pub const Target = struct {
                     .armeb => .Unknown,
                     .hexagon => .Unknown,
                     .le32 => .Unknown,
+                    .m68k => .Unknown,
                     .mips => .Unknown,
                     .mipsel => .Unknown,
                     .powerpc, .powerpcle => .POWERPC,
@@ -994,6 +997,7 @@ pub const Target = struct {
                     .armeb,
                     .aarch64_be,
                     .bpfeb,
+                    .m68k,
                     .mips,
                     .mips64,
                     .powerpc,
@@ -1021,6 +1025,7 @@ pub const Target = struct {
                     .csky,
                     .hexagon,
                     .le32,
+                    .m68k,
                     .mips,
                     .mipsel,
                     .powerpc,
@@ -1532,6 +1537,7 @@ pub const Target = struct {
                 .arc,
                 .csky,
                 .hexagon,
+                .m68k,
                 .msp430,
                 .r600,
                 .amdgcn,
diff --git a/src/codegen/llvm.zig b/src/codegen/llvm.zig
index 94fb1de8c..c3d281e74 100644
--- a/src/codegen/llvm.zig
+++ b/src/codegen/llvm.zig
@@ -30,6 +30,7 @@ pub fn targetTriple(allocator: *Allocator, target: std.Target) ![:0]u8 {
         .bpfeb => "bpfeb",
         .csky => "csky",
         .hexagon => "hexagon",
+        .m68k => "m68k",
         .mips => "mips",
         .mipsel => "mipsel",
         .mips64 => "mips64",
diff --git a/src/codegen/llvm/bindings.zig b/src/codegen/llvm/bindings.zig
index 63ac7e86a..87c3443ae 100644
--- a/src/codegen/llvm/bindings.zig
+++ b/src/codegen/llvm/bindings.zig
@@ -580,6 +580,7 @@ pub const ArchType = extern enum(c_int) {
     bpfeb,
     csky,
     hexagon,
+    m68k,
     mips,
     mipsel,
     mips64,
diff --git a/src/target.zig b/src/target.zig
index 25ed726fe..5eee98e73 100644
--- a/src/target.zig
+++ b/src/target.zig
@@ -243,6 +243,7 @@ pub fn archToLLVM(arch_tag: std.Target.Cpu.Arch) llvm.ArchType {
         .bpfeb => .bpfeb,
         .csky => .csky,
         .hexagon => .hexagon,
+        .m68k => .m68k,
         .mips => .mips,
         .mipsel => .mipsel,
         .mips64 => .mips64,