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@minglotus-6
Last active September 3, 2022 06:37
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=== square
Creating new node: t2: v2i64,ch = CopyFromReg t0, Register:v2i64 %0
Creating new node: t4: v2i64,ch = CopyFromReg t0, Register:v2i64 %1
Creating new node: t5: v4i64 = concat_vectors t2, t4
Creating new node: t6: v4i8 = truncate t5
Creating new node: t7: v4i16 = any_extend t6
Creating new node: t9: ch,glue = CopyToReg t0, Register:v4i16 $d0, t7
Creating new node: t10: ch = AArch64ISD::RET_FLAG t9, Register:v4i16 $d0, t9:1
Initial selection DAG: %bb.0 'square:'
SelectionDAG has 11 nodes:
t0: ch = EntryToken
t2: v2i64,ch = CopyFromReg t0, Register:v2i64 %0
t4: v2i64,ch = CopyFromReg t0, Register:v2i64 %1
t5: v4i64 = concat_vectors t2, t4
t6: v4i8 = truncate t5
t7: v4i16 = any_extend t6
t9: ch,glue = CopyToReg t0, Register:v4i16 $d0, t7
t10: ch = AArch64ISD::RET_FLAG t9, Register:v4i16 $d0, t9:1
Combining: t10: ch = AArch64ISD::RET_FLAG t9, Register:v4i16 $d0, t9:1
Combining: t9: ch,glue = CopyToReg t0, Register:v4i16 $d0, t7
Combining: t8: v4i16 = Register $d0
Combining: t7: v4i16 = any_extend t6
Creating new node: t11: v4i16 = truncate t5
... into: t11: v4i16 = truncate t5
Combining: t9: ch,glue = CopyToReg t0, Register:v4i16 $d0, t11
Combining: t11: v4i16 = truncate t5
Combining: t5: v4i64 = concat_vectors t2, t4
Combining: t4: v2i64,ch = CopyFromReg t0, Register:v2i64 %1
Combining: t3: v2i64 = Register %1
Combining: t2: v2i64,ch = CopyFromReg t0, Register:v2i64 %0
Combining: t1: v2i64 = Register %0
Combining: t0: ch = EntryToken
Optimized lowered selection DAG: %bb.0 'square:'
SelectionDAG has 10 nodes:
t0: ch = EntryToken
t2: v2i64,ch = CopyFromReg t0, Register:v2i64 %0
t4: v2i64,ch = CopyFromReg t0, Register:v2i64 %1
t5: v4i64 = concat_vectors t2, t4
t11: v4i16 = truncate t5
t9: ch,glue = CopyToReg t0, Register:v4i16 $d0, t11
t10: ch = AArch64ISD::RET_FLAG t9, Register:v4i16 $d0, t9:1
Legalizing node: t8: v4i16 = Register $d0
Ignoring node results
Legally typed node: t8: v4i16 = Register $d0
Legalizing node: t3: v2i64 = Register %1
Ignoring node results
Legally typed node: t3: v2i64 = Register %1
Legalizing node: t1: v2i64 = Register %0
Ignoring node results
Legally typed node: t1: v2i64 = Register %0
Legalizing node: t0: ch = EntryToken
Analyzing result type: ch
Legal result type
Legally typed node: t0: ch = EntryToken
Legalizing node: t2: v2i64,ch = CopyFromReg t0, Register:v2i64 %0
Analyzing result type: v2i64
Legal result type
Analyzing result type: ch
Legal result type
Analyzing operand: t0: ch = EntryToken
Legal operand
Legally typed node: t2: v2i64,ch = CopyFromReg t0, Register:v2i64 %0
Legalizing node: t4: v2i64,ch = CopyFromReg t0, Register:v2i64 %1
Analyzing result type: v2i64
Legal result type
Analyzing result type: ch
Legal result type
Analyzing operand: t0: ch = EntryToken
Legal operand
Legally typed node: t4: v2i64,ch = CopyFromReg t0, Register:v2i64 %1
Legalizing node: t5: v4i64 = concat_vectors t2, t4
Analyzing result type: v4i64
Split node result: t5: v4i64 = concat_vectors t2, t4
Legalizing node: t11: v4i16 = truncate t5
Analyzing result type: v4i16
Legal result type
Analyzing operand: t5: v4i64 = concat_vectors t2, t4
Split node operand: t11: v4i16 = truncate t5
Creating new node: t12: v2i32 = truncate t2
Creating new node: t13: v2i32 = truncate t4
Creating new node: t14: v4i32 = concat_vectors t12, t13
Creating new node: t15: v4i16 = truncate t14
Legalizing node: t13: v2i32 = truncate t4
Analyzing result type: v2i32
Legal result type
Analyzing operand: t4: v2i64,ch = CopyFromReg t0, Register:v2i64 %1
Legal operand
Legally typed node: t13: v2i32 = truncate t4
Legalizing node: t12: v2i32 = truncate t2
Analyzing result type: v2i32
Legal result type
Analyzing operand: t2: v2i64,ch = CopyFromReg t0, Register:v2i64 %0
Legal operand
Legally typed node: t12: v2i32 = truncate t2
Legalizing node: t14: v4i32 = concat_vectors t12, t13
Analyzing result type: v4i32
Legal result type
Analyzing operand: t12: v2i32 = truncate t2
Legal operand
Analyzing operand: t13: v2i32 = truncate t4
Legal operand
Legally typed node: t14: v4i32 = concat_vectors t12, t13
Legalizing node: t15: v4i16 = truncate t14
Analyzing result type: v4i16
Legal result type
Analyzing operand: t14: v4i32 = concat_vectors t12, t13
Legal operand
Legally typed node: t15: v4i16 = truncate t14
Legalizing node: t9: ch,glue = CopyToReg t0, Register:v4i16 $d0, t15
Analyzing result type: ch
Legal result type
Analyzing result type: glue
Legal result type
Analyzing operand: t0: ch = EntryToken
Legal operand
Analyzing operand: t15: v4i16 = truncate t14
Legal operand
Legally typed node: t9: ch,glue = CopyToReg t0, Register:v4i16 $d0, t15
Legalizing node: t10: ch = AArch64ISD::RET_FLAG t9, Register:v4i16 $d0, t9:1
Analyzing result type: ch
Legal result type
Analyzing operand: t9: ch,glue = CopyToReg t0, Register:v4i16 $d0, t15
Legal operand
Analyzing operand: t9: ch,glue = CopyToReg t0, Register:v4i16 $d0, t15
Legal operand
Legally typed node: t10: ch = AArch64ISD::RET_FLAG t9, Register:v4i16 $d0, t9:1
Legalizing node: t65535: ch = handlenode t10
Analyzing result type: ch
Legal result type
Analyzing operand: t10: ch = AArch64ISD::RET_FLAG t9, Register:v4i16 $d0, t9:1
Legal operand
Legally typed node: t65535: ch = handlenode t10
Type-legalized selection DAG: %bb.0 'square:'
SelectionDAG has 12 nodes:
t0: ch = EntryToken
t2: v2i64,ch = CopyFromReg t0, Register:v2i64 %0
t12: v2i32 = truncate t2
t4: v2i64,ch = CopyFromReg t0, Register:v2i64 %1
t13: v2i32 = truncate t4
t14: v4i32 = concat_vectors t12, t13
t15: v4i16 = truncate t14
t9: ch,glue = CopyToReg t0, Register:v4i16 $d0, t15
t10: ch = AArch64ISD::RET_FLAG t9, Register:v4i16 $d0, t9:1
Combining: t15: v4i16 = truncate t14
Combining: t14: v4i32 = concat_vectors t12, t13
Creating new node: t16: v4i32 = undef
Combining: t13: v2i32 = truncate t4
Combining: t12: v2i32 = truncate t2
Combining: t10: ch = AArch64ISD::RET_FLAG t9, Register:v4i16 $d0, t9:1
Combining: t9: ch,glue = CopyToReg t0, Register:v4i16 $d0, t15
Combining: t8: v4i16 = Register $d0
Combining: t4: v2i64,ch = CopyFromReg t0, Register:v2i64 %1
Combining: t3: v2i64 = Register %1
Combining: t2: v2i64,ch = CopyFromReg t0, Register:v2i64 %0
Combining: t1: v2i64 = Register %0
Combining: t0: ch = EntryToken
Optimized type-legalized selection DAG: %bb.0 'square:'
SelectionDAG has 12 nodes:
t0: ch = EntryToken
t2: v2i64,ch = CopyFromReg t0, Register:v2i64 %0
t12: v2i32 = truncate t2
t4: v2i64,ch = CopyFromReg t0, Register:v2i64 %1
t13: v2i32 = truncate t4
t14: v4i32 = concat_vectors t12, t13
t15: v4i16 = truncate t14
t9: ch,glue = CopyToReg t0, Register:v4i16 $d0, t15
t10: ch = AArch64ISD::RET_FLAG t9, Register:v4i16 $d0, t9:1
Legalized selection DAG: %bb.0 'square:'
SelectionDAG has 12 nodes:
t0: ch = EntryToken
t2: v2i64,ch = CopyFromReg t0, Register:v2i64 %0
t12: v2i32 = truncate t2
t4: v2i64,ch = CopyFromReg t0, Register:v2i64 %1
t13: v2i32 = truncate t4
t14: v4i32 = concat_vectors t12, t13
t15: v4i16 = truncate t14
t9: ch,glue = CopyToReg t0, Register:v4i16 $d0, t15
t10: ch = AArch64ISD::RET_FLAG t9, Register:v4i16 $d0, t9:1
Combining: t10: ch = AArch64ISD::RET_FLAG t9, Register:v4i16 $d0, t9:1
Combining: t9: ch,glue = CopyToReg t0, Register:v4i16 $d0, t15
Combining: t15: v4i16 = truncate t14
Combining: t14: v4i32 = concat_vectors t12, t13
Combining: t13: v2i32 = truncate t4
Combining: t12: v2i32 = truncate t2
Combining: t4: v2i64,ch = CopyFromReg t0, Register:v2i64 %1
Combining: t2: v2i64,ch = CopyFromReg t0, Register:v2i64 %0
Combining: t8: v4i16 = Register $d0
Combining: t3: v2i64 = Register %1
Combining: t1: v2i64 = Register %0
Combining: t0: ch = EntryToken
Optimized legalized selection DAG: %bb.0 'square:'
SelectionDAG has 12 nodes:
t0: ch = EntryToken
t2: v2i64,ch = CopyFromReg t0, Register:v2i64 %0
t12: v2i32 = truncate t2
t4: v2i64,ch = CopyFromReg t0, Register:v2i64 %1
t13: v2i32 = truncate t4
t14: v4i32 = concat_vectors t12, t13
t15: v4i16 = truncate t14
t9: ch,glue = CopyToReg t0, Register:v4i16 $d0, t15
t10: ch = AArch64ISD::RET_FLAG t9, Register:v4i16 $d0, t9:1
===== Instruction selection begins: %bb.0 ''
ISEL: Starting selection on root node: t10: ch = AArch64ISD::RET_FLAG t9, Register:v4i16 $d0, t9:1
ISEL: Starting pattern match
Morphed node: t10: ch = RET_ReallyLR Register:v4i16 $d0, t9, t9:1
ISEL: Match complete!
ISEL: Starting selection on root node: t9: ch,glue = CopyToReg t0, Register:v4i16 $d0, t15
ISEL: Starting selection on root node: t15: v4i16 = truncate t14
ISEL: Starting pattern match
Initial Opcode index to 352712
Match failed at index 352715
Continuing at 352728
Match failed at index 352731
Continuing at 353749
TypeSwitch[v4i16] from 353751 to 353765
Morphed node: t15: v4i16 = XTNv4i16 t14
ISEL: Match complete!
ISEL: Starting selection on root node: t14: v4i32 = concat_vectors t12, t13
ISEL: Starting pattern match
Initial Opcode index to 381286
Match failed at index 381295
Continuing at 382496
Match failed at index 382502
Continuing at 382604
OpcodeSwitch from 382608 to 384601
Match failed at index 384602
Continuing at 384859
TypeSwitch[v4i32] from 384872 to 384895
Morphed node: t14: v4i32 = UZP1v4i32 t2, t4
ISEL: Match complete!
ISEL: Starting selection on root node: t4: v2i64,ch = CopyFromReg t0, Register:v2i64 %1
ISEL: Starting selection on root node: t2: v2i64,ch = CopyFromReg t0, Register:v2i64 %0
ISEL: Starting selection on root node: t8: v4i16 = Register $d0
ISEL: Starting selection on root node: t3: v2i64 = Register %1
ISEL: Starting selection on root node: t1: v2i64 = Register %0
ISEL: Starting selection on root node: t0: ch = EntryToken
===== Instruction selection ends:
Selected selection DAG: %bb.0 'square:'
SelectionDAG has 10 nodes:
t0: ch = EntryToken
t2: v2i64,ch = CopyFromReg t0, Register:v2i64 %0
t4: v2i64,ch = CopyFromReg t0, Register:v2i64 %1
t14: v4i32 = UZP1v4i32 t2, t4
t15: v4i16 = XTNv4i16 t14
t9: ch,glue = CopyToReg t0, Register:v4i16 $d0, t15
t10: ch = RET_ReallyLR Register:v4i16 $d0, t9, t9:1
Total amount of phi nodes to update: 0
*** MachineFunction at end of ISel ***
# Machine code for function square: IsSSA, TracksLiveness
Function Live Ins: $q0 in %0, $q1 in %1
bb.0 (%ir-block.0):
liveins: $q0, $q1
%1:fpr128 = COPY $q1
%0:fpr128 = COPY $q0
%2:fpr128 = UZP1v4i32 %0:fpr128, %1:fpr128
%3:fpr64 = XTNv4i16 killed %2:fpr128
$d0 = COPY %3:fpr64
RET_ReallyLR implicit $d0
# End machine code for function square.
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