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=== square
Creating new node: t2: v2i64,ch = CopyFromReg t0, Register:v2i64 %0
Creating new node: t4: v2i64,ch = CopyFromReg t0, Register:v2i64 %1
Creating new node: t5: v4i64 = concat_vectors t2, t4
Creating new node: t6: v4i8 = truncate t5
Creating new node: t7: v4i16 = any_extend t6
Creating new node: t9: ch,glue = CopyToReg t0, Register:v4i16 $d0, t7
Creating new node: t10: ch = AArch64ISD::RET_FLAG t9, Register:v4i16 $d0, t9:1
Initial selection DAG: %bb.0 'square:'
SelectionDAG has 11 nodes:
https://gcc.godbolt.org/z/G8439aEGY right
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %s2i8i16 = trunc <2 x i16> undef to <2 x i8>
https://gcc.godbolt.org/z/fojdKcb9q right
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %s2i8i32 = trunc <2 x i32> undef to <2 x i8>
https://gcc.godbolt.org/z/zh9qTY4W1 right
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s2i8i64 = trunc <2 x i64> undef to <2 x i8>
https://gcc.godbolt.org/z/ocMf435fz right
; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %s2i16i32 = trunc <2 x i32> undef to <2 x i16>
https://gcc.godbolt.org/z/5zjxaEjKv right
; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %s2i16i64 = trunc <2 x i64> undef to <2 x i16>
#0 llvm::TargetTransformInfoImplBase::getCastInstrCost (this=0x5555609db8e0, Opcode=38, Dst=0x5555609b7200, Src=0x5555609b71d0,
CCH=llvm::TargetTransformInfo::CastContextHint::None, CostKind=llvm::TargetTransformInfo::TCK_RecipThroughput, I=0x5555609b91f0)
at /path/to/llvm-project/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h:558
#1 0x000055555bdbb6b0 in llvm::BasicTTIImplBase<llvm::AArch64TTIImpl>::getCastInstrCost (this=0x5555609db8d8, Opcode=38, Dst=0x5555609b7200, Src=0x5555609b71d0,
CCH=llvm::TargetTransformInfo::CastContextHint::None, CostKind=llvm::TargetTransformInfo::TCK_RecipThroughput, I=0x5555609b91f0)
at /path/to/llvm-project/llvm/include/llvm/CodeGen/BasicTTIImpl.h:967
#2 0x000055555bdae106 in llvm::AArch64TTIImpl::getCastInstrCost (this=0x5555609db8d8, Opcode=38, Dst=0x5555609b7200, Src=0x5555609b71d0,
CCH=llvm::TargetTransformInfo::CastContextHint::None, CostKind=llvm::TargetTransformInfo::TCK_RecipThroughput, I=0x5555609b91f0)
at /path/to/llvm-project/llvm
@minglotus-6
minglotus-6 / uint64_t
Created June 17, 2022 19:48
clang size of bloaty
FILE SIZE VM SIZE
-------------- --------------
46.4% 94.6Mi 53.1% 94.6Mi .text
21.9% 44.5Mi 25.0% 44.5Mi .rodata
10.2% 20.8Mi 0.0% 0 .strtab
6.2% 12.7Mi 7.1% 12.7Mi .rela.dyn
4.9% 10.1Mi 5.6% 10.1Mi .data.rel.ro
4.6% 9.33Mi 5.2% 9.33Mi .eh_frame
2.6% 5.25Mi 0.0% 0 .symtab
1.7% 3.56Mi 2.0% 3.56Mi .dynstr
@minglotus-6
minglotus-6 / unsigned
Last active June 17, 2022 19:48
clang binary size of unsigned
FILE SIZE VM SIZE
-------------- --------------
46.5% 94.6Mi 53.1% 94.6Mi .text
21.8% 44.5Mi 25.0% 44.5Mi .rodata
10.2% 20.8Mi 0.0% 0 .strtab
6.2% 12.7Mi 7.1% 12.7Mi .rela.dyn
4.9% 10.1Mi 5.6% 10.1Mi .data.rel.ro
4.6% 9.33Mi 5.2% 9.33Mi .eh_frame
2.6% 5.25Mi 0.0% 0 .symtab
1.7% 3.56Mi 2.0% 3.56Mi .dynstr
commit e3b755d33d59ab1323431799bf9f9c820d893260 (HEAD -> selection)
Author: Mingming Liu <mingmingl@google.com>
Date: Tue May 10 14:23:40 2022 -0700
[Peephole-opt][X86] Enhance peephole opt to see through SUBREG_TO_REG
(following AND) and eliminates redundant TEST instruction.
Differential Revision: https://reviews.llvm.org/D124118
=== test_erased
Creating new node: t2: i64,ch = CopyFromReg t0, Register:i64 %0
Creating new node: t4: i64,ch = CopyFromReg t0, Register:i64 %1
Creating new node: t6: i64,ch = CopyFromReg t0, Register:i64 %2
Creating constant: t7: i64 = Constant<0>
Creating new node: t8: i64 = undef
Creating new node: t9: i64,ch = load<(load (s64) from %ir.0)> t0, t2, undef:i64
=== _Z3fooPlll
Creating new node: t2: i64,ch = CopyFromReg t0, Register:i64 %0
Creating new node: t4: i64,ch = CopyFromReg t0, Register:i64 %1
Creating new node: t6: i64,ch = CopyFromReg t0, Register:i64 %2
Creating constant: t7: i64 = Constant<0>
Creating new node: t8: i64 = undef
Creating new node: t9: i64,ch = load<(load (s64) from %ir.0)> t0, t2, undef:i64
=== _Z3fooPlll
Creating new node: t2: i64,ch = CopyFromReg t0, Register:i64 %0
Creating new node: t4: i64,ch = CopyFromReg t0, Register:i64 %1
Creating new node: t6: i64,ch = CopyFromReg t0, Register:i64 %2
Creating constant: t7: i64 = Constant<0>
Creating new node: t8: i64 = undef
Creating new node: t9: i64,ch = load<(load (s64) from %ir.0)> t0, t2, undef:i64
struct RetVal {
char x;
int y;
};
typedef RetVal (*Parser)();
RetVal Parse(bool test, Parser p) {
if (test) return {};
return p();
}