Unoptimized LLVM bitcode of the swap example

swap-unoptimized.ll

; ModuleID = 'swap.bc'
source_filename = "swap.cpp"
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.12.0"

; Function Attrs: ssp uwtable
define i32 @_Z4testv() #0 {
entry:
  %a = alloca i32, align 4
  %b = alloca i32, align 4
  %call = call i32 @_Z3getv()
  store i32 %call, i32* %a, align 4
  %call1 = call i32 @_Z3getv()
  store i32 %call1, i32* %b, align 4
  call void @_Z9temp_swapIiEvRT_S1_(i32* dereferenceable(4) %a, i32* dereferenceable(4) %b)
  call void @_Z8xor_swapIiEvRT_S1_(i32* dereferenceable(4) %a, i32* dereferenceable(4) %b)
  call void @_Z9temp_swapIiEvRT_S1_(i32* dereferenceable(4) %a, i32* dereferenceable(4) %b)
  %0 = load i32, i32* %a, align 4
  %1 = load i32, i32* %b, align 4
  %call2 = call i32 @_Z7processii(i32 %0, i32 %1)
  ret i32 %call2
}

declare i32 @_Z3getv() #1

; Function Attrs: nounwind ssp uwtable
define linkonce_odr void @_Z9temp_swapIiEvRT_S1_(i32* dereferenceable(4) %a, i32* dereferenceable(4) %b) #2 {
entry:
  %a.addr = alloca i32*, align 8
  %b.addr = alloca i32*, align 8
  %temp = alloca i32, align 4
  store i32* %a, i32** %a.addr, align 8
  store i32* %b, i32** %b.addr, align 8
  %0 = load i32*, i32** %a.addr, align 8
  %1 = load i32, i32* %0, align 4
  store i32 %1, i32* %temp, align 4
  %2 = load i32*, i32** %b.addr, align 8
  %3 = load i32, i32* %2, align 4
  %4 = load i32*, i32** %a.addr, align 8
  store i32 %3, i32* %4, align 4
  %5 = load i32, i32* %temp, align 4
  %6 = load i32*, i32** %b.addr, align 8
  store i32 %5, i32* %6, align 4
  ret void
}

; Function Attrs: nounwind ssp uwtable
define linkonce_odr void @_Z8xor_swapIiEvRT_S1_(i32* dereferenceable(4) %a, i32* dereferenceable(4) %b) #2 {
entry:
  %a.addr = alloca i32*, align 8
  %b.addr = alloca i32*, align 8
  store i32* %a, i32** %a.addr, align 8
  store i32* %b, i32** %b.addr, align 8
  %0 = load i32*, i32** %b.addr, align 8
  %1 = load i32, i32* %0, align 4
  %2 = load i32*, i32** %a.addr, align 8
  %3 = load i32, i32* %2, align 4
  %xor = xor i32 %3, %1
  store i32 %xor, i32* %2, align 4
  %4 = load i32*, i32** %a.addr, align 8
  %5 = load i32, i32* %4, align 4
  %6 = load i32*, i32** %b.addr, align 8
  %7 = load i32, i32* %6, align 4
  %xor1 = xor i32 %7, %5
  store i32 %xor1, i32* %6, align 4
  %8 = load i32*, i32** %b.addr, align 8
  %9 = load i32, i32* %8, align 4
  %10 = load i32*, i32** %a.addr, align 8
  %11 = load i32, i32* %10, align 4
  %xor2 = xor i32 %11, %9
  store i32 %xor2, i32* %10, align 4
  ret void
}

declare i32 @_Z7processii(i32, i32) #1

attributes #0 = { ssp uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="core2" "target-features"="+cx16,+fxsr,+mmx,+sse,+sse2,+sse3,+ssse3,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="core2" "target-features"="+cx16,+fxsr,+mmx,+sse,+sse2,+sse3,+ssse3,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #2 = { nounwind ssp uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="core2" "target-features"="+cx16,+fxsr,+mmx,+sse,+sse2,+sse3,+ssse3,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" }

!llvm.module.flags = !{!0}
!llvm.ident = !{!1}

!0 = !{i32 1, !"PIC Level", i32 2}
!1 = !{!"clang version 4.0.0 (https://github.com/llvm-mirror/clang.git 5c8cc80b1e276595f78a1a86dd6be1ea4bd8bd63) (https://github.com/llvm-mirror/llvm.git 74e176a8845bb74057ff633a40e291f82acd7236)"}