Patch for adding Intel I218 NIC support to DPDK v2.1.0

DPDK 2.1.0 I218 Patch

From f06bb9837eec75fdaa16de0b8b21240724df450d Mon Sep 17 00:00:00 2001
From: Justin Menga <justin.menga@gmail.com>
Date: Tue, 25 Aug 2015 00:56:56 +1200
Subject: [PATCH] Patch for i218 support

---
 drivers/net/e1000/base/e1000_api.c              | 22 ++++++++++++++++++++++
 drivers/net/e1000/base/e1000_api.h              |  1 +
 drivers/net/e1000/base/e1000_osdep.h            | 22 ++++++++++++++++++----
 drivers/net/e1000/em_ethdev.c                   |  7 +++++++
 lib/librte_eal/common/include/rte_pci_dev_ids.h |  4 ++++
 5 files changed, 52 insertions(+), 4 deletions(-)

diff --git a/drivers/net/e1000/base/e1000_api.c b/drivers/net/e1000/base/e1000_api.c
index a064565..3901d59 100644
--- a/drivers/net/e1000/base/e1000_api.c
+++ b/drivers/net/e1000/base/e1000_api.c
@@ -1355,3 +1355,25 @@ void e1000_shutdown_fiber_serdes_link(struct e1000_hw *hw)
 		hw->mac.ops.shutdown_serdes(hw);
 }
 
+/**
+ *  e1000_device_is_ich8 - Check for ICH8 device
+ *  @hw: pointer to the HW structure
+ *
+ *  return TRUE for ICH8, otherwise FALSE
+ **/
+bool e1000_device_is_ich8(struct e1000_hw *hw)
+{
+	DEBUGFUNC("e1000_device_is_ich8");
+
+	switch (hw->device_id) {
+	case E1000_DEV_ID_PCH_LPT_I217_LM:
+	case E1000_DEV_ID_PCH_LPT_I217_V:
+	case E1000_DEV_ID_PCH_LPTLP_I218_LM:
+	case E1000_DEV_ID_PCH_LPTLP_I218_V:
+		return 1;
+
+	default:
+		return 0;
+	}
+}
+
diff --git a/drivers/net/e1000/base/e1000_api.h b/drivers/net/e1000/base/e1000_api.h
index 02b16da..f96a674 100644
--- a/drivers/net/e1000/base/e1000_api.h
+++ b/drivers/net/e1000/base/e1000_api.h
@@ -49,6 +49,7 @@ extern void e1000_init_function_pointers_vf(struct e1000_hw *hw);
 extern void e1000_power_up_fiber_serdes_link(struct e1000_hw *hw);
 extern void e1000_shutdown_fiber_serdes_link(struct e1000_hw *hw);
 extern void e1000_init_function_pointers_i210(struct e1000_hw *hw);
+extern bool e1000_device_is_ich8(struct e1000_hw *hw);
 
 s32 e1000_set_obff_timer(struct e1000_hw *hw, u32 itr);
 s32 e1000_set_mac_type(struct e1000_hw *hw);
diff --git a/drivers/net/e1000/base/e1000_osdep.h b/drivers/net/e1000/base/e1000_osdep.h
index d04ec73..ea1d0de 100644
--- a/drivers/net/e1000/base/e1000_osdep.h
+++ b/drivers/net/e1000/base/e1000_osdep.h
@@ -96,13 +96,22 @@ typedef int		bool;
 
 #define E1000_PCI_REG(reg) (*((volatile uint32_t *)(reg)))
 
+#define E1000_PCI_REG16(reg) (*((volatile uint16_t *)(reg)))
+
 #define E1000_PCI_REG_WRITE(reg, value) do { \
 	E1000_PCI_REG((reg)) = (rte_cpu_to_le_32(value)); \
 } while (0)
 
+#define E1000_PCI_REG_WRITE16(reg, value) do { \
+  E1000_PCI_REG16((reg)) = (value); \
+} while (0)
+
 #define E1000_PCI_REG_ADDR(hw, reg) \
 	((volatile uint32_t *)((char *)(hw)->hw_addr + (reg)))
 
+#define E1000_PCI_REG_FLASH_ADDR(hw, reg) \
+  ((volatile uint32_t *)((char *)(hw)->flash_address + (reg)))
+
 #define E1000_PCI_REG_ARRAY_ADDR(hw, reg, index) \
 	E1000_PCI_REG_ADDR((hw), (reg) + ((index) << 2))
 
@@ -111,6 +120,11 @@ static inline uint32_t e1000_read_addr(volatile void* addr)
 	return rte_le_to_cpu_32(E1000_PCI_REG(addr));
 }
 
+static inline uint32_t e1000_read_addr16(volatile void* addr)
+{
+  return E1000_PCI_REG16(addr);
+}
+
 /* Necessary defines */
 #define E1000_MRQC_ENABLE_MASK                  0x00000007
 #define E1000_MRQC_RSS_FIELD_IPV6_EX		0x00080000
@@ -160,16 +174,16 @@ static inline uint32_t e1000_read_addr(volatile void* addr)
  */
 
 #define E1000_READ_FLASH_REG(hw, reg) \
-	(E1000_ACCESS_PANIC(E1000_READ_FLASH_REG, hw, reg, 0), 0)
+	e1000_read_addr(E1000_PCI_REG_FLASH_ADDR((hw), (reg)))
 
 #define E1000_READ_FLASH_REG16(hw, reg)  \
-	(E1000_ACCESS_PANIC(E1000_READ_FLASH_REG16, hw, reg, 0), 0)
+	e1000_read_addr16(E1000_PCI_REG_FLASH_ADDR((hw), (reg)))
 
 #define E1000_WRITE_FLASH_REG(hw, reg, value)  \
-	E1000_ACCESS_PANIC(E1000_WRITE_FLASH_REG, hw, reg, value)
+	E1000_PCI_REG_WRITE(E1000_PCI_REG_FLASH_ADDR((hw), (reg)), (value))
 
 #define E1000_WRITE_FLASH_REG16(hw, reg, value) \
-	E1000_ACCESS_PANIC(E1000_WRITE_FLASH_REG16, hw, reg, value)
+	E1000_PCI_REG_WRITE16(E1000_PCI_REG_FLASH_ADDR((hw), (reg)), (value))
 
 #define STATIC static
 
diff --git a/drivers/net/e1000/em_ethdev.c b/drivers/net/e1000/em_ethdev.c
index 912f5dd..0ee55f3 100644
--- a/drivers/net/e1000/em_ethdev.c
+++ b/drivers/net/e1000/em_ethdev.c
@@ -251,6 +251,9 @@ eth_em_dev_init(struct rte_eth_dev *eth_dev)
 	adapter->stopped = 0;
 
 	/* For ICH8 support we'll need to map the flash memory BAR */
+	if (e1000_device_is_ich8(hw))
+		hw->flash_address = (void *)pci_dev->mem_resource[1].addr;
+
 
 	if (e1000_setup_init_funcs(hw, TRUE) != E1000_SUCCESS ||
 			em_hw_init(hw) != 0) {
@@ -476,6 +479,7 @@ em_set_pba(struct e1000_hw *hw)
 			break;
 		case e1000_pchlan:
 		case e1000_pch2lan:
+		case e1000_pch_lpt:
 			pba = E1000_PBA_26K;
 			break;
 		default:
@@ -726,6 +730,8 @@ em_hardware_init(struct e1000_hw *hw)
 	/* Workaround: no TX flow ctrl for PCH */
 	if (hw->mac.type == e1000_pchlan)
 		hw->fc.requested_mode = e1000_fc_rx_pause;
+	else if (hw->mac.type == e1000_pch_lpt)
+		hw->fc.requested_mode = e1000_fc_full;
 
 	/* Override - settings for PCH2LAN, ya its magic :) */
 	if (hw->mac.type == e1000_pch2lan) {
@@ -894,6 +900,7 @@ em_get_max_pktlen(const struct e1000_hw *hw)
 	case e1000_82574:
 	case e1000_80003es2lan: /* 9K Jumbo Frame size */
 	case e1000_82583:
+	case e1000_pch_lpt:
 		return (0x2412);
 	case e1000_pchlan:
 		return (0x1000);
diff --git a/lib/librte_eal/common/include/rte_pci_dev_ids.h b/lib/librte_eal/common/include/rte_pci_dev_ids.h
index cf2cf70..d6f6cb7 100644
--- a/lib/librte_eal/common/include/rte_pci_dev_ids.h
+++ b/lib/librte_eal/common/include/rte_pci_dev_ids.h
@@ -305,6 +305,10 @@ RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82573L)
 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82574L)
 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82574LA)
 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82583V)
+RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_PCH_LPT_I217_LM)
+RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_PCH_LPT_I217_V)
+RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM)
+RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V)
 
 /******************** Physical IGB devices from e1000_hw.h ********************/
 
-- 
2.2.1