arm_vectorized_matrix_rotate.s

.global _start

_start:

LDR R0,=matrix0
LDR R1,=matrix1
LDR R2,=matrix2
LDR R3,=matrix3

@ Load Q0-Q3 with  the data
VLD1.32 {Q0}, [R0]
VLD1.32 {Q1}, [R1]
VLD1.32 {Q2}, [R2]
VLD1.32 {Q3}, [R3]

@ Status:
@ Q0: [0,   1,   2,   3]
@ Q1: [4,   5,   6,   7]
@ Q2: [8,   9,  10,  11]
@ Q3: [12, 13,  14,  15]

@ ZIP rows
VZIP.32 Q0, Q1
VZIP.32 Q2, Q3

@ Status:
@ Q0: [0,   4,   1,   5]
@ Q1: [2,   6,   3,   7]
@ Q2: [8,  12,   9,  13]
@ Q3: [10, 14,  11,  15]

VSWP D1, D4
VSWP D3, D6

@ Status:
@ Q0: [0,   4,   8,  12]
@ Q1: [2,   6,  10,  14]
@ Q2: [1,   5,   9,  13]
@ Q3: [3,   7,  11,  15]

VREV64.32 Q0, Q0
VREV64.32 Q1, Q1
VREV64.32 Q2, Q2
VREV64.32 Q3, Q3

@ Status:
@ Q0: [4,   0,  12,   8]
@ Q1: [6,   3,  14,  10]
@ Q2: [5,   1,  13,   9]
@ Q3: [7,   3,  15,  11]

@ Swap high and low halves
VSWP D0, D1
VSWP D2, D3
VSWP D4, D5
VSWP D6, D7

@ Status:
@ Q0: [12,  8,  4,  0]
@ Q1: [14, 10,  6,  2]
@ Q2: [13,  9,  5,  1]
@ Q3: [15, 11,  7,  3]

@ Interchange rows Q1 and Q2
@ We could also skip this instruction
@ and swap registers referred to during storage (VST).
VSWP Q1, Q2

@ Status:
@ Q0: [12,  8,  4,  0]
@ Q1: [13,  9,  5,  1]
@ Q2: [14, 10,  6,  2]
@ Q3: [15, 11,  7,  3]

@ Store result
VST1.32 {Q0}, [R0]
VST1.32 {Q1}, [R1]
VST1.32 {Q2}, [R2]
VST1.32 {Q3}, [R3]

@ Exit via syscall
MOV R7, #1
SWI 0

.data
matrix0: .word 0,1,2,3
matrix1: .word 4,5,6,7
matrix2: .word 8,9,10,11
matrix3: .word 12,13,14,15