This guide explains the steps needed to build the compiler and simulator toolchain for RISC-V ISA. It assumes RV32GC instruction extension.
- GNU GCC Compiler: https://github.com/riscv/riscv-gnu-toolchain
- LLVM Compiler: https://github.com/llvm/llvm-project.git
- Proxy Kernel (to map syscalls from binary to OS): https://github.com/riscv-software-src/riscv-pk