Orbit Abbreviation & Acronyms

gistfile1.txt

A


Acl	A Class Library (library of application agnostic utility classes, Orbit project prefix)
APR	Advanced Package Router (Allegro toolkit)
ASIC	Application-Specific Integrated Circuit
B


BB	Bounding Box
BGA	Ball Grid Array
BRD	Board
C


C4	Controlled Collapse Chip Connection
CCMS	Cadence Change Management System
CCR	Cadence Change Request
CCT	Cooper & Chyan Technology, creators of Specctra router (sometimes called CCT router). Often used as a prefix or suffix for items and formats created for or associated with the router or its derivatives.
CDL	Circuit Description Language (file format)
CoWoS	Chip-on-Wafer-on-Substrate
Cp	Command Processor (Orbit class)
CSV	Comma-Separated Values (file format)
D


DEF	Design Exchange Format (See LEF)
DESC	Description
DFT	Design for Testability
Diff Pair	Differential Pair
DRC	Design Rule Checking
E


ECO	Engineering Change Order (often Exchange Database Data)
F


FLD	Field (Orbit variable suffix)
G


GDS	
Graphic Database System (file format GDSII)

Gnd	Ground
GOD	Graphical Object Debugger (Orbit/Allegro debugger toolkit)
H


HBM	High Bandwidth Memory
I


InFO	Integrated Fan-Out
L


LEC	Logic Equivalence Checking
LEF	Library Exchange Format
LL	Lower Left
LVS	Layout Versus Schematic Verification
M


MCM	Multi-Chip Module
Mgr	Manager (Orbit class name suffix)
N


NC	Not Connected or No Connect
O


OT	Other Tool
P


P/G, PG	Power and Ground
PCB	Printed Circuit Board
PDN	Power Delivery Network
PI	Plug-in (Orbit project suffix); also known as "add-in"
PKG	Package
Pwr	Power
PVS	Physical Verification System
R


RDL	Redistribution Layer
S


SiP	System in Package
SoC	System on a Chip
SoIC	System on Integrated Chips
SoW	System-on-Wafer
T


TDV	Through-Dielectric Via
Tmplt, TMPL	Template (avoid tmp and temp)
TSV	Through-Silicon Via
TXN	Transaction (Orbit variable name and suffix)
U


UBM	Under Bump Metallisation (a kind of material, layer)
uBump/μBump	Micro bump
UPF	Unified Power Format
V


VCC	Voltage at Common Collector (Power)
VDD	Voltage Drain Drain (Power)
VEE	Voltage at Common Emitter (Ground)
VSS	Voltage Source Source (Ground)
W
Wb	Wire Bonding
WbFc	Wire Bonding and Flip Chip
WS	Workspace (Orbit class name and suffix)
WYSIWYG	What You See Is What You Get
WoW	Wafer-on-Wafer

gistfile2.txt

B	

BM	Boundary Model 	
E	

eco	Engineering Change Orders	
etm	Extracted Timing Model	
F	

feco	First Encounter Checkout (DPC command)	
I	

iHDB	Integrity Hierarchical Database, (as same as SHDB)	
ilm	Interface Logic Model	
M	

mmmc	Multi-Mode, Multi-Corner	
P	

ploc	Pad Location (file format)	
pnr	Place and Route (PnR)	
pvt	Process-Voltage-Temperature	
R	

RAK	Rapid Adoption Kits	
S	

SHDB	Stylus Hierarchical Database, (as same as iHDB)	link
spef	Standard Parasitic Exchange Format	
Voltus
E	

ERA	Early Rail Analysis	
P	

PGV	Power Grid View	
ploc	Pad Location (file format)	
Q	

QRC	

S	

subckt	Subcircuit	Cadence Learning & Support
Celsius
M	

MSA	Multi-domain System Analysis	
Tempus
S	

STA	Static Timing Analysis	
Quantus
Q	

QRC Extraction	Quantus Resistance/Capacitance and inductance extract)