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R8168 patch
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From 4432cb37605d80e694aa686de703c90c6df291e5 Mon Sep 17 00:00:00 2001 | |
From: Daniel Drake <drake@endlessm.com> | |
Date: Wed, 27 Sep 2017 14:51:35 +0800 | |
Subject: [PATCH] r8168 | |
--- | |
drivers/net/Makefile | 1 + | |
drivers/net/r8168/Makefile | 58 + | |
drivers/net/r8168/README | 141 + | |
drivers/net/r8168/autorun.sh | 86 + | |
drivers/net/r8168/src/Makefile | 106 + | |
drivers/net/r8168/src/Makefile_linux24x | 74 + | |
drivers/net/r8168/src/r8168.h | 1613 ++ | |
drivers/net/r8168/src/r8168_asf.c | 419 + | |
drivers/net/r8168/src/r8168_asf.h | 294 + | |
drivers/net/r8168/src/r8168_dash.h | 193 + | |
drivers/net/r8168/src/r8168_fiber.h | 57 + | |
drivers/net/r8168/src/r8168_n.c | 26286 ++++++++++++++++++++++++++++++ | |
drivers/net/r8168/src/r8168_realwow.h | 117 + | |
drivers/net/r8168/src/rtl_eeprom.c | 291 + | |
drivers/net/r8168/src/rtl_eeprom.h | 55 + | |
drivers/net/r8168/src/rtltool.c | 305 + | |
drivers/net/r8168/src/rtltool.h | 49 + | |
17 files changed, 30145 insertions(+) | |
create mode 100755 drivers/net/r8168/Makefile | |
create mode 100755 drivers/net/r8168/README | |
create mode 100755 drivers/net/r8168/autorun.sh | |
create mode 100755 drivers/net/r8168/src/Makefile | |
create mode 100755 drivers/net/r8168/src/Makefile_linux24x | |
create mode 100755 drivers/net/r8168/src/r8168.h | |
create mode 100755 drivers/net/r8168/src/r8168_asf.c | |
create mode 100755 drivers/net/r8168/src/r8168_asf.h | |
create mode 100755 drivers/net/r8168/src/r8168_dash.h | |
create mode 100755 drivers/net/r8168/src/r8168_fiber.h | |
create mode 100755 drivers/net/r8168/src/r8168_n.c | |
create mode 100755 drivers/net/r8168/src/r8168_realwow.h | |
create mode 100755 drivers/net/r8168/src/rtl_eeprom.c | |
create mode 100755 drivers/net/r8168/src/rtl_eeprom.h | |
create mode 100755 drivers/net/r8168/src/rtltool.c | |
create mode 100755 drivers/net/r8168/src/rtltool.h | |
diff --git a/drivers/net/Makefile b/drivers/net/Makefile | |
index b2f6556d8848..943048046b51 100644 | |
--- a/drivers/net/Makefile | |
+++ b/drivers/net/Makefile | |
@@ -19,6 +19,7 @@ obj-$(CONFIG_MDIO) += mdio.o | |
obj-$(CONFIG_NET) += Space.o loopback.o | |
obj-$(CONFIG_NETCONSOLE) += netconsole.o | |
obj-y += phy/ | |
+obj-y += r8168/src/ | |
obj-$(CONFIG_RIONET) += rionet.o | |
obj-$(CONFIG_NET_TEAM) += team/ | |
obj-$(CONFIG_TUN) += tun.o | |
diff --git a/drivers/net/r8168/Makefile b/drivers/net/r8168/Makefile | |
new file mode 100755 | |
index 000000000000..a41f96ed6879 | |
--- /dev/null | |
+++ b/drivers/net/r8168/Makefile | |
@@ -0,0 +1,58 @@ | |
+################################################################################ | |
+# | |
+# r8168 is the Linux device driver released for Realtek Gigabit Ethernet | |
+# controllers with PCI-Express interface. | |
+# | |
+# Copyright(c) 2013 Realtek Semiconductor Corp. All rights reserved. | |
+# | |
+# This program is free software; you can redistribute it and/or modify it | |
+# under the terms of the GNU General Public License as published by the Free | |
+# Software Foundation; either version 2 of the License, or (at your option) | |
+# any later version. | |
+# | |
+# This program is distributed in the hope that it will be useful, but WITHOUT | |
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
+# more details. | |
+# | |
+# You should have received a copy of the GNU General Public License along with | |
+# this program; if not, see <http://www.gnu.org/licenses/>. | |
+# | |
+# Author: | |
+# Realtek NIC software team <nicfae@realtek.com> | |
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan | |
+# | |
+################################################################################ | |
+ | |
+################################################################################ | |
+# This product is covered by one or more of the following patents: | |
+# US6,570,884, US6,115,776, and US6,327,625. | |
+################################################################################ | |
+ | |
+KFLAG := 2$(shell uname -r | sed -ne 's/^2\.[4]\..*/4/p')x | |
+ | |
+all: clean modules install | |
+ | |
+modules: | |
+ifeq ($(KFLAG),24x) | |
+ $(MAKE) -C src/ -f Makefile_linux24x modules | |
+else | |
+ $(MAKE) -C src/ modules | |
+endif | |
+ | |
+clean: | |
+ifeq ($(KFLAG),24x) | |
+ $(MAKE) -C src/ -f Makefile_linux24x clean | |
+else | |
+ $(MAKE) -C src/ clean | |
+endif | |
+ | |
+install: | |
+ifeq ($(KFLAG),24x) | |
+ $(MAKE) -C src/ -f Makefile_linux24x install | |
+else | |
+ $(MAKE) -C src/ install | |
+endif | |
+ | |
+ | |
+ | |
diff --git a/drivers/net/r8168/README b/drivers/net/r8168/README | |
new file mode 100755 | |
index 000000000000..9236a7f3429e | |
--- /dev/null | |
+++ b/drivers/net/r8168/README | |
@@ -0,0 +1,141 @@ | |
+<Linux device driver for Realtek Ethernet controllers> | |
+ | |
+ This is the Linux device driver released for RealTek RTL8168B/8111B, RTL8168C/8111C, RTL8168CP/8111CP, RTL8168D/8111D, RTL8168DP/8111DP, and RTL8168E/8111E Gigabit Ethernet controllers with PCI-Express interface. | |
+ | |
+<Requirements> | |
+ | |
+ - Kernel source tree (supported Linux kernel 2.6.x and 2.4.x) | |
+ - For linux kernel 2.4.x, this driver supports 2.4.20 and latter. | |
+ - Compiler/binutils for kernel compilation | |
+ | |
+<Quick install with proper kernel settings> | |
+ Unpack the tarball : | |
+ # tar vjxf r8168-8.aaa.bb.tar.bz2 | |
+ | |
+ Change to the directory: | |
+ # cd r8168-8.aaa.bb | |
+ | |
+ If you are running the target kernel, then you should be able to do : | |
+ | |
+ # ./autorun.sh (as root or with sudo) | |
+ | |
+ You can check whether the driver is loaded by using following commands. | |
+ | |
+ # lsmod | grep r8168 | |
+ # ifconfig -a | |
+ | |
+ If there is a device name, ethX, shown on the monitor, the linux | |
+ driver is loaded. Then, you can use the following command to activate | |
+ the ethX. | |
+ | |
+ # ifconfig ethX up | |
+ | |
+ ,where X=0,1,2,... | |
+ | |
+<Set the network related information> | |
+ 1. Set manually | |
+ a. Set the IP address of your machine. | |
+ | |
+ # ifconfig ethX "the IP address of your machine" | |
+ | |
+ b. Set the IP address of DNS. | |
+ | |
+ Insert the following configuration in /etc/resolv.conf. | |
+ | |
+ nameserver "the IP address of DNS" | |
+ | |
+ c. Set the IP address of gateway. | |
+ | |
+ # route add default gw "the IP address of gateway" | |
+ | |
+ 2. Set by doing configurations in /etc/sysconfig/network-scripts | |
+ /ifcfg-ethX for Redhat and Fedora, or /etc/sysconfig/network | |
+ /ifcfg-ethX for SuSE. There are two examples to set network | |
+ configurations. | |
+ | |
+ a. Fixed IP address: | |
+ DEVICE=eth0 | |
+ BOOTPROTO=static | |
+ ONBOOT=yes | |
+ TYPE=ethernet | |
+ NETMASK=255.255.255.0 | |
+ IPADDR=192.168.1.1 | |
+ GATEWAY=192.168.1.254 | |
+ BROADCAST=192.168.1.255 | |
+ | |
+ b. DHCP: | |
+ DEVICE=eth0 | |
+ BOOTPROTO=dhcp | |
+ ONBOOT=yes | |
+ | |
+<Modify the MAC address> | |
+ There are two ways to modify the MAC address of the NIC. | |
+ 1. Use ifconfig: | |
+ | |
+ # ifconfig ethX hw ether YY:YY:YY:YY:YY:YY | |
+ | |
+ ,where X is the device number assigned by Linux kernel, and | |
+ YY:YY:YY:YY:YY:YY is the MAC address assigned by the user. | |
+ | |
+ 2. Use ip: | |
+ | |
+ # ip link set ethX address YY:YY:YY:YY:YY:YY | |
+ | |
+ ,where X is the device number assigned by Linux kernel, and | |
+ YY:YY:YY:YY:YY:YY is the MAC address assigned by the user. | |
+ | |
+<Force Link Status> | |
+ | |
+ 1. Force the link status when insert the driver. | |
+ | |
+ If the user is in the path ~/r8168, the link status can be forced | |
+ to one of the 5 modes as following command. | |
+ | |
+ # insmod ./src/r8168.ko speed=SPEED_MODE duplex=DUPLEX_MODE autoneg=NWAY_OPTION | |
+ | |
+ ,where | |
+ SPEED_MODE = 1000 for 1000Mbps | |
+ = 100 for 100Mbps | |
+ = 10 for 10Mbps | |
+ DUPLEX_MODE = 0 for half-duplex | |
+ = 1 for full-duplex | |
+ NWAY_OPTION = 0 for auto-negotiation off (true force) | |
+ = 1 for auto-negotiation on (nway force) | |
+ For example: | |
+ | |
+ # insmod ./src/r8168.ko speed=100 duplex=0 autoneg=1 | |
+ | |
+ will force PHY to operate in 100Mpbs Half-duplex(nway force). | |
+ | |
+ 2. Force the link status by using ethtool. | |
+ a. Insert the driver first. | |
+ b. Make sure that ethtool exists in /sbin. | |
+ c. Force the link status as the following command. | |
+ | |
+ # ethtool -s ethX speed SPEED_MODE duplex DUPLEX_MODE autoneg NWAY_OPTION | |
+ | |
+ ,where | |
+ SPEED_MODE = 1000 for 1000Mbps | |
+ = 100 for 100Mbps | |
+ = 10 for 10Mbps | |
+ DUPLEX_MODE = half for half-duplex | |
+ = full for full-duplex | |
+ NWAY_OPTION = off for auto-negotiation off (true force) | |
+ = on for auto-negotiation on (nway force) | |
+ | |
+ For example: | |
+ | |
+ # ethtool -s eth0 speed 100 duplex full autoneg on | |
+ | |
+ will force PHY to operate in 100Mpbs Full-duplex(nway force). | |
+ | |
+<Jumbo Frame> | |
+ Transmitting Jumbo Frames, whose packet size is bigger than 1500 bytes, please change mtu by the following command. | |
+ | |
+ # ifconfig ethX mtu MTU | |
+ | |
+ , where X=0,1,2,..., and MTU is configured by user. | |
+ | |
+ RTL8168B/8111B supports Jumbo Frame size up to 4 kBytes. | |
+ RTL8168C/8111C and RTL8168CP/8111CP support Jumbo Frame size up to 6 kBytes. | |
+ RTL8168D/8111D supports Jumbo Frame size up to 9 kBytes. | |
diff --git a/drivers/net/r8168/autorun.sh b/drivers/net/r8168/autorun.sh | |
new file mode 100755 | |
index 000000000000..689cd8a4fb26 | |
--- /dev/null | |
+++ b/drivers/net/r8168/autorun.sh | |
@@ -0,0 +1,86 @@ | |
+#!/bin/sh | |
+ | |
+# invoke insmod with all arguments we got | |
+# and use a pathname, as insmod doesn't look in . by default | |
+ | |
+TARGET_PATH=$(find /lib/modules/$(uname -r)/kernel/drivers/net/ethernet -name realtek -type d) | |
+if [ "$TARGET_PATH" = "" ]; then | |
+ TARGET_PATH=$(find /lib/modules/$(uname -r)/kernel/drivers/net -name realtek -type d) | |
+fi | |
+if [ "$TARGET_PATH" = "" ]; then | |
+ TARGET_PATH=/lib/modules/$(uname -r)/kernel/drivers/net | |
+fi | |
+echo | |
+echo "Check old driver and unload it." | |
+check=`lsmod | grep r8169` | |
+if [ "$check" != "" ]; then | |
+ echo "rmmod r8169" | |
+ /sbin/rmmod r8169 | |
+fi | |
+ | |
+check=`lsmod | grep r8168` | |
+if [ "$check" != "" ]; then | |
+ echo "rmmod r8168" | |
+ /sbin/rmmod r8168 | |
+fi | |
+ | |
+echo "Build the module and install" | |
+echo "-------------------------------" >> log.txt | |
+date 1>>log.txt | |
+make $@ all 1>>log.txt || exit 1 | |
+module=`ls src/*.ko` | |
+module=${module#src/} | |
+module=${module%.ko} | |
+ | |
+if [ "$module" = "" ]; then | |
+ echo "No driver exists!!!" | |
+ exit 1 | |
+elif [ "$module" != "r8169" ]; then | |
+ if test -e $TARGET_PATH/r8169.ko ; then | |
+ echo "Backup r8169.ko" | |
+ if test -e $TARGET_PATH/r8169.bak ; then | |
+ i=0 | |
+ while test -e $TARGET_PATH/r8169.bak$i | |
+ do | |
+ i=$(($i+1)) | |
+ done | |
+ echo "rename r8169.ko to r8169.bak$i" | |
+ mv $TARGET_PATH/r8169.ko $TARGET_PATH/r8169.bak$i | |
+ else | |
+ echo "rename r8169.ko to r8169.bak" | |
+ mv $TARGET_PATH/r8169.ko $TARGET_PATH/r8169.bak | |
+ fi | |
+ fi | |
+fi | |
+ | |
+echo "DEPMOD $(uname -r)" | |
+depmod `uname -r` | |
+echo "load module $module" | |
+modprobe $module | |
+ | |
+is_update_initramfs=n | |
+distrib_list="ubuntu debian" | |
+ | |
+if [ -r /etc/debian_version ]; then | |
+ is_update_initramfs=y | |
+elif [ -r /etc/lsb-release ]; then | |
+ for distrib in $distrib_list | |
+ do | |
+ /bin/grep -i "$distrib" /etc/lsb-release 2>&1 /dev/null && \ | |
+ is_update_initramfs=y && break | |
+ done | |
+fi | |
+ | |
+if [ "$is_update_initramfs" = "y" ]; then | |
+ if which update-initramfs >/dev/null ; then | |
+ echo "Updating initramfs. Please wait." | |
+ update-initramfs -u -k $(uname -r) | |
+ else | |
+ echo "update-initramfs: command not found" | |
+ exit 1 | |
+ fi | |
+fi | |
+ | |
+echo "Completed." | |
+exit 0 | |
+ | |
diff --git a/drivers/net/r8168/src/Makefile b/drivers/net/r8168/src/Makefile | |
new file mode 100755 | |
index 000000000000..3be470f220fd | |
--- /dev/null | |
+++ b/drivers/net/r8168/src/Makefile | |
@@ -0,0 +1,106 @@ | |
+################################################################################ | |
+# | |
+# r8168 is the Linux device driver released for Realtek Gigabit Ethernet | |
+# controllers with PCI-Express interface. | |
+# | |
+# Copyright(c) 2014 Realtek Semiconductor Corp. All rights reserved. | |
+# | |
+# This program is free software; you can redistribute it and/or modify it | |
+# under the terms of the GNU General Public License as published by the Free | |
+# Software Foundation; either version 2 of the License, or (at your option) | |
+# any later version. | |
+# | |
+# This program is distributed in the hope that it will be useful, but WITHOUT | |
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
+# more details. | |
+# | |
+# You should have received a copy of the GNU General Public License along with | |
+# this program; if not, see <http://www.gnu.org/licenses/>. | |
+# | |
+# Author: | |
+# Realtek NIC software team <nicfae@realtek.com> | |
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan | |
+# | |
+################################################################################ | |
+ | |
+################################################################################ | |
+# This product is covered by one or more of the following patents: | |
+# US6,570,884, US6,115,776, and US6,327,625. | |
+################################################################################ | |
+ | |
+CONFIG_SOC_LAN = n | |
+ENABLE_FIBER_SUPPORT = n | |
+ENABLE_REALWOW_SUPPORT = n | |
+ENABLE_DASH_SUPPORT = n | |
+CONFIG_DOWN_SPEED_100 = n | |
+CONFIG_ASPM = y | |
+ENABLE_S5WOL = y | |
+ENABLE_EEE = n | |
+ENABLE_S0_MAGIC_PACKET = n | |
+ | |
+ifneq ($(KERNELRELEASE),) | |
+ obj-y := r8168.o | |
+ r8168-objs := r8168_n.o r8168_asf.o rtl_eeprom.o rtltool.o | |
+ ifeq ($(CONFIG_SOC_LAN), y) | |
+ EXTRA_CFLAGS += -DCONFIG_SOC_LAN | |
+ endif | |
+ ifeq ($(ENABLE_FIBER_SUPPORT), y) | |
+ r8168-objs += r8168_fiber.o | |
+ EXTRA_CFLAGS += -DENABLE_FIBER_SUPPORT | |
+ endif | |
+ ifeq ($(ENABLE_REALWOW_SUPPORT), y) | |
+ r8168-objs += r8168_realwow.o | |
+ EXTRA_CFLAGS += -DENABLE_REALWOW_SUPPORT | |
+ endif | |
+ ifeq ($(ENABLE_DASH_SUPPORT), y) | |
+ r8168-objs += r8168_dash.o | |
+ EXTRA_CFLAGS += -DENABLE_DASH_SUPPORT | |
+ endif | |
+ EXTRA_CFLAGS += -DCONFIG_R8168_NAPI | |
+ EXTRA_CFLAGS += -DCONFIG_R8168_VLAN | |
+ ifeq ($(CONFIG_DOWN_SPEED_100), y) | |
+ EXTRA_CFLAGS += -DCONFIG_DOWN_SPEED_100 | |
+ endif | |
+ ifeq ($(CONFIG_ASPM), y) | |
+ EXTRA_CFLAGS += -DCONFIG_ASPM | |
+ endif | |
+ ifeq ($(ENABLE_S5WOL), y) | |
+ EXTRA_CFLAGS += -DENABLE_S5WOL | |
+ endif | |
+ ifeq ($(ENABLE_EEE), y) | |
+ EXTRA_CFLAGS += -DENABLE_EEE | |
+ endif | |
+ ifeq ($(ENABLE_S0_MAGIC_PACKET), y) | |
+ EXTRA_CFLAGS += -DENABLE_S0_MAGIC_PACKET | |
+ endif | |
+else | |
+ BASEDIR := /lib/modules/$(shell uname -r) | |
+ KERNELDIR ?= $(BASEDIR)/build | |
+ PWD :=$(shell pwd) | |
+ DRIVERDIR := $(shell find $(BASEDIR)/kernel/drivers/net/ethernet -name realtek -type d) | |
+ ifeq ($(DRIVERDIR),) | |
+ DRIVERDIR := $(shell find $(BASEDIR)/kernel/drivers/net -name realtek -type d) | |
+ endif | |
+ ifeq ($(DRIVERDIR),) | |
+ DRIVERDIR := $(BASEDIR)/kernel/drivers/net | |
+ endif | |
+ RTKDIR := $(subst $(BASEDIR)/,,$(DRIVERDIR)) | |
+ | |
+.PHONY: all | |
+all: clean modules install | |
+ | |
+.PHONY:modules | |
+modules: | |
+ $(MAKE) -C $(KERNELDIR) SUBDIRS=$(PWD) modules | |
+ | |
+.PHONY:clean | |
+clean: | |
+ $(MAKE) -C $(KERNELDIR) SUBDIRS=$(PWD) clean | |
+ | |
+.PHONY:install | |
+install: | |
+ $(MAKE) -C $(KERNELDIR) SUBDIRS=$(PWD) INSTALL_MOD_DIR=$(RTKDIR) modules_install | |
+ | |
+endif | |
+ | |
diff --git a/drivers/net/r8168/src/Makefile_linux24x b/drivers/net/r8168/src/Makefile_linux24x | |
new file mode 100755 | |
index 000000000000..5c7e94992fd2 | |
--- /dev/null | |
+++ b/drivers/net/r8168/src/Makefile_linux24x | |
@@ -0,0 +1,74 @@ | |
+################################################################################ | |
+# | |
+# r8168 is the Linux device driver released for Realtek Gigabit Ethernet | |
+# controllers with PCI-Express interface. | |
+# | |
+# Copyright(c) 2013 Realtek Semiconductor Corp. All rights reserved. | |
+# | |
+# This program is free software; you can redistribute it and/or modify it | |
+# under the terms of the GNU General Public License as published by the Free | |
+# Software Foundation; either version 2 of the License, or (at your option) | |
+# any later version. | |
+# | |
+# This program is distributed in the hope that it will be useful, but WITHOUT | |
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
+# more details. | |
+# | |
+# You should have received a copy of the GNU General Public License along with | |
+# this program; if not, see <http://www.gnu.org/licenses/>. | |
+# | |
+# Author: | |
+# Realtek NIC software team <nicfae@realtek.com> | |
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan | |
+# | |
+################################################################################ | |
+ | |
+################################################################################ | |
+# This product is covered by one or more of the following patents: | |
+# US6,570,884, US6,115,776, and US6,327,625. | |
+################################################################################ | |
+ | |
+CC := gcc | |
+LD := ld | |
+ARCH := $(shell uname -m | sed 's/i.86/i386/') | |
+KSRC := /lib/modules/$(shell uname -r)/build | |
+CONFIG_FILE := $(KSRC)/include/linux/autoconf.h | |
+KMISC := /lib/modules/$(shell uname -r)/kernel/drivers/net/ | |
+ | |
+ | |
+ifeq ($(ARCH),x86_64) | |
+ MODCFLAGS += -mcmodel=kernel -mno-red-zone | |
+endif | |
+ | |
+#standard flags for module builds | |
+MODCFLAGS += -DLINUX -D__KERNEL__ -DMODULE -O2 -pipe -Wall | |
+MODCFLAGS += -I$(KSRC)/include -I. | |
+MODCFLAGS += -DMODVERSIONS -DEXPORT_SYMTAB -include $(KSRC)/include/linux/modversions.h | |
+SOURCE := r8168_n.c r8168_asf.c rtl_eeprom.c rtltool.c | |
+OBJS := $(SOURCE:.c=.o) | |
+ | |
+ | |
+SMP := $(shell $(CC) $(MODCFLAGS) -E -dM $(CONFIG_FILE) | \ | |
+ grep CONFIG_SMP | awk '{print $$3}') | |
+ | |
+ifneq ($(SMP),1) | |
+ SMP := 0 | |
+endif | |
+ | |
+ifeq ($(SMP),1) | |
+ MODCFLAGS += -D__SMP__ | |
+endif | |
+ | |
+modules: $(OBJS) | |
+ $(LD) -r $^ -o r8168.o | |
+ strip --strip-debug r8168.o | |
+ | |
+%.o: %.c | |
+ $(CC) $(MODCFLAGS) -c $< -o $@ | |
+ | |
+clean: | |
+ rm *.o -f | |
+ | |
+install: | |
+ install -m 744 -c r8168.o $(KMISC) | |
diff --git a/drivers/net/r8168/src/r8168.h b/drivers/net/r8168/src/r8168.h | |
new file mode 100755 | |
index 000000000000..be9d4d003a3f | |
--- /dev/null | |
+++ b/drivers/net/r8168/src/r8168.h | |
@@ -0,0 +1,1613 @@ | |
+/* | |
+################################################################################ | |
+# | |
+# r8168 is the Linux device driver released for Realtek Gigabit Ethernet | |
+# controllers with PCI-Express interface. | |
+# | |
+# Copyright(c) 2017 Realtek Semiconductor Corp. All rights reserved. | |
+# | |
+# This program is free software; you can redistribute it and/or modify it | |
+# under the terms of the GNU General Public License as published by the Free | |
+# Software Foundation; either version 2 of the License, or (at your option) | |
+# any later version. | |
+# | |
+# This program is distributed in the hope that it will be useful, but WITHOUT | |
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
+# more details. | |
+# | |
+# You should have received a copy of the GNU General Public License along with | |
+# this program; if not, see <http://www.gnu.org/licenses/>. | |
+# | |
+# Author: | |
+# Realtek NIC software team <nicfae@realtek.com> | |
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan | |
+# | |
+################################################################################ | |
+*/ | |
+ | |
+/************************************************************************************ | |
+ * This product is covered by one or more of the following patents: | |
+ * US6,570,884, US6,115,776, and US6,327,625. | |
+ ***********************************************************************************/ | |
+ | |
+#include <linux/ethtool.h> | |
+#include "r8168_dash.h" | |
+#include "r8168_realwow.h" | |
+#include "r8168_fiber.h" | |
+ | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) | |
+#if defined(skb_vlan_tag_present) && !defined(vlan_tx_tag_present) | |
+#define vlan_tx_tag_present skb_vlan_tag_present | |
+#endif | |
+#if defined(skb_vlan_tag_get) && !defined(vlan_tx_tag_get) | |
+#define vlan_tx_tag_get skb_vlan_tag_get | |
+#endif | |
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) | |
+ | |
+#define RTL_ALLOC_SKB_INTR(tp, length) dev_alloc_skb(length) | |
+#ifdef CONFIG_R8168_NAPI | |
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,19,0) | |
+#undef RTL_ALLOC_SKB_INTR | |
+#define RTL_ALLOC_SKB_INTR(tp, length) napi_alloc_skb(&tp->napi, length) | |
+#endif | |
+#endif | |
+ | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0) | |
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0) | |
+#define netdev_features_t u32 | |
+#endif | |
+#endif | |
+ | |
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,5,0) | |
+#define NETIF_F_ALL_CSUM NETIF_F_CSUM_MASK | |
+#else | |
+#ifndef NETIF_F_ALL_CSUM | |
+#define NETIF_F_ALL_CSUM NETIF_F_CSUM_MASK | |
+#endif | |
+#endif | |
+ | |
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,37) | |
+#define ENABLE_R8168_PROCFS | |
+#endif | |
+ | |
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) | |
+#define NETIF_F_HW_VLAN_RX NETIF_F_HW_VLAN_CTAG_RX | |
+#define NETIF_F_HW_VLAN_TX NETIF_F_HW_VLAN_CTAG_TX | |
+#endif | |
+ | |
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,8,0) | |
+#define __devinit | |
+#define __devexit | |
+#define __devexit_p(func) func | |
+#endif | |
+ | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) | |
+#define CHECKSUM_PARTIAL CHECKSUM_HW | |
+#endif | |
+ | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) | |
+#define irqreturn_t void | |
+#define IRQ_HANDLED 1 | |
+#define IRQ_NONE 0 | |
+#define IRQ_RETVAL(x) | |
+#endif | |
+ | |
+#ifndef NETIF_F_RXALL | |
+#define NETIF_F_RXALL 0 | |
+#endif | |
+ | |
+#ifndef NETIF_F_RXFCS | |
+#define NETIF_F_RXFCS 0 | |
+#endif | |
+ | |
+#ifndef HAVE_FREE_NETDEV | |
+#define free_netdev(x) kfree(x) | |
+#endif | |
+ | |
+#ifndef SET_NETDEV_DEV | |
+#define SET_NETDEV_DEV(net, pdev) | |
+#endif | |
+ | |
+#ifndef SET_MODULE_OWNER | |
+#define SET_MODULE_OWNER(dev) | |
+#endif | |
+ | |
+#ifndef SA_SHIRQ | |
+#define SA_SHIRQ IRQF_SHARED | |
+#endif | |
+ | |
+#ifndef NETIF_F_GSO | |
+#define gso_size tso_size | |
+#define gso_segs tso_segs | |
+#endif | |
+ | |
+#ifndef PCI_VENDOR_ID_DLINK | |
+#define PCI_VENDOR_ID_DLINK 0x1186 | |
+#endif | |
+ | |
+#ifndef dma_mapping_error | |
+#define dma_mapping_error(a,b) 0 | |
+#endif | |
+ | |
+#ifndef netif_err | |
+#define netif_err(a,b,c,d) | |
+#endif | |
+ | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29) | |
+#ifdef CONFIG_NET_POLL_CONTROLLER | |
+#define RTL_NET_POLL_CONTROLLER dev->poll_controller=rtl8168_netpoll | |
+#else | |
+#define RTL_NET_POLL_CONTROLLER | |
+#endif | |
+ | |
+#ifdef CONFIG_R8168_VLAN | |
+#define RTL_SET_VLAN dev->vlan_rx_register=rtl8168_vlan_rx_register | |
+#else | |
+#define RTL_SET_VLAN | |
+#endif | |
+ | |
+#define RTL_NET_DEVICE_OPS(ops) dev->open=rtl8168_open; \ | |
+ dev->hard_start_xmit=rtl8168_start_xmit; \ | |
+ dev->get_stats=rtl8168_get_stats; \ | |
+ dev->stop=rtl8168_close; \ | |
+ dev->tx_timeout=rtl8168_tx_timeout; \ | |
+ dev->set_multicast_list=rtl8168_set_rx_mode; \ | |
+ dev->change_mtu=rtl8168_change_mtu; \ | |
+ dev->set_mac_address=rtl8168_set_mac_address; \ | |
+ dev->do_ioctl=rtl8168_do_ioctl; \ | |
+ RTL_NET_POLL_CONTROLLER; \ | |
+ RTL_SET_VLAN; | |
+#else | |
+#define RTL_NET_DEVICE_OPS(ops) dev->netdev_ops=&ops | |
+#endif | |
+ | |
+#ifndef FALSE | |
+#define FALSE 0 | |
+#endif | |
+ | |
+#ifndef TRUE | |
+#define TRUE 1 | |
+#endif | |
+ | |
+#ifndef false | |
+#define false 0 | |
+#endif | |
+ | |
+#ifndef true | |
+#define true 1 | |
+#endif | |
+ | |
+//Hardware will continue interrupt 10 times after interrupt finished. | |
+#define RTK_KEEP_INTERRUPT_COUNT (10) | |
+ | |
+//Due to the hardware design of RTL8111B, the low 32 bit address of receive | |
+//buffer must be 8-byte alignment. | |
+#ifndef NET_IP_ALIGN | |
+#define NET_IP_ALIGN 2 | |
+#endif | |
+#define RTK_RX_ALIGN 8 | |
+ | |
+#ifdef CONFIG_R8168_NAPI | |
+#define NAPI_SUFFIX "-NAPI" | |
+#else | |
+#define NAPI_SUFFIX "" | |
+#endif | |
+ | |
+#define RTL8168_VERSION "8.044.02" NAPI_SUFFIX | |
+#define MODULENAME "r8168" | |
+#define PFX MODULENAME ": " | |
+ | |
+#define GPL_CLAIM "\ | |
+r8168 Copyright (C) 2017 Realtek NIC software team <nicfae@realtek.com> \n \ | |
+This program comes with ABSOLUTELY NO WARRANTY; for details, please see <http://www.gnu.org/licenses/>. \n \ | |
+This is free software, and you are welcome to redistribute it under certain conditions; see <http://www.gnu.org/licenses/>. \n" | |
+ | |
+#ifdef RTL8168_DEBUG | |
+#define assert(expr) \ | |
+ if(!(expr)) { \ | |
+ printk( "Assertion failed! %s,%s,%s,line=%d\n", \ | |
+ #expr,__FILE__,__FUNCTION__,__LINE__); \ | |
+ } | |
+#define dprintk(fmt, args...) do { printk(PFX fmt, ## args); } while (0) | |
+#else | |
+#define assert(expr) do {} while (0) | |
+#define dprintk(fmt, args...) do {} while (0) | |
+#endif /* RTL8168_DEBUG */ | |
+ | |
+#define R8168_MSG_DEFAULT \ | |
+ (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN) | |
+ | |
+#define TX_BUFFS_AVAIL(tp) \ | |
+ (tp->dirty_tx + NUM_TX_DESC - tp->cur_tx - 1) | |
+ | |
+#ifdef CONFIG_R8168_NAPI | |
+#define rtl8168_rx_hwaccel_skb vlan_hwaccel_receive_skb | |
+#define rtl8168_rx_quota(count, quota) min(count, quota) | |
+#else | |
+#define rtl8168_rx_hwaccel_skb vlan_hwaccel_rx | |
+#define rtl8168_rx_quota(count, quota) count | |
+#endif | |
+ | |
+/* MAC address length */ | |
+#ifndef MAC_ADDR_LEN | |
+#define MAC_ADDR_LEN 6 | |
+#endif | |
+ | |
+#ifndef MAC_PROTOCOL_LEN | |
+#define MAC_PROTOCOL_LEN 2 | |
+#endif | |
+ | |
+#define Reserved2_data 7 | |
+#define RX_DMA_BURST 7 /* Maximum PCI burst, '6' is 1024 */ | |
+#define TX_DMA_BURST_unlimited 7 | |
+#define TX_DMA_BURST_1024 6 | |
+#define TX_DMA_BURST_512 5 | |
+#define TX_DMA_BURST_256 4 | |
+#define TX_DMA_BURST_128 3 | |
+#define TX_DMA_BURST_64 2 | |
+#define TX_DMA_BURST_32 1 | |
+#define TX_DMA_BURST_16 0 | |
+#define Reserved1_data 0x3F | |
+#define RxPacketMaxSize 0x3FE8 /* 16K - 1 - ETH_HLEN - VLAN - CRC... */ | |
+#define Jumbo_Frame_2k (2 * 1024) | |
+#define Jumbo_Frame_3k (3 * 1024) | |
+#define Jumbo_Frame_4k (4 * 1024) | |
+#define Jumbo_Frame_5k (5 * 1024) | |
+#define Jumbo_Frame_6k (6 * 1024) | |
+#define Jumbo_Frame_7k (7 * 1024) | |
+#define Jumbo_Frame_8k (8 * 1024) | |
+#define Jumbo_Frame_9k (9 * 1024) | |
+#define InterFrameGap 0x03 /* 3 means InterFrameGap = the shortest one */ | |
+#define RxEarly_off_V1 (0x07 << 11) | |
+#define RxEarly_off_V2 (1 << 11) | |
+#define Rx_Single_fetch_V2 (1 << 14) | |
+ | |
+#define R8168_REGS_SIZE (256) | |
+#define R8168_MAC_REGS_SIZE (256) | |
+#define R8168_PHY_REGS_SIZE (16*2) | |
+#define R8168_EPHY_REGS_SIZE (31*2) | |
+#define R8168_ERI_REGS_SIZE (0x100) | |
+#define R8168_REGS_DUMP_SIZE (0x400) | |
+#define R8168_PCI_REGS_SIZE (0x100) | |
+#define R8168_NAPI_WEIGHT 64 | |
+ | |
+#define RTL8168_TX_TIMEOUT (6 * HZ) | |
+#define RTL8168_LINK_TIMEOUT (1 * HZ) | |
+#define RTL8168_ESD_TIMEOUT (2 * HZ) | |
+ | |
+#define NUM_TX_DESC 1024 /* Number of Tx descriptor registers */ | |
+#define NUM_RX_DESC 1024 /* Number of Rx descriptor registers */ | |
+ | |
+#define RX_BUF_SIZE 0x05F3 /* 0x05F3 = 1522bye + 1 */ | |
+#define R8168_TX_RING_BYTES (NUM_TX_DESC * sizeof(struct TxDesc)) | |
+#define R8168_RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc)) | |
+ | |
+#define NODE_ADDRESS_SIZE 6 | |
+ | |
+#define SHORT_PACKET_PADDING_BUF_SIZE 256 | |
+ | |
+/* write/read MMIO register */ | |
+#define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg)) | |
+#define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg)) | |
+#define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg)) | |
+#define RTL_R8(reg) readb (ioaddr + (reg)) | |
+#define RTL_R16(reg) readw (ioaddr + (reg)) | |
+#define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg))) | |
+ | |
+#ifndef DMA_64BIT_MASK | |
+#define DMA_64BIT_MASK 0xffffffffffffffffULL | |
+#endif | |
+ | |
+#ifndef DMA_32BIT_MASK | |
+#define DMA_32BIT_MASK 0x00000000ffffffffULL | |
+#endif | |
+ | |
+#ifndef NETDEV_TX_OK | |
+#define NETDEV_TX_OK 0 /* driver took care of packet */ | |
+#endif | |
+ | |
+#ifndef NETDEV_TX_BUSY | |
+#define NETDEV_TX_BUSY 1 /* driver tx path was busy*/ | |
+#endif | |
+ | |
+#ifndef NETDEV_TX_LOCKED | |
+#define NETDEV_TX_LOCKED -1 /* driver tx lock was already taken */ | |
+#endif | |
+ | |
+#ifndef ADVERTISED_Pause | |
+#define ADVERTISED_Pause (1 << 13) | |
+#endif | |
+ | |
+#ifndef ADVERTISED_Asym_Pause | |
+#define ADVERTISED_Asym_Pause (1 << 14) | |
+#endif | |
+ | |
+#ifndef ADVERTISE_PAUSE_CAP | |
+#define ADVERTISE_PAUSE_CAP 0x400 | |
+#endif | |
+ | |
+#ifndef ADVERTISE_PAUSE_ASYM | |
+#define ADVERTISE_PAUSE_ASYM 0x800 | |
+#endif | |
+ | |
+#ifndef MII_CTRL1000 | |
+#define MII_CTRL1000 0x09 | |
+#endif | |
+ | |
+#ifndef ADVERTISE_1000FULL | |
+#define ADVERTISE_1000FULL 0x200 | |
+#endif | |
+ | |
+#ifndef ADVERTISE_1000HALF | |
+#define ADVERTISE_1000HALF 0x100 | |
+#endif | |
+ | |
+/*****************************************************************************/ | |
+ | |
+//#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,3) | |
+#if (( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,27) ) || \ | |
+ (( LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) ) && \ | |
+ ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,3) ))) | |
+/* copied from linux kernel 2.6.20 include/linux/netdev.h */ | |
+#define NETDEV_ALIGN 32 | |
+#define NETDEV_ALIGN_CONST (NETDEV_ALIGN - 1) | |
+ | |
+static inline void *netdev_priv(struct net_device *dev) | |
+{ | |
+ return (char *)dev + ((sizeof(struct net_device) | |
+ + NETDEV_ALIGN_CONST) | |
+ & ~NETDEV_ALIGN_CONST); | |
+} | |
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,3) | |
+ | |
+/*****************************************************************************/ | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) | |
+#define RTLDEV tp | |
+#else | |
+#define RTLDEV dev | |
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) | |
+/*****************************************************************************/ | |
+ | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) | |
+typedef struct net_device *napi_ptr; | |
+typedef int *napi_budget; | |
+ | |
+#define napi dev | |
+#define RTL_NAPI_CONFIG(ndev, priv, function, weig) ndev->poll=function; \ | |
+ ndev->weight=weig; | |
+#define RTL_NAPI_QUOTA(budget, ndev) min(*budget, ndev->quota) | |
+#define RTL_GET_PRIV(stuct_ptr, priv_struct) netdev_priv(stuct_ptr) | |
+#define RTL_GET_NETDEV(priv_ptr) | |
+#define RTL_RX_QUOTA(budget) *budget | |
+#define RTL_NAPI_QUOTA_UPDATE(ndev, work_done, budget) *budget -= work_done; \ | |
+ ndev->quota -= work_done; | |
+#define RTL_NETIF_RX_COMPLETE(dev, napi) netif_rx_complete(dev) | |
+#define RTL_NETIF_RX_SCHEDULE_PREP(dev, napi) netif_rx_schedule_prep(dev) | |
+#define __RTL_NETIF_RX_SCHEDULE(dev, napi) __netif_rx_schedule(dev) | |
+#define RTL_NAPI_RETURN_VALUE work_done >= work_to_do | |
+#define RTL_NAPI_ENABLE(dev, napi) netif_poll_enable(dev) | |
+#define RTL_NAPI_DISABLE(dev, napi) netif_poll_disable(dev) | |
+#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) | |
+#else | |
+typedef struct napi_struct *napi_ptr; | |
+typedef int napi_budget; | |
+ | |
+#define RTL_NAPI_CONFIG(ndev, priv, function, weight) netif_napi_add(ndev, &priv->napi, function, weight) | |
+#define RTL_NAPI_QUOTA(budget, ndev) min(budget, budget) | |
+#define RTL_GET_PRIV(stuct_ptr, priv_struct) container_of(stuct_ptr, priv_struct, stuct_ptr) | |
+#define RTL_GET_NETDEV(priv_ptr) struct net_device *dev = priv_ptr->dev; | |
+#define RTL_RX_QUOTA(budget) budget | |
+#define RTL_NAPI_QUOTA_UPDATE(ndev, work_done, budget) | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29) | |
+#define RTL_NETIF_RX_COMPLETE(dev, napi) netif_rx_complete(dev, napi) | |
+#define RTL_NETIF_RX_SCHEDULE_PREP(dev, napi) netif_rx_schedule_prep(dev, napi) | |
+#define __RTL_NETIF_RX_SCHEDULE(dev, napi) __netif_rx_schedule(dev, napi) | |
+#endif | |
+#if LINUX_VERSION_CODE == KERNEL_VERSION(2,6,29) | |
+#define RTL_NETIF_RX_COMPLETE(dev, napi) netif_rx_complete(napi) | |
+#define RTL_NETIF_RX_SCHEDULE_PREP(dev, napi) netif_rx_schedule_prep(napi) | |
+#define __RTL_NETIF_RX_SCHEDULE(dev, napi) __netif_rx_schedule(napi) | |
+#endif | |
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,29) | |
+#define RTL_NETIF_RX_COMPLETE(dev, napi) napi_complete(napi) | |
+#define RTL_NETIF_RX_SCHEDULE_PREP(dev, napi) napi_schedule_prep(napi) | |
+#define __RTL_NETIF_RX_SCHEDULE(dev, napi) __napi_schedule(napi) | |
+#endif | |
+#define RTL_NAPI_RETURN_VALUE work_done | |
+#define RTL_NAPI_ENABLE(dev, napi) napi_enable(napi) | |
+#define RTL_NAPI_DISABLE(dev, napi) napi_disable(napi) | |
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) | |
+ | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27) | |
+#define RTL_NAPI_DEL(priv) | |
+#else | |
+#define RTL_NAPI_DEL(priv) netif_napi_del(&priv->napi) | |
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27) | |
+ | |
+/*****************************************************************************/ | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9) | |
+#ifdef __CHECKER__ | |
+#define __iomem __attribute__((noderef, address_space(2))) | |
+extern void __chk_io_ptr(void __iomem *); | |
+#define __bitwise __attribute__((bitwise)) | |
+#else | |
+#define __iomem | |
+#define __chk_io_ptr(x) (void)0 | |
+#define __bitwise | |
+#endif | |
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9) | |
+ | |
+/*****************************************************************************/ | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,8) | |
+#ifdef __CHECKER__ | |
+#define __force __attribute__((force)) | |
+#else | |
+#define __force | |
+#endif | |
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,8) | |
+ | |
+#ifndef module_param | |
+#define module_param(v,t,p) MODULE_PARM(v, "i"); | |
+#endif | |
+ | |
+#ifndef PCI_DEVICE | |
+#define PCI_DEVICE(vend,dev) \ | |
+ .vendor = (vend), .device = (dev), \ | |
+ .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID | |
+#endif | |
+ | |
+/*****************************************************************************/ | |
+/* 2.5.28 => 2.4.23 */ | |
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,5,28) ) | |
+ | |
+static inline void _kc_synchronize_irq(void) | |
+{ | |
+ synchronize_irq(); | |
+} | |
+#undef synchronize_irq | |
+#define synchronize_irq(X) _kc_synchronize_irq() | |
+ | |
+#include <linux/tqueue.h> | |
+#define work_struct tq_struct | |
+#undef INIT_WORK | |
+#define INIT_WORK(a,b,c) INIT_TQUEUE(a,(void (*)(void *))b,c) | |
+#undef container_of | |
+#define container_of list_entry | |
+#define schedule_work schedule_task | |
+#define flush_scheduled_work flush_scheduled_tasks | |
+#endif /* 2.5.28 => 2.4.17 */ | |
+ | |
+/*****************************************************************************/ | |
+/* 2.6.4 => 2.6.0 */ | |
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,4) ) | |
+#define MODULE_VERSION(_version) MODULE_INFO(version, _version) | |
+#endif /* 2.6.4 => 2.6.0 */ | |
+/*****************************************************************************/ | |
+/* 2.6.0 => 2.5.28 */ | |
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) ) | |
+#define MODULE_INFO(version, _version) | |
+#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT | |
+#define CONFIG_E1000_DISABLE_PACKET_SPLIT 1 | |
+#endif | |
+ | |
+#define pci_set_consistent_dma_mask(dev,mask) 1 | |
+ | |
+#undef dev_put | |
+#define dev_put(dev) __dev_put(dev) | |
+ | |
+#ifndef skb_fill_page_desc | |
+#define skb_fill_page_desc _kc_skb_fill_page_desc | |
+extern void _kc_skb_fill_page_desc(struct sk_buff *skb, int i, struct page *page, int off, int size); | |
+#endif | |
+ | |
+#ifndef pci_dma_mapping_error | |
+#define pci_dma_mapping_error _kc_pci_dma_mapping_error | |
+static inline int _kc_pci_dma_mapping_error(dma_addr_t dma_addr) | |
+{ | |
+ return dma_addr == 0; | |
+} | |
+#endif | |
+ | |
+#undef ALIGN | |
+#define ALIGN(x,a) (((x)+(a)-1)&~((a)-1)) | |
+ | |
+#endif /* 2.6.0 => 2.5.28 */ | |
+ | |
+/*****************************************************************************/ | |
+/* 2.4.22 => 2.4.17 */ | |
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,22) ) | |
+#define pci_name(x) ((x)->slot_name) | |
+#endif /* 2.4.22 => 2.4.17 */ | |
+ | |
+/*****************************************************************************/ | |
+/* 2.6.5 => 2.6.0 */ | |
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,5) ) | |
+#define pci_dma_sync_single_for_cpu pci_dma_sync_single | |
+#define pci_dma_sync_single_for_device pci_dma_sync_single_for_cpu | |
+#endif /* 2.6.5 => 2.6.0 */ | |
+ | |
+/*****************************************************************************/ | |
+ | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) | |
+/* | |
+ * initialize a work-struct's func and data pointers: | |
+ */ | |
+#define PREPARE_WORK(_work, _func, _data) \ | |
+ do { \ | |
+ (_work)->func = _func; \ | |
+ (_work)->data = _data; \ | |
+ } while (0) | |
+ | |
+#endif | |
+/*****************************************************************************/ | |
+/* 2.6.4 => 2.6.0 */ | |
+#if ((LINUX_VERSION_CODE < KERNEL_VERSION(2,4,25) && \ | |
+ LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)) || \ | |
+ (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) && \ | |
+ LINUX_VERSION_CODE < KERNEL_VERSION(2,6,4))) | |
+#define ETHTOOL_OPS_COMPAT | |
+#endif /* 2.6.4 => 2.6.0 */ | |
+ | |
+/*****************************************************************************/ | |
+/* Installations with ethtool version without eeprom, adapter id, or statistics | |
+ * support */ | |
+ | |
+#ifndef ETH_GSTRING_LEN | |
+#define ETH_GSTRING_LEN 32 | |
+#endif | |
+ | |
+#ifndef ETHTOOL_GSTATS | |
+#define ETHTOOL_GSTATS 0x1d | |
+#undef ethtool_drvinfo | |
+#define ethtool_drvinfo k_ethtool_drvinfo | |
+struct k_ethtool_drvinfo { | |
+ u32 cmd; | |
+ char driver[32]; | |
+ char version[32]; | |
+ char fw_version[32]; | |
+ char bus_info[32]; | |
+ char reserved1[32]; | |
+ char reserved2[16]; | |
+ u32 n_stats; | |
+ u32 testinfo_len; | |
+ u32 eedump_len; | |
+ u32 regdump_len; | |
+}; | |
+ | |
+struct ethtool_stats { | |
+ u32 cmd; | |
+ u32 n_stats; | |
+ u64 data[0]; | |
+}; | |
+#endif /* ETHTOOL_GSTATS */ | |
+ | |
+#ifndef ETHTOOL_PHYS_ID | |
+#define ETHTOOL_PHYS_ID 0x1c | |
+#endif /* ETHTOOL_PHYS_ID */ | |
+ | |
+#ifndef ETHTOOL_GSTRINGS | |
+#define ETHTOOL_GSTRINGS 0x1b | |
+enum ethtool_stringset { | |
+ ETH_SS_TEST = 0, | |
+ ETH_SS_STATS, | |
+}; | |
+struct ethtool_gstrings { | |
+ u32 cmd; /* ETHTOOL_GSTRINGS */ | |
+ u32 string_set; /* string set id e.c. ETH_SS_TEST, etc*/ | |
+ u32 len; /* number of strings in the string set */ | |
+ u8 data[0]; | |
+}; | |
+#endif /* ETHTOOL_GSTRINGS */ | |
+ | |
+#ifndef ETHTOOL_TEST | |
+#define ETHTOOL_TEST 0x1a | |
+enum ethtool_test_flags { | |
+ ETH_TEST_FL_OFFLINE = (1 << 0), | |
+ ETH_TEST_FL_FAILED = (1 << 1), | |
+}; | |
+struct ethtool_test { | |
+ u32 cmd; | |
+ u32 flags; | |
+ u32 reserved; | |
+ u32 len; | |
+ u64 data[0]; | |
+}; | |
+#endif /* ETHTOOL_TEST */ | |
+ | |
+#ifndef ETHTOOL_GEEPROM | |
+#define ETHTOOL_GEEPROM 0xb | |
+#undef ETHTOOL_GREGS | |
+struct ethtool_eeprom { | |
+ u32 cmd; | |
+ u32 magic; | |
+ u32 offset; | |
+ u32 len; | |
+ u8 data[0]; | |
+}; | |
+ | |
+struct ethtool_value { | |
+ u32 cmd; | |
+ u32 data; | |
+}; | |
+#endif /* ETHTOOL_GEEPROM */ | |
+ | |
+#ifndef ETHTOOL_GLINK | |
+#define ETHTOOL_GLINK 0xa | |
+#endif /* ETHTOOL_GLINK */ | |
+ | |
+#ifndef ETHTOOL_GREGS | |
+#define ETHTOOL_GREGS 0x00000004 /* Get NIC registers */ | |
+#define ethtool_regs _kc_ethtool_regs | |
+/* for passing big chunks of data */ | |
+struct _kc_ethtool_regs { | |
+ u32 cmd; | |
+ u32 version; /* driver-specific, indicates different chips/revs */ | |
+ u32 len; /* bytes */ | |
+ u8 data[0]; | |
+}; | |
+#endif /* ETHTOOL_GREGS */ | |
+ | |
+#ifndef ETHTOOL_GMSGLVL | |
+#define ETHTOOL_GMSGLVL 0x00000007 /* Get driver message level */ | |
+#endif | |
+#ifndef ETHTOOL_SMSGLVL | |
+#define ETHTOOL_SMSGLVL 0x00000008 /* Set driver msg level, priv. */ | |
+#endif | |
+#ifndef ETHTOOL_NWAY_RST | |
+#define ETHTOOL_NWAY_RST 0x00000009 /* Restart autonegotiation, priv */ | |
+#endif | |
+#ifndef ETHTOOL_GLINK | |
+#define ETHTOOL_GLINK 0x0000000a /* Get link status */ | |
+#endif | |
+#ifndef ETHTOOL_GEEPROM | |
+#define ETHTOOL_GEEPROM 0x0000000b /* Get EEPROM data */ | |
+#endif | |
+#ifndef ETHTOOL_SEEPROM | |
+#define ETHTOOL_SEEPROM 0x0000000c /* Set EEPROM data */ | |
+#endif | |
+#ifndef ETHTOOL_GCOALESCE | |
+#define ETHTOOL_GCOALESCE 0x0000000e /* Get coalesce config */ | |
+/* for configuring coalescing parameters of chip */ | |
+#define ethtool_coalesce _kc_ethtool_coalesce | |
+struct _kc_ethtool_coalesce { | |
+ u32 cmd; /* ETHTOOL_{G,S}COALESCE */ | |
+ | |
+ /* How many usecs to delay an RX interrupt after | |
+ * a packet arrives. If 0, only rx_max_coalesced_frames | |
+ * is used. | |
+ */ | |
+ u32 rx_coalesce_usecs; | |
+ | |
+ /* How many packets to delay an RX interrupt after | |
+ * a packet arrives. If 0, only rx_coalesce_usecs is | |
+ * used. It is illegal to set both usecs and max frames | |
+ * to zero as this would cause RX interrupts to never be | |
+ * generated. | |
+ */ | |
+ u32 rx_max_coalesced_frames; | |
+ | |
+ /* Same as above two parameters, except that these values | |
+ * apply while an IRQ is being serviced by the host. Not | |
+ * all cards support this feature and the values are ignored | |
+ * in that case. | |
+ */ | |
+ u32 rx_coalesce_usecs_irq; | |
+ u32 rx_max_coalesced_frames_irq; | |
+ | |
+ /* How many usecs to delay a TX interrupt after | |
+ * a packet is sent. If 0, only tx_max_coalesced_frames | |
+ * is used. | |
+ */ | |
+ u32 tx_coalesce_usecs; | |
+ | |
+ /* How many packets to delay a TX interrupt after | |
+ * a packet is sent. If 0, only tx_coalesce_usecs is | |
+ * used. It is illegal to set both usecs and max frames | |
+ * to zero as this would cause TX interrupts to never be | |
+ * generated. | |
+ */ | |
+ u32 tx_max_coalesced_frames; | |
+ | |
+ /* Same as above two parameters, except that these values | |
+ * apply while an IRQ is being serviced by the host. Not | |
+ * all cards support this feature and the values are ignored | |
+ * in that case. | |
+ */ | |
+ u32 tx_coalesce_usecs_irq; | |
+ u32 tx_max_coalesced_frames_irq; | |
+ | |
+ /* How many usecs to delay in-memory statistics | |
+ * block updates. Some drivers do not have an in-memory | |
+ * statistic block, and in such cases this value is ignored. | |
+ * This value must not be zero. | |
+ */ | |
+ u32 stats_block_coalesce_usecs; | |
+ | |
+ /* Adaptive RX/TX coalescing is an algorithm implemented by | |
+ * some drivers to improve latency under low packet rates and | |
+ * improve throughput under high packet rates. Some drivers | |
+ * only implement one of RX or TX adaptive coalescing. Anything | |
+ * not implemented by the driver causes these values to be | |
+ * silently ignored. | |
+ */ | |
+ u32 use_adaptive_rx_coalesce; | |
+ u32 use_adaptive_tx_coalesce; | |
+ | |
+ /* When the packet rate (measured in packets per second) | |
+ * is below pkt_rate_low, the {rx,tx}_*_low parameters are | |
+ * used. | |
+ */ | |
+ u32 pkt_rate_low; | |
+ u32 rx_coalesce_usecs_low; | |
+ u32 rx_max_coalesced_frames_low; | |
+ u32 tx_coalesce_usecs_low; | |
+ u32 tx_max_coalesced_frames_low; | |
+ | |
+ /* When the packet rate is below pkt_rate_high but above | |
+ * pkt_rate_low (both measured in packets per second) the | |
+ * normal {rx,tx}_* coalescing parameters are used. | |
+ */ | |
+ | |
+ /* When the packet rate is (measured in packets per second) | |
+ * is above pkt_rate_high, the {rx,tx}_*_high parameters are | |
+ * used. | |
+ */ | |
+ u32 pkt_rate_high; | |
+ u32 rx_coalesce_usecs_high; | |
+ u32 rx_max_coalesced_frames_high; | |
+ u32 tx_coalesce_usecs_high; | |
+ u32 tx_max_coalesced_frames_high; | |
+ | |
+ /* How often to do adaptive coalescing packet rate sampling, | |
+ * measured in seconds. Must not be zero. | |
+ */ | |
+ u32 rate_sample_interval; | |
+}; | |
+#endif /* ETHTOOL_GCOALESCE */ | |
+ | |
+#ifndef ETHTOOL_SCOALESCE | |
+#define ETHTOOL_SCOALESCE 0x0000000f /* Set coalesce config. */ | |
+#endif | |
+#ifndef ETHTOOL_GRINGPARAM | |
+#define ETHTOOL_GRINGPARAM 0x00000010 /* Get ring parameters */ | |
+/* for configuring RX/TX ring parameters */ | |
+#define ethtool_ringparam _kc_ethtool_ringparam | |
+struct _kc_ethtool_ringparam { | |
+ u32 cmd; /* ETHTOOL_{G,S}RINGPARAM */ | |
+ | |
+ /* Read only attributes. These indicate the maximum number | |
+ * of pending RX/TX ring entries the driver will allow the | |
+ * user to set. | |
+ */ | |
+ u32 rx_max_pending; | |
+ u32 rx_mini_max_pending; | |
+ u32 rx_jumbo_max_pending; | |
+ u32 tx_max_pending; | |
+ | |
+ /* Values changeable by the user. The valid values are | |
+ * in the range 1 to the "*_max_pending" counterpart above. | |
+ */ | |
+ u32 rx_pending; | |
+ u32 rx_mini_pending; | |
+ u32 rx_jumbo_pending; | |
+ u32 tx_pending; | |
+}; | |
+#endif /* ETHTOOL_GRINGPARAM */ | |
+ | |
+#ifndef ETHTOOL_SRINGPARAM | |
+#define ETHTOOL_SRINGPARAM 0x00000011 /* Set ring parameters, priv. */ | |
+#endif | |
+#ifndef ETHTOOL_GPAUSEPARAM | |
+#define ETHTOOL_GPAUSEPARAM 0x00000012 /* Get pause parameters */ | |
+/* for configuring link flow control parameters */ | |
+#define ethtool_pauseparam _kc_ethtool_pauseparam | |
+struct _kc_ethtool_pauseparam { | |
+ u32 cmd; /* ETHTOOL_{G,S}PAUSEPARAM */ | |
+ | |
+ /* If the link is being auto-negotiated (via ethtool_cmd.autoneg | |
+ * being true) the user may set 'autonet' here non-zero to have the | |
+ * pause parameters be auto-negotiated too. In such a case, the | |
+ * {rx,tx}_pause values below determine what capabilities are | |
+ * advertised. | |
+ * | |
+ * If 'autoneg' is zero or the link is not being auto-negotiated, | |
+ * then {rx,tx}_pause force the driver to use/not-use pause | |
+ * flow control. | |
+ */ | |
+ u32 autoneg; | |
+ u32 rx_pause; | |
+ u32 tx_pause; | |
+}; | |
+#endif /* ETHTOOL_GPAUSEPARAM */ | |
+ | |
+#ifndef ETHTOOL_SPAUSEPARAM | |
+#define ETHTOOL_SPAUSEPARAM 0x00000013 /* Set pause parameters. */ | |
+#endif | |
+#ifndef ETHTOOL_GRXCSUM | |
+#define ETHTOOL_GRXCSUM 0x00000014 /* Get RX hw csum enable (ethtool_value) */ | |
+#endif | |
+#ifndef ETHTOOL_SRXCSUM | |
+#define ETHTOOL_SRXCSUM 0x00000015 /* Set RX hw csum enable (ethtool_value) */ | |
+#endif | |
+#ifndef ETHTOOL_GTXCSUM | |
+#define ETHTOOL_GTXCSUM 0x00000016 /* Get TX hw csum enable (ethtool_value) */ | |
+#endif | |
+#ifndef ETHTOOL_STXCSUM | |
+#define ETHTOOL_STXCSUM 0x00000017 /* Set TX hw csum enable (ethtool_value) */ | |
+#endif | |
+#ifndef ETHTOOL_GSG | |
+#define ETHTOOL_GSG 0x00000018 /* Get scatter-gather enable | |
+* (ethtool_value) */ | |
+#endif | |
+#ifndef ETHTOOL_SSG | |
+#define ETHTOOL_SSG 0x00000019 /* Set scatter-gather enable | |
+* (ethtool_value). */ | |
+#endif | |
+#ifndef ETHTOOL_TEST | |
+#define ETHTOOL_TEST 0x0000001a /* execute NIC self-test, priv. */ | |
+#endif | |
+#ifndef ETHTOOL_GSTRINGS | |
+#define ETHTOOL_GSTRINGS 0x0000001b /* get specified string set */ | |
+#endif | |
+#ifndef ETHTOOL_PHYS_ID | |
+#define ETHTOOL_PHYS_ID 0x0000001c /* identify the NIC */ | |
+#endif | |
+#ifndef ETHTOOL_GSTATS | |
+#define ETHTOOL_GSTATS 0x0000001d /* get NIC-specific statistics */ | |
+#endif | |
+#ifndef ETHTOOL_GTSO | |
+#define ETHTOOL_GTSO 0x0000001e /* Get TSO enable (ethtool_value) */ | |
+#endif | |
+#ifndef ETHTOOL_STSO | |
+#define ETHTOOL_STSO 0x0000001f /* Set TSO enable (ethtool_value) */ | |
+#endif | |
+ | |
+#ifndef ETHTOOL_BUSINFO_LEN | |
+#define ETHTOOL_BUSINFO_LEN 32 | |
+#endif | |
+ | |
+/*****************************************************************************/ | |
+ | |
+enum RTL8168_DSM_STATE { | |
+ DSM_MAC_INIT = 1, | |
+ DSM_NIC_GOTO_D3 = 2, | |
+ DSM_IF_DOWN = 3, | |
+ DSM_NIC_RESUME_D3 = 4, | |
+ DSM_IF_UP = 5, | |
+}; | |
+ | |
+enum RTL8168_registers { | |
+ MAC0 = 0x00, /* Ethernet hardware address. */ | |
+ MAC4 = 0x04, | |
+ MAR0 = 0x08, /* Multicast filter. */ | |
+ CounterAddrLow = 0x10, | |
+ CounterAddrHigh = 0x14, | |
+ CustomLED = 0x18, | |
+ TxDescStartAddrLow = 0x20, | |
+ TxDescStartAddrHigh = 0x24, | |
+ TxHDescStartAddrLow = 0x28, | |
+ TxHDescStartAddrHigh = 0x2c, | |
+ FLASH = 0x30, | |
+ ERSR = 0x36, | |
+ ChipCmd = 0x37, | |
+ TxPoll = 0x38, | |
+ IntrMask = 0x3C, | |
+ IntrStatus = 0x3E, | |
+ TxConfig = 0x40, | |
+ RxConfig = 0x44, | |
+ TCTR = 0x48, | |
+ Cfg9346 = 0x50, | |
+ Config0 = 0x51, | |
+ Config1 = 0x52, | |
+ Config2 = 0x53, | |
+ Config3 = 0x54, | |
+ Config4 = 0x55, | |
+ Config5 = 0x56, | |
+ TDFNR = 0x57, | |
+ TimeInt0 = 0x58, | |
+ TimeInt1 = 0x5C, | |
+ PHYAR = 0x60, | |
+ CSIDR = 0x64, | |
+ CSIAR = 0x68, | |
+ PHYstatus = 0x6C, | |
+ MACDBG = 0x6D, | |
+ GPIO = 0x6E, | |
+ PMCH = 0x6F, | |
+ ERIDR = 0x70, | |
+ ERIAR = 0x74, | |
+ EPHY_RXER_NUM = 0x7C, | |
+ EPHYAR = 0x80, | |
+ TimeInt2 = 0x8C, | |
+ OCPDR = 0xB0, | |
+ MACOCP = 0xB0, | |
+ OCPAR = 0xB4, | |
+ SecMAC0 = 0xB4, | |
+ SecMAC4 = 0xB8, | |
+ PHYOCP = 0xB8, | |
+ DBG_reg = 0xD1, | |
+ TwiCmdReg = 0xD2, | |
+ MCUCmd_reg = 0xD3, | |
+ RxMaxSize = 0xDA, | |
+ EFUSEAR = 0xDC, | |
+ CPlusCmd = 0xE0, | |
+ IntrMitigate = 0xE2, | |
+ RxDescAddrLow = 0xE4, | |
+ RxDescAddrHigh = 0xE8, | |
+ MTPS = 0xEC, | |
+ FuncEvent = 0xF0, | |
+ PPSW = 0xF2, | |
+ FuncEventMask = 0xF4, | |
+ TimeInt3 = 0xF4, | |
+ FuncPresetState = 0xF8, | |
+ IBCR0 = 0xF8, | |
+ IBCR2 = 0xF9, | |
+ IBIMR0 = 0xFA, | |
+ IBISR0 = 0xFB, | |
+ FuncForceEvent = 0xFC, | |
+}; | |
+ | |
+enum RTL8168_register_content { | |
+ /* InterruptStatusBits */ | |
+ SYSErr = 0x8000, | |
+ PCSTimeout = 0x4000, | |
+ SWInt = 0x0100, | |
+ TxDescUnavail = 0x0080, | |
+ RxFIFOOver = 0x0040, | |
+ LinkChg = 0x0020, | |
+ RxDescUnavail = 0x0010, | |
+ TxErr = 0x0008, | |
+ TxOK = 0x0004, | |
+ RxErr = 0x0002, | |
+ RxOK = 0x0001, | |
+ | |
+ /* RxStatusDesc */ | |
+ RxRWT = (1 << 22), | |
+ RxRES = (1 << 21), | |
+ RxRUNT = (1 << 20), | |
+ RxCRC = (1 << 19), | |
+ | |
+ /* ChipCmdBits */ | |
+ StopReq = 0x80, | |
+ CmdReset = 0x10, | |
+ CmdRxEnb = 0x08, | |
+ CmdTxEnb = 0x04, | |
+ RxBufEmpty = 0x01, | |
+ | |
+ /* Cfg9346Bits */ | |
+ Cfg9346_Lock = 0x00, | |
+ Cfg9346_Unlock = 0xC0, | |
+ Cfg9346_EEDO = (1 << 0), | |
+ Cfg9346_EEDI = (1 << 1), | |
+ Cfg9346_EESK = (1 << 2), | |
+ Cfg9346_EECS = (1 << 3), | |
+ Cfg9346_EEM0 = (1 << 6), | |
+ Cfg9346_EEM1 = (1 << 7), | |
+ | |
+ /* rx_mode_bits */ | |
+ AcceptErr = 0x20, | |
+ AcceptRunt = 0x10, | |
+ AcceptBroadcast = 0x08, | |
+ AcceptMulticast = 0x04, | |
+ AcceptMyPhys = 0x02, | |
+ AcceptAllPhys = 0x01, | |
+ | |
+ /* Transmit Priority Polling*/ | |
+ HPQ = 0x80, | |
+ NPQ = 0x40, | |
+ FSWInt = 0x01, | |
+ | |
+ /* RxConfigBits */ | |
+ Reserved2_shift = 13, | |
+ RxCfgDMAShift = 8, | |
+ RxCfg_128_int_en = (1 << 15), | |
+ RxCfg_fet_multi_en = (1 << 14), | |
+ RxCfg_half_refetch = (1 << 13), | |
+ RxCfg_9356SEL = (1 << 6), | |
+ | |
+ /* TxConfigBits */ | |
+ TxInterFrameGapShift = 24, | |
+ TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */ | |
+ TxMACLoopBack = (1 << 17), /* MAC loopback */ | |
+ | |
+ /* Config1 register */ | |
+ LEDS1 = (1 << 7), | |
+ LEDS0 = (1 << 6), | |
+ Speed_down = (1 << 4), | |
+ MEMMAP = (1 << 3), | |
+ IOMAP = (1 << 2), | |
+ VPD = (1 << 1), | |
+ PMEnable = (1 << 0), /* Power Management Enable */ | |
+ | |
+ /* Config2 register */ | |
+ PMSTS_En = (1 << 5), | |
+ | |
+ /* Config3 register */ | |
+ Isolate_en = (1 << 12), /* Isolate enable */ | |
+ MagicPacket = (1 << 5), /* Wake up when receives a Magic Packet */ | |
+ LinkUp = (1 << 4), /* This bit is reserved in RTL8168B.*/ | |
+ /* Wake up when the cable connection is re-established */ | |
+ ECRCEN = (1 << 3), /* This bit is reserved in RTL8168B*/ | |
+ Jumbo_En0 = (1 << 2), /* This bit is reserved in RTL8168B*/ | |
+ RDY_TO_L23 = (1 << 1), /* This bit is reserved in RTL8168B*/ | |
+ Beacon_en = (1 << 0), /* This bit is reserved in RTL8168B*/ | |
+ | |
+ /* Config4 register */ | |
+ Jumbo_En1 = (1 << 1), /* This bit is reserved in RTL8168B*/ | |
+ | |
+ /* Config5 register */ | |
+ BWF = (1 << 6), /* Accept Broadcast wakeup frame */ | |
+ MWF = (1 << 5), /* Accept Multicast wakeup frame */ | |
+ UWF = (1 << 4), /* Accept Unicast wakeup frame */ | |
+ LanWake = (1 << 1), /* LanWake enable/disable */ | |
+ PMEStatus = (1 << 0), /* PME status can be reset by PCI RST# */ | |
+ | |
+ /* CPlusCmd */ | |
+ EnableBist = (1 << 15), | |
+ Macdbgo_oe = (1 << 14), | |
+ Normal_mode = (1 << 13), | |
+ Force_halfdup = (1 << 12), | |
+ Force_rxflow_en = (1 << 11), | |
+ Force_txflow_en = (1 << 10), | |
+ Cxpl_dbg_sel = (1 << 9),//This bit is reserved in RTL8168B | |
+ ASF = (1 << 8),//This bit is reserved in RTL8168C | |
+ PktCntrDisable = (1 << 7), | |
+ RxVlan = (1 << 6), | |
+ RxChkSum = (1 << 5), | |
+ Macdbgo_sel = 0x001C, | |
+ INTT_0 = 0x0000, | |
+ INTT_1 = 0x0001, | |
+ INTT_2 = 0x0002, | |
+ INTT_3 = 0x0003, | |
+ | |
+ /* rtl8168_PHYstatus */ | |
+ PowerSaveStatus = 0x80, | |
+ TxFlowCtrl = 0x40, | |
+ RxFlowCtrl = 0x20, | |
+ _1000bpsF = 0x10, | |
+ _100bps = 0x08, | |
+ _10bps = 0x04, | |
+ LinkStatus = 0x02, | |
+ FullDup = 0x01, | |
+ | |
+ /* DBG_reg */ | |
+ Fix_Nak_1 = (1 << 4), | |
+ Fix_Nak_2 = (1 << 3), | |
+ DBGPIN_E2 = (1 << 0), | |
+ | |
+ /* ResetCounterCommand */ | |
+ CounterReset = 0x1, | |
+ /* DumpCounterCommand */ | |
+ CounterDump = 0x8, | |
+ | |
+ /* PHY access */ | |
+ PHYAR_Flag = 0x80000000, | |
+ PHYAR_Write = 0x80000000, | |
+ PHYAR_Read = 0x00000000, | |
+ PHYAR_Reg_Mask = 0x1f, | |
+ PHYAR_Reg_shift = 16, | |
+ PHYAR_Data_Mask = 0xffff, | |
+ | |
+ /* EPHY access */ | |
+ EPHYAR_Flag = 0x80000000, | |
+ EPHYAR_Write = 0x80000000, | |
+ EPHYAR_Read = 0x00000000, | |
+ EPHYAR_Reg_Mask = 0x1f, | |
+ EPHYAR_Reg_shift = 16, | |
+ EPHYAR_Data_Mask = 0xffff, | |
+ | |
+ /* CSI access */ | |
+ CSIAR_Flag = 0x80000000, | |
+ CSIAR_Write = 0x80000000, | |
+ CSIAR_Read = 0x00000000, | |
+ CSIAR_ByteEn = 0x0f, | |
+ CSIAR_ByteEn_shift = 12, | |
+ CSIAR_Addr_Mask = 0x0fff, | |
+ | |
+ /* ERI access */ | |
+ ERIAR_Flag = 0x80000000, | |
+ ERIAR_Write = 0x80000000, | |
+ ERIAR_Read = 0x00000000, | |
+ ERIAR_Addr_Align = 4, /* ERI access register address must be 4 byte alignment */ | |
+ ERIAR_ExGMAC = 0, | |
+ ERIAR_MSIX = 1, | |
+ ERIAR_ASF = 2, | |
+ ERIAR_OOB = 2, | |
+ ERIAR_Type_shift = 16, | |
+ ERIAR_ByteEn = 0x0f, | |
+ ERIAR_ByteEn_shift = 12, | |
+ | |
+ /* OCP GPHY access */ | |
+ OCPDR_Write = 0x80000000, | |
+ OCPDR_Read = 0x00000000, | |
+ OCPDR_Reg_Mask = 0xFF, | |
+ OCPDR_Data_Mask = 0xFFFF, | |
+ OCPDR_GPHY_Reg_shift = 16, | |
+ OCPAR_Flag = 0x80000000, | |
+ OCPAR_GPHY_Write = 0x8000F060, | |
+ OCPAR_GPHY_Read = 0x0000F060, | |
+ OCPR_Write = 0x80000000, | |
+ OCPR_Read = 0x00000000, | |
+ OCPR_Addr_Reg_shift = 16, | |
+ OCPR_Flag = 0x80000000, | |
+ OCP_STD_PHY_BASE_PAGE = 0x0A40, | |
+ | |
+ /* MCU Command */ | |
+ Now_is_oob = (1 << 7), | |
+ Txfifo_empty = (1 << 5), | |
+ Rxfifo_empty = (1 << 4), | |
+ | |
+ /* E-FUSE access */ | |
+ EFUSE_WRITE = 0x80000000, | |
+ EFUSE_WRITE_OK = 0x00000000, | |
+ EFUSE_READ = 0x00000000, | |
+ EFUSE_READ_OK = 0x80000000, | |
+ EFUSE_Reg_Mask = 0x03FF, | |
+ EFUSE_Reg_Shift = 8, | |
+ EFUSE_Check_Cnt = 300, | |
+ EFUSE_READ_FAIL = 0xFF, | |
+ EFUSE_Data_Mask = 0x000000FF, | |
+ | |
+ /* GPIO */ | |
+ GPIO_en = (1 << 0), | |
+ | |
+}; | |
+ | |
+enum _DescStatusBit { | |
+ DescOwn = (1 << 31), /* Descriptor is owned by NIC */ | |
+ RingEnd = (1 << 30), /* End of descriptor ring */ | |
+ FirstFrag = (1 << 29), /* First segment of a packet */ | |
+ LastFrag = (1 << 28), /* Final segment of a packet */ | |
+ | |
+ /* Tx private */ | |
+ /*------ offset 0 of tx descriptor ------*/ | |
+ LargeSend = (1 << 27), /* TCP Large Send Offload (TSO) */ | |
+ GiantSendv4 = (1 << 26), /* TCP Giant Send Offload V4 (GSOv4) */ | |
+ GiantSendv6 = (1 << 25), /* TCP Giant Send Offload V6 (GSOv6) */ | |
+ LargeSend_DP = (1 << 16), /* TCP Large Send Offload (TSO) */ | |
+ MSSShift = 16, /* MSS value position */ | |
+ MSSMask = 0x7FFU, /* MSS value 11 bits */ | |
+ TxIPCS = (1 << 18), /* Calculate IP checksum */ | |
+ TxUDPCS = (1 << 17), /* Calculate UDP/IP checksum */ | |
+ TxTCPCS = (1 << 16), /* Calculate TCP/IP checksum */ | |
+ TxVlanTag = (1 << 17), /* Add VLAN tag */ | |
+ | |
+ /*@@@@@@ offset 4 of tx descriptor => bits for RTL8168C/CP only begin @@@@@@*/ | |
+ TxUDPCS_C = (1 << 31), /* Calculate UDP/IP checksum */ | |
+ TxTCPCS_C = (1 << 30), /* Calculate TCP/IP checksum */ | |
+ TxIPCS_C = (1 << 29), /* Calculate IP checksum */ | |
+ TxIPV6F_C = (1 << 28), /* Indicate it is an IPv6 packet */ | |
+ /*@@@@@@ offset 4 of tx descriptor => bits for RTL8168C/CP only end @@@@@@*/ | |
+ | |
+ | |
+ /* Rx private */ | |
+ /*------ offset 0 of rx descriptor ------*/ | |
+ PID1 = (1 << 18), /* Protocol ID bit 1/2 */ | |
+ PID0 = (1 << 17), /* Protocol ID bit 2/2 */ | |
+ | |
+#define RxProtoUDP (PID1) | |
+#define RxProtoTCP (PID0) | |
+#define RxProtoIP (PID1 | PID0) | |
+#define RxProtoMask RxProtoIP | |
+ | |
+ RxIPF = (1 << 16), /* IP checksum failed */ | |
+ RxUDPF = (1 << 15), /* UDP/IP checksum failed */ | |
+ RxTCPF = (1 << 14), /* TCP/IP checksum failed */ | |
+ RxVlanTag = (1 << 16), /* VLAN tag available */ | |
+ | |
+ /*@@@@@@ offset 0 of rx descriptor => bits for RTL8168C/CP only begin @@@@@@*/ | |
+ RxUDPT = (1 << 18), | |
+ RxTCPT = (1 << 17), | |
+ /*@@@@@@ offset 0 of rx descriptor => bits for RTL8168C/CP only end @@@@@@*/ | |
+ | |
+ /*@@@@@@ offset 4 of rx descriptor => bits for RTL8168C/CP only begin @@@@@@*/ | |
+ RxV6F = (1 << 31), | |
+ RxV4F = (1 << 30), | |
+ /*@@@@@@ offset 4 of rx descriptor => bits for RTL8168C/CP only end @@@@@@*/ | |
+}; | |
+ | |
+enum features { | |
+// RTL_FEATURE_WOL = (1 << 0), | |
+ RTL_FEATURE_MSI = (1 << 1), | |
+}; | |
+ | |
+enum wol_capability { | |
+ WOL_DISABLED = 0, | |
+ WOL_ENABLED = 1 | |
+}; | |
+ | |
+enum bits { | |
+ BIT_0 = (1 << 0), | |
+ BIT_1 = (1 << 1), | |
+ BIT_2 = (1 << 2), | |
+ BIT_3 = (1 << 3), | |
+ BIT_4 = (1 << 4), | |
+ BIT_5 = (1 << 5), | |
+ BIT_6 = (1 << 6), | |
+ BIT_7 = (1 << 7), | |
+ BIT_8 = (1 << 8), | |
+ BIT_9 = (1 << 9), | |
+ BIT_10 = (1 << 10), | |
+ BIT_11 = (1 << 11), | |
+ BIT_12 = (1 << 12), | |
+ BIT_13 = (1 << 13), | |
+ BIT_14 = (1 << 14), | |
+ BIT_15 = (1 << 15), | |
+ BIT_16 = (1 << 16), | |
+ BIT_17 = (1 << 17), | |
+ BIT_18 = (1 << 18), | |
+ BIT_19 = (1 << 19), | |
+ BIT_20 = (1 << 20), | |
+ BIT_21 = (1 << 21), | |
+ BIT_22 = (1 << 22), | |
+ BIT_23 = (1 << 23), | |
+ BIT_24 = (1 << 24), | |
+ BIT_25 = (1 << 25), | |
+ BIT_26 = (1 << 26), | |
+ BIT_27 = (1 << 27), | |
+ BIT_28 = (1 << 28), | |
+ BIT_29 = (1 << 29), | |
+ BIT_30 = (1 << 30), | |
+ BIT_31 = (1 << 31) | |
+}; | |
+ | |
+enum effuse { | |
+ EFUSE_NOT_SUPPORT = 0, | |
+ EFUSE_SUPPORT_V1, | |
+ EFUSE_SUPPORT_V2, | |
+ EFUSE_SUPPORT_V3, | |
+}; | |
+#define RsvdMask 0x3fffc000 | |
+ | |
+struct TxDesc { | |
+ u32 opts1; | |
+ u32 opts2; | |
+ u64 addr; | |
+}; | |
+ | |
+struct RxDesc { | |
+ u32 opts1; | |
+ u32 opts2; | |
+ u64 addr; | |
+}; | |
+ | |
+struct ring_info { | |
+ struct sk_buff *skb; | |
+ u32 len; | |
+ u8 __pad[sizeof(void *) - sizeof(u32)]; | |
+}; | |
+ | |
+struct pci_resource { | |
+ u8 cmd; | |
+ u8 cls; | |
+ u16 io_base_h; | |
+ u16 io_base_l; | |
+ u16 mem_base_h; | |
+ u16 mem_base_l; | |
+ u8 ilr; | |
+ u16 resv_0x1c_h; | |
+ u16 resv_0x1c_l; | |
+ u16 resv_0x20_h; | |
+ u16 resv_0x20_l; | |
+ u16 resv_0x24_h; | |
+ u16 resv_0x24_l; | |
+ u16 resv_0x2c_h; | |
+ u16 resv_0x2c_l; | |
+ u32 pci_sn_l; | |
+ u32 pci_sn_h; | |
+}; | |
+ | |
+struct rtl8168_private { | |
+ void __iomem *mmio_addr; /* memory map physical address */ | |
+ struct pci_dev *pci_dev; /* Index of PCI device */ | |
+ struct net_device *dev; | |
+#ifdef CONFIG_R8168_NAPI | |
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24) | |
+ struct napi_struct napi; | |
+#endif | |
+#endif | |
+ struct net_device_stats stats; /* statistics of net device */ | |
+ spinlock_t lock; /* spin lock flag */ | |
+ spinlock_t phy_lock; /* spin lock flag for GPHY */ | |
+ u32 msg_enable; | |
+ u32 tx_tcp_csum_cmd; | |
+ u32 tx_udp_csum_cmd; | |
+ u32 tx_ip_csum_cmd; | |
+ u32 tx_ipv6_csum_cmd; | |
+ int max_jumbo_frame_size; | |
+ int chipset; | |
+ u32 mcfg; | |
+ u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */ | |
+ u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */ | |
+ u32 dirty_rx; | |
+ u32 dirty_tx; | |
+ struct TxDesc *TxDescArray; /* 256-aligned Tx descriptor ring */ | |
+ struct RxDesc *RxDescArray; /* 256-aligned Rx descriptor ring */ | |
+ dma_addr_t TxPhyAddr; | |
+ dma_addr_t RxPhyAddr; | |
+ struct sk_buff *Rx_skbuff[NUM_RX_DESC]; /* Rx data buffers */ | |
+ struct ring_info tx_skb[NUM_TX_DESC]; /* Tx data buffers */ | |
+ unsigned rx_buf_sz; | |
+ struct timer_list esd_timer; | |
+ struct timer_list link_timer; | |
+ struct pci_resource pci_cfg_space; | |
+ unsigned int esd_flag; | |
+ unsigned int pci_cfg_is_read; | |
+ unsigned int rtl8168_rx_config; | |
+ u16 cp_cmd; | |
+ u16 intr_mask; | |
+ u16 timer_intr_mask; | |
+ int phy_auto_nego_reg; | |
+ int phy_1000_ctrl_reg; | |
+ u8 org_mac_addr[NODE_ADDRESS_SIZE]; | |
+ struct rtl8168_counters *tally_vaddr; | |
+ dma_addr_t tally_paddr; | |
+ | |
+#ifdef CONFIG_R8168_VLAN | |
+ struct vlan_group *vlgrp; | |
+#endif | |
+ u8 wol_enabled; | |
+ u32 wol_opts; | |
+ u8 efuse_ver; | |
+ u8 eeprom_type; | |
+ u8 autoneg; | |
+ u8 duplex; | |
+ u16 speed; | |
+ u16 eeprom_len; | |
+ u16 cur_page; | |
+ u32 bios_setting; | |
+ | |
+ int (*set_speed)(struct net_device *, u8 autoneg, u16 speed, u8 duplex); | |
+ void (*get_settings)(struct net_device *, struct ethtool_cmd *); | |
+ void (*phy_reset_enable)(struct net_device *); | |
+ unsigned int (*phy_reset_pending)(struct net_device *); | |
+ unsigned int (*link_ok)(struct net_device *); | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) | |
+ struct work_struct task; | |
+#else | |
+ struct delayed_work task; | |
+#endif | |
+ unsigned features; | |
+ | |
+ u8 org_pci_offset_99; | |
+ u8 org_pci_offset_180; | |
+ u8 issue_offset_99_event; | |
+ | |
+ u8 org_pci_offset_80; | |
+ u8 org_pci_offset_81; | |
+ u8 use_timer_interrrupt; | |
+ | |
+ u32 keep_intr_cnt; | |
+ | |
+ u8 HwIcVerUnknown; | |
+ u8 NotWrRamCodeToMicroP; | |
+ u8 NotWrMcuPatchCode; | |
+ u8 HwHasWrRamCodeToMicroP; | |
+ | |
+ u16 sw_ram_code_ver; | |
+ u16 hw_ram_code_ver; | |
+ | |
+ u8 rtk_enable_diag; | |
+ | |
+ u8 ShortPacketSwChecksum; | |
+ | |
+ u8 UseSwPaddingShortPkt; | |
+ | |
+ void *ShortPacketEmptyBuffer; | |
+ dma_addr_t ShortPacketEmptyBufferPhy; | |
+ | |
+ u8 RequireAdcBiasPatch; | |
+ u16 AdcBiasPatchIoffset; | |
+ | |
+ u8 RequireAdjustUpsTxLinkPulseTiming; | |
+ u16 SwrCnt1msIni; | |
+ | |
+ u8 HwSuppNowIsOobVer; | |
+ | |
+ u8 RequiredSecLanDonglePatch; | |
+ | |
+ u32 HwFiberModeVer; | |
+ | |
+ u8 HwSuppMagicPktVer; | |
+ | |
+ //Dash+++++++++++++++++ | |
+ u8 HwSuppDashVer; | |
+ u8 DASH; | |
+ | |
+#ifdef ENABLE_DASH_SUPPORT | |
+ u16 AfterRecvFromFwBufLen; | |
+ u8 AfterRecvFromFwBuf[RECV_FROM_FW_BUF_SIZE]; | |
+ u16 AfterSendToFwBufLen; | |
+ u8 AfterSendToFwBuf[SEND_TO_FW_BUF_SIZE]; | |
+ u16 SendToFwBufferLen; | |
+ u32 SizeOfSendToFwBuffer ; | |
+ u32 SizeOfSendToFwBufferMemAlloc ; | |
+ u32 NumOfSendToFwBuffer ; | |
+ | |
+ u8 OobReq; | |
+ u8 OobAck; | |
+ u32 OobReqComplete; | |
+ u32 OobAckComplete; | |
+ | |
+ u8 RcvFwReqSysOkEvt; | |
+ u8 RcvFwDashOkEvt; | |
+ u8 SendFwHostOkEvt; | |
+ | |
+ u8 DashFwDisableRx; | |
+ | |
+ void *UnalignedSendToFwBufferVa; | |
+ void *SendToFwBuffer ; | |
+ u64 SendToFwBufferPhy ; | |
+ u8 SendingToFw; | |
+ dma_addr_t UnalignedSendToFwBufferPa; | |
+ PTX_DASH_SEND_FW_DESC TxDashSendFwDesc; | |
+ u64 TxDashSendFwDescPhy; | |
+ u8 *UnalignedTxDashSendFwDescVa; | |
+ u32 SizeOfTxDashSendFwDescMemAlloc; | |
+ u32 SizeOfTxDashSendFwDesc ; | |
+ u32 NumTxDashSendFwDesc ; | |
+ u32 CurrNumTxDashSendFwDesc ; | |
+ u32 LastSendNumTxDashSendFwDesc ; | |
+ dma_addr_t UnalignedTxDashSendFwDescPa; | |
+ | |
+ u32 NumRecvFromFwBuffer ; | |
+ u32 SizeOfRecvFromFwBuffer ; | |
+ u32 SizeOfRecvFromFwBufferMemAlloc ; | |
+ void *RecvFromFwBuffer ; | |
+ u64 RecvFromFwBufferPhy ; | |
+ | |
+ void *UnalignedRecvFromFwBufferVa; | |
+ dma_addr_t UnalignedRecvFromFwBufferPa; | |
+ PRX_DASH_FROM_FW_DESC RxDashRecvFwDesc; | |
+ u64 RxDashRecvFwDescPhy; | |
+ u8 *UnalignedRxDashRecvFwDescVa; | |
+ u32 SizeOfRxDashRecvFwDescMemAlloc; | |
+ u32 SizeOfRxDashRecvFwDesc ; | |
+ u32 NumRxDashRecvFwDesc ; | |
+ u32 CurrNumRxDashRecvFwDesc ; | |
+ dma_addr_t UnalignedRxDashRecvFwDescPa; | |
+ u8 DashReqRegValue; | |
+ u16 HostReqValue; | |
+ | |
+ u32 CmacResetIsrCounter; | |
+ u8 CmacResetIsr1st ; | |
+ u8 CmacResetIsr2nd ; | |
+ u8 CmacResetting ; | |
+ u8 CmacOobIssueCmacReset ; | |
+ //Dash----------------- | |
+#endif //ENABLE_DASH_SUPPORT | |
+ | |
+ //Realwow++++++++++++++ | |
+ u8 HwSuppKCPOffloadVer; | |
+ | |
+ u8 EnableDhcpTimeoutWake; | |
+ u8 EnableTeredoOffload; | |
+ u8 EnableKCPOffload; | |
+#ifdef ENABLE_REALWOW_SUPPORT | |
+ u32 DhcpTimeout; | |
+ MP_KCP_INFO MpKCPInfo; | |
+ //Realwow-------------- | |
+#endif //ENABLE_REALWOW_SUPPORT | |
+ | |
+#ifdef ENABLE_R8168_PROCFS | |
+ //Procfs support | |
+ struct proc_dir_entry *proc_dir; | |
+#endif | |
+}; | |
+ | |
+enum eetype { | |
+ EEPROM_TYPE_NONE=0, | |
+ EEPROM_TYPE_93C46, | |
+ EEPROM_TYPE_93C56, | |
+ EEPROM_TWSI | |
+}; | |
+ | |
+enum mcfg { | |
+ CFG_METHOD_1=0, | |
+ CFG_METHOD_2, | |
+ CFG_METHOD_3, | |
+ CFG_METHOD_4, | |
+ CFG_METHOD_5, | |
+ CFG_METHOD_6, | |
+ CFG_METHOD_7, | |
+ CFG_METHOD_8, | |
+ CFG_METHOD_9 , | |
+ CFG_METHOD_10, | |
+ CFG_METHOD_11, | |
+ CFG_METHOD_12, | |
+ CFG_METHOD_13, | |
+ CFG_METHOD_14, | |
+ CFG_METHOD_15, | |
+ CFG_METHOD_16, | |
+ CFG_METHOD_17, | |
+ CFG_METHOD_18, | |
+ CFG_METHOD_19, | |
+ CFG_METHOD_20, | |
+ CFG_METHOD_21, | |
+ CFG_METHOD_22, | |
+ CFG_METHOD_23, | |
+ CFG_METHOD_24, | |
+ CFG_METHOD_25, | |
+ CFG_METHOD_26, | |
+ CFG_METHOD_27, | |
+ CFG_METHOD_28, | |
+ CFG_METHOD_29, | |
+ CFG_METHOD_30, | |
+ CFG_METHOD_MAX, | |
+ CFG_METHOD_DEFAULT = 0xFF | |
+}; | |
+ | |
+#define LSO_32K 32000 | |
+#define LSO_64K 64000 | |
+ | |
+#define NIC_MIN_PHYS_BUF_COUNT (2) | |
+#define NIC_MAX_PHYS_BUF_COUNT_LSO_64K (24) | |
+#define NIC_MAX_PHYS_BUF_COUNT_LSO2 (16*4) | |
+ | |
+#define GTTCPHO_SHIFT 18 | |
+#define GTTCPHO_MAX 0x7fU | |
+#define GTPKTSIZE_MAX 0x3ffffU | |
+#define TCPHO_SHIFT 18 | |
+#define TCPHO_MAX 0x3ffU | |
+#define LSOPKTSIZE_MAX 0xffffU | |
+#define MSS_MAX 0x07ffu /* MSS value */ | |
+ | |
+#define OOB_CMD_RESET 0x00 | |
+#define OOB_CMD_DRIVER_START 0x05 | |
+#define OOB_CMD_DRIVER_STOP 0x06 | |
+#define OOB_CMD_SET_IPMAC 0x41 | |
+ | |
+#define WAKEUP_MAGIC_PACKET_NOT_SUPPORT (0) | |
+#define WAKEUP_MAGIC_PACKET_V1 (1) | |
+#define WAKEUP_MAGIC_PACKET_V2 (2) | |
+ | |
+//Ram Code Version | |
+#define NIC_RAMCODE_VERSION_CFG_METHOD_14 (0x0057) | |
+#define NIC_RAMCODE_VERSION_CFG_METHOD_16 (0x0055) | |
+#define NIC_RAMCODE_VERSION_CFG_METHOD_18 (0x0044) | |
+#define NIC_RAMCODE_VERSION_CFG_METHOD_20 (0x0044) | |
+#define NIC_RAMCODE_VERSION_CFG_METHOD_21 (0x0042) | |
+#define NIC_RAMCODE_VERSION_CFG_METHOD_24 (0x0001) | |
+#define NIC_RAMCODE_VERSION_CFG_METHOD_23 (0x0015) | |
+#define NIC_RAMCODE_VERSION_CFG_METHOD_26 (0x0012) | |
+#define NIC_RAMCODE_VERSION_CFG_METHOD_28 (0x0010) | |
+#define NIC_RAMCODE_VERSION_CFG_METHOD_29 (0x0018) | |
+ | |
+//hwoptimize | |
+#define HW_PATCH_SOC_LAN (BIT_0) | |
+#define HW_PATCH_SAMSUNG_LAN_DONGLE (BIT_2) | |
+ | |
+void mdio_write(struct rtl8168_private *tp, u32 RegAddr, u32 value); | |
+void mdio_prot_write(struct rtl8168_private *tp, u32 RegAddr, u32 value); | |
+void rtl8168_ephy_write(void __iomem *ioaddr, int RegAddr, int value); | |
+void mac_ocp_write(struct rtl8168_private *tp, u16 reg_addr, u16 value); | |
+u16 mac_ocp_read(struct rtl8168_private *tp, u16 reg_addr); | |
+void ClearEthPhyBit(struct rtl8168_private *tp, u8 addr, u16 mask); | |
+void SetEthPhyBit(struct rtl8168_private *tp, u8 addr, u16 mask); | |
+void OCP_write(struct rtl8168_private *tp, u16 addr, u8 len, u32 data); | |
+void OOB_notify(struct rtl8168_private *tp, u8 cmd); | |
+void rtl8168_init_ring_indexes(struct rtl8168_private *tp); | |
+void rtl8168_wait_ll_share_fifo_ready(struct net_device *dev); | |
+int rtl8168_eri_write(void __iomem *ioaddr, int addr, int len, u32 value, int type); | |
+void OOB_mutex_lock(struct rtl8168_private *tp); | |
+u32 mdio_read(struct rtl8168_private *tp, u32 RegAddr); | |
+u32 OCP_read(struct rtl8168_private *tp, u16 addr, u8 len); | |
+u32 rtl8168_eri_read(void __iomem *ioaddr, int addr, int len, int type); | |
+u16 rtl8168_ephy_read(void __iomem *ioaddr, int RegAddr); | |
+void rtl8168_hw_disable_mac_mcu_bps(struct net_device *dev); | |
+void rtl8168_wait_txrx_fifo_empty(struct net_device *dev); | |
+void EnableNowIsOob(struct rtl8168_private *tp); | |
+void DisableNowIsOob(struct rtl8168_private *tp); | |
+void OOB_mutex_unlock(struct rtl8168_private *tp); | |
+void Dash2DisableTx(struct rtl8168_private *tp); | |
+void Dash2EnableTx(struct rtl8168_private *tp); | |
+void Dash2DisableRx(struct rtl8168_private *tp); | |
+void Dash2EnableRx(struct rtl8168_private *tp); | |
+ | |
+ | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34) | |
+#define netdev_mc_count(dev) ((dev)->mc_count) | |
+#define netdev_mc_empty(dev) (netdev_mc_count(dev) == 0) | |
+#define netdev_for_each_mc_addr(mclist, dev) \ | |
+ for (mclist = dev->mc_list; mclist; mclist = mclist->next) | |
+#endif | |
diff --git a/drivers/net/r8168/src/r8168_asf.c b/drivers/net/r8168/src/r8168_asf.c | |
new file mode 100755 | |
index 000000000000..f0dafe38a1d7 | |
--- /dev/null | |
+++ b/drivers/net/r8168/src/r8168_asf.c | |
@@ -0,0 +1,419 @@ | |
+/* | |
+################################################################################ | |
+# | |
+# r8168 is the Linux device driver released for Realtek Gigabit Ethernet | |
+# controllers with PCI-Express interface. | |
+# | |
+# Copyright(c) 2017 Realtek Semiconductor Corp. All rights reserved. | |
+# | |
+# This program is free software; you can redistribute it and/or modify it | |
+# under the terms of the GNU General Public License as published by the Free | |
+# Software Foundation; either version 2 of the License, or (at your option) | |
+# any later version. | |
+# | |
+# This program is distributed in the hope that it will be useful, but WITHOUT | |
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
+# more details. | |
+# | |
+# You should have received a copy of the GNU General Public License along with | |
+# this program; if not, see <http://www.gnu.org/licenses/>. | |
+# | |
+# Author: | |
+# Realtek NIC software team <nicfae@realtek.com> | |
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan | |
+# | |
+################################################################################ | |
+*/ | |
+ | |
+/************************************************************************************ | |
+ * This product is covered by one or more of the following patents: | |
+ * US6,570,884, US6,115,776, and US6,327,625. | |
+ ***********************************************************************************/ | |
+ | |
+#include <linux/module.h> | |
+#include <linux/version.h> | |
+#include <linux/pci.h> | |
+#include <linux/netdevice.h> | |
+#include <linux/etherdevice.h> | |
+#include <linux/delay.h> | |
+#include <linux/ethtool.h> | |
+#include <linux/mii.h> | |
+#include <linux/if_vlan.h> | |
+#include <linux/crc32.h> | |
+#include <linux/in.h> | |
+#include <linux/ip.h> | |
+#include <linux/tcp.h> | |
+#include <linux/init.h> | |
+#include <linux/rtnetlink.h> | |
+ | |
+#include <asm/uaccess.h> | |
+ | |
+#include "r8168.h" | |
+#include "r8168_asf.h" | |
+#include "rtl_eeprom.h" | |
+ | |
+int rtl8168_asf_ioctl(struct net_device *dev, | |
+ struct ifreq *ifr) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ void *user_data = ifr->ifr_data; | |
+ struct asf_ioctl_struct asf_usrdata; | |
+ | |
+ if (tp->mcfg != CFG_METHOD_7 && tp->mcfg != CFG_METHOD_8) | |
+ return -EOPNOTSUPP; | |
+ | |
+ if (copy_from_user(&asf_usrdata, user_data, sizeof(struct asf_ioctl_struct))) | |
+ return -EFAULT; | |
+ | |
+ switch (asf_usrdata.offset) { | |
+ case HBPeriod: | |
+ rtl8168_asf_hbperiod(ioaddr, asf_usrdata.arg, asf_usrdata.u.data); | |
+ break; | |
+ case WD8Timer: | |
+ break; | |
+ case WD16Rst: | |
+ rtl8168_asf_wd16rst(ioaddr, asf_usrdata.arg, asf_usrdata.u.data); | |
+ break; | |
+ case WD8Rst: | |
+ rtl8168_asf_time_period(ioaddr, asf_usrdata.arg, WD8Rst, asf_usrdata.u.data); | |
+ break; | |
+ case LSnsrPollCycle: | |
+ rtl8168_asf_time_period(ioaddr, asf_usrdata.arg, LSnsrPollCycle, asf_usrdata.u.data); | |
+ break; | |
+ case ASFSnsrPollPrd: | |
+ rtl8168_asf_time_period(ioaddr, asf_usrdata.arg, ASFSnsrPollPrd, asf_usrdata.u.data); | |
+ break; | |
+ case AlertReSendItvl: | |
+ rtl8168_asf_time_period(ioaddr, asf_usrdata.arg, AlertReSendItvl, asf_usrdata.u.data); | |
+ break; | |
+ case SMBAddr: | |
+ rtl8168_asf_rw_hexadecimal(ioaddr, asf_usrdata.arg, SMBAddr, RW_ONE_BYTE, asf_usrdata.u.data); | |
+ break; | |
+ case ASFConfigR0: | |
+ rtl8168_asf_config_regs(ioaddr, asf_usrdata.arg, ASFConfigR0, asf_usrdata.u.data); | |
+ break; | |
+ case ASFConfigR1: | |
+ rtl8168_asf_config_regs(ioaddr, asf_usrdata.arg, ASFConfigR1, asf_usrdata.u.data); | |
+ break; | |
+ case ConsoleMA: | |
+ rtl8168_asf_console_mac(tp, asf_usrdata.arg, asf_usrdata.u.data); | |
+ break; | |
+ case ConsoleIP: | |
+ rtl8168_asf_ip_address(ioaddr, asf_usrdata.arg, ConsoleIP, asf_usrdata.u.data); | |
+ break; | |
+ case IPAddr: | |
+ rtl8168_asf_ip_address(tp, asf_usrdata.arg, IPAddr, asf_usrdata.u.data); | |
+ break; | |
+ case UUID: | |
+ rtl8168_asf_rw_uuid(ioaddr, asf_usrdata.arg, asf_usrdata.u.data); | |
+ break; | |
+ case IANA: | |
+ rtl8168_asf_rw_iana(ioaddr, asf_usrdata.arg, asf_usrdata.u.data); | |
+ break; | |
+ case SysID: | |
+ rtl8168_asf_rw_systemid(ioaddr, asf_usrdata.arg, asf_usrdata.u.data); | |
+ break; | |
+ case Community: | |
+ rtl8168_asf_community_string(ioaddr, asf_usrdata.arg, asf_usrdata.u.string); | |
+ break; | |
+ case StringLength: | |
+ rtl8168_asf_community_string_len(ioaddr, asf_usrdata.arg, asf_usrdata.u.data); | |
+ break; | |
+ case FmCapMsk: | |
+ rtl8168_asf_capability_masks(ioaddr, asf_usrdata.arg, FmCapMsk, asf_usrdata.u.data); | |
+ break; | |
+ case SpCMDMsk: | |
+ rtl8168_asf_capability_masks(ioaddr, asf_usrdata.arg, SpCMDMsk, asf_usrdata.u.data); | |
+ break; | |
+ case SysCapMsk: | |
+ rtl8168_asf_capability_masks(ioaddr, asf_usrdata.arg, SysCapMsk, asf_usrdata.u.data); | |
+ break; | |
+ case RmtRstAddr: | |
+ rtl8168_asf_rw_hexadecimal(ioaddr, asf_usrdata.arg, RmtRstAddr, RW_ONE_BYTE, asf_usrdata.u.data); | |
+ break; | |
+ case RmtRstCmd: | |
+ rtl8168_asf_rw_hexadecimal(ioaddr, asf_usrdata.arg, RmtRstCmd, RW_ONE_BYTE, asf_usrdata.u.data); | |
+ break; | |
+ case RmtRstData: | |
+ rtl8168_asf_rw_hexadecimal(ioaddr, asf_usrdata.arg, RmtRstData, RW_ONE_BYTE, asf_usrdata.u.data); | |
+ break; | |
+ case RmtPwrOffAddr: | |
+ rtl8168_asf_rw_hexadecimal(ioaddr, asf_usrdata.arg, RmtPwrOffAddr, RW_ONE_BYTE, asf_usrdata.u.data); | |
+ break; | |
+ case RmtPwrOffCmd: | |
+ rtl8168_asf_rw_hexadecimal(ioaddr, asf_usrdata.arg, RmtPwrOffCmd, RW_ONE_BYTE, asf_usrdata.u.data); | |
+ break; | |
+ case RmtPwrOffData: | |
+ rtl8168_asf_rw_hexadecimal(ioaddr, asf_usrdata.arg, RmtPwrOffData, RW_ONE_BYTE, asf_usrdata.u.data); | |
+ break; | |
+ case RmtPwrOnAddr: | |
+ rtl8168_asf_rw_hexadecimal(ioaddr, asf_usrdata.arg, RmtPwrOnAddr, RW_ONE_BYTE, asf_usrdata.u.data); | |
+ break; | |
+ case RmtPwrOnCmd: | |
+ rtl8168_asf_rw_hexadecimal(ioaddr, asf_usrdata.arg, RmtPwrOnCmd, RW_ONE_BYTE, asf_usrdata.u.data); | |
+ break; | |
+ case RmtPwrOnData: | |
+ rtl8168_asf_rw_hexadecimal(ioaddr, asf_usrdata.arg, RmtPwrOnData, RW_ONE_BYTE, asf_usrdata.u.data); | |
+ break; | |
+ case RmtPCRAddr: | |
+ rtl8168_asf_rw_hexadecimal(ioaddr, asf_usrdata.arg, RmtPCRAddr, RW_ONE_BYTE, asf_usrdata.u.data); | |
+ break; | |
+ case RmtPCRCmd: | |
+ rtl8168_asf_rw_hexadecimal(ioaddr, asf_usrdata.arg, RmtPCRCmd, RW_ONE_BYTE, asf_usrdata.u.data); | |
+ break; | |
+ case RmtPCRData: | |
+ rtl8168_asf_rw_hexadecimal(ioaddr, asf_usrdata.arg, RmtPCRData, RW_ONE_BYTE, asf_usrdata.u.data); | |
+ break; | |
+ case ASFSnsr0Addr: | |
+ rtl8168_asf_rw_hexadecimal(ioaddr, asf_usrdata.arg, ASFSnsr0Addr, RW_ONE_BYTE, asf_usrdata.u.data); | |
+ break; | |
+ case LSnsrAddr0: | |
+ rtl8168_asf_rw_hexadecimal(ioaddr, asf_usrdata.arg, LSnsrAddr0, RW_ONE_BYTE, asf_usrdata.u.data); | |
+ break; | |
+ case KO: | |
+ /* Get/Set Key Operation */ | |
+ rtl8168_asf_key_access(ioaddr, asf_usrdata.arg, KO, asf_usrdata.u.data); | |
+ break; | |
+ case KA: | |
+ /* Get/Set Key Administrator */ | |
+ rtl8168_asf_key_access(ioaddr, asf_usrdata.arg, KA, asf_usrdata.u.data); | |
+ break; | |
+ case KG: | |
+ /* Get/Set Key Generation */ | |
+ rtl8168_asf_key_access(ioaddr, asf_usrdata.arg, KG, asf_usrdata.u.data); | |
+ break; | |
+ case KR: | |
+ /* Get/Set Key Random */ | |
+ rtl8168_asf_key_access(tp, asf_usrdata.arg, KR, asf_usrdata.u.data); | |
+ break; | |
+ default: | |
+ return -EOPNOTSUPP; | |
+ } | |
+ | |
+ if (copy_to_user(user_data, &asf_usrdata, sizeof(struct asf_ioctl_struct))) | |
+ return -EFAULT; | |
+ | |
+ return 0; | |
+} | |
+ | |
+void rtl8168_asf_hbperiod(void __iomem *ioaddr, int arg, unsigned int *data) | |
+{ | |
+ if (arg == ASF_GET) | |
+ data[ASFHBPERIOD] = rtl8168_eri_read(ioaddr, HBPeriod, RW_TWO_BYTES, ERIAR_ASF); | |
+ else if (arg == ASF_SET) { | |
+ rtl8168_eri_write(ioaddr, HBPeriod, RW_TWO_BYTES, data[ASFHBPERIOD], ERIAR_ASF); | |
+ rtl8168_eri_write(ioaddr, 0x1EC, RW_ONE_BYTE, 0x07, ERIAR_ASF); | |
+ } | |
+} | |
+ | |
+void rtl8168_asf_wd16rst(void __iomem *ioaddr, int arg, unsigned int *data) | |
+{ | |
+ data[ASFWD16RST] = rtl8168_eri_read(ioaddr, WD16Rst, RW_TWO_BYTES, ERIAR_ASF); | |
+} | |
+ | |
+void rtl8168_asf_console_mac(struct rtl8168_private *tp, int arg, unsigned int *data) | |
+{ | |
+ void __iomem *ioaddr=tp->mmio_addr; | |
+ int i; | |
+ | |
+ if (arg == ASF_GET) { | |
+ for (i = 0; i < 6; i++) | |
+ data[i] = rtl8168_eri_read(ioaddr, ConsoleMA + i, RW_ONE_BYTE, ERIAR_ASF); | |
+ } else if (arg == ASF_SET) { | |
+ for (i = 0; i < 6; i++) | |
+ rtl8168_eri_write(ioaddr, ConsoleMA + i, RW_ONE_BYTE, data[i], ERIAR_ASF); | |
+ | |
+ /* write the new console MAC address to EEPROM */ | |
+ rtl_eeprom_write_sc(tp, 70, (data[1] << 8) | data[0]); | |
+ rtl_eeprom_write_sc(tp, 71, (data[3] << 8) | data[2]); | |
+ rtl_eeprom_write_sc(tp, 72, (data[5] << 8) | data[4]); | |
+ } | |
+} | |
+ | |
+void rtl8168_asf_ip_address(struct rtl8168_private *tp, int arg, int offset, unsigned int *data) | |
+{ | |
+ void __iomem *ioaddr=tp->mmio_addr; | |
+ int i; | |
+ int eeprom_off = 0; | |
+ | |
+ if (arg == ASF_GET) { | |
+ for (i = 0; i < 4; i++) | |
+ data[i] = rtl8168_eri_read(ioaddr, offset + i, RW_ONE_BYTE, ERIAR_ASF); | |
+ } else if (arg == ASF_SET) { | |
+ for (i = 0; i < 4; i++) | |
+ rtl8168_eri_write(ioaddr, offset + i, RW_ONE_BYTE, data[i], ERIAR_ASF); | |
+ | |
+ if (offset == ConsoleIP) | |
+ eeprom_off = 73; | |
+ else if (offset == IPAddr) | |
+ eeprom_off = 75; | |
+ | |
+ /* write the new IP address to EEPROM */ | |
+ rtl_eeprom_write_sc(tp, eeprom_off, (data[1] << 8) | data[0]); | |
+ rtl_eeprom_write_sc(tp, eeprom_off + 1, (data[3] << 8) | data[2]); | |
+ | |
+ } | |
+} | |
+ | |
+void rtl8168_asf_config_regs(void __iomem *ioaddr, int arg, int offset, unsigned int *data) | |
+{ | |
+ unsigned int value; | |
+ | |
+ if (arg == ASF_GET) { | |
+ data[ASFCAPABILITY] = (rtl8168_eri_read(ioaddr, offset, RW_ONE_BYTE, ERIAR_ASF) & data[ASFCONFIG]) ? FUNCTION_ENABLE : FUNCTION_DISABLE; | |
+ } else if (arg == ASF_SET) { | |
+ value = rtl8168_eri_read(ioaddr, offset, RW_ONE_BYTE, ERIAR_ASF); | |
+ | |
+ if (data[ASFCAPABILITY] == FUNCTION_ENABLE) | |
+ value |= data[ASFCONFIG]; | |
+ else if (data[ASFCAPABILITY] == FUNCTION_DISABLE) | |
+ value &= ~data[ASFCONFIG]; | |
+ | |
+ rtl8168_eri_write(ioaddr, offset, RW_ONE_BYTE, value, ERIAR_ASF); | |
+ } | |
+} | |
+ | |
+void rtl8168_asf_capability_masks(void __iomem *ioaddr, int arg, int offset, unsigned int *data) | |
+{ | |
+ unsigned int len, bit_mask; | |
+ | |
+ bit_mask = DISABLE_MASK; | |
+ | |
+ if (offset == FmCapMsk) { | |
+ /* System firmware capabilities */ | |
+ len = RW_FOUR_BYTES; | |
+ if (data[ASFCAPMASK] == FUNCTION_ENABLE) | |
+ bit_mask = FMW_CAP_MASK; | |
+ } else if (offset == SpCMDMsk) { | |
+ /* Special commands */ | |
+ len = RW_TWO_BYTES; | |
+ if (data[ASFCAPMASK] == FUNCTION_ENABLE) | |
+ bit_mask = SPC_CMD_MASK; | |
+ } else { | |
+ /* System capability (offset == SysCapMsk)*/ | |
+ len = RW_ONE_BYTE; | |
+ if (data[ASFCAPMASK] == FUNCTION_ENABLE) | |
+ bit_mask = SYS_CAP_MASK; | |
+ } | |
+ | |
+ if (arg == ASF_GET) | |
+ data[ASFCAPMASK] = rtl8168_eri_read(ioaddr, offset, len, ERIAR_ASF) ? FUNCTION_ENABLE : FUNCTION_DISABLE; | |
+ else /* arg == ASF_SET */ | |
+ rtl8168_eri_write(ioaddr, offset, len, bit_mask, ERIAR_ASF); | |
+} | |
+ | |
+void rtl8168_asf_community_string(void __iomem *ioaddr, int arg, char *string) | |
+{ | |
+ int i; | |
+ | |
+ if (arg == ASF_GET) { | |
+ for (i = 0; i < COMMU_STR_MAX_LEN; i++) | |
+ string[i] = rtl8168_eri_read(ioaddr, Community + i, RW_ONE_BYTE, ERIAR_ASF); | |
+ } else { /* arg == ASF_SET */ | |
+ for (i = 0; i < COMMU_STR_MAX_LEN; i++) | |
+ rtl8168_eri_write(ioaddr, Community + i, RW_ONE_BYTE, string[i], ERIAR_ASF); | |
+ } | |
+} | |
+ | |
+void rtl8168_asf_community_string_len(void __iomem *ioaddr, int arg, unsigned int *data) | |
+{ | |
+ if (arg == ASF_GET) | |
+ data[ASFCOMMULEN] = rtl8168_eri_read(ioaddr, StringLength, RW_ONE_BYTE, ERIAR_ASF); | |
+ else /* arg == ASF_SET */ | |
+ rtl8168_eri_write(ioaddr, StringLength, RW_ONE_BYTE, data[ASFCOMMULEN], ERIAR_ASF); | |
+} | |
+ | |
+void rtl8168_asf_time_period(void __iomem *ioaddr, int arg, int offset, unsigned int *data) | |
+{ | |
+ int pos = 0; | |
+ | |
+ if (offset == WD8Rst) | |
+ pos = ASFWD8RESET; | |
+ else if (offset == LSnsrPollCycle) | |
+ pos = ASFLSNRPOLLCYC; | |
+ else if (offset == ASFSnsrPollPrd) | |
+ pos = ASFSNRPOLLCYC; | |
+ else if (offset == AlertReSendItvl) | |
+ pos = ASFALERTRESND; | |
+ | |
+ if (arg == ASF_GET) | |
+ data[pos] = rtl8168_eri_read(ioaddr, offset, RW_ONE_BYTE, ERIAR_ASF); | |
+ else /* arg == ASF_SET */ | |
+ rtl8168_eri_write(ioaddr, offset, RW_ONE_BYTE, data[pos], ERIAR_ASF); | |
+ | |
+} | |
+ | |
+void rtl8168_asf_key_access(struct rtl8168_private *tp, int arg, int offset, unsigned int *data) | |
+{ | |
+ void __iomem *ioaddr=tp->mmio_addr; | |
+ int i, j; | |
+ int key_off = 0; | |
+ | |
+ if (arg == ASF_GET) { | |
+ for (i = 0; i < KEY_LEN; i++) | |
+ data[i] = rtl8168_eri_read(ioaddr, offset + KEY_LEN - (i + 1), RW_ONE_BYTE, ERIAR_ASF); | |
+ } else { | |
+ if (offset == KO) | |
+ key_off = 162; | |
+ else if (offset == KA) | |
+ key_off = 172; | |
+ else if (offset == KG) | |
+ key_off = 182; | |
+ else if (offset == KR) | |
+ key_off = 192; | |
+ | |
+ /* arg == ASF_SET */ | |
+ for (i = 0; i < KEY_LEN; i++) | |
+ rtl8168_eri_write(ioaddr, offset + KEY_LEN - (i + 1), RW_ONE_BYTE, data[i], ERIAR_ASF); | |
+ | |
+ /* write the new key to EEPROM */ | |
+ for (i = 0, j = 19; i < 10; i++, j = j - 2) | |
+ rtl_eeprom_write_sc(tp, key_off + i, (data[j - 1] << 8) | data[j]); | |
+ } | |
+} | |
+ | |
+void rtl8168_asf_rw_hexadecimal(void __iomem *ioaddr, int arg, int offset, int len, unsigned int *data) | |
+{ | |
+ if (arg == ASF_GET) | |
+ data[ASFRWHEXNUM] = rtl8168_eri_read(ioaddr, offset, len, ERIAR_ASF); | |
+ else /* arg == ASF_SET */ | |
+ rtl8168_eri_write(ioaddr, offset, len, data[ASFRWHEXNUM], ERIAR_ASF); | |
+} | |
+ | |
+void rtl8168_asf_rw_systemid(void __iomem *ioaddr, int arg, unsigned int *data) | |
+{ | |
+ int i; | |
+ | |
+ if (arg == ASF_GET) | |
+ for (i = 0; i < SYSID_LEN ; i++) | |
+ data[i] = rtl8168_eri_read(ioaddr, SysID + i, RW_ONE_BYTE, ERIAR_ASF); | |
+ else /* arg == ASF_SET */ | |
+ for (i = 0; i < SYSID_LEN ; i++) | |
+ rtl8168_eri_write(ioaddr, SysID + i, RW_ONE_BYTE, data[i], ERIAR_ASF); | |
+} | |
+ | |
+void rtl8168_asf_rw_iana(void __iomem *ioaddr, int arg, unsigned int *data) | |
+{ | |
+ int i; | |
+ | |
+ if (arg == ASF_GET) | |
+ for (i = 0; i < RW_FOUR_BYTES; i++) | |
+ data[i] = rtl8168_eri_read(ioaddr, IANA + i, RW_ONE_BYTE, ERIAR_ASF); | |
+ else /* arg == ASF_SET */ | |
+ for (i = 0; i < RW_FOUR_BYTES; i++) | |
+ rtl8168_eri_write(ioaddr, IANA + i, RW_ONE_BYTE, data[i], ERIAR_ASF); | |
+} | |
+ | |
+void rtl8168_asf_rw_uuid(void __iomem *ioaddr, int arg, unsigned int *data) | |
+{ | |
+ int i, j; | |
+ | |
+ if (arg == ASF_GET) | |
+ for (i = UUID_LEN - 1, j = 0; i >= 0 ; i--, j++) | |
+ data[j] = rtl8168_eri_read(ioaddr, UUID + i, RW_ONE_BYTE, ERIAR_ASF); | |
+ else /* arg == ASF_SET */ | |
+ for (i = UUID_LEN - 1, j = 0; i >= 0 ; i--, j++) | |
+ rtl8168_eri_write(ioaddr, UUID + i, RW_ONE_BYTE, data[j], ERIAR_ASF); | |
+} | |
diff --git a/drivers/net/r8168/src/r8168_asf.h b/drivers/net/r8168/src/r8168_asf.h | |
new file mode 100755 | |
index 000000000000..8beb850b8687 | |
--- /dev/null | |
+++ b/drivers/net/r8168/src/r8168_asf.h | |
@@ -0,0 +1,294 @@ | |
+/* | |
+################################################################################ | |
+# | |
+# r8168 is the Linux device driver released for Realtek Gigabit Ethernet | |
+# controllers with PCI-Express interface. | |
+# | |
+# Copyright(c) 2017 Realtek Semiconductor Corp. All rights reserved. | |
+# | |
+# This program is free software; you can redistribute it and/or modify it | |
+# under the terms of the GNU General Public License as published by the Free | |
+# Software Foundation; either version 2 of the License, or (at your option) | |
+# any later version. | |
+# | |
+# This program is distributed in the hope that it will be useful, but WITHOUT | |
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
+# more details. | |
+# | |
+# You should have received a copy of the GNU General Public License along with | |
+# this program; if not, see <http://www.gnu.org/licenses/>. | |
+# | |
+# Author: | |
+# Realtek NIC software team <nicfae@realtek.com> | |
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan | |
+# | |
+################################################################################ | |
+*/ | |
+ | |
+/************************************************************************************ | |
+ * This product is covered by one or more of the following patents: | |
+ * US6,570,884, US6,115,776, and US6,327,625. | |
+ ***********************************************************************************/ | |
+ | |
+#define SIOCDEVPRIVATE_RTLASF SIOCDEVPRIVATE | |
+ | |
+#define FUNCTION_ENABLE 1 | |
+#define FUNCTION_DISABLE 0 | |
+ | |
+#define ASFCONFIG 0 | |
+#define ASFCAPABILITY 1 | |
+#define ASFCOMMULEN 0 | |
+#define ASFHBPERIOD 0 | |
+#define ASFWD16RST 0 | |
+#define ASFCAPMASK 0 | |
+#define ASFALERTRESND 0 | |
+#define ASFLSNRPOLLCYC 0 | |
+#define ASFSNRPOLLCYC 0 | |
+#define ASFWD8RESET 0 | |
+#define ASFRWHEXNUM 0 | |
+ | |
+#define FMW_CAP_MASK 0x0000F867 | |
+#define SPC_CMD_MASK 0x1F00 | |
+#define SYS_CAP_MASK 0xFF | |
+#define DISABLE_MASK 0x00 | |
+ | |
+#define MAX_DATA_LEN 200 | |
+#define MAX_STR_LEN 200 | |
+ | |
+#define COMMU_STR_MAX_LEN 23 | |
+ | |
+#define KEY_LEN 20 | |
+#define UUID_LEN 16 | |
+#define SYSID_LEN 2 | |
+ | |
+#define RW_ONE_BYTE 1 | |
+#define RW_TWO_BYTES 2 | |
+#define RW_FOUR_BYTES 4 | |
+ | |
+enum asf_registers { | |
+ HBPeriod = 0x0000, | |
+ WD8Rst = 0x0002, | |
+ WD8Timer = 0x0003, | |
+ WD16Rst = 0x0004, | |
+ LSnsrPollCycle = 0x0006, | |
+ ASFSnsrPollPrd = 0x0007, | |
+ AlertReSendCnt = 0x0008, | |
+ AlertReSendItvl = 0x0009, | |
+ SMBAddr = 0x000A, | |
+ SMBCap = 0x000B, | |
+ ASFConfigR0 = 0x000C, | |
+ ASFConfigR1 = 0x000D, | |
+ WD16Timer = 0x000E, | |
+ ConsoleMA = 0x0010, | |
+ ConsoleIP = 0x0016, | |
+ IPAddr = 0x001A, | |
+ | |
+ UUID = 0x0020, | |
+ IANA = 0x0030, | |
+ SysID = 0x0034, | |
+ Community = 0x0036, | |
+ StringLength = 0x004D, | |
+ LC = 0x004E, | |
+ EntityInst = 0x004F, | |
+ FmCapMsk = 0x0050, | |
+ SpCMDMsk = 0x0054, | |
+ SysCapMsk = 0x0056, | |
+ WDSysSt = 0x0057, | |
+ RxMsgType = 0x0058, | |
+ RxSpCMD = 0x0059, | |
+ RxSpCMDPa = 0x005A, | |
+ RxBtOpMsk = 0x005C, | |
+ RmtRstAddr = 0x005E, | |
+ RmtRstCmd = 0x005F, | |
+ RmtRstData = 0x0060, | |
+ RmtPwrOffAddr = 0x0061, | |
+ RmtPwrOffCmd = 0x0062, | |
+ RmtPwrOffData = 0x0063, | |
+ RmtPwrOnAddr = 0x0064, | |
+ RmtPwrOnCmd = 0x0065, | |
+ RmtPwrOnData = 0x0066, | |
+ RmtPCRAddr = 0x0067, | |
+ RmtPCRCmd = 0x0068, | |
+ RmtPCRData = 0x0069, | |
+ RMCP_IANA = 0x006A, | |
+ RMCP_OEM = 0x006E, | |
+ ASFSnsr0Addr = 0x0070, | |
+ | |
+ ASFSnsrEvSt = 0x0073, | |
+ ASFSnsrEvAlert = 0x0081, | |
+ | |
+ LSnsrNo = 0x00AD, | |
+ AssrtEvntMsk = 0x00AE, | |
+ DeAssrtEvntMsk = 0x00AF, | |
+ | |
+ LSnsrAddr0 = 0x00B0, | |
+ LAlertCMD0 = 0x00B1, | |
+ LAlertDataMsk0 = 0x00B2, | |
+ LAlertCmp0 = 0x00B3, | |
+ LAlertESnsrT0 = 0x00B4, | |
+ LAlertET0 = 0x00B5, | |
+ LAlertEOffset0 = 0x00B6, | |
+ LAlertES0 = 0x00B7, | |
+ LAlertSN0 = 0x00B8, | |
+ LAlertEntity0 = 0x00B9, | |
+ LAlertEI0 = 0x00BA, | |
+ LSnsrState0 = 0x00BB, | |
+ | |
+ LSnsrAddr1 = 0x00BD, | |
+ LAlertCMD1 = 0x00BE, | |
+ LAlertDataMsk1 = 0x00BF, | |
+ LAlertCmp1 = 0x00C0, | |
+ LAlertESnsrT1 = 0x00C1, | |
+ LAlertET1 = 0x00C2, | |
+ LAlertEOffset1 = 0x00C3, | |
+ LAlertES1 = 0x00C4, | |
+ LAlertSN1 = 0x00C5, | |
+ LAlertEntity1 = 0x00C6, | |
+ LAlertEI1 = 0x00C7, | |
+ LSnsrState1 = 0x00C8, | |
+ | |
+ LSnsrAddr2 = 0x00CA, | |
+ LAlertCMD2 = 0x00CB, | |
+ LAlertDataMsk2 = 0x00CC, | |
+ LAlertCmp2 = 0x00CD, | |
+ LAlertESnsrT2 = 0x00CE, | |
+ LAlertET2 = 0x00CF, | |
+ LAlertEOffset2 = 0x00D0, | |
+ LAlertES2 = 0x00D1, | |
+ LAlertSN2 = 0x00D2, | |
+ LAlertEntity2 = 0x00D3, | |
+ LAlertEI2 = 0x00D4, | |
+ LSnsrState2 = 0x00D5, | |
+ | |
+ LSnsrAddr3 = 0x00D7, | |
+ LAlertCMD3 = 0x00D8, | |
+ LAlertDataMsk3 = 0x00D9, | |
+ LAlertCmp3 = 0x00DA, | |
+ LAlertESnsrT3 = 0x00DB, | |
+ LAlertET3 = 0x00DC, | |
+ LAlertEOffset3 = 0x00DD, | |
+ LAlertES3 = 0x00DE, | |
+ LAlertSN3 = 0x00DF, | |
+ LAlertEntity3 = 0x00E0, | |
+ LAlertEI3 = 0x00E1, | |
+ LSnsrState3 = 0x00E2, | |
+ | |
+ LSnsrAddr4 = 0x00E4, | |
+ LAlertCMD4 = 0x00E5, | |
+ LAlertDataMsk4 = 0x00E6, | |
+ LAlertCmp4 = 0x00E7, | |
+ LAlertESnsrT4 = 0x00E8, | |
+ LAlertET4 = 0x00E9, | |
+ LAlertEOffset4 = 0x00EA, | |
+ LAlertES4 = 0x00EB, | |
+ LAlertSN4 = 0x00EC, | |
+ LAlertEntity4 = 0x00ED, | |
+ LAlertEI4 = 0x00EE, | |
+ LSnsrState4 = 0x00EF, | |
+ | |
+ LSnsrAddr5 = 0x00F1, | |
+ LAlertCMD5 = 0x00F2, | |
+ LAlertDataMsk5 = 0x00F3, | |
+ LAlertCmp5 = 0x00F4, | |
+ LAlertESnsrT5 = 0x00F5, | |
+ LAlertET5 = 0x00F6, | |
+ LAlertEOffset5 = 0x00F7, | |
+ LAlertES5 = 0x00F8, | |
+ LAlertSN5 = 0x00F9, | |
+ LAlertEntity5 = 0x00FA, | |
+ LAlertEI5 = 0x00FB, | |
+ LSnsrState5 = 0x00FC, | |
+ | |
+ LSnsrAddr6 = 0x00FE, | |
+ LAlertCMD6 = 0x00FF, | |
+ LAlertDataMsk6 = 0x0100, | |
+ LAlertCmp6 = 0x0101, | |
+ LAlertESnsrT6 = 0x0102, | |
+ LAlertET6 = 0x0103, | |
+ LAlertEOffset6 = 0x0104, | |
+ LAlertES6 = 0x0105, | |
+ LAlertSN6 = 0x0106, | |
+ LAlertEntity6 = 0x0107, | |
+ LAlertEI6 = 0x0108, | |
+ LSnsrState6 = 0x0109, | |
+ | |
+ LSnsrAddr7 = 0x010B, | |
+ LAlertCMD7 = 0x010C, | |
+ LAlertDataMsk7 = 0x010D, | |
+ LAlertCmp7 = 0x010E, | |
+ LAlertESnsrT7 = 0x010F, | |
+ LAlertET7 = 0x0110, | |
+ LAlertEOffset7 = 0x0111, | |
+ LAlertES7 = 0x0112, | |
+ LAlertSN7 = 0x0113, | |
+ LAlertEntity7 = 0x0114, | |
+ LAlertEI7 = 0x0115, | |
+ LSnsrState7 = 0x0116, | |
+ LAssert = 0x0117, | |
+ LDAssert = 0x0118, | |
+ IPServiceType = 0x0119, | |
+ IPIdfr = 0x011A, | |
+ FlagFOffset = 0x011C, | |
+ TTL = 0x011E, | |
+ HbtEI = 0x011F, | |
+ MgtConSID1 = 0x0120, | |
+ MgtConSID2 = 0x0124, | |
+ MgdCltSID = 0x0128, | |
+ StCd = 0x012C, | |
+ MgtConUR = 0x012D, | |
+ MgtConUNL = 0x012E, | |
+ | |
+ AuthPd = 0x0130, | |
+ IntyPd = 0x0138, | |
+ MgtConRN = 0x0140, | |
+ MgdCtlRN = 0x0150, | |
+ MgtConUN = 0x0160, | |
+ Rakp2IntCk = 0x0170, | |
+ KO = 0x017C, | |
+ KA = 0x0190, | |
+ KG = 0x01A4, | |
+ KR = 0x01B8, | |
+ CP = 0x01CC, | |
+ CQ = 0x01D0, | |
+ KC = 0x01D4, | |
+ ConsoleSid = 0x01E8, | |
+ | |
+ SIK1 = 0x01FC, | |
+ SIK2 = 0x0210, | |
+ Udpsrc_port = 0x0224, | |
+ Udpdes_port = 0x0226, | |
+ Asf_debug_mux = 0x0228 | |
+}; | |
+ | |
+enum asf_cmdln_opt { | |
+ ASF_GET, | |
+ ASF_SET, | |
+ ASF_HELP | |
+}; | |
+ | |
+struct asf_ioctl_struct { | |
+ unsigned int arg; | |
+ unsigned int offset; | |
+ union { | |
+ unsigned int data[MAX_DATA_LEN]; | |
+ char string[MAX_STR_LEN]; | |
+ } u; | |
+}; | |
+ | |
+int rtl8168_asf_ioctl(struct net_device *dev, struct ifreq *ifr); | |
+void rtl8168_asf_hbperiod(void __iomem *ioaddr, int arg, unsigned int *data); | |
+void rtl8168_asf_wd16rst(void __iomem *ioaddr, int arg, unsigned int *data); | |
+void rtl8168_asf_console_mac(struct rtl8168_private *, int arg, unsigned int *data); | |
+void rtl8168_asf_ip_address(struct rtl8168_private *, int arg, int offset, unsigned int *data); | |
+void rtl8168_asf_config_regs(void __iomem *ioaddr, int arg, int offset, unsigned int *data); | |
+void rtl8168_asf_capability_masks(void __iomem *ioaddr, int arg, int offset, unsigned int *data); | |
+void rtl8168_asf_community_string(void __iomem *ioaddr, int arg, char *string); | |
+void rtl8168_asf_community_string_len(void __iomem *ioaddr, int arg, unsigned int *data); | |
+void rtl8168_asf_alert_resend_interval(void __iomem *ioaddr, int arg, unsigned int *data); | |
+void rtl8168_asf_time_period(void __iomem *ioaddr, int arg, int offset, unsigned int *data); | |
+void rtl8168_asf_key_access(struct rtl8168_private *, int arg, int offset, unsigned int *data); | |
+void rtl8168_asf_rw_hexadecimal(void __iomem *ioaddr, int arg, int offset, int len, unsigned int *data); | |
+void rtl8168_asf_rw_iana(void __iomem *ioaddr, int arg, unsigned int *data); | |
+void rtl8168_asf_rw_uuid(void __iomem *ioaddr, int arg, unsigned int *data); | |
+void rtl8168_asf_rw_systemid(void __iomem *ioaddr, int arg, unsigned int *data); | |
diff --git a/drivers/net/r8168/src/r8168_dash.h b/drivers/net/r8168/src/r8168_dash.h | |
new file mode 100755 | |
index 000000000000..54764ce3dc17 | |
--- /dev/null | |
+++ b/drivers/net/r8168/src/r8168_dash.h | |
@@ -0,0 +1,193 @@ | |
+/* | |
+################################################################################ | |
+# | |
+# r8168 is the Linux device driver released for Realtek Gigabit Ethernet | |
+# controllers with PCI-Express interface. | |
+# | |
+# Copyright(c) 2017 Realtek Semiconductor Corp. All rights reserved. | |
+# | |
+# This program is free software; you can redistribute it and/or modify it | |
+# under the terms of the GNU General Public License as published by the Free | |
+# Software Foundation; either version 2 of the License, or (at your option) | |
+# any later version. | |
+# | |
+# This program is distributed in the hope that it will be useful, but WITHOUT | |
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
+# more details. | |
+# | |
+# You should have received a copy of the GNU General Public License along with | |
+# this program; if not, see <http://www.gnu.org/licenses/>. | |
+# | |
+# Author: | |
+# Realtek NIC software team <nicfae@realtek.com> | |
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan | |
+# | |
+################################################################################ | |
+*/ | |
+ | |
+/************************************************************************************ | |
+ * This product is covered by one or more of the following patents: | |
+ * US6,570,884, US6,115,776, and US6,327,625. | |
+ ***********************************************************************************/ | |
+ | |
+#ifndef _LINUX_R8168_DASH_H | |
+#define _LINUX_R8168_DASH_H | |
+ | |
+#define SIOCDEVPRIVATE_RTLDASH SIOCDEVPRIVATE+2 | |
+ | |
+enum rtl_dash_cmd { | |
+ | |
+ RTL_DASH_ARP_NS_OFFLOAD=0, | |
+ RTL_DASH_SET_OOB_IPMAC, | |
+ RTL_DASH_NOTIFY_OOB, | |
+ | |
+ RTL_DASH_SEND_BUFFER_DATA_TO_DASH_FW, | |
+ RTL_DASH_CHECK_SEND_BUFFER_TO_DASH_FW_COMPLETE, | |
+ RTL_DASH_GET_RCV_FROM_FW_BUFFER_DATA, | |
+ | |
+ RTLT_DASH_COMMAND_INVALID | |
+}; | |
+ | |
+struct rtl_dash_ip_mac { | |
+ struct sockaddr ifru_addr; | |
+ struct sockaddr ifru_netmask; | |
+ struct sockaddr ifru_hwaddr; | |
+}; | |
+ | |
+struct rtl_dash_ioctl_struct { | |
+ __u32 cmd; | |
+ __u32 offset; | |
+ __u32 len; | |
+ union { | |
+ __u32 data; | |
+ void *data_buffer; | |
+ }; | |
+}; | |
+ | |
+typedef struct _RX_DASH_FROM_FW_DESC { | |
+ u16 length; | |
+ u8 statusLowByte; | |
+ u8 statusHighByte; | |
+ u32 resv; | |
+ u64 BufferAddress; | |
+} | |
+RX_DASH_FROM_FW_DESC, *PRX_DASH_FROM_FW_DESC; | |
+ | |
+typedef struct _TX_DASH_SEND_FW_DESC { | |
+ u16 length; | |
+ u8 statusLowByte; | |
+ u8 statusHighByte; | |
+ u32 resv; | |
+ u64 BufferAddress; | |
+} | |
+TX_DASH_SEND_FW_DESC, *PTX_DASH_SEND_FW_DESC; | |
+ | |
+typedef struct _OSOOBHdr { | |
+ u32 len; | |
+ u8 type; | |
+ u8 flag; | |
+ u8 hostReqV; | |
+ u8 res; | |
+} | |
+OSOOBHdr, *POSOOBHdr; | |
+ | |
+typedef struct _RX_DASH_BUFFER_TYPE_2 { | |
+ OSOOBHdr oobhdr; | |
+ void *RxDataBuffer; | |
+} | |
+RX_DASH_BUFFER_TYPE_2, *PRX_DASH_BUFFER_TYPE_2; | |
+ | |
+#define ALIGN_8 (0x7) | |
+#define ALIGN_16 (0xf) | |
+#define ALIGN_32 (0x1f) | |
+#define ALIGN_64 (0x3f) | |
+#define ALIGN_256 (0xff) | |
+#define ALIGN_4096 (0xfff) | |
+ | |
+#define OCP_REG_CONFIG0 (0x10) | |
+#define OCP_REG_CONFIG0_REV_F (0xB8) | |
+#define OCP_REG_DASH_POLL (0x30) | |
+#define OCP_REG_HOST_REQ (0x34) | |
+#define OCP_REG_DASH_REQ (0x35) | |
+#define OCP_REG_CR (0x36) | |
+#define OCP_REG_DMEMSTA (0x38) | |
+#define OCP_REG_GPHYAR (0x60) | |
+ | |
+ | |
+#define OCP_REG_CONFIG0_DASHEN BIT_15 | |
+#define OCP_REG_CONFIG0_OOBRESET BIT_14 | |
+#define OCP_REG_CONFIG0_APRDY BIT_13 | |
+#define OCP_REG_CONFIG0_FIRMWARERDY BIT_12 | |
+#define OCP_REG_CONFIG0_DRIVERRDY BIT_11 | |
+#define OCP_REG_CONFIG0_OOB_WDT BIT_9 | |
+#define OCP_REG_CONFIG0_DRV_WAIT_OOB BIT_8 | |
+#define OCP_REG_CONFIG0_TLSEN BIT_7 | |
+ | |
+#define HW_DASH_SUPPORT_DASH(_M) ((_M)->HwSuppDashVer > 0 ) | |
+#define HW_DASH_SUPPORT_TYPE_1(_M) ((_M)->HwSuppDashVer == 1 ) | |
+#define HW_DASH_SUPPORT_TYPE_2(_M) ((_M)->HwSuppDashVer == 2 ) | |
+ | |
+#define RECV_FROM_FW_BUF_SIZE (1518) | |
+#define SEND_TO_FW_BUF_SIZE (1518) | |
+ | |
+#define RX_DASH_FROM_FW_OWN BIT_15 | |
+#define TX_DASH_SEND_FW_OWN BIT_15 | |
+#define TX_DASH_SEND_FW_OWN_HIGHBYTE BIT_7 | |
+ | |
+#define TXS_CC3_0 (BIT_0|BIT_1|BIT_2|BIT_3) | |
+#define TXS_EXC BIT_4 | |
+#define TXS_LNKF BIT_5 | |
+#define TXS_OWC BIT_6 | |
+#define TXS_TES BIT_7 | |
+#define TXS_UNF BIT_9 | |
+#define TXS_LGSEN BIT_11 | |
+#define TXS_LS BIT_12 | |
+#define TXS_FS BIT_13 | |
+#define TXS_EOR BIT_14 | |
+#define TXS_OWN BIT_15 | |
+ | |
+#define TPPool_HRDY 0x20 | |
+ | |
+#define HostReqReg (0xC0) | |
+#define SystemMasterDescStartAddrLow (0xF0) | |
+#define SystemMasterDescStartAddrHigh (0xF4) | |
+#define SystemSlaveDescStartAddrLow (0xF8) | |
+#define SystemSlaveDescStartAddrHigh (0xFC) | |
+ | |
+//DASH Request Type | |
+#define WSMANREG 0x01 | |
+#define OSPUSHDATA 0x02 | |
+ | |
+#define RXS_OWN BIT_15 | |
+#define RXS_EOR BIT_14 | |
+#define RXS_FS BIT_13 | |
+#define RXS_LS BIT_12 | |
+ | |
+#define ISRIMR_DP_DASH_OK BIT_15 | |
+#define ISRIMR_DP_HOST_OK BIT_13 | |
+#define ISRIMR_DP_REQSYS_OK BIT_11 | |
+ | |
+#define ISRIMR_DASH_INTR_EN BIT_12 | |
+#define ISRIMR_DASH_INTR_CMAC_RESET BIT_15 | |
+ | |
+#define ISRIMR_DASH_TYPE2_ROK BIT_0 | |
+#define ISRIMR_DASH_TYPE2_RDU BIT_1 | |
+#define ISRIMR_DASH_TYPE2_TOK BIT_2 | |
+#define ISRIMR_DASH_TYPE2_TDU BIT_3 | |
+#define ISRIMR_DASH_TYPE2_TX_FIFO_FULL BIT_4 | |
+#define ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE BIT_5 | |
+#define ISRIMR_DASH_TYPE2_RX_DISABLE_IDLE BIT_6 | |
+ | |
+#define CMAC_OOB_STOP 0x25 | |
+#define CMAC_OOB_INIT 0x26 | |
+#define CMAC_OOB_RESET 0x2a | |
+ | |
+int rtl8168_dash_ioctl(struct net_device *dev, struct ifreq *ifr); | |
+void HandleDashInterrupt(struct net_device *dev); | |
+int AllocateDashShareMemory(struct net_device *dev); | |
+void FreeAllocatedDashShareMemory(struct net_device *dev); | |
+void DashHwInit(struct net_device *dev); | |
+ | |
+ | |
+#endif /* _LINUX_R8168_DASH_H */ | |
diff --git a/drivers/net/r8168/src/r8168_fiber.h b/drivers/net/r8168/src/r8168_fiber.h | |
new file mode 100755 | |
index 000000000000..46e8fb0bca76 | |
--- /dev/null | |
+++ b/drivers/net/r8168/src/r8168_fiber.h | |
@@ -0,0 +1,57 @@ | |
+/* | |
+################################################################################ | |
+# | |
+# r8168 is the Linux device driver released for Realtek Gigabit Ethernet | |
+# controllers with PCI-Express interface. | |
+# | |
+# Copyright(c) 2017 Realtek Semiconductor Corp. All rights reserved. | |
+# | |
+# This program is free software; you can redistribute it and/or modify it | |
+# under the terms of the GNU General Public License as published by the Free | |
+# Software Foundation; either version 2 of the License, or (at your option) | |
+# any later version. | |
+# | |
+# This program is distributed in the hope that it will be useful, but WITHOUT | |
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
+# more details. | |
+# | |
+# You should have received a copy of the GNU General Public License along with | |
+# this program; if not, see <http://www.gnu.org/licenses/>. | |
+# | |
+# Author: | |
+# Realtek NIC software team <nicfae@realtek.com> | |
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan | |
+# | |
+################################################################################ | |
+*/ | |
+ | |
+/************************************************************************************ | |
+ * This product is covered by one or more of the following patents: | |
+ * US6,570,884, US6,115,776, and US6,327,625. | |
+ ***********************************************************************************/ | |
+ | |
+#ifndef _LINUX_R8168_FIBER_H | |
+#define _LINUX_R8168_FIBER_H | |
+ | |
+#define PINPU_reg 0xDC18 | |
+#define PINOE_reg 0xDC06 | |
+#define PIN_I_SEL1_reg 0xDC08 | |
+#define PIN_I_SEL2_reg 0xDC0A | |
+#define MDIO_In_reg 0xDC04 | |
+ | |
+ | |
+enum { | |
+ FIBER_MODE_NIC_ONLY = 0, | |
+ FIBER_MODE_RTL8168H_RTL8211FS, | |
+ FIBER_MODE_MAX | |
+}; | |
+ | |
+#define HW_FIBER_MODE_ENABLED(_M) ((_M)->HwFiberModeVer > 0) | |
+ | |
+ | |
+ | |
+void rtl8168_hw_fiber_phy_config(struct net_device *dev); | |
+ | |
+ | |
+#endif /* _LINUX_R8168_FIBER_H */ | |
diff --git a/drivers/net/r8168/src/r8168_n.c b/drivers/net/r8168/src/r8168_n.c | |
new file mode 100755 | |
index 000000000000..0af64bbeba33 | |
--- /dev/null | |
+++ b/drivers/net/r8168/src/r8168_n.c | |
@@ -0,0 +1,26286 @@ | |
+/* | |
+################################################################################ | |
+# | |
+# r8168 is the Linux device driver released for Realtek Gigabit Ethernet | |
+# controllers with PCI-Express interface. | |
+# | |
+# Copyright(c) 2017 Realtek Semiconductor Corp. All rights reserved. | |
+# | |
+# This program is free software; you can redistribute it and/or modify it | |
+# under the terms of the GNU General Public License as published by the Free | |
+# Software Foundation; either version 2 of the License, or (at your option) | |
+# any later version. | |
+# | |
+# This program is distributed in the hope that it will be useful, but WITHOUT | |
+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
+# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
+# more details. | |
+# | |
+# You should have received a copy of the GNU General Public License along with | |
+# this program; if not, see <http://www.gnu.org/licenses/>. | |
+# | |
+# Author: | |
+# Realtek NIC software team <nicfae@realtek.com> | |
+# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan | |
+# | |
+################################################################################ | |
+*/ | |
+ | |
+/************************************************************************************ | |
+ * This product is covered by one or more of the following patents: | |
+ * US6,570,884, US6,115,776, and US6,327,625. | |
+ ***********************************************************************************/ | |
+ | |
+/* | |
+ * This driver is modified from r8169.c in Linux kernel 2.6.18 | |
+ */ | |
+ | |
+#include <linux/module.h> | |
+#include <linux/version.h> | |
+#include <linux/pci.h> | |
+#include <linux/netdevice.h> | |
+#include <linux/etherdevice.h> | |
+#include <linux/delay.h> | |
+#include <linux/mii.h> | |
+#include <linux/if_vlan.h> | |
+#include <linux/crc32.h> | |
+#include <linux/interrupt.h> | |
+#include <linux/in.h> | |
+#include <linux/ip.h> | |
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22) | |
+#include <linux/ipv6.h> | |
+#include <net/ip6_checksum.h> | |
+#endif | |
+#include <linux/tcp.h> | |
+#include <linux/init.h> | |
+#include <linux/rtnetlink.h> | |
+ | |
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26) | |
+#include <linux/pci-aspm.h> | |
+#endif | |
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,37) | |
+#include <linux/prefetch.h> | |
+#endif | |
+ | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) | |
+#define dev_printk(A,B,fmt,args...) printk(A fmt,##args) | |
+#else | |
+#include <linux/dma-mapping.h> | |
+#include <linux/moduleparam.h> | |
+#endif | |
+ | |
+#include <asm/io.h> | |
+#include <asm/irq.h> | |
+ | |
+#include "r8168.h" | |
+#include "r8168_asf.h" | |
+#include "rtl_eeprom.h" | |
+#include "rtltool.h" | |
+ | |
+#ifdef ENABLE_R8168_PROCFS | |
+#include <linux/proc_fs.h> | |
+#include <linux/seq_file.h> | |
+#endif | |
+ | |
+/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). | |
+ The RTL chips use a 64 element hash table based on the Ethernet CRC. */ | |
+static const int multicast_filter_limit = 32; | |
+ | |
+#define _R(NAME,MAC,RCR,MASK, JumFrameSz) \ | |
+ { .name = NAME, .mcfg = MAC, .RCR_Cfg = RCR, .RxConfigMask = MASK, .jumbo_frame_sz = JumFrameSz } | |
+ | |
+static const struct { | |
+ const char *name; | |
+ u8 mcfg; | |
+ u32 RCR_Cfg; | |
+ u32 RxConfigMask; /* Clears the bits supported by this chip */ | |
+ u32 jumbo_frame_sz; | |
+} rtl_chip_info[] = { | |
+ _R("RTL8168B/8111B", | |
+ CFG_METHOD_1, | |
+ (Reserved2_data << Reserved2_shift) | (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e1880, | |
+ Jumbo_Frame_4k), | |
+ | |
+ _R("RTL8168B/8111B", | |
+ CFG_METHOD_2, | |
+ (Reserved2_data << Reserved2_shift) | (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e1880, | |
+ Jumbo_Frame_4k), | |
+ | |
+ _R("RTL8168B/8111B", | |
+ CFG_METHOD_3, | |
+ (Reserved2_data << Reserved2_shift) | (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e1880, | |
+ Jumbo_Frame_4k), | |
+ | |
+ _R("RTL8168C/8111C", | |
+ CFG_METHOD_4, | |
+ RxCfg_128_int_en | RxCfg_fet_multi_en | (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e1880, | |
+ Jumbo_Frame_6k), | |
+ | |
+ _R("RTL8168C/8111C", | |
+ CFG_METHOD_5, | |
+ RxCfg_128_int_en | RxCfg_fet_multi_en | (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e1880, | |
+ Jumbo_Frame_6k), | |
+ | |
+ _R("RTL8168C/8111C", | |
+ CFG_METHOD_6, | |
+ RxCfg_128_int_en | RxCfg_fet_multi_en | (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e1880, | |
+ Jumbo_Frame_6k), | |
+ | |
+ _R("RTL8168CP/8111CP", | |
+ CFG_METHOD_7, | |
+ RxCfg_128_int_en | RxCfg_fet_multi_en | (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e1880, | |
+ Jumbo_Frame_6k), | |
+ | |
+ _R("RTL8168CP/8111CP", | |
+ CFG_METHOD_8, | |
+ RxCfg_128_int_en | RxCfg_fet_multi_en | (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e1880, | |
+ Jumbo_Frame_6k), | |
+ | |
+ _R("RTL8168D/8111D", | |
+ CFG_METHOD_9, | |
+ RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e1880, | |
+ Jumbo_Frame_9k), | |
+ | |
+ _R("RTL8168D/8111D", | |
+ CFG_METHOD_10, | |
+ RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e1880, | |
+ Jumbo_Frame_9k), | |
+ | |
+ _R("RTL8168DP/8111DP", | |
+ CFG_METHOD_11, | |
+ RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e1880, | |
+ Jumbo_Frame_9k), | |
+ | |
+ _R("RTL8168DP/8111DP", | |
+ CFG_METHOD_12, | |
+ RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e1880, | |
+ Jumbo_Frame_9k), | |
+ | |
+ _R("RTL8168DP/8111DP", | |
+ CFG_METHOD_13, | |
+ RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e1880, | |
+ Jumbo_Frame_9k), | |
+ | |
+ _R("RTL8168E/8111E", | |
+ CFG_METHOD_14, | |
+ RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e1880, | |
+ Jumbo_Frame_9k), | |
+ | |
+ _R("RTL8168E/8111E", | |
+ CFG_METHOD_15, | |
+ RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e1880, | |
+ Jumbo_Frame_9k), | |
+ | |
+ _R("RTL8168E-VL/8111E-VL", | |
+ CFG_METHOD_16, | |
+ RxCfg_128_int_en | RxEarly_off_V1 | (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e0080, | |
+ Jumbo_Frame_9k), | |
+ | |
+ _R("RTL8168E-VL/8111E-VL", | |
+ CFG_METHOD_17, | |
+ RxCfg_128_int_en | RxEarly_off_V1 | (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e1880, | |
+ Jumbo_Frame_9k), | |
+ | |
+ _R("RTL8168F/8111F", | |
+ CFG_METHOD_18, | |
+ RxCfg_128_int_en | RxEarly_off_V1 | (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e1880, | |
+ Jumbo_Frame_9k), | |
+ | |
+ _R("RTL8168F/8111F", | |
+ CFG_METHOD_19, | |
+ RxCfg_128_int_en | RxEarly_off_V1 | (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e1880, | |
+ Jumbo_Frame_9k), | |
+ | |
+ _R("RTL8411", | |
+ CFG_METHOD_20, | |
+ RxCfg_128_int_en | (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e1880, | |
+ Jumbo_Frame_9k), | |
+ | |
+ _R("RTL8168G/8111G", | |
+ CFG_METHOD_21, | |
+ RxCfg_128_int_en | RxEarly_off_V2 | Rx_Single_fetch_V2 | (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e5880, | |
+ Jumbo_Frame_9k), | |
+ | |
+ _R("RTL8168G/8111G", | |
+ CFG_METHOD_22, | |
+ RxCfg_128_int_en | RxEarly_off_V2 | Rx_Single_fetch_V2 | (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e5880, | |
+ Jumbo_Frame_9k), | |
+ | |
+ _R("RTL8168EP/8111EP", | |
+ CFG_METHOD_23, | |
+ RxCfg_128_int_en | RxEarly_off_V2 | Rx_Single_fetch_V2 | (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e5880, | |
+ Jumbo_Frame_9k), | |
+ | |
+ _R("RTL8168GU/8111GU", | |
+ CFG_METHOD_24, | |
+ RxCfg_128_int_en | RxEarly_off_V2 | Rx_Single_fetch_V2 | (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e5880, | |
+ Jumbo_Frame_9k), | |
+ | |
+ _R("RTL8168GU/8111GU", | |
+ CFG_METHOD_25, | |
+ RxCfg_128_int_en | RxEarly_off_V2 | Rx_Single_fetch_V2 | (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e5880, | |
+ Jumbo_Frame_9k), | |
+ | |
+ _R("8411B", | |
+ CFG_METHOD_26, | |
+ RxCfg_128_int_en | RxEarly_off_V2 | Rx_Single_fetch_V2 | (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e5880, | |
+ Jumbo_Frame_9k), | |
+ | |
+ _R("RTL8168EP/8111EP", | |
+ CFG_METHOD_27, | |
+ RxCfg_128_int_en | RxEarly_off_V2 | Rx_Single_fetch_V2 | (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e5880, | |
+ Jumbo_Frame_9k), | |
+ | |
+ _R("RTL8168EP/8111EP", | |
+ CFG_METHOD_28, | |
+ RxCfg_128_int_en | RxEarly_off_V2 | Rx_Single_fetch_V2 | (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e5880, | |
+ Jumbo_Frame_9k), | |
+ | |
+ _R("RTL8168H/8111H", | |
+ CFG_METHOD_29, | |
+ RxCfg_128_int_en | RxEarly_off_V2 | Rx_Single_fetch_V2 | (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e5880, | |
+ Jumbo_Frame_9k), | |
+ | |
+ _R("RTL8168H/8111H", | |
+ CFG_METHOD_30, | |
+ RxCfg_128_int_en | RxEarly_off_V2 | Rx_Single_fetch_V2 | (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e5880, | |
+ Jumbo_Frame_9k), | |
+ | |
+ _R("Unknown", | |
+ CFG_METHOD_DEFAULT, | |
+ (RX_DMA_BURST << RxCfgDMAShift), | |
+ 0xff7e5880, | |
+ RX_BUF_SIZE) | |
+}; | |
+#undef _R | |
+ | |
+#ifndef PCI_VENDOR_ID_DLINK | |
+#define PCI_VENDOR_ID_DLINK 0x1186 | |
+#endif | |
+ | |
+static struct pci_device_id rtl8168_pci_tbl[] = { | |
+ { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8168), }, | |
+ { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8161), }, | |
+ { PCI_VENDOR_ID_DLINK, 0x4300, 0x1186, 0x4b10,}, | |
+ {0,}, | |
+}; | |
+ | |
+MODULE_DEVICE_TABLE(pci, rtl8168_pci_tbl); | |
+ | |
+static int rx_copybreak = 0; | |
+static int use_dac = 1; | |
+static int timer_count = 0x2600; | |
+ | |
+static struct { | |
+ u32 msg_enable; | |
+} debug = { -1 }; | |
+ | |
+static unsigned short speed = SPEED_1000; | |
+static int duplex = DUPLEX_FULL; | |
+static int autoneg = AUTONEG_ENABLE; | |
+#ifdef CONFIG_ASPM | |
+static int aspm = 1; | |
+#else | |
+static int aspm = 0; | |
+#endif | |
+#ifdef ENABLE_S5WOL | |
+static int s5wol = 1; | |
+#else | |
+static int s5wol = 0; | |
+#endif | |
+#ifdef ENABLE_EEE | |
+static int eee_enable = 1; | |
+#else | |
+static int eee_enable = 0; | |
+#endif | |
+#ifdef CONFIG_SOC_LAN | |
+static ulong hwoptimize = HW_PATCH_SOC_LAN; | |
+#else | |
+static ulong hwoptimize = 0; | |
+#endif | |
+#ifdef ENABLE_S0_MAGIC_PACKET | |
+static int s0_magic_packet = 1; | |
+#else | |
+static int s0_magic_packet = 0; | |
+#endif | |
+ | |
+MODULE_AUTHOR("Realtek and the Linux r8168 crew <netdev@vger.kernel.org>"); | |
+MODULE_DESCRIPTION("RealTek RTL-8168 Gigabit Ethernet driver"); | |
+ | |
+module_param(speed, ushort, 0); | |
+MODULE_PARM_DESC(speed, "force phy operation. Deprecated by ethtool (8)."); | |
+ | |
+module_param(duplex, int, 0); | |
+MODULE_PARM_DESC(duplex, "force phy operation. Deprecated by ethtool (8)."); | |
+ | |
+module_param(autoneg, int, 0); | |
+MODULE_PARM_DESC(autoneg, "force phy operation. Deprecated by ethtool (8)."); | |
+ | |
+module_param(aspm, int, 0); | |
+MODULE_PARM_DESC(aspm, "Enable ASPM."); | |
+ | |
+module_param(s5wol, int, 0); | |
+MODULE_PARM_DESC(s5wol, "Enable Shutdown Wake On Lan."); | |
+ | |
+module_param(rx_copybreak, int, 0); | |
+MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames"); | |
+ | |
+module_param(use_dac, int, 0); | |
+MODULE_PARM_DESC(use_dac, "Enable PCI DAC. Unsafe on 32 bit PCI slot."); | |
+ | |
+module_param(timer_count, int, 0); | |
+MODULE_PARM_DESC(timer_count, "Timer Interrupt Interval."); | |
+ | |
+module_param(eee_enable, int, 0); | |
+MODULE_PARM_DESC(eee_enable, "Enable Energy Efficient Ethernet."); | |
+ | |
+module_param(hwoptimize, ulong, 0); | |
+MODULE_PARM_DESC(hwoptimize, "Enable HW optimization function."); | |
+ | |
+module_param(s0_magic_packet, int, 0); | |
+MODULE_PARM_DESC(s0_magic_packet, "Enable S0 Magic Packet."); | |
+ | |
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) | |
+module_param_named(debug, debug.msg_enable, int, 0); | |
+MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)"); | |
+#endif//LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) | |
+ | |
+MODULE_LICENSE("GPL"); | |
+ | |
+MODULE_VERSION(RTL8168_VERSION); | |
+ | |
+static void rtl8168_sleep_rx_enable(struct net_device *dev); | |
+static void rtl8168_dsm(struct net_device *dev, int dev_state); | |
+ | |
+static void rtl8168_esd_timer(unsigned long __opaque); | |
+static void rtl8168_link_timer(unsigned long __opaque); | |
+static void rtl8168_tx_clear(struct rtl8168_private *tp); | |
+static void rtl8168_rx_clear(struct rtl8168_private *tp); | |
+ | |
+static int rtl8168_open(struct net_device *dev); | |
+static int rtl8168_start_xmit(struct sk_buff *skb, struct net_device *dev); | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) | |
+static irqreturn_t rtl8168_interrupt(int irq, void *dev_instance, struct pt_regs *regs); | |
+#else | |
+static irqreturn_t rtl8168_interrupt(int irq, void *dev_instance); | |
+#endif | |
+static void rtl8168_rx_desc_offset0_init(struct rtl8168_private *, int); | |
+static int rtl8168_init_ring(struct net_device *dev); | |
+static void rtl8168_hw_config(struct net_device *dev); | |
+static void rtl8168_hw_start(struct net_device *dev); | |
+static int rtl8168_close(struct net_device *dev); | |
+static void rtl8168_set_rx_mode(struct net_device *dev); | |
+static void rtl8168_tx_timeout(struct net_device *dev); | |
+static struct net_device_stats *rtl8168_get_stats(struct net_device *dev); | |
+static int rtl8168_rx_interrupt(struct net_device *, struct rtl8168_private *, void __iomem *, napi_budget); | |
+static int rtl8168_change_mtu(struct net_device *dev, int new_mtu); | |
+static void rtl8168_down(struct net_device *dev); | |
+ | |
+static int rtl8168_set_mac_address(struct net_device *dev, void *p); | |
+void rtl8168_rar_set(struct rtl8168_private *tp, uint8_t *addr); | |
+static void rtl8168_desc_addr_fill(struct rtl8168_private *); | |
+static void rtl8168_tx_desc_init(struct rtl8168_private *tp); | |
+static void rtl8168_rx_desc_init(struct rtl8168_private *tp); | |
+ | |
+static void rtl8168_hw_reset(struct net_device *dev); | |
+ | |
+static void rtl8168_phy_power_up(struct net_device *dev); | |
+static void rtl8168_phy_power_down(struct net_device *dev); | |
+static int rtl8168_set_speed(struct net_device *dev, u8 autoneg, u16 speed, u8 duplex); | |
+ | |
+#ifdef CONFIG_R8168_NAPI | |
+static int rtl8168_poll(napi_ptr napi, napi_budget budget); | |
+#endif | |
+ | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) | |
+#undef ethtool_ops | |
+#define ethtool_ops _kc_ethtool_ops | |
+ | |
+struct _kc_ethtool_ops { | |
+ int (*get_settings)(struct net_device *, struct ethtool_cmd *); | |
+ int (*set_settings)(struct net_device *, struct ethtool_cmd *); | |
+ void (*get_drvinfo)(struct net_device *, struct ethtool_drvinfo *); | |
+ int (*get_regs_len)(struct net_device *); | |
+ void (*get_regs)(struct net_device *, struct ethtool_regs *, void *); | |
+ void (*get_wol)(struct net_device *, struct ethtool_wolinfo *); | |
+ int (*set_wol)(struct net_device *, struct ethtool_wolinfo *); | |
+ u32 (*get_msglevel)(struct net_device *); | |
+ void (*set_msglevel)(struct net_device *, u32); | |
+ int (*nway_reset)(struct net_device *); | |
+ u32 (*get_link)(struct net_device *); | |
+ int (*get_eeprom_len)(struct net_device *); | |
+ int (*get_eeprom)(struct net_device *, struct ethtool_eeprom *, u8 *); | |
+ int (*set_eeprom)(struct net_device *, struct ethtool_eeprom *, u8 *); | |
+ int (*get_coalesce)(struct net_device *, struct ethtool_coalesce *); | |
+ int (*set_coalesce)(struct net_device *, struct ethtool_coalesce *); | |
+ void (*get_ringparam)(struct net_device *, struct ethtool_ringparam *); | |
+ int (*set_ringparam)(struct net_device *, struct ethtool_ringparam *); | |
+ void (*get_pauseparam)(struct net_device *, | |
+ struct ethtool_pauseparam*); | |
+ int (*set_pauseparam)(struct net_device *, | |
+ struct ethtool_pauseparam*); | |
+ u32 (*get_rx_csum)(struct net_device *); | |
+ int (*set_rx_csum)(struct net_device *, u32); | |
+ u32 (*get_tx_csum)(struct net_device *); | |
+ int (*set_tx_csum)(struct net_device *, u32); | |
+ u32 (*get_sg)(struct net_device *); | |
+ int (*set_sg)(struct net_device *, u32); | |
+ u32 (*get_tso)(struct net_device *); | |
+ int (*set_tso)(struct net_device *, u32); | |
+ int (*self_test_count)(struct net_device *); | |
+ void (*self_test)(struct net_device *, struct ethtool_test *, u64 *); | |
+ void (*get_strings)(struct net_device *, u32 stringset, u8 *); | |
+ int (*phys_id)(struct net_device *, u32); | |
+ int (*get_stats_count)(struct net_device *); | |
+ void (*get_ethtool_stats)(struct net_device *, struct ethtool_stats *, | |
+ u64 *); | |
+} *ethtool_ops = NULL; | |
+ | |
+#undef SET_ETHTOOL_OPS | |
+#define SET_ETHTOOL_OPS(netdev, ops) (ethtool_ops = (ops)) | |
+ | |
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) | |
+ | |
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,16,0) | |
+#ifndef SET_ETHTOOL_OPS | |
+#define SET_ETHTOOL_OPS(netdev,ops) \ | |
+ ( (netdev)->ethtool_ops = (ops) ) | |
+#endif //SET_ETHTOOL_OPS | |
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(3,16,0) | |
+ | |
+//#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,5) | |
+#ifndef netif_msg_init | |
+#define netif_msg_init _kc_netif_msg_init | |
+/* copied from linux kernel 2.6.20 include/linux/netdevice.h */ | |
+static inline u32 netif_msg_init(int debug_value, int default_msg_enable_bits) | |
+{ | |
+ /* use default */ | |
+ if (debug_value < 0 || debug_value >= (sizeof(u32) * 8)) | |
+ return default_msg_enable_bits; | |
+ if (debug_value == 0) /* no output */ | |
+ return 0; | |
+ /* set low N bits */ | |
+ return (1 << debug_value) - 1; | |
+} | |
+ | |
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,5) | |
+ | |
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,22) | |
+static inline void eth_copy_and_sum (struct sk_buff *dest, | |
+ const unsigned char *src, | |
+ int len, int base) | |
+{ | |
+ memcpy (dest->data, src, len); | |
+} | |
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,22) | |
+ | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,7) | |
+/* copied from linux kernel 2.6.20 /include/linux/time.h */ | |
+/* Parameters used to convert the timespec values: */ | |
+#define MSEC_PER_SEC 1000L | |
+ | |
+/* copied from linux kernel 2.6.20 /include/linux/jiffies.h */ | |
+/* | |
+ * Change timeval to jiffies, trying to avoid the | |
+ * most obvious overflows.. | |
+ * | |
+ * And some not so obvious. | |
+ * | |
+ * Note that we don't want to return MAX_LONG, because | |
+ * for various timeout reasons we often end up having | |
+ * to wait "jiffies+1" in order to guarantee that we wait | |
+ * at _least_ "jiffies" - so "jiffies+1" had better still | |
+ * be positive. | |
+ */ | |
+#define MAX_JIFFY_OFFSET ((~0UL >> 1)-1) | |
+ | |
+/* | |
+ * Convert jiffies to milliseconds and back. | |
+ * | |
+ * Avoid unnecessary multiplications/divisions in the | |
+ * two most common HZ cases: | |
+ */ | |
+static inline unsigned int _kc_jiffies_to_msecs(const unsigned long j) | |
+{ | |
+#if HZ <= MSEC_PER_SEC && !(MSEC_PER_SEC % HZ) | |
+ return (MSEC_PER_SEC / HZ) * j; | |
+#elif HZ > MSEC_PER_SEC && !(HZ % MSEC_PER_SEC) | |
+ return (j + (HZ / MSEC_PER_SEC) - 1)/(HZ / MSEC_PER_SEC); | |
+#else | |
+ return (j * MSEC_PER_SEC) / HZ; | |
+#endif | |
+} | |
+ | |
+static inline unsigned long _kc_msecs_to_jiffies(const unsigned int m) | |
+{ | |
+ if (m > _kc_jiffies_to_msecs(MAX_JIFFY_OFFSET)) | |
+ return MAX_JIFFY_OFFSET; | |
+#if HZ <= MSEC_PER_SEC && !(MSEC_PER_SEC % HZ) | |
+ return (m + (MSEC_PER_SEC / HZ) - 1) / (MSEC_PER_SEC / HZ); | |
+#elif HZ > MSEC_PER_SEC && !(HZ % MSEC_PER_SEC) | |
+ return m * (HZ / MSEC_PER_SEC); | |
+#else | |
+ return (m * HZ + MSEC_PER_SEC - 1) / MSEC_PER_SEC; | |
+#endif | |
+} | |
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,7) | |
+ | |
+ | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) | |
+ | |
+/* copied from linux kernel 2.6.12.6 /include/linux/pm.h */ | |
+typedef int __bitwise pci_power_t; | |
+ | |
+/* copied from linux kernel 2.6.12.6 /include/linux/pci.h */ | |
+typedef u32 __bitwise pm_message_t; | |
+ | |
+#define PCI_D0 ((pci_power_t __force) 0) | |
+#define PCI_D1 ((pci_power_t __force) 1) | |
+#define PCI_D2 ((pci_power_t __force) 2) | |
+#define PCI_D3hot ((pci_power_t __force) 3) | |
+#define PCI_D3cold ((pci_power_t __force) 4) | |
+#define PCI_POWER_ERROR ((pci_power_t __force) -1) | |
+ | |
+/* copied from linux kernel 2.6.12.6 /drivers/pci/pci.c */ | |
+/** | |
+ * pci_choose_state - Choose the power state of a PCI device | |
+ * @dev: PCI device to be suspended | |
+ * @state: target sleep state for the whole system. This is the value | |
+ * that is passed to suspend() function. | |
+ * | |
+ * Returns PCI power state suitable for given device and given system | |
+ * message. | |
+ */ | |
+ | |
+pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state) | |
+{ | |
+ if (!pci_find_capability(dev, PCI_CAP_ID_PM)) | |
+ return PCI_D0; | |
+ | |
+ switch (state) { | |
+ case 0: | |
+ return PCI_D0; | |
+ case 3: | |
+ return PCI_D3hot; | |
+ default: | |
+ printk("They asked me for state %d\n", state); | |
+// BUG(); | |
+ } | |
+ return PCI_D0; | |
+} | |
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) | |
+ | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9) | |
+/** | |
+ * msleep_interruptible - sleep waiting for waitqueue interruptions | |
+ * @msecs: Time in milliseconds to sleep for | |
+ */ | |
+#define msleep_interruptible _kc_msleep_interruptible | |
+unsigned long _kc_msleep_interruptible(unsigned int msecs) | |
+{ | |
+ unsigned long timeout = _kc_msecs_to_jiffies(msecs); | |
+ | |
+ while (timeout && !signal_pending(current)) { | |
+ set_current_state(TASK_INTERRUPTIBLE); | |
+ timeout = schedule_timeout(timeout); | |
+ } | |
+ return _kc_jiffies_to_msecs(timeout); | |
+} | |
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9) | |
+ | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,7) | |
+/* copied from linux kernel 2.6.20 include/linux/sched.h */ | |
+#ifndef __sched | |
+#define __sched __attribute__((__section__(".sched.text"))) | |
+#endif | |
+ | |
+/* copied from linux kernel 2.6.20 kernel/timer.c */ | |
+signed long __sched schedule_timeout_uninterruptible(signed long timeout) | |
+{ | |
+ __set_current_state(TASK_UNINTERRUPTIBLE); | |
+ return schedule_timeout(timeout); | |
+} | |
+ | |
+/* copied from linux kernel 2.6.20 include/linux/mii.h */ | |
+#undef if_mii | |
+#define if_mii _kc_if_mii | |
+static inline struct mii_ioctl_data *if_mii(struct ifreq *rq) | |
+{ | |
+ return (struct mii_ioctl_data *) &rq->ifr_ifru; | |
+} | |
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,7) | |
+ | |
+struct rtl8168_counters { | |
+ u64 tx_packets; | |
+ u64 rx_packets; | |
+ u64 tx_errors; | |
+ u32 rx_errors; | |
+ u16 rx_missed; | |
+ u16 align_errors; | |
+ u32 tx_one_collision; | |
+ u32 tx_multi_collision; | |
+ u64 rx_unicast; | |
+ u64 rx_broadcast; | |
+ u32 rx_multicast; | |
+ u16 tx_aborted; | |
+ u16 tx_underun; | |
+}; | |
+ | |
+#ifdef ENABLE_R8168_PROCFS | |
+/**************************************************************************** | |
+* -----------------------------PROCFS STUFF------------------------- | |
+***************************************************************************** | |
+*/ | |
+ | |
+static struct proc_dir_entry *rtl8168_proc; | |
+static int proc_init_num = 0; | |
+ | |
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) | |
+static int proc_get_driver_variable(struct seq_file *m, void *v) | |
+{ | |
+ struct net_device *dev = m->private; | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ unsigned long flags; | |
+ | |
+ seq_puts(m, "\nDump Driver Variable\n"); | |
+ | |
+ spin_lock_irqsave(&tp->lock, flags); | |
+ seq_puts(m, "Variable\tValue\n----------\t-----\n"); | |
+ seq_printf(m, "MODULENAME\t%s\n", MODULENAME); | |
+ seq_printf(m, "driver version\t%s\n", RTL8168_VERSION); | |
+ seq_printf(m, "chipset\t%d\n", tp->chipset); | |
+ seq_printf(m, "chipset_name\t%s\n", rtl_chip_info[tp->chipset].name); | |
+ seq_printf(m, "mtu\t%d\n", dev->mtu); | |
+ seq_printf(m, "NUM_RX_DESC\t0x%x\n", NUM_RX_DESC); | |
+ seq_printf(m, "cur_rx\t0x%x\n", tp->cur_rx); | |
+ seq_printf(m, "dirty_rx\t0x%x\n", tp->dirty_rx); | |
+ seq_printf(m, "NUM_TX_DESC\t0x%x\n", NUM_TX_DESC); | |
+ seq_printf(m, "cur_tx\t0x%x\n", tp->cur_tx); | |
+ seq_printf(m, "dirty_tx\t0x%x\n", tp->dirty_tx); | |
+ seq_printf(m, "rx_buf_sz\t0x%x\n", tp->rx_buf_sz); | |
+ seq_printf(m, "esd_flag\t0x%x\n", tp->esd_flag); | |
+ seq_printf(m, "pci_cfg_is_read\t0x%x\n", tp->pci_cfg_is_read); | |
+ seq_printf(m, "rtl8168_rx_config\t0x%x\n", tp->rtl8168_rx_config); | |
+ seq_printf(m, "cp_cmd\t0x%x\n", tp->cp_cmd); | |
+ seq_printf(m, "intr_mask\t0x%x\n", tp->intr_mask); | |
+ seq_printf(m, "timer_intr_mask\t0x%x\n", tp->timer_intr_mask); | |
+ seq_printf(m, "wol_enabled\t0x%x\n", tp->wol_enabled); | |
+ seq_printf(m, "wol_opts\t0x%x\n", tp->wol_opts); | |
+ seq_printf(m, "efuse_ver\t0x%x\n", tp->efuse_ver); | |
+ seq_printf(m, "eeprom_type\t0x%x\n", tp->eeprom_type); | |
+ seq_printf(m, "autoneg\t0x%x\n", tp->autoneg); | |
+ seq_printf(m, "duplex\t0x%x\n", tp->duplex); | |
+ seq_printf(m, "speed\t%d\n", tp->speed); | |
+ seq_printf(m, "eeprom_len\t0x%x\n", tp->eeprom_len); | |
+ seq_printf(m, "cur_page\t0x%x\n", tp->cur_page); | |
+ seq_printf(m, "bios_setting\t0x%x\n", tp->bios_setting); | |
+ seq_printf(m, "features\t0x%x\n", tp->features); | |
+ seq_printf(m, "org_pci_offset_99\t0x%x\n", tp->org_pci_offset_99); | |
+ seq_printf(m, "org_pci_offset_180\t0x%x\n", tp->org_pci_offset_180); | |
+ seq_printf(m, "issue_offset_99_event\t0x%x\n", tp->issue_offset_99_event); | |
+ seq_printf(m, "org_pci_offset_80\t0x%x\n", tp->org_pci_offset_80); | |
+ seq_printf(m, "org_pci_offset_81\t0x%x\n", tp->org_pci_offset_81); | |
+ seq_printf(m, "use_timer_interrrupt\t0x%x\n", tp->use_timer_interrrupt); | |
+ seq_printf(m, "HwIcVerUnknown\t0x%x\n", tp->HwIcVerUnknown); | |
+ seq_printf(m, "NotWrRamCodeToMicroP\t0x%x\n", tp->NotWrRamCodeToMicroP); | |
+ seq_printf(m, "NotWrMcuPatchCode\t0x%x\n", tp->NotWrMcuPatchCode); | |
+ seq_printf(m, "HwHasWrRamCodeToMicroP\t0x%x\n", tp->HwHasWrRamCodeToMicroP); | |
+ seq_printf(m, "sw_ram_code_ver\t0x%x\n", tp->sw_ram_code_ver); | |
+ seq_printf(m, "hw_ram_code_ver\t0x%x\n", tp->hw_ram_code_ver); | |
+ seq_printf(m, "rtk_enable_diag\t0x%x\n", tp->rtk_enable_diag); | |
+ seq_printf(m, "ShortPacketSwChecksum\t0x%x\n", tp->ShortPacketSwChecksum); | |
+ seq_printf(m, "UseSwPaddingShortPkt\t0x%x\n", tp->UseSwPaddingShortPkt); | |
+ seq_printf(m, "RequireAdcBiasPatch\t0x%x\n", tp->RequireAdcBiasPatch); | |
+ seq_printf(m, "AdcBiasPatchIoffset\t0x%x\n", tp->AdcBiasPatchIoffset); | |
+ seq_printf(m, "RequireAdjustUpsTxLinkPulseTiming\t0x%x\n", tp->RequireAdjustUpsTxLinkPulseTiming); | |
+ seq_printf(m, "SwrCnt1msIni\t0x%x\n", tp->SwrCnt1msIni); | |
+ seq_printf(m, "HwSuppNowIsOobVer\t0x%x\n", tp->HwSuppNowIsOobVer); | |
+ seq_printf(m, "HwFiberModeVer\t0x%x\n", tp->HwFiberModeVer); | |
+ seq_printf(m, "RequiredSecLanDonglePatch\t0x%x\n", tp->RequiredSecLanDonglePatch); | |
+ seq_printf(m, "HwSuppDashVer\t0x%x\n", tp->HwSuppDashVer); | |
+ seq_printf(m, "DASH\t0x%x\n", tp->DASH); | |
+ seq_printf(m, "HwSuppKCPOffloadVer\t0x%x\n", tp->HwSuppKCPOffloadVer); | |
+ seq_printf(m, "speed\t0x%x\n", speed); | |
+ seq_printf(m, "duplex\t0x%x\n", duplex); | |
+ seq_printf(m, "autoneg\t0x%x\n", autoneg); | |
+ seq_printf(m, "aspm\t0x%x\n", aspm); | |
+ seq_printf(m, "s5wol\t0x%x\n", s5wol); | |
+ seq_printf(m, "eee_enable\t0x%x\n", eee_enable); | |
+ seq_printf(m, "hwoptimize\t0x%lx\n", hwoptimize); | |
+ seq_printf(m, "proc_init_num\t0x%x\n", proc_init_num); | |
+ seq_printf(m, "s0_magic_packet\t0x%x\n", s0_magic_packet); | |
+ seq_printf(m, "HwSuppMagicPktVer\t0x%x\n", tp->HwSuppMagicPktVer); | |
+ spin_unlock_irqrestore(&tp->lock, flags); | |
+ | |
+ seq_putc(m, '\n'); | |
+ return 0; | |
+} | |
+ | |
+static int proc_get_tally_counter(struct seq_file *m, void *v) | |
+{ | |
+ struct net_device *dev = m->private; | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ struct rtl8168_counters *counters; | |
+ dma_addr_t paddr; | |
+ u32 cmd; | |
+ u32 WaitCnt; | |
+ unsigned long flags; | |
+ | |
+ seq_puts(m, "\nDump Tally Counter\n"); | |
+ | |
+ //ASSERT_RTNL(); | |
+ | |
+ counters = tp->tally_vaddr; | |
+ paddr = tp->tally_paddr; | |
+ if (!counters) { | |
+ seq_puts(m, "\nDump Tally Counter Fail\n"); | |
+ return 0; | |
+ } | |
+ | |
+ spin_lock_irqsave(&tp->lock, flags); | |
+ RTL_W32(CounterAddrHigh, (u64)paddr >> 32); | |
+ cmd = (u64)paddr & DMA_BIT_MASK(32); | |
+ RTL_W32(CounterAddrLow, cmd); | |
+ RTL_W32(CounterAddrLow, cmd | CounterDump); | |
+ | |
+ WaitCnt = 0; | |
+ while (RTL_R32(CounterAddrLow) & CounterDump) { | |
+ udelay(10); | |
+ | |
+ WaitCnt++; | |
+ if (WaitCnt > 20) | |
+ break; | |
+ } | |
+ spin_unlock_irqrestore(&tp->lock, flags); | |
+ | |
+ seq_puts(m, "Statistics\tValue\n----------\t-----\n"); | |
+ seq_printf(m, "tx_packets\t%lld\n", le64_to_cpu(counters->tx_packets)); | |
+ seq_printf(m, "rx_packets\t%lld\n", le64_to_cpu(counters->rx_packets)); | |
+ seq_printf(m, "tx_errors\t%lld\n", le64_to_cpu(counters->tx_errors)); | |
+ seq_printf(m, "rx_missed\t%lld\n", le64_to_cpu(counters->rx_missed)); | |
+ seq_printf(m, "align_errors\t%lld\n", le64_to_cpu(counters->align_errors)); | |
+ seq_printf(m, "tx_one_collision\t%lld\n", le64_to_cpu(counters->tx_one_collision)); | |
+ seq_printf(m, "tx_multi_collision\t%lld\n", le64_to_cpu(counters->tx_multi_collision)); | |
+ seq_printf(m, "rx_unicast\t%lld\n", le64_to_cpu(counters->rx_unicast)); | |
+ seq_printf(m, "rx_broadcast\t%lld\n", le64_to_cpu(counters->rx_broadcast)); | |
+ seq_printf(m, "rx_multicast\t%lld\n", le64_to_cpu(counters->rx_multicast)); | |
+ seq_printf(m, "tx_aborted\t%lld\n", le64_to_cpu(counters->tx_aborted)); | |
+ seq_printf(m, "tx_underun\t%lld\n", le64_to_cpu(counters->tx_underun)); | |
+ | |
+ seq_putc(m, '\n'); | |
+ return 0; | |
+} | |
+ | |
+static int proc_get_registers(struct seq_file *m, void *v) | |
+{ | |
+ struct net_device *dev = m->private; | |
+ int i, n, max = R8168_MAC_REGS_SIZE; | |
+ u8 byte_rd; | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ unsigned long flags; | |
+ | |
+ seq_puts(m, "\nDump MAC Registers\n"); | |
+ seq_puts(m, "Offset\tValue\n------\t-----\n"); | |
+ | |
+ spin_lock_irqsave(&tp->lock, flags); | |
+ for (n = 0; n < max;) { | |
+ seq_printf(m, "\n0x%02x:\t", n); | |
+ | |
+ for (i = 0; i < 16 && n < max; i++, n++) { | |
+ byte_rd = readb(ioaddr + n); | |
+ seq_printf(m, "%02x ", byte_rd); | |
+ } | |
+ } | |
+ spin_unlock_irqrestore(&tp->lock, flags); | |
+ | |
+ seq_putc(m, '\n'); | |
+ return 0; | |
+} | |
+ | |
+static int proc_get_pcie_phy(struct seq_file *m, void *v) | |
+{ | |
+ struct net_device *dev = m->private; | |
+ int i, n, max = R8168_EPHY_REGS_SIZE/2; | |
+ u16 word_rd; | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ unsigned long flags; | |
+ | |
+ seq_puts(m, "\nDump PCIE PHY\n"); | |
+ seq_puts(m, "\nOffset\tValue\n------\t-----\n "); | |
+ | |
+ spin_lock_irqsave(&tp->lock, flags); | |
+ for (n = 0; n < max;) { | |
+ seq_printf(m, "\n0x%02x:\t", n); | |
+ | |
+ for (i = 0; i < 8 && n < max; i++, n++) { | |
+ word_rd = rtl8168_ephy_read(ioaddr, n); | |
+ seq_printf(m, "%04x ", word_rd); | |
+ } | |
+ } | |
+ spin_unlock_irqrestore(&tp->lock, flags); | |
+ | |
+ seq_putc(m, '\n'); | |
+ return 0; | |
+} | |
+ | |
+static int proc_get_eth_phy(struct seq_file *m, void *v) | |
+{ | |
+ struct net_device *dev = m->private; | |
+ int i, n, max = R8168_PHY_REGS_SIZE/2; | |
+ u16 word_rd; | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ unsigned long flags; | |
+ | |
+ seq_puts(m, "\nDump Ethernet PHY\n"); | |
+ seq_puts(m, "\nOffset\tValue\n------\t-----\n "); | |
+ | |
+ spin_lock_irqsave(&tp->lock, flags); | |
+ seq_puts(m, "\n####################page 0##################\n "); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ for (n = 0; n < max;) { | |
+ seq_printf(m, "\n0x%02x:\t", n); | |
+ | |
+ for (i = 0; i < 8 && n < max; i++, n++) { | |
+ word_rd = mdio_read(tp, n); | |
+ seq_printf(m, "%04x ", word_rd); | |
+ } | |
+ } | |
+ spin_unlock_irqrestore(&tp->lock, flags); | |
+ | |
+ seq_putc(m, '\n'); | |
+ return 0; | |
+} | |
+ | |
+static int proc_get_extended_registers(struct seq_file *m, void *v) | |
+{ | |
+ struct net_device *dev = m->private; | |
+ int i, n, max = R8168_ERI_REGS_SIZE; | |
+ u32 dword_rd; | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ unsigned long flags; | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_1: | |
+ case CFG_METHOD_2: | |
+ case CFG_METHOD_3: | |
+ /* RTL8168B does not support Extend GMAC */ | |
+ seq_puts(m, "\nNot Support Dump Extended Registers\n"); | |
+ return 0; | |
+ } | |
+ | |
+ seq_puts(m, "\nDump Extended Registers\n"); | |
+ seq_puts(m, "\nOffset\tValue\n------\t-----\n "); | |
+ | |
+ spin_lock_irqsave(&tp->lock, flags); | |
+ for (n = 0; n < max;) { | |
+ seq_printf(m, "\n0x%02x:\t", n); | |
+ | |
+ for (i = 0; i < 4 && n < max; i++, n+=4) { | |
+ dword_rd = rtl8168_eri_read(ioaddr, n, 4, ERIAR_ExGMAC); | |
+ seq_printf(m, "%08x ", dword_rd); | |
+ } | |
+ } | |
+ spin_unlock_irqrestore(&tp->lock, flags); | |
+ | |
+ seq_putc(m, '\n'); | |
+ return 0; | |
+} | |
+ | |
+static int proc_get_pci_registers(struct seq_file *m, void *v) | |
+{ | |
+ struct net_device *dev = m->private; | |
+ int i, n, max = R8168_PCI_REGS_SIZE; | |
+ u32 dword_rd; | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ unsigned long flags; | |
+ | |
+ seq_puts(m, "\nDump PCI Registers\n"); | |
+ seq_puts(m, "\nOffset\tValue\n------\t-----\n "); | |
+ | |
+ spin_lock_irqsave(&tp->lock, flags); | |
+ for (n = 0; n < max;) { | |
+ seq_printf(m, "\n0x%03x:\t", n); | |
+ | |
+ for (i = 0; i < 4 && n < max; i++, n+=4) { | |
+ pci_read_config_dword(tp->pci_dev, n, &dword_rd); | |
+ seq_printf(m, "%08x ", dword_rd); | |
+ } | |
+ } | |
+ | |
+ n = 0x110; | |
+ pci_read_config_dword(tp->pci_dev, n, &dword_rd); | |
+ seq_printf(m, "\n0x%03x:\t%08x ", n, dword_rd); | |
+ n = 0x70c; | |
+ pci_read_config_dword(tp->pci_dev, n, &dword_rd); | |
+ seq_printf(m, "\n0x%03x:\t%08x ", n, dword_rd); | |
+ | |
+ spin_unlock_irqrestore(&tp->lock, flags); | |
+ | |
+ seq_putc(m, '\n'); | |
+ return 0; | |
+} | |
+#else | |
+ | |
+static int proc_get_driver_variable(char *page, char **start, | |
+ off_t offset, int count, | |
+ int *eof, void *data) | |
+{ | |
+ struct net_device *dev = data; | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ unsigned long flags; | |
+ int len = 0; | |
+ | |
+ len += snprintf(page + len, count - len, | |
+ "\nDump Driver Driver\n"); | |
+ | |
+ spin_lock_irqsave(&tp->lock, flags); | |
+ len += snprintf(page + len, count - len, | |
+ "Variable\tValue\n----------\t-----\n"); | |
+ | |
+ len += snprintf(page + len, count - len, | |
+ "MODULENAME\t%s\n" | |
+ "driver version\t%s\n" | |
+ "chipset\t%d\n" | |
+ "chipset_name\t%s\n" | |
+ "mtu\t%d\n" | |
+ "NUM_RX_DESC\t0x%x\n" | |
+ "cur_rx\t0x%x\n" | |
+ "dirty_rx\t0x%x\n" | |
+ "NUM_TX_DESC\t0x%x\n" | |
+ "cur_tx\t0x%x\n" | |
+ "dirty_tx\t0x%x\n" | |
+ "rx_buf_sz\t0x%x\n" | |
+ "esd_flag\t0x%x\n" | |
+ "pci_cfg_is_read\t0x%x\n" | |
+ "rtl8168_rx_config\t0x%x\n" | |
+ "cp_cmd\t0x%x\n" | |
+ "intr_mask\t0x%x\n" | |
+ "timer_intr_mask\t0x%x\n" | |
+ "wol_enabled\t0x%x\n" | |
+ "wol_opts\t0x%x\n" | |
+ "efuse_ver\t0x%x\n" | |
+ "eeprom_type\t0x%x\n" | |
+ "autoneg\t0x%x\n" | |
+ "duplex\t0x%x\n" | |
+ "speed\t%d\n" | |
+ "eeprom_len\t0x%x\n" | |
+ "cur_page\t0x%x\n" | |
+ "bios_setting\t0x%x\n" | |
+ "features\t0x%x\n" | |
+ "org_pci_offset_99\t0x%x\n" | |
+ "org_pci_offset_180\t0x%x\n" | |
+ "issue_offset_99_event\t0x%x\n" | |
+ "org_pci_offset_80\t0x%x\n" | |
+ "org_pci_offset_81\t0x%x\n" | |
+ "use_timer_interrrupt\t0x%x\n" | |
+ "HwIcVerUnknown\t0x%x\n" | |
+ "NotWrRamCodeToMicroP\t0x%x\n" | |
+ "NotWrMcuPatchCode\t0x%x\n" | |
+ "HwHasWrRamCodeToMicroP\t0x%x\n" | |
+ "sw_ram_code_ver\t0x%x\n" | |
+ "hw_ram_code_ver\t0x%x\n" | |
+ "rtk_enable_diag\t0x%x\n" | |
+ "ShortPacketSwChecksum\t0x%x\n" | |
+ "UseSwPaddingShortPkt\t0x%x\n" | |
+ "RequireAdcBiasPatch\t0x%x\n" | |
+ "AdcBiasPatchIoffset\t0x%x\n" | |
+ "RequireAdjustUpsTxLinkPulseTiming\t0x%x\n" | |
+ "SwrCnt1msIni\t0x%x\n" | |
+ "HwSuppNowIsOobVer\t0x%x\n" | |
+ "HwFiberModeVer\t0x%x\n" | |
+ "RequiredSecLanDonglePatch\t0x%x\n" | |
+ "HwSuppDashVer\t0x%x\n" | |
+ "DASH\t0x%x\n" | |
+ "HwSuppKCPOffloadVer\t0x%x\n" | |
+ "speed\t0x%x\n" | |
+ "duplex\t0x%x\n" | |
+ "autoneg\t0x%x\n" | |
+ "aspm\t0x%x\n" | |
+ "s5wol\t0x%x\n" | |
+ "eee_enable\t0x%x\n" | |
+ "hwoptimize\t0x%lx\n" | |
+ "proc_init_num\t0x%x\n" | |
+ "s0_magic_packet\t0x%x\n" | |
+ "HwSuppMagicPktVer\t0x%x\n", | |
+ MODULENAME, | |
+ RTL8168_VERSION, | |
+ tp->chipset, | |
+ rtl_chip_info[tp->chipset].name, | |
+ dev->mtu, | |
+ NUM_RX_DESC, | |
+ tp->cur_rx, | |
+ tp->dirty_rx, | |
+ NUM_TX_DESC, | |
+ tp->cur_tx, | |
+ tp->dirty_tx, | |
+ tp->rx_buf_sz, | |
+ tp->esd_flag, | |
+ tp->pci_cfg_is_read, | |
+ tp->rtl8168_rx_config, | |
+ tp->cp_cmd, | |
+ tp->intr_mask, | |
+ tp->timer_intr_mask, | |
+ tp->wol_enabled, | |
+ tp->wol_opts, | |
+ tp->efuse_ver, | |
+ tp->eeprom_type, | |
+ tp->autoneg, | |
+ tp->duplex, | |
+ tp->speed, | |
+ tp->eeprom_len, | |
+ tp->cur_page, | |
+ tp->bios_setting, | |
+ tp->features, | |
+ tp->org_pci_offset_99, | |
+ tp->org_pci_offset_180, | |
+ tp->issue_offset_99_event, | |
+ tp->org_pci_offset_80, | |
+ tp->org_pci_offset_81, | |
+ tp->use_timer_interrrupt, | |
+ tp->HwIcVerUnknown, | |
+ tp->NotWrRamCodeToMicroP, | |
+ tp->NotWrMcuPatchCode, | |
+ tp->HwHasWrRamCodeToMicroP, | |
+ tp->sw_ram_code_ver, | |
+ tp->hw_ram_code_ver, | |
+ tp->rtk_enable_diag, | |
+ tp->ShortPacketSwChecksum, | |
+ tp->UseSwPaddingShortPkt, | |
+ tp->RequireAdcBiasPatch, | |
+ tp->AdcBiasPatchIoffset, | |
+ tp->RequireAdjustUpsTxLinkPulseTiming, | |
+ tp->SwrCnt1msIni, | |
+ tp->HwSuppNowIsOobVer, | |
+ tp->HwFiberModeVer, | |
+ tp->RequiredSecLanDonglePatch, | |
+ tp->HwSuppDashVer, | |
+ tp->DASH, | |
+ tp->HwSuppKCPOffloadVer, | |
+ speed, | |
+ duplex, | |
+ autoneg, | |
+ aspm, | |
+ s5wol, | |
+ eee_enable, | |
+ hwoptimize, | |
+ proc_init_num, | |
+ s0_magic_packet, | |
+ tp->HwSuppMagicPktVer | |
+ ); | |
+ spin_unlock_irqrestore(&tp->lock, flags); | |
+ | |
+ len += snprintf(page + len, count - len, "\n"); | |
+ | |
+ *eof = 1; | |
+ return len; | |
+} | |
+ | |
+static int proc_get_tally_counter(char *page, char **start, | |
+ off_t offset, int count, | |
+ int *eof, void *data) | |
+{ | |
+ struct net_device *dev = data; | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ struct rtl8168_counters *counters; | |
+ dma_addr_t paddr; | |
+ u32 cmd; | |
+ u32 WaitCnt; | |
+ unsigned long flags; | |
+ int len = 0; | |
+ | |
+ len += snprintf(page + len, count - len, | |
+ "\nDump Tally Counter\n"); | |
+ | |
+ //ASSERT_RTNL(); | |
+ | |
+ counters = tp->tally_vaddr; | |
+ paddr = tp->tally_paddr; | |
+ if (!counters) { | |
+ len += snprintf(page + len, count - len, | |
+ "\nDump Tally Counter Fail\n"); | |
+ goto out; | |
+ } | |
+ | |
+ spin_lock_irqsave(&tp->lock, flags); | |
+ RTL_W32(CounterAddrHigh, (u64)paddr >> 32); | |
+ cmd = (u64)paddr & DMA_BIT_MASK(32); | |
+ RTL_W32(CounterAddrLow, cmd); | |
+ RTL_W32(CounterAddrLow, cmd | CounterDump); | |
+ | |
+ WaitCnt = 0; | |
+ while (RTL_R32(CounterAddrLow) & CounterDump) { | |
+ udelay(10); | |
+ | |
+ WaitCnt++; | |
+ if (WaitCnt > 20) | |
+ break; | |
+ } | |
+ spin_unlock_irqrestore(&tp->lock, flags); | |
+ | |
+ len += snprintf(page + len, count - len, | |
+ "Statistics\tValue\n----------\t-----\n"); | |
+ | |
+ len += snprintf(page + len, count - len, | |
+ "tx_packets\t%lld\n" | |
+ "rx_packets\t%lld\n" | |
+ "tx_errors\t%lld\n" | |
+ "rx_missed\t%lld\n" | |
+ "align_errors\t%lld\n" | |
+ "tx_one_collision\t%lld\n" | |
+ "tx_multi_collision\t%lld\n" | |
+ "rx_unicast\t%lld\n" | |
+ "rx_broadcast\t%lld\n" | |
+ "rx_multicast\t%lld\n" | |
+ "tx_aborted\t%lld\n" | |
+ "tx_underun\t%lld\n", | |
+ le64_to_cpu(counters->tx_packets), | |
+ le64_to_cpu(counters->rx_packets), | |
+ le64_to_cpu(counters->tx_errors), | |
+ le64_to_cpu(counters->rx_missed), | |
+ le64_to_cpu(counters->align_errors), | |
+ le64_to_cpu(counters->tx_one_collision), | |
+ le64_to_cpu(counters->tx_multi_collision), | |
+ le64_to_cpu(counters->rx_unicast), | |
+ le64_to_cpu(counters->rx_broadcast), | |
+ le64_to_cpu(counters->rx_multicast), | |
+ le64_to_cpu(counters->tx_aborted), | |
+ le64_to_cpu(counters->tx_underun) | |
+ ); | |
+ | |
+ len += snprintf(page + len, count - len, "\n"); | |
+out: | |
+ *eof = 1; | |
+ return len; | |
+} | |
+ | |
+static int proc_get_registers(char *page, char **start, | |
+ off_t offset, int count, | |
+ int *eof, void *data) | |
+{ | |
+ struct net_device *dev = data; | |
+ int i, n, max = R8168_MAC_REGS_SIZE; | |
+ u8 byte_rd; | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ unsigned long flags; | |
+ int len = 0; | |
+ | |
+ len += snprintf(page + len, count - len, | |
+ "\nDump MAC Registers\n" | |
+ "Offset\tValue\n------\t-----\n"); | |
+ | |
+ spin_lock_irqsave(&tp->lock, flags); | |
+ for (n = 0; n < max;) { | |
+ len += snprintf(page + len, count - len, | |
+ "\n0x%02x:\t", | |
+ n); | |
+ | |
+ for (i = 0; i < 16 && n < max; i++, n++) { | |
+ byte_rd = readb(ioaddr + n); | |
+ len += snprintf(page + len, count - len, | |
+ "%02x ", | |
+ byte_rd); | |
+ } | |
+ } | |
+ spin_unlock_irqrestore(&tp->lock, flags); | |
+ | |
+ len += snprintf(page + len, count - len, "\n"); | |
+ | |
+ *eof = 1; | |
+ return len; | |
+} | |
+ | |
+static int proc_get_pcie_phy(char *page, char **start, | |
+ off_t offset, int count, | |
+ int *eof, void *data) | |
+{ | |
+ struct net_device *dev = data; | |
+ int i, n, max = R8168_EPHY_REGS_SIZE/2; | |
+ u16 word_rd; | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ unsigned long flags; | |
+ int len = 0; | |
+ | |
+ len += snprintf(page + len, count - len, | |
+ "\nDump PCIE PHY\n" | |
+ "Offset\tValue\n------\t-----\n"); | |
+ | |
+ spin_lock_irqsave(&tp->lock, flags); | |
+ for (n = 0; n < max;) { | |
+ len += snprintf(page + len, count - len, | |
+ "\n0x%02x:\t", | |
+ n); | |
+ | |
+ for (i = 0; i < 8 && n < max; i++, n++) { | |
+ word_rd = rtl8168_ephy_read(ioaddr, n); | |
+ len += snprintf(page + len, count - len, | |
+ "%04x ", | |
+ word_rd); | |
+ } | |
+ } | |
+ spin_unlock_irqrestore(&tp->lock, flags); | |
+ | |
+ len += snprintf(page + len, count - len, "\n"); | |
+ | |
+ *eof = 1; | |
+ return len; | |
+} | |
+ | |
+static int proc_get_eth_phy(char *page, char **start, | |
+ off_t offset, int count, | |
+ int *eof, void *data) | |
+{ | |
+ struct net_device *dev = data; | |
+ int i, n, max = R8168_PHY_REGS_SIZE/2; | |
+ u16 word_rd; | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ unsigned long flags; | |
+ int len = 0; | |
+ | |
+ len += snprintf(page + len, count - len, | |
+ "\nDump Ethernet PHY\n" | |
+ "Offset\tValue\n------\t-----\n"); | |
+ | |
+ spin_lock_irqsave(&tp->lock, flags); | |
+ len += snprintf(page + len, count - len, | |
+ "\n####################page 0##################\n"); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ for (n = 0; n < max;) { | |
+ len += snprintf(page + len, count - len, | |
+ "\n0x%02x:\t", | |
+ n); | |
+ | |
+ for (i = 0; i < 8 && n < max; i++, n++) { | |
+ word_rd = mdio_read(tp, n); | |
+ len += snprintf(page + len, count - len, | |
+ "%04x ", | |
+ word_rd); | |
+ } | |
+ } | |
+ spin_unlock_irqrestore(&tp->lock, flags); | |
+ | |
+ len += snprintf(page + len, count - len, "\n"); | |
+ | |
+ *eof = 1; | |
+ return len; | |
+} | |
+ | |
+static int proc_get_extended_registers(char *page, char **start, | |
+ off_t offset, int count, | |
+ int *eof, void *data) | |
+{ | |
+ struct net_device *dev = data; | |
+ int i, n, max = R8168_ERI_REGS_SIZE; | |
+ u32 dword_rd; | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ unsigned long flags; | |
+ int len = 0; | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_1: | |
+ case CFG_METHOD_2: | |
+ case CFG_METHOD_3: | |
+ /* RTL8168B does not support Extend GMAC */ | |
+ len += snprintf(page + len, count - len, | |
+ "\nNot Support Dump Extended Registers\n"); | |
+ | |
+ goto out; | |
+ } | |
+ | |
+ len += snprintf(page + len, count - len, | |
+ "\nDump Extended Registers\n" | |
+ "Offset\tValue\n------\t-----\n"); | |
+ | |
+ spin_lock_irqsave(&tp->lock, flags); | |
+ for (n = 0; n < max;) { | |
+ len += snprintf(page + len, count - len, | |
+ "\n0x%02x:\t", | |
+ n); | |
+ | |
+ for (i = 0; i < 4 && n < max; i++, n+=4) { | |
+ dword_rd = rtl8168_eri_read(ioaddr, n, 4, ERIAR_ExGMAC); | |
+ len += snprintf(page + len, count - len, | |
+ "%08x ", | |
+ dword_rd); | |
+ } | |
+ } | |
+ spin_unlock_irqrestore(&tp->lock, flags); | |
+ | |
+ len += snprintf(page + len, count - len, "\n"); | |
+out: | |
+ *eof = 1; | |
+ return len; | |
+} | |
+ | |
+static int proc_get_pci_registers(char *page, char **start, | |
+ off_t offset, int count, | |
+ int *eof, void *data) | |
+{ | |
+ struct net_device *dev = data; | |
+ int i, n, max = R8168_PCI_REGS_SIZE; | |
+ u32 dword_rd; | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ unsigned long flags; | |
+ int len = 0; | |
+ | |
+ len += snprintf(page + len, count - len, | |
+ "\nDump PCI Registers\n" | |
+ "Offset\tValue\n------\t-----\n"); | |
+ | |
+ spin_lock_irqsave(&tp->lock, flags); | |
+ for (n = 0; n < max;) { | |
+ len += snprintf(page + len, count - len, | |
+ "\n0x%03x:\t", | |
+ n); | |
+ | |
+ for (i = 0; i < 4 && n < max; i++, n+=4) { | |
+ pci_read_config_dword(tp->pci_dev, n, &dword_rd); | |
+ len += snprintf(page + len, count - len, | |
+ "%08x ", | |
+ dword_rd); | |
+ } | |
+ } | |
+ | |
+ n = 0x110; | |
+ pci_read_config_dword(tp->pci_dev, n, &dword_rd); | |
+ len += snprintf(page + len, count - len, | |
+ "\n0x%03x:\t%08x ", | |
+ n, | |
+ dword_rd); | |
+ n = 0x70c; | |
+ pci_read_config_dword(tp->pci_dev, n, &dword_rd); | |
+ len += snprintf(page + len, count - len, | |
+ "\n0x%03x:\t%08x ", | |
+ n, | |
+ dword_rd); | |
+ spin_unlock_irqrestore(&tp->lock, flags); | |
+ | |
+ len += snprintf(page + len, count - len, "\n"); | |
+ | |
+ *eof = 1; | |
+ return len; | |
+} | |
+#endif | |
+static void rtl8168_proc_module_init(void) | |
+{ | |
+ //create /proc/net/r8168 | |
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32) | |
+ rtl8168_proc = proc_mkdir(MODULENAME, init_net.proc_net); | |
+#else | |
+ rtl8168_proc = proc_mkdir(MODULENAME, proc_net); | |
+#endif | |
+ if (!rtl8168_proc) | |
+ dprintk("cannot create %s proc entry \n", MODULENAME); | |
+} | |
+ | |
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) | |
+/* | |
+ * seq_file wrappers for procfile show routines. | |
+ */ | |
+static int rtl8168_proc_open(struct inode *inode, struct file *file) | |
+{ | |
+ struct net_device *dev = proc_get_parent_data(inode); | |
+ int (*show)(struct seq_file *, void *) = PDE_DATA(inode); | |
+ | |
+ return single_open(file, show, dev); | |
+} | |
+ | |
+static const struct file_operations rtl8168_proc_fops = { | |
+ .open = rtl8168_proc_open, | |
+ .read = seq_read, | |
+ .llseek = seq_lseek, | |
+ .release = single_release, | |
+}; | |
+#endif | |
+ | |
+/* | |
+ * Table of proc files we need to create. | |
+ */ | |
+struct rtl8168_proc_file { | |
+ char name[12]; | |
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) | |
+ int (*show)(struct seq_file *, void *); | |
+#else | |
+ int (*show)(char *, char **, off_t, int, int *, void *); | |
+#endif | |
+}; | |
+ | |
+static const struct rtl8168_proc_file rtl8168_proc_files[] = { | |
+ { "driver_var", &proc_get_driver_variable }, | |
+ { "tally", &proc_get_tally_counter }, | |
+ { "registers", &proc_get_registers }, | |
+ { "pcie_phy", &proc_get_pcie_phy }, | |
+ { "eth_phy", &proc_get_eth_phy }, | |
+ { "ext_regs", &proc_get_extended_registers }, | |
+ { "pci_regs", &proc_get_pci_registers }, | |
+ { "" } | |
+}; | |
+ | |
+static void rtl8168_proc_init(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ const struct rtl8168_proc_file *f; | |
+ struct proc_dir_entry *dir; | |
+ | |
+ if (rtl8168_proc && !tp->proc_dir) { | |
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) | |
+ dir = proc_mkdir_data(dev->name, 0, rtl8168_proc, dev); | |
+ if (!dir) { | |
+ printk("Unable to initialize /proc/net/%s/%s\n", | |
+ MODULENAME, dev->name); | |
+ return; | |
+ } | |
+ | |
+ tp->proc_dir = dir; | |
+ proc_init_num++; | |
+ | |
+ for (f = rtl8168_proc_files; f->name[0]; f++) { | |
+ if (!proc_create_data(f->name, S_IFREG | S_IRUGO, dir, | |
+ &rtl8168_proc_fops, f->show)) { | |
+ printk("Unable to initialize " | |
+ "/proc/net/%s/%s/%s\n", | |
+ MODULENAME, dev->name, f->name); | |
+ return; | |
+ } | |
+ } | |
+#else | |
+ dir = proc_mkdir(dev->name, rtl8168_proc); | |
+ if (!dir) { | |
+ printk("Unable to initialize /proc/net/%s/%s\n", | |
+ MODULENAME, dev->name); | |
+ return; | |
+ } | |
+ | |
+ tp->proc_dir = dir; | |
+ proc_init_num++; | |
+ | |
+ for (f = rtl8168_proc_files; f->name[0]; f++) { | |
+ if (!create_proc_read_entry(f->name, S_IFREG | S_IRUGO, | |
+ dir, f->show, dev)) { | |
+ printk("Unable to initialize " | |
+ "/proc/net/%s/%s/%s\n", | |
+ MODULENAME, dev->name, f->name); | |
+ return; | |
+ } | |
+ } | |
+#endif | |
+ } | |
+} | |
+ | |
+static void rtl8168_proc_remove(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ | |
+ if (tp->proc_dir) { | |
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) | |
+ remove_proc_subtree(dev->name, rtl8168_proc); | |
+ proc_init_num--; | |
+ | |
+#else | |
+ const struct rtl8168_proc_file *f; | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ | |
+ for (f = rtl8168_proc_files; f->name[0]; f++) | |
+ remove_proc_entry(f->name, tp->proc_dir); | |
+ | |
+ remove_proc_entry(dev->name, rtl8168_proc); | |
+ proc_init_num--; | |
+#endif | |
+ tp->proc_dir = NULL; | |
+ } | |
+} | |
+ | |
+#endif //ENABLE_R8168_PROCFS | |
+ | |
+static inline u16 map_phy_ocp_addr(u16 PageNum, u8 RegNum) | |
+{ | |
+ u16 OcpPageNum = 0; | |
+ u8 OcpRegNum = 0; | |
+ u16 OcpPhyAddress = 0; | |
+ | |
+ if( PageNum == 0 ) { | |
+ OcpPageNum = OCP_STD_PHY_BASE_PAGE + ( RegNum / 8 ); | |
+ OcpRegNum = 0x10 + ( RegNum % 8 ); | |
+ } else { | |
+ OcpPageNum = PageNum; | |
+ OcpRegNum = RegNum; | |
+ } | |
+ | |
+ OcpPageNum <<= 4; | |
+ | |
+ if( OcpRegNum < 16 ) { | |
+ OcpPhyAddress = 0; | |
+ } else { | |
+ OcpRegNum -= 16; | |
+ OcpRegNum <<= 1; | |
+ | |
+ OcpPhyAddress = OcpPageNum + OcpRegNum; | |
+ } | |
+ | |
+ | |
+ return OcpPhyAddress; | |
+} | |
+ | |
+static void mdio_write_phy_ocp(struct rtl8168_private *tp, | |
+ u16 PageNum, | |
+ u32 RegAddr, | |
+ u32 value) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ u32 data32; | |
+ u16 ocp_addr; | |
+ int i; | |
+ | |
+ ocp_addr = map_phy_ocp_addr(PageNum, RegAddr); | |
+ | |
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18) | |
+ WARN_ON_ONCE(ocp_addr % 2); | |
+#endif | |
+ data32 = ocp_addr/2; | |
+ data32 <<= OCPR_Addr_Reg_shift; | |
+ data32 |= OCPR_Write | value; | |
+ | |
+ RTL_W32(PHYOCP, data32); | |
+ for (i = 0; i < 100; i++) { | |
+ udelay(1); | |
+ | |
+ if (!(RTL_R32(PHYOCP) & OCPR_Flag)) | |
+ break; | |
+ } | |
+} | |
+ | |
+static void mdio_real_write(struct rtl8168_private *tp, | |
+ u32 RegAddr, | |
+ u32 value) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ int i; | |
+ | |
+ if (RegAddr == 0x1F) { | |
+ tp->cur_page = value; | |
+ } | |
+ | |
+ if (tp->mcfg == CFG_METHOD_11) { | |
+ RTL_W32(OCPDR, OCPDR_Write | | |
+ (RegAddr & OCPDR_Reg_Mask) << OCPDR_GPHY_Reg_shift | | |
+ (value & OCPDR_Data_Mask)); | |
+ RTL_W32(OCPAR, OCPAR_GPHY_Write); | |
+ RTL_W32(EPHY_RXER_NUM, 0); | |
+ | |
+ for (i = 0; i < 100; i++) { | |
+ mdelay(1); | |
+ if (!(RTL_R32(OCPAR) & OCPAR_Flag)) | |
+ break; | |
+ } | |
+ } else if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 || | |
+ tp->mcfg == CFG_METHOD_23 || tp->mcfg == CFG_METHOD_24 || | |
+ tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 || | |
+ tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 || | |
+ tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30) { | |
+ if (RegAddr == 0x1F) { | |
+ return; | |
+ } | |
+ mdio_write_phy_ocp(tp, tp->cur_page, RegAddr, value); | |
+ } else { | |
+ if (tp->mcfg == CFG_METHOD_12 || tp->mcfg == CFG_METHOD_13) | |
+ RTL_W32(0xD0, RTL_R32(0xD0) & ~0x00020000); | |
+ | |
+ RTL_W32(PHYAR, PHYAR_Write | | |
+ (RegAddr & PHYAR_Reg_Mask) << PHYAR_Reg_shift | | |
+ (value & PHYAR_Data_Mask)); | |
+ | |
+ for (i = 0; i < 10; i++) { | |
+ udelay(100); | |
+ | |
+ /* Check if the RTL8168 has completed writing to the specified MII register */ | |
+ if (!(RTL_R32(PHYAR) & PHYAR_Flag)) { | |
+ udelay(20); | |
+ break; | |
+ } | |
+ } | |
+ | |
+ if (tp->mcfg == CFG_METHOD_12 || tp->mcfg == CFG_METHOD_13) | |
+ RTL_W32(0xD0, RTL_R32(0xD0) | 0x00020000); | |
+ } | |
+} | |
+ | |
+void mdio_write(struct rtl8168_private *tp, | |
+ u32 RegAddr, | |
+ u32 value) | |
+{ | |
+ if (tp->rtk_enable_diag) return; | |
+ | |
+ mdio_real_write(tp, RegAddr, value); | |
+} | |
+ | |
+void mdio_prot_write(struct rtl8168_private *tp, | |
+ u32 RegAddr, | |
+ u32 value) | |
+{ | |
+ mdio_real_write(tp, RegAddr, value); | |
+} | |
+ | |
+static u32 mdio_read_phy_ocp(struct rtl8168_private *tp, | |
+ u16 PageNum, | |
+ u32 RegAddr) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ u32 data32; | |
+ u16 ocp_addr; | |
+ int i, value = 0; | |
+ | |
+ ocp_addr = map_phy_ocp_addr(PageNum, RegAddr); | |
+ | |
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18) | |
+ WARN_ON_ONCE(ocp_addr % 2); | |
+#endif | |
+ data32 = ocp_addr/2; | |
+ data32 <<= OCPR_Addr_Reg_shift; | |
+ | |
+ RTL_W32(PHYOCP, data32); | |
+ for (i = 0; i < 100; i++) { | |
+ udelay(1); | |
+ | |
+ if (RTL_R32(PHYOCP) & OCPR_Flag) | |
+ break; | |
+ } | |
+ value = RTL_R32(PHYOCP) & OCPDR_Data_Mask; | |
+ | |
+ return value; | |
+} | |
+ | |
+u32 mdio_read(struct rtl8168_private *tp, | |
+ u32 RegAddr) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ int i, value = 0; | |
+ | |
+ if (tp->mcfg==CFG_METHOD_11) { | |
+ RTL_W32(OCPDR, OCPDR_Read | | |
+ (RegAddr & OCPDR_Reg_Mask) << OCPDR_GPHY_Reg_shift); | |
+ RTL_W32(OCPAR, OCPAR_GPHY_Write); | |
+ RTL_W32(EPHY_RXER_NUM, 0); | |
+ | |
+ for (i = 0; i < 100; i++) { | |
+ mdelay(1); | |
+ if (!(RTL_R32(OCPAR) & OCPAR_Flag)) | |
+ break; | |
+ } | |
+ | |
+ mdelay(1); | |
+ RTL_W32(OCPAR, OCPAR_GPHY_Read); | |
+ RTL_W32(EPHY_RXER_NUM, 0); | |
+ | |
+ for (i = 0; i < 100; i++) { | |
+ mdelay(1); | |
+ if (RTL_R32(OCPAR) & OCPAR_Flag) | |
+ break; | |
+ } | |
+ | |
+ value = RTL_R32(OCPDR) & OCPDR_Data_Mask; | |
+ } else if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 || | |
+ tp->mcfg == CFG_METHOD_23 || tp->mcfg == CFG_METHOD_24 || | |
+ tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 || | |
+ tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 || | |
+ tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30) { | |
+ value = mdio_read_phy_ocp(tp, tp->cur_page, RegAddr); | |
+ } else { | |
+ if (tp->mcfg == CFG_METHOD_12 || tp->mcfg == CFG_METHOD_13) | |
+ RTL_W32(0xD0, RTL_R32(0xD0) & ~0x00020000); | |
+ | |
+ RTL_W32(PHYAR, | |
+ PHYAR_Read | (RegAddr & PHYAR_Reg_Mask) << PHYAR_Reg_shift); | |
+ | |
+ for (i = 0; i < 10; i++) { | |
+ udelay(100); | |
+ | |
+ /* Check if the RTL8168 has completed retrieving data from the specified MII register */ | |
+ if (RTL_R32(PHYAR) & PHYAR_Flag) { | |
+ value = RTL_R32(PHYAR) & PHYAR_Data_Mask; | |
+ udelay(20); | |
+ break; | |
+ } | |
+ } | |
+ | |
+ if (tp->mcfg == CFG_METHOD_12 || tp->mcfg == CFG_METHOD_13) | |
+ RTL_W32(0xD0, RTL_R32(0xD0) | 0x00020000); | |
+ } | |
+ | |
+ return value; | |
+} | |
+ | |
+static void ClearAndSetEthPhyBit(struct rtl8168_private *tp, u8 addr, u16 clearmask, u16 setmask) | |
+{ | |
+ u16 PhyRegValue; | |
+ | |
+ | |
+ PhyRegValue = mdio_read( tp, addr ); | |
+ PhyRegValue &= ~clearmask; | |
+ PhyRegValue |= setmask; | |
+ mdio_write( tp, addr, PhyRegValue); | |
+} | |
+ | |
+void ClearEthPhyBit(struct rtl8168_private *tp, u8 addr, u16 mask) | |
+{ | |
+ ClearAndSetEthPhyBit( tp, | |
+ addr, | |
+ mask, | |
+ 0 | |
+ ); | |
+} | |
+ | |
+void SetEthPhyBit(struct rtl8168_private *tp, u8 addr, u16 mask) | |
+{ | |
+ ClearAndSetEthPhyBit( tp, | |
+ addr, | |
+ 0, | |
+ mask | |
+ ); | |
+} | |
+ | |
+void mac_ocp_write(struct rtl8168_private *tp, u16 reg_addr, u16 value) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ u32 data32; | |
+ | |
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18) | |
+ WARN_ON_ONCE(reg_addr % 2); | |
+#endif | |
+ | |
+ data32 = reg_addr/2; | |
+ data32 <<= OCPR_Addr_Reg_shift; | |
+ data32 += value; | |
+ data32 |= OCPR_Write; | |
+ | |
+ RTL_W32(MACOCP, data32); | |
+} | |
+ | |
+u16 mac_ocp_read(struct rtl8168_private *tp, u16 reg_addr) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ u32 data32; | |
+ u16 data16 = 0; | |
+ | |
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18) | |
+ WARN_ON_ONCE(reg_addr % 2); | |
+#endif | |
+ | |
+ data32 = reg_addr/2; | |
+ data32 <<= OCPR_Addr_Reg_shift; | |
+ | |
+ RTL_W32(MACOCP, data32); | |
+ data16 = (u16)RTL_R32(MACOCP); | |
+ | |
+ return data16; | |
+} | |
+ | |
+static u32 real_ocp_read(struct rtl8168_private *tp, u16 addr, u8 len) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ int i, val_shift, shift = 0; | |
+ u32 value1 = 0, value2 = 0, mask; | |
+ | |
+ if (len > 4 || len <= 0) | |
+ return -1; | |
+ | |
+ while (len > 0) { | |
+ val_shift = addr % 4; | |
+ addr = addr & ~0x3; | |
+ | |
+ RTL_W32(OCPAR, (0x0F<<12) | (addr&0xFFF)); | |
+ | |
+ for (i = 0; i < 20; i++) { | |
+ udelay(100); | |
+ if (RTL_R32(OCPAR) & OCPAR_Flag) | |
+ break; | |
+ } | |
+ | |
+ if (len == 1) mask = (0xFF << (val_shift * 8)) & 0xFFFFFFFF; | |
+ else if (len == 2) mask = (0xFFFF << (val_shift * 8)) & 0xFFFFFFFF; | |
+ else if (len == 3) mask = (0xFFFFFF << (val_shift * 8)) & 0xFFFFFFFF; | |
+ else mask = (0xFFFFFFFF << (val_shift * 8)) & 0xFFFFFFFF; | |
+ | |
+ value1 = RTL_R32(OCPDR) & mask; | |
+ value2 |= (value1 >> val_shift * 8) << shift * 8; | |
+ | |
+ if (len <= 4 - val_shift) { | |
+ len = 0; | |
+ } else { | |
+ len -= (4 - val_shift); | |
+ shift = 4 - val_shift; | |
+ addr += 4; | |
+ } | |
+ } | |
+ | |
+ udelay(20); | |
+ | |
+ return value2; | |
+} | |
+ | |
+u32 OCP_read(struct rtl8168_private *tp, u16 addr, u8 len) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ u32 value = 0; | |
+ | |
+ if (tp->mcfg == CFG_METHOD_23 || tp->mcfg == CFG_METHOD_27 || | |
+ tp->mcfg == CFG_METHOD_28) { | |
+ value = rtl8168_eri_read(ioaddr, addr, len, ERIAR_OOB); | |
+ } else { | |
+ value = real_ocp_read(tp, addr, len); | |
+ } | |
+ | |
+ return value; | |
+} | |
+ | |
+static int real_ocp_write(struct rtl8168_private *tp, u16 addr, u8 len, u32 value) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ int i, val_shift, shift = 0; | |
+ u32 value1 = 0, mask; | |
+ | |
+ if (len > 4 || len <= 0) | |
+ return -1; | |
+ | |
+ while (len > 0) { | |
+ val_shift = addr % 4; | |
+ addr = addr & ~0x3; | |
+ | |
+ if (len == 1) mask = (0xFF << (val_shift * 8)) & 0xFFFFFFFF; | |
+ else if (len == 2) mask = (0xFFFF << (val_shift * 8)) & 0xFFFFFFFF; | |
+ else if (len == 3) mask = (0xFFFFFF << (val_shift * 8)) & 0xFFFFFFFF; | |
+ else mask = (0xFFFFFFFF << (val_shift * 8)) & 0xFFFFFFFF; | |
+ | |
+ value1 = OCP_read(tp, addr, 4) & ~mask; | |
+ value1 |= ((value << val_shift * 8) >> shift * 8); | |
+ | |
+ RTL_W32(OCPDR, value1); | |
+ RTL_W32(OCPAR, OCPAR_Flag | (0x0F<<12) | (addr&0xFFF)); | |
+ | |
+ for (i = 0; i < 10; i++) { | |
+ udelay(100); | |
+ | |
+ /* Check if the RTL8168 has completed ERI write */ | |
+ if (!(RTL_R32(OCPAR) & OCPAR_Flag)) | |
+ break; | |
+ } | |
+ | |
+ if (len <= 4 - val_shift) { | |
+ len = 0; | |
+ } else { | |
+ len -= (4 - val_shift); | |
+ shift = 4 - val_shift; | |
+ addr += 4; | |
+ } | |
+ } | |
+ | |
+ udelay(20); | |
+ | |
+ return 0; | |
+} | |
+ | |
+void OCP_write(struct rtl8168_private *tp, u16 addr, u8 len, u32 value) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ | |
+ if (tp->mcfg == CFG_METHOD_23 || tp->mcfg == CFG_METHOD_27 || | |
+ tp->mcfg == CFG_METHOD_28) { | |
+ rtl8168_eri_write(ioaddr, addr, len, value, ERIAR_OOB); | |
+ } else { | |
+ real_ocp_write(tp, addr, len, value); | |
+ } | |
+} | |
+ | |
+void OOB_mutex_lock(struct rtl8168_private *tp) | |
+{ | |
+ u8 reg_16, reg_a0; | |
+ u32 wait_cnt_0, wait_Cnt_1; | |
+ u16 ocp_reg_mutex_ib; | |
+ u16 ocp_reg_mutex_oob; | |
+ u16 ocp_reg_mutex_prio; | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_11: | |
+ case CFG_METHOD_12: | |
+ ocp_reg_mutex_oob = 0x16; | |
+ ocp_reg_mutex_ib = 0x17; | |
+ ocp_reg_mutex_prio = 0x9C; | |
+ break; | |
+ case CFG_METHOD_13: | |
+ ocp_reg_mutex_oob = 0x06; | |
+ ocp_reg_mutex_ib = 0x07; | |
+ ocp_reg_mutex_prio = 0x9C; | |
+ break; | |
+ case CFG_METHOD_23: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ default: | |
+ ocp_reg_mutex_oob = 0x110; | |
+ ocp_reg_mutex_ib = 0x114; | |
+ ocp_reg_mutex_prio = 0x11C; | |
+ break; | |
+ } | |
+ | |
+ OCP_write(tp, ocp_reg_mutex_ib, 1, BIT_0); | |
+ reg_16 = OCP_read(tp, ocp_reg_mutex_oob, 1); | |
+ wait_cnt_0 = 0; | |
+ while(reg_16) { | |
+ reg_a0 = OCP_read(tp, ocp_reg_mutex_prio, 1); | |
+ if(reg_a0) { | |
+ OCP_write(tp, ocp_reg_mutex_ib, 1, 0x00); | |
+ reg_a0 = OCP_read(tp, ocp_reg_mutex_prio, 1); | |
+ wait_Cnt_1 = 0; | |
+ while(reg_a0) { | |
+ reg_a0 = OCP_read(tp, ocp_reg_mutex_prio, 1); | |
+ | |
+ wait_Cnt_1++; | |
+ | |
+ if(wait_Cnt_1 > 2000) | |
+ break; | |
+ }; | |
+ OCP_write(tp, ocp_reg_mutex_ib, 1, BIT_0); | |
+ | |
+ } | |
+ reg_16 = OCP_read(tp, ocp_reg_mutex_oob, 1); | |
+ | |
+ wait_cnt_0++; | |
+ | |
+ if(wait_cnt_0 > 2000) | |
+ break; | |
+ }; | |
+} | |
+ | |
+void OOB_mutex_unlock(struct rtl8168_private *tp) | |
+{ | |
+ u16 ocp_reg_mutex_ib; | |
+ u16 ocp_reg_mutex_oob; | |
+ u16 ocp_reg_mutex_prio; | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_11: | |
+ case CFG_METHOD_12: | |
+ ocp_reg_mutex_oob = 0x16; | |
+ ocp_reg_mutex_ib = 0x17; | |
+ ocp_reg_mutex_prio = 0x9C; | |
+ break; | |
+ case CFG_METHOD_13: | |
+ ocp_reg_mutex_oob = 0x06; | |
+ ocp_reg_mutex_ib = 0x07; | |
+ ocp_reg_mutex_prio = 0x9C; | |
+ break; | |
+ case CFG_METHOD_23: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ default: | |
+ ocp_reg_mutex_oob = 0x110; | |
+ ocp_reg_mutex_ib = 0x114; | |
+ ocp_reg_mutex_prio = 0x11C; | |
+ break; | |
+ } | |
+ | |
+ OCP_write(tp, ocp_reg_mutex_prio, 1, BIT_0); | |
+ OCP_write(tp, ocp_reg_mutex_ib, 1, 0x00); | |
+} | |
+ | |
+void OOB_notify(struct rtl8168_private *tp, u8 cmd) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ | |
+ rtl8168_eri_write(ioaddr, 0xE8, 1, cmd, ERIAR_ExGMAC); | |
+ | |
+ OCP_write(tp, 0x30, 1, 0x01); | |
+} | |
+ | |
+static int rtl8168_check_dash(struct rtl8168_private *tp) | |
+{ | |
+ if (tp->mcfg == CFG_METHOD_23 || tp->mcfg == CFG_METHOD_27 || | |
+ tp->mcfg == CFG_METHOD_28) { | |
+ if (OCP_read(tp, 0x128, 1) & BIT_0) | |
+ return 1; | |
+ else | |
+ return 0; | |
+ } else { | |
+ u32 reg; | |
+ | |
+ if (tp->mcfg == CFG_METHOD_13) | |
+ reg = 0xb8; | |
+ else | |
+ reg = 0x10; | |
+ | |
+ if (OCP_read(tp, reg, 2) & 0x00008000) | |
+ return 1; | |
+ else | |
+ return 0; | |
+ } | |
+} | |
+ | |
+void Dash2DisableTx(struct rtl8168_private *tp) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ | |
+ if (!tp->DASH) return; | |
+ | |
+ if( HW_DASH_SUPPORT_TYPE_2( tp ) ) { | |
+ u16 WaitCnt; | |
+ u8 TmpUchar; | |
+ | |
+ //Disable oob Tx | |
+ RTL_W8(IBCR2, RTL_R8(IBCR2) & ~( BIT_0 )); | |
+ WaitCnt = 0; | |
+ | |
+ //wait oob tx disable | |
+ do { | |
+ TmpUchar = RTL_R8(IBISR0); | |
+ | |
+ if( TmpUchar & ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE ) { | |
+ break; | |
+ } | |
+ | |
+ udelay( 50 ); | |
+ WaitCnt++; | |
+ } while(WaitCnt < 2000); | |
+ | |
+ //Clear ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE | |
+ RTL_W8(IBISR0, RTL_R8(IBISR0) | ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE); | |
+ } | |
+} | |
+ | |
+void Dash2EnableTx(struct rtl8168_private *tp) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ | |
+ if (!tp->DASH) return; | |
+ | |
+ if( HW_DASH_SUPPORT_TYPE_2( tp ) ) | |
+ RTL_W8(IBCR2, RTL_R8(IBCR2) | BIT_0); | |
+} | |
+ | |
+void Dash2DisableRx(struct rtl8168_private *tp) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ | |
+ if (!tp->DASH) return; | |
+ | |
+ if( HW_DASH_SUPPORT_TYPE_2( tp ) ) | |
+ RTL_W8(IBCR0, RTL_R8(IBCR0) & ~( BIT_0 )); | |
+} | |
+ | |
+void Dash2EnableRx(struct rtl8168_private *tp) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ | |
+ if (!tp->DASH) return; | |
+ | |
+ if( HW_DASH_SUPPORT_TYPE_2( tp ) ) | |
+ RTL_W8(IBCR0, RTL_R8(IBCR0) | BIT_0); | |
+} | |
+ | |
+static void Dash2DisableTxRx(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ | |
+ if( HW_DASH_SUPPORT_TYPE_2( tp ) ) { | |
+ Dash2DisableTx( tp ); | |
+ Dash2DisableRx( tp ); | |
+ } | |
+} | |
+ | |
+static void rtl8168_driver_start(struct rtl8168_private *tp) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ | |
+ if (!tp->DASH) | |
+ return; | |
+ | |
+ if (tp->mcfg == CFG_METHOD_23 || tp->mcfg == CFG_METHOD_27 || | |
+ tp->mcfg == CFG_METHOD_28) { | |
+ int timeout; | |
+ u32 tmp_value; | |
+ | |
+ OCP_write(tp, 0x180, 1, OOB_CMD_DRIVER_START); | |
+ tmp_value = OCP_read(tp, 0x30, 1); | |
+ tmp_value |= BIT_0; | |
+ OCP_write(tp, 0x30, 1, tmp_value); | |
+ | |
+ for (timeout = 0; timeout < 10; timeout++) { | |
+ mdelay(10); | |
+ if (OCP_read(tp, 0x124, 1) & BIT_0) | |
+ break; | |
+ } | |
+ } else { | |
+ int timeout; | |
+ u32 reg; | |
+ | |
+ if (tp->mcfg == CFG_METHOD_13) { | |
+ RTL_W8(TwiCmdReg, RTL_R8(TwiCmdReg) | ( BIT_7 )); | |
+ } | |
+ | |
+ OOB_notify(tp, OOB_CMD_DRIVER_START); | |
+ | |
+ if (tp->mcfg == CFG_METHOD_13) | |
+ reg = 0xB8; | |
+ else | |
+ reg = 0x10; | |
+ | |
+ for (timeout = 0; timeout < 10; timeout++) { | |
+ mdelay(10); | |
+ if (OCP_read(tp, reg, 2) & BIT_11) | |
+ break; | |
+ } | |
+ } | |
+} | |
+ | |
+static void rtl8168_driver_stop(struct rtl8168_private *tp) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ | |
+ if (!tp->DASH) | |
+ return; | |
+ | |
+ if (tp->mcfg == CFG_METHOD_23 || tp->mcfg == CFG_METHOD_27 || | |
+ tp->mcfg == CFG_METHOD_28) { | |
+ struct net_device *dev = tp->dev; | |
+ int timeout; | |
+ u32 tmp_value; | |
+ | |
+ Dash2DisableTxRx(dev); | |
+ | |
+ OCP_write(tp, 0x180, 1, OOB_CMD_DRIVER_STOP); | |
+ tmp_value = OCP_read(tp, 0x30, 1); | |
+ tmp_value |= BIT_0; | |
+ OCP_write(tp, 0x30, 1, tmp_value); | |
+ | |
+ for (timeout = 0; timeout < 10; timeout++) { | |
+ mdelay(10); | |
+ if (!(OCP_read(tp, 0x124, 1) & BIT_0)) | |
+ break; | |
+ } | |
+ } else { | |
+ int timeout; | |
+ u32 reg; | |
+ | |
+ OOB_notify(tp, OOB_CMD_DRIVER_STOP); | |
+ | |
+ if (tp->mcfg == CFG_METHOD_13) | |
+ reg = 0xB8; | |
+ else | |
+ reg = 0x10; | |
+ | |
+ for (timeout = 0; timeout < 10; timeout++) { | |
+ mdelay(10); | |
+ if ((OCP_read(tp, reg, 2) & BIT_11) == 0) | |
+ break; | |
+ } | |
+ | |
+ if (tp->mcfg == CFG_METHOD_13) { | |
+ RTL_W8(TwiCmdReg, RTL_R8(TwiCmdReg) & ~( BIT_7 )); | |
+ } | |
+ } | |
+} | |
+ | |
+void rtl8168_ephy_write(void __iomem *ioaddr, int RegAddr, int value) | |
+{ | |
+ int i; | |
+ | |
+ RTL_W32(EPHYAR, | |
+ EPHYAR_Write | | |
+ (RegAddr & EPHYAR_Reg_Mask) << EPHYAR_Reg_shift | | |
+ (value & EPHYAR_Data_Mask)); | |
+ | |
+ for (i = 0; i < 10; i++) { | |
+ udelay(100); | |
+ | |
+ /* Check if the RTL8168 has completed EPHY write */ | |
+ if (!(RTL_R32(EPHYAR) & EPHYAR_Flag)) | |
+ break; | |
+ } | |
+ | |
+ udelay(20); | |
+} | |
+ | |
+u16 rtl8168_ephy_read(void __iomem *ioaddr, int RegAddr) | |
+{ | |
+ int i; | |
+ u16 value = 0xffff; | |
+ | |
+ RTL_W32(EPHYAR, | |
+ EPHYAR_Read | (RegAddr & EPHYAR_Reg_Mask) << EPHYAR_Reg_shift); | |
+ | |
+ for (i = 0; i < 10; i++) { | |
+ udelay(100); | |
+ | |
+ /* Check if the RTL8168 has completed EPHY read */ | |
+ if (RTL_R32(EPHYAR) & EPHYAR_Flag) { | |
+ value = (u16) (RTL_R32(EPHYAR) & EPHYAR_Data_Mask); | |
+ break; | |
+ } | |
+ } | |
+ | |
+ udelay(20); | |
+ | |
+ return value; | |
+} | |
+ | |
+static void ClearAndSetPCIePhyBit(struct rtl8168_private *tp, u8 addr, u16 clearmask, u16 setmask) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ u16 EphyValue; | |
+ | |
+ EphyValue = rtl8168_ephy_read( ioaddr, addr ); | |
+ EphyValue &= ~clearmask; | |
+ EphyValue |= setmask; | |
+ rtl8168_ephy_write( ioaddr, addr, EphyValue); | |
+} | |
+ | |
+static void ClearPCIePhyBit(struct rtl8168_private *tp, u8 addr, u16 mask) | |
+{ | |
+ ClearAndSetPCIePhyBit( tp, | |
+ addr, | |
+ mask, | |
+ 0 | |
+ ); | |
+} | |
+ | |
+static void SetPCIePhyBit( struct rtl8168_private *tp, u8 addr, u16 mask) | |
+{ | |
+ ClearAndSetPCIePhyBit( tp, | |
+ addr, | |
+ 0, | |
+ mask | |
+ ); | |
+} | |
+ | |
+static u32 | |
+rtl8168_csi_other_fun_read(struct rtl8168_private *tp, | |
+ u8 multi_fun_sel_bit, | |
+ u32 addr) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ u32 cmd; | |
+ int i; | |
+ u32 value = 0; | |
+ | |
+ cmd = CSIAR_Read | CSIAR_ByteEn << CSIAR_ByteEn_shift | (addr & CSIAR_Addr_Mask); | |
+ | |
+ if (tp->mcfg != CFG_METHOD_20 && tp->mcfg != CFG_METHOD_23 && | |
+ tp->mcfg != CFG_METHOD_26 && tp->mcfg != CFG_METHOD_27 && | |
+ tp->mcfg != CFG_METHOD_28) { | |
+ multi_fun_sel_bit = 0; | |
+ } | |
+ | |
+ if( multi_fun_sel_bit > 7 ) { | |
+ return 0xffffffff; | |
+ } | |
+ | |
+ cmd |= multi_fun_sel_bit << 16; | |
+ | |
+ RTL_W32(CSIAR, cmd); | |
+ | |
+ for (i = 0; i < 10; i++) { | |
+ udelay(100); | |
+ | |
+ /* Check if the RTL8168 has completed CSI read */ | |
+ if (RTL_R32(CSIAR) & CSIAR_Flag) { | |
+ value = (u32)RTL_R32(CSIDR); | |
+ break; | |
+ } | |
+ } | |
+ | |
+ udelay(20); | |
+ | |
+ return value; | |
+} | |
+ | |
+static void | |
+rtl8168_csi_other_fun_write(struct rtl8168_private *tp, | |
+ u8 multi_fun_sel_bit, | |
+ u32 addr, | |
+ u32 value) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ u32 cmd; | |
+ int i; | |
+ | |
+ RTL_W32(CSIDR, value); | |
+ cmd = CSIAR_Write | CSIAR_ByteEn << CSIAR_ByteEn_shift | (addr & CSIAR_Addr_Mask); | |
+ if (tp->mcfg != CFG_METHOD_20 && tp->mcfg != CFG_METHOD_23 && | |
+ tp->mcfg != CFG_METHOD_26 && tp->mcfg != CFG_METHOD_27 && | |
+ tp->mcfg != CFG_METHOD_28) { | |
+ multi_fun_sel_bit = 0; | |
+ } | |
+ | |
+ if( multi_fun_sel_bit > 7 ) { | |
+ return; | |
+ } | |
+ | |
+ cmd |= multi_fun_sel_bit << 16; | |
+ | |
+ RTL_W32(CSIAR, cmd); | |
+ | |
+ for (i = 0; i < 10; i++) { | |
+ udelay(100); | |
+ | |
+ /* Check if the RTL8168 has completed CSI write */ | |
+ if (!(RTL_R32(CSIAR) & CSIAR_Flag)) | |
+ break; | |
+ } | |
+ | |
+ udelay(20); | |
+} | |
+ | |
+static u32 | |
+rtl8168_csi_read(struct rtl8168_private *tp, | |
+ u32 addr) | |
+{ | |
+ u8 multi_fun_sel_bit; | |
+ | |
+ if (tp->mcfg == CFG_METHOD_20) | |
+ multi_fun_sel_bit = 2; | |
+ else if (tp->mcfg == CFG_METHOD_26) | |
+ multi_fun_sel_bit = 1; | |
+ else | |
+ multi_fun_sel_bit = 0; | |
+ | |
+ | |
+ return rtl8168_csi_other_fun_read(tp, multi_fun_sel_bit, addr); | |
+} | |
+ | |
+static void | |
+rtl8168_csi_write(struct rtl8168_private *tp, | |
+ u32 addr, | |
+ u32 value) | |
+{ | |
+ u8 multi_fun_sel_bit; | |
+ | |
+ if (tp->mcfg == CFG_METHOD_20) | |
+ multi_fun_sel_bit = 2; | |
+ else if (tp->mcfg == CFG_METHOD_26) | |
+ multi_fun_sel_bit = 1; | |
+ else | |
+ multi_fun_sel_bit = 0; | |
+ | |
+ rtl8168_csi_other_fun_write(tp, multi_fun_sel_bit, addr, value); | |
+} | |
+ | |
+static u8 | |
+rtl8168_csi_fun0_read_byte(struct rtl8168_private *tp, | |
+ u32 addr) | |
+{ | |
+ u8 RetVal = 0; | |
+ | |
+ if (tp->mcfg == CFG_METHOD_20 || tp->mcfg == CFG_METHOD_26) { | |
+ u32 TmpUlong; | |
+ u16 RegAlignAddr; | |
+ u8 ShiftByte; | |
+ | |
+ RegAlignAddr = addr & ~(0x3); | |
+ ShiftByte = addr & (0x3); | |
+ TmpUlong = rtl8168_csi_other_fun_read(tp, 0, addr); | |
+ TmpUlong >>= (8*ShiftByte); | |
+ RetVal = (u8)TmpUlong; | |
+ } else { | |
+ struct pci_dev *pdev = tp->pci_dev; | |
+ | |
+ pci_read_config_byte(pdev, addr, &RetVal); | |
+ } | |
+ | |
+ udelay(20); | |
+ | |
+ return RetVal; | |
+} | |
+ | |
+static void | |
+rtl8168_csi_fun0_write_byte(struct rtl8168_private *tp, | |
+ u32 addr, | |
+ u8 value) | |
+{ | |
+ if (tp->mcfg == CFG_METHOD_20 || tp->mcfg == CFG_METHOD_26) { | |
+ u32 TmpUlong; | |
+ u16 RegAlignAddr; | |
+ u8 ShiftByte; | |
+ | |
+ RegAlignAddr = addr & ~(0x3); | |
+ ShiftByte = addr & (0x3); | |
+ TmpUlong = rtl8168_csi_other_fun_read(tp, 0, RegAlignAddr); | |
+ TmpUlong &= ~(0xFF << (8*ShiftByte)); | |
+ TmpUlong |= (value << (8*ShiftByte)); | |
+ rtl8168_csi_other_fun_write( tp, 0, RegAlignAddr, TmpUlong ); | |
+ } else { | |
+ struct pci_dev *pdev = tp->pci_dev; | |
+ | |
+ pci_write_config_byte(pdev, addr, value); | |
+ } | |
+ | |
+ udelay(20); | |
+} | |
+ | |
+u32 rtl8168_eri_read(void __iomem *ioaddr, int addr, int len, int type) | |
+{ | |
+ int i, val_shift, shift = 0; | |
+ u32 value1 = 0, value2 = 0, mask; | |
+ u32 eri_cmd; | |
+ | |
+ if (len > 4 || len <= 0) | |
+ return -1; | |
+ | |
+ while (len > 0) { | |
+ val_shift = addr % ERIAR_Addr_Align; | |
+ addr = addr & ~0x3; | |
+ | |
+ eri_cmd = ERIAR_Read | | |
+ type << ERIAR_Type_shift | | |
+ ERIAR_ByteEn << ERIAR_ByteEn_shift | | |
+ (addr & 0x0FFF); | |
+ if (addr & 0xF000) { | |
+ u32 tmp; | |
+ | |
+ tmp = addr & 0xF000; | |
+ tmp >>= 12; | |
+ eri_cmd |= (tmp << 20) & 0x00F00000; | |
+ } | |
+ | |
+ RTL_W32(ERIAR, eri_cmd); | |
+ | |
+ for (i = 0; i < 10; i++) { | |
+ udelay(100); | |
+ | |
+ /* Check if the RTL8168 has completed ERI read */ | |
+ if (RTL_R32(ERIAR) & ERIAR_Flag) | |
+ break; | |
+ } | |
+ | |
+ if (len == 1) mask = (0xFF << (val_shift * 8)) & 0xFFFFFFFF; | |
+ else if (len == 2) mask = (0xFFFF << (val_shift * 8)) & 0xFFFFFFFF; | |
+ else if (len == 3) mask = (0xFFFFFF << (val_shift * 8)) & 0xFFFFFFFF; | |
+ else mask = (0xFFFFFFFF << (val_shift * 8)) & 0xFFFFFFFF; | |
+ | |
+ value1 = RTL_R32(ERIDR) & mask; | |
+ value2 |= (value1 >> val_shift * 8) << shift * 8; | |
+ | |
+ if (len <= 4 - val_shift) { | |
+ len = 0; | |
+ } else { | |
+ len -= (4 - val_shift); | |
+ shift = 4 - val_shift; | |
+ addr += 4; | |
+ } | |
+ } | |
+ | |
+ udelay(20); | |
+ | |
+ return value2; | |
+} | |
+ | |
+int rtl8168_eri_write(void __iomem *ioaddr, int addr, int len, u32 value, int type) | |
+{ | |
+ | |
+ int i, val_shift, shift = 0; | |
+ u32 value1 = 0, mask; | |
+ u32 eri_cmd; | |
+ | |
+ if (len > 4 || len <= 0) | |
+ return -1; | |
+ | |
+ while (len > 0) { | |
+ val_shift = addr % ERIAR_Addr_Align; | |
+ addr = addr & ~0x3; | |
+ | |
+ if (len == 1) mask = (0xFF << (val_shift * 8)) & 0xFFFFFFFF; | |
+ else if (len == 2) mask = (0xFFFF << (val_shift * 8)) & 0xFFFFFFFF; | |
+ else if (len == 3) mask = (0xFFFFFF << (val_shift * 8)) & 0xFFFFFFFF; | |
+ else mask = (0xFFFFFFFF << (val_shift * 8)) & 0xFFFFFFFF; | |
+ | |
+ value1 = rtl8168_eri_read(ioaddr, addr, 4, type) & ~mask; | |
+ value1 |= ((value << val_shift * 8) >> shift * 8); | |
+ | |
+ RTL_W32(ERIDR, value1); | |
+ | |
+ eri_cmd = ERIAR_Write | | |
+ type << ERIAR_Type_shift | | |
+ ERIAR_ByteEn << ERIAR_ByteEn_shift | | |
+ (addr & 0x0FFF); | |
+ if (addr & 0xF000) { | |
+ u32 tmp; | |
+ | |
+ tmp = addr & 0xF000; | |
+ tmp >>= 12; | |
+ eri_cmd |= (tmp << 20) & 0x00F00000; | |
+ } | |
+ | |
+ RTL_W32(ERIAR, eri_cmd); | |
+ | |
+ for (i = 0; i < 10; i++) { | |
+ udelay(100); | |
+ | |
+ /* Check if the RTL8168 has completed ERI write */ | |
+ if (!(RTL_R32(ERIAR) & ERIAR_Flag)) | |
+ break; | |
+ } | |
+ | |
+ if (len <= 4 - val_shift) { | |
+ len = 0; | |
+ } else { | |
+ len -= (4 - val_shift); | |
+ shift = 4 - val_shift; | |
+ addr += 4; | |
+ } | |
+ } | |
+ | |
+ udelay(20); | |
+ | |
+ return 0; | |
+} | |
+ | |
+static void | |
+rtl8168_enable_rxdvgate(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_22: | |
+ case CFG_METHOD_23: | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ RTL_W8(0xF2, RTL_R8(0xF2) | BIT_3); | |
+ mdelay(2); | |
+ break; | |
+ } | |
+} | |
+ | |
+static void | |
+rtl8168_disable_rxdvgate(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_22: | |
+ case CFG_METHOD_23: | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ RTL_W8(0xF2, RTL_R8(0xF2) & ~BIT_3); | |
+ mdelay(2); | |
+ break; | |
+ } | |
+} | |
+ | |
+void | |
+rtl8168_wait_txrx_fifo_empty(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ int i; | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_22: | |
+ case CFG_METHOD_23: | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ for (i = 0; i < 10; i++) { | |
+ udelay(100); | |
+ if (RTL_R32(TxConfig) & BIT_11) | |
+ break; | |
+ } | |
+ | |
+ for (i = 0; i < 10; i++) { | |
+ udelay(100); | |
+ if ((RTL_R8(MCUCmd_reg) & (Txfifo_empty | Rxfifo_empty)) == (Txfifo_empty | Rxfifo_empty)) | |
+ break; | |
+ | |
+ } | |
+ break; | |
+ } | |
+} | |
+ | |
+#ifdef ENABLE_DASH_SUPPORT | |
+ | |
+inline void | |
+rtl8168_enable_dash2_interrupt(struct rtl8168_private *tp, void __iomem *ioaddr) | |
+{ | |
+ if (!tp->DASH) return; | |
+ | |
+ if( HW_DASH_SUPPORT_TYPE_2( tp ) ) | |
+ RTL_W8(IBIMR0, ( ISRIMR_DASH_TYPE2_ROK | ISRIMR_DASH_TYPE2_TOK | ISRIMR_DASH_TYPE2_TDU | ISRIMR_DASH_TYPE2_RDU | ISRIMR_DASH_TYPE2_RX_DISABLE_IDLE )); | |
+} | |
+ | |
+static inline void | |
+rtl8168_disable_dash2_interrupt(struct rtl8168_private *tp, void __iomem *ioaddr) | |
+{ | |
+ if (!tp->DASH) return; | |
+ | |
+ if( HW_DASH_SUPPORT_TYPE_2( tp ) ) | |
+ RTL_W8(IBIMR0, 0); | |
+} | |
+#endif | |
+ | |
+static inline void | |
+rtl8168_enable_hw_interrupt(struct rtl8168_private *tp, void __iomem *ioaddr) | |
+{ | |
+ RTL_W16(IntrMask, tp->intr_mask); | |
+ | |
+#ifdef ENABLE_DASH_SUPPORT | |
+ if (tp->DASH) | |
+ rtl8168_enable_dash2_interrupt(tp, ioaddr); | |
+#endif | |
+} | |
+ | |
+static inline void | |
+rtl8168_disable_hw_interrupt(struct rtl8168_private *tp, void __iomem *ioaddr) | |
+{ | |
+ RTL_W16(IntrMask, 0x0000); | |
+ | |
+#ifdef ENABLE_DASH_SUPPORT | |
+ if (tp->DASH) | |
+ rtl8168_disable_dash2_interrupt(tp, ioaddr); | |
+#endif | |
+} | |
+ | |
+ | |
+static inline void | |
+rtl8168_switch_to_hw_interrupt(struct rtl8168_private *tp, void __iomem *ioaddr) | |
+{ | |
+ RTL_W32(TimeInt0, 0x0000); | |
+ | |
+ rtl8168_enable_hw_interrupt(tp, ioaddr); | |
+} | |
+ | |
+static inline void | |
+rtl8168_switch_to_timer_interrupt(struct rtl8168_private *tp, void __iomem *ioaddr) | |
+{ | |
+ if (tp->use_timer_interrrupt) { | |
+ RTL_W32(TCTR, timer_count); | |
+ RTL_W32(TimeInt0, timer_count); | |
+ RTL_W16(IntrMask, tp->timer_intr_mask); | |
+ | |
+#ifdef ENABLE_DASH_SUPPORT | |
+ if (tp->DASH) | |
+ rtl8168_enable_dash2_interrupt(tp, ioaddr); | |
+#endif | |
+ } else { | |
+ rtl8168_switch_to_hw_interrupt(tp, ioaddr); | |
+ } | |
+} | |
+ | |
+static void | |
+rtl8168_irq_mask_and_ack(struct rtl8168_private *tp, void __iomem *ioaddr) | |
+{ | |
+ rtl8168_disable_hw_interrupt(tp, ioaddr); | |
+ RTL_W16(IntrStatus, RTL_R16(IntrStatus)); | |
+ | |
+#ifdef ENABLE_DASH_SUPPORT | |
+ if ( tp->DASH ) { | |
+ if( HW_DASH_SUPPORT_TYPE_2( tp ) ) { | |
+ RTL_W8(IBISR0, RTL_R16(IBISR0)); | |
+ } | |
+ } | |
+#endif | |
+} | |
+ | |
+static void | |
+rtl8168_nic_reset(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ int i; | |
+ | |
+ RTL_W32(RxConfig, (RX_DMA_BURST << RxCfgDMAShift)); | |
+ | |
+ rtl8168_enable_rxdvgate(dev); | |
+ | |
+ rtl8168_wait_txrx_fifo_empty(dev); | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_1: | |
+ case CFG_METHOD_2: | |
+ case CFG_METHOD_3: | |
+ mdelay(10); | |
+ break; | |
+ case CFG_METHOD_4: | |
+ case CFG_METHOD_5: | |
+ case CFG_METHOD_6: | |
+ case CFG_METHOD_7: | |
+ case CFG_METHOD_8: | |
+ case CFG_METHOD_9: | |
+ case CFG_METHOD_10: | |
+ case CFG_METHOD_14: | |
+ case CFG_METHOD_15: | |
+ RTL_W8(ChipCmd, StopReq | CmdRxEnb | CmdTxEnb); | |
+ udelay(100); | |
+ break; | |
+ case CFG_METHOD_11: | |
+ case CFG_METHOD_12: | |
+ case CFG_METHOD_13: | |
+ while (RTL_R8(TxPoll) & NPQ) | |
+ udelay(20); | |
+ break; | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_22: | |
+ case CFG_METHOD_23: | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ mdelay(2); | |
+ break; | |
+ default: | |
+ mdelay(10); | |
+ break; | |
+ } | |
+ | |
+ /* Soft reset the chip. */ | |
+ RTL_W8(ChipCmd, CmdReset); | |
+ | |
+ /* Check that the chip has finished the reset. */ | |
+ for (i = 100; i > 0; i--) { | |
+ udelay(100); | |
+ if ((RTL_R8(ChipCmd) & CmdReset) == 0) | |
+ break; | |
+ } | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_11: | |
+ OOB_mutex_lock(tp); | |
+ OCP_write(tp, 0x10, 2, OCP_read(tp, 0x010, 2)&~0x00004000); | |
+ OOB_mutex_unlock(tp); | |
+ | |
+ OOB_notify(tp, OOB_CMD_RESET); | |
+ | |
+ for (i = 0; i < 10; i++) { | |
+ mdelay(10); | |
+ if (OCP_read(tp, 0x010, 2)&0x00004000) | |
+ break; | |
+ } | |
+ | |
+ for (i = 0; i < 5; i++) { | |
+ if ( OCP_read(tp, 0x034, 1) == 0) | |
+ break; | |
+ } | |
+ break; | |
+ } | |
+} | |
+ | |
+static void | |
+rtl8168_hw_clear_timer_int(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ | |
+ RTL_W32(TimeInt0, 0x0000); | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_4: | |
+ case CFG_METHOD_5: | |
+ case CFG_METHOD_6: | |
+ case CFG_METHOD_7: | |
+ case CFG_METHOD_8: | |
+ RTL_W32(TimeInt1, 0x0000); | |
+ break; | |
+ case CFG_METHOD_9: | |
+ case CFG_METHOD_10: | |
+ case CFG_METHOD_11: | |
+ case CFG_METHOD_12: | |
+ case CFG_METHOD_13: | |
+ case CFG_METHOD_14: | |
+ case CFG_METHOD_15: | |
+ case CFG_METHOD_16: | |
+ case CFG_METHOD_17: | |
+ case CFG_METHOD_18: | |
+ case CFG_METHOD_19: | |
+ case CFG_METHOD_20: | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_22: | |
+ case CFG_METHOD_23: | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ RTL_W32(TimeInt1, 0x0000); | |
+ RTL_W32(TimeInt2, 0x0000); | |
+ RTL_W32(TimeInt3, 0x0000); | |
+ break; | |
+ } | |
+} | |
+ | |
+static void | |
+rtl8168_hw_reset(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ | |
+ /* Disable interrupts */ | |
+ rtl8168_irq_mask_and_ack(tp, ioaddr); | |
+ | |
+ rtl8168_hw_clear_timer_int(dev); | |
+ | |
+ rtl8168_nic_reset(dev); | |
+} | |
+ | |
+static void rtl8168_mac_loopback_test(struct rtl8168_private *tp) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ struct net_device *dev = tp->dev; | |
+ struct sk_buff *skb, *rx_skb; | |
+ dma_addr_t mapping; | |
+ struct TxDesc *txd; | |
+ struct RxDesc *rxd; | |
+ void *tmpAddr; | |
+ u32 len, rx_len, rx_cmd; | |
+ u16 type; | |
+ u8 pattern; | |
+ int i; | |
+ | |
+ if (tp->DASH) | |
+ return; | |
+ | |
+ pattern = 0x5A; | |
+ len = 60; | |
+ type = htons(ETH_P_IP); | |
+ txd = tp->TxDescArray; | |
+ rxd = tp->RxDescArray; | |
+ rx_skb = tp->Rx_skbuff[0]; | |
+ RTL_W32(TxConfig, (RTL_R32(TxConfig) & ~0x00060000) | 0x00020000); | |
+ | |
+ do { | |
+ skb = dev_alloc_skb(len + RTK_RX_ALIGN); | |
+ if (unlikely(!skb)) | |
+ dev_printk(KERN_NOTICE, &tp->pci_dev->dev, "-ENOMEM;\n"); | |
+ } while (unlikely(skb == NULL)); | |
+ skb_reserve(skb, RTK_RX_ALIGN); | |
+ | |
+ memcpy(skb_put(skb, dev->addr_len), dev->dev_addr, dev->addr_len); | |
+ memcpy(skb_put(skb, dev->addr_len), dev->dev_addr, dev->addr_len); | |
+ memcpy(skb_put(skb, sizeof(type)), &type, sizeof(type)); | |
+ tmpAddr = skb_put(skb, len - 14); | |
+ | |
+ mapping = pci_map_single(tp->pci_dev, skb->data, len, PCI_DMA_TODEVICE); | |
+ pci_dma_sync_single_for_cpu(tp->pci_dev, le64_to_cpu(mapping), | |
+ len, PCI_DMA_TODEVICE); | |
+ txd->addr = cpu_to_le64(mapping); | |
+ txd->opts2 = 0; | |
+ while (1) { | |
+ memset(tmpAddr, pattern++, len - 14); | |
+ pci_dma_sync_single_for_device(tp->pci_dev, | |
+ le64_to_cpu(mapping), | |
+ len, PCI_DMA_TODEVICE); | |
+ txd->opts1 = cpu_to_le32(DescOwn | FirstFrag | LastFrag | len); | |
+ | |
+ RTL_W32(RxConfig, RTL_R32(RxConfig) | AcceptMyPhys); | |
+ | |
+ smp_wmb(); | |
+ RTL_W8(TxPoll, NPQ); /* set polling bit */ | |
+ | |
+ for (i = 0; i < 50; i++) { | |
+ udelay(200); | |
+ rx_cmd = le32_to_cpu(rxd->opts1); | |
+ if ((rx_cmd & DescOwn) == 0) | |
+ break; | |
+ } | |
+ | |
+ RTL_W32(RxConfig, RTL_R32(RxConfig) & ~(AcceptErr | AcceptRunt | AcceptBroadcast | AcceptMulticast | AcceptMyPhys | AcceptAllPhys)); | |
+ | |
+ rx_len = rx_cmd & 0x3FFF; | |
+ rx_len -= 4; | |
+ rxd->opts1 = cpu_to_le32(DescOwn | tp->rx_buf_sz); | |
+ | |
+ pci_dma_sync_single_for_cpu(tp->pci_dev, le64_to_cpu(mapping), len, PCI_DMA_TODEVICE); | |
+ | |
+ if (rx_len == len) { | |
+ pci_dma_sync_single_for_cpu(tp->pci_dev, le64_to_cpu(rxd->addr), tp->rx_buf_sz, PCI_DMA_FROMDEVICE); | |
+ i = memcmp(skb->data, rx_skb->data, rx_len); | |
+ pci_dma_sync_single_for_device(tp->pci_dev, le64_to_cpu(rxd->addr), tp->rx_buf_sz, PCI_DMA_FROMDEVICE); | |
+ if (i == 0) { | |
+// dev_printk(KERN_INFO, &tp->pci_dev->dev, "loopback test finished\n",rx_len,len); | |
+ break; | |
+ } | |
+ } | |
+ | |
+ rtl8168_hw_reset(dev); | |
+ rtl8168_disable_rxdvgate(dev); | |
+ RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); | |
+ } | |
+ tp->dirty_tx++; | |
+ tp->dirty_rx++; | |
+ tp->cur_tx++; | |
+ tp->cur_rx++; | |
+ pci_unmap_single(tp->pci_dev, le64_to_cpu(mapping), | |
+ len, PCI_DMA_TODEVICE); | |
+ RTL_W32(TxConfig, RTL_R32(TxConfig) & ~0x00060000); | |
+ dev_kfree_skb_any(skb); | |
+ RTL_W16(IntrStatus, 0xFFBF); | |
+} | |
+ | |
+static unsigned int | |
+rtl8168_xmii_reset_pending(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ unsigned int retval; | |
+ unsigned long flags; | |
+ | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ retval = mdio_read(tp, MII_BMCR) & BMCR_RESET; | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ | |
+ return retval; | |
+} | |
+ | |
+static unsigned int | |
+rtl8168_xmii_link_ok(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ unsigned int retval; | |
+ | |
+ retval = (RTL_R8(PHYstatus) & LinkStatus) ? 1 : 0; | |
+ | |
+ return retval; | |
+} | |
+ | |
+static void | |
+rtl8168_xmii_reset_enable(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ int i, val = 0; | |
+ unsigned long flags; | |
+ | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, MII_ADVERTISE, mdio_read(tp, MII_ADVERTISE) & | |
+ ~(ADVERTISE_10HALF | ADVERTISE_10FULL | | |
+ ADVERTISE_100HALF | ADVERTISE_100FULL)); | |
+ mdio_write(tp, MII_CTRL1000, mdio_read(tp, MII_CTRL1000) & | |
+ ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL)); | |
+ mdio_write(tp, MII_BMCR, BMCR_RESET | BMCR_ANENABLE); | |
+ | |
+ for (i = 0; i < 2500; i++) { | |
+ val = mdio_read(tp, MII_BMCR) & BMCR_RESET; | |
+ | |
+ if (!val) { | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ return; | |
+ } | |
+ | |
+ mdelay(1); | |
+ } | |
+ | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ | |
+ if (netif_msg_link(tp)) | |
+ printk(KERN_ERR "%s: PHY reset failed.\n", dev->name); | |
+} | |
+ | |
+static void | |
+rtl8168dp_10mbps_gphy_para(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ u8 status = RTL_R8(PHYstatus); | |
+ unsigned long flags; | |
+ | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ if ((status & LinkStatus) && (status & _10bps)) { | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x10, 0x04EE); | |
+ } else { | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x10, 0x01EE); | |
+ } | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+} | |
+ | |
+void rtl8168_init_ring_indexes(struct rtl8168_private *tp) | |
+{ | |
+ tp->dirty_tx = 0; | |
+ tp->dirty_rx = 0; | |
+ tp->cur_tx = 0; | |
+ tp->cur_rx = 0; | |
+} | |
+ | |
+static void | |
+rtl8168_issue_offset_99_event(struct rtl8168_private *tp) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ u32 csi_tmp; | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_22: | |
+ case CFG_METHOD_23: | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ if (tp->mcfg == CFG_METHOD_24 || tp->mcfg == CFG_METHOD_25 || | |
+ tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28) { | |
+ rtl8168_eri_write(ioaddr, 0x3FC, 4, 0x00000000, ERIAR_ExGMAC); | |
+ } else { | |
+ rtl8168_eri_write(ioaddr, 0x3FC, 4, 0x083C083C, ERIAR_ExGMAC); | |
+ } | |
+ csi_tmp = rtl8168_eri_read(ioaddr, 0x3F8, 1, ERIAR_ExGMAC); | |
+ csi_tmp |= BIT_0; | |
+ rtl8168_eri_write(ioaddr, 0x3F8, 1, csi_tmp, ERIAR_ExGMAC); | |
+ break; | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ csi_tmp = rtl8168_eri_read(ioaddr, 0x1EA, 1, ERIAR_ExGMAC); | |
+ csi_tmp |= BIT_0; | |
+ rtl8168_eri_write(ioaddr, 0x1EA, 1, csi_tmp, ERIAR_ExGMAC); | |
+ break; | |
+ } | |
+} | |
+ | |
+#ifdef ENABLE_DASH_SUPPORT | |
+static void | |
+NICChkTypeEnableDashInterrupt(struct rtl8168_private *tp) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ | |
+ if (tp->DASH) { | |
+ // | |
+ // even disconnected, enable 3 dash interrupt mask bits for in-band/out-band communication | |
+ // | |
+ if( HW_DASH_SUPPORT_TYPE_2( tp ) ) { | |
+ rtl8168_enable_dash2_interrupt(tp, ioaddr); | |
+ RTL_W16(IntrMask, (ISRIMR_DASH_INTR_EN | ISRIMR_DASH_INTR_CMAC_RESET)); | |
+ } else { | |
+ RTL_W16(IntrMask, (ISRIMR_DP_DASH_OK | ISRIMR_DP_HOST_OK | ISRIMR_DP_REQSYS_OK)); | |
+ } | |
+ } | |
+} | |
+#endif | |
+ | |
+static void | |
+rtl8168_check_link_status(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ int link_status_on; | |
+ unsigned long flags; | |
+ | |
+ link_status_on = tp->link_ok(dev); | |
+ | |
+ if (tp->mcfg == CFG_METHOD_11) | |
+ rtl8168dp_10mbps_gphy_para(dev); | |
+ | |
+ if (netif_carrier_ok(dev) != link_status_on) { | |
+ if (link_status_on) { | |
+ if (tp->mcfg == CFG_METHOD_18 || tp->mcfg == CFG_METHOD_19 || tp->mcfg == CFG_METHOD_20) { | |
+ if (RTL_R8(PHYstatus) & _1000bpsF) { | |
+ rtl8168_eri_write(ioaddr, 0x1bc, 4, 0x00000011, ERIAR_ExGMAC); | |
+ rtl8168_eri_write(ioaddr, 0x1dc, 4, 0x0000001f, ERIAR_ExGMAC); | |
+ } else if (RTL_R8(PHYstatus) & _100bps) { | |
+ rtl8168_eri_write(ioaddr, 0x1bc, 4, 0x0000001f, ERIAR_ExGMAC); | |
+ rtl8168_eri_write(ioaddr, 0x1dc, 4, 0x0000001f, ERIAR_ExGMAC); | |
+ } else { | |
+ rtl8168_eri_write(ioaddr, 0x1bc, 4, 0x0000001f, ERIAR_ExGMAC); | |
+ rtl8168_eri_write(ioaddr, 0x1dc, 4, 0x0000002d, ERIAR_ExGMAC); | |
+ } | |
+ } else if ((tp->mcfg == CFG_METHOD_16 || tp->mcfg == CFG_METHOD_17) && netif_running(dev)) { | |
+ if (tp->mcfg == CFG_METHOD_16 && (RTL_R8(PHYstatus) & _10bps)) { | |
+ RTL_W32(RxConfig, RTL_R32(RxConfig) | AcceptAllPhys); | |
+ } else if (tp->mcfg == CFG_METHOD_17) { | |
+ if (RTL_R8(PHYstatus) & _1000bpsF) { | |
+ rtl8168_eri_write(ioaddr, 0x1bc, 4, 0x00000011, ERIAR_ExGMAC); | |
+ rtl8168_eri_write(ioaddr, 0x1dc, 4, 0x00000005, ERIAR_ExGMAC); | |
+ } else if (RTL_R8(PHYstatus) & _100bps) { | |
+ rtl8168_eri_write(ioaddr, 0x1bc, 4, 0x0000001f, ERIAR_ExGMAC); | |
+ rtl8168_eri_write(ioaddr, 0x1dc, 4, 0x00000005, ERIAR_ExGMAC); | |
+ } else { | |
+ rtl8168_eri_write(ioaddr, 0x1bc, 4, 0x0000001f, ERIAR_ExGMAC); | |
+ rtl8168_eri_write(ioaddr, 0x1dc, 4, 0x0000003f, ERIAR_ExGMAC); | |
+ } | |
+ } | |
+ } else if ((tp->mcfg == CFG_METHOD_14 || tp->mcfg == CFG_METHOD_15) && eee_enable ==1) { | |
+ /*Full -Duplex mode*/ | |
+ if (RTL_R8(PHYstatus)&FullDup) { | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1F, 0x0006); | |
+ mdio_write(tp, 0x00, 0x5a30); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ if (RTL_R8(PHYstatus) & (_10bps | _100bps)) | |
+ RTL_W32(TxConfig, (RTL_R32(TxConfig) & ~BIT_19) | BIT_25); | |
+ | |
+ } else { | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1F, 0x0006); | |
+ mdio_write(tp, 0x00, 0x5a00); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ if (RTL_R8(PHYstatus) & (_10bps | _100bps)) | |
+ RTL_W32(TxConfig, (RTL_R32(TxConfig) & ~BIT_19) | (InterFrameGap << TxInterFrameGapShift)); | |
+ } | |
+ } else if ((tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 || | |
+ tp->mcfg == CFG_METHOD_23 || tp->mcfg == CFG_METHOD_24 || | |
+ tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 || | |
+ tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 || | |
+ tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30) && | |
+ netif_running(dev)) { | |
+ if (RTL_R8(PHYstatus)&FullDup) | |
+ RTL_W32(TxConfig, (RTL_R32(TxConfig) | (BIT_24 | BIT_25)) & ~BIT_19); | |
+ else | |
+ RTL_W32(TxConfig, (RTL_R32(TxConfig) | BIT_25) & ~(BIT_19 | BIT_24)); | |
+ } | |
+ | |
+ if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 || | |
+ tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28) { | |
+ /*half mode*/ | |
+ if (!(RTL_R8(PHYstatus)&FullDup)) { | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ mdio_write(tp, MII_ADVERTISE, mdio_read(tp, MII_ADVERTISE)&~(ADVERTISE_PAUSE_CAP|ADVERTISE_PAUSE_ASYM)); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ } | |
+ } | |
+ | |
+ rtl8168_hw_start(dev); | |
+ | |
+ netif_carrier_on(dev); | |
+ | |
+ netif_wake_queue(dev); | |
+ | |
+ if (netif_msg_ifup(tp)) | |
+ printk(KERN_INFO PFX "%s: link up\n", dev->name); | |
+ } else { | |
+ if (netif_msg_ifdown(tp)) | |
+ printk(KERN_INFO PFX "%s: link down\n", dev->name); | |
+ | |
+ netif_stop_queue(dev); | |
+ | |
+ netif_carrier_off(dev); | |
+ | |
+ rtl8168_hw_reset(dev); | |
+ | |
+ rtl8168_tx_clear(tp); | |
+ | |
+ rtl8168_rx_clear(tp); | |
+ | |
+ rtl8168_init_ring(dev); | |
+ | |
+ rtl8168_set_speed(dev, tp->autoneg, tp->speed, tp->duplex); | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_22: | |
+ case CFG_METHOD_23: | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ if (tp->org_pci_offset_99 & BIT_2) | |
+ tp->issue_offset_99_event = TRUE; | |
+ break; | |
+ } | |
+ | |
+#ifdef ENABLE_DASH_SUPPORT | |
+ if (tp->DASH) { | |
+ NICChkTypeEnableDashInterrupt(tp); | |
+ } | |
+#endif | |
+ } | |
+ } | |
+ | |
+ if (!link_status_on) { | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_22: | |
+ case CFG_METHOD_23: | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ if (tp->issue_offset_99_event) { | |
+ if (!(RTL_R8(PHYstatus) & PowerSaveStatus)) { | |
+ tp->issue_offset_99_event = FALSE; | |
+ rtl8168_issue_offset_99_event(tp); | |
+ } | |
+ } | |
+ break; | |
+ } | |
+ } | |
+} | |
+ | |
+static void | |
+rtl8168_link_option(u8 *aut, | |
+ u16 *spd, | |
+ u8 *dup) | |
+{ | |
+ if ((*spd != SPEED_1000) && (*spd != SPEED_100) && (*spd != SPEED_10)) | |
+ *spd = SPEED_1000; | |
+ | |
+ if ((*dup != DUPLEX_FULL) && (*dup != DUPLEX_HALF)) | |
+ *dup = DUPLEX_FULL; | |
+ | |
+ if ((*aut != AUTONEG_ENABLE) && (*aut != AUTONEG_DISABLE)) | |
+ *aut = AUTONEG_ENABLE; | |
+} | |
+ | |
+void | |
+rtl8168_wait_ll_share_fifo_ready(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ int i; | |
+ | |
+ for (i = 0; i < 10; i++) { | |
+ udelay(100); | |
+ if (RTL_R16(0xD2) & BIT_9) | |
+ break; | |
+ } | |
+} | |
+ | |
+static void | |
+rtl8168_disable_pci_offset_99(struct rtl8168_private *tp) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ u32 csi_tmp; | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_22: | |
+ case CFG_METHOD_23: | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ csi_tmp = rtl8168_eri_read(ioaddr, 0x3F2, 2, ERIAR_ExGMAC); | |
+ csi_tmp &= ~(BIT_0 | BIT_1); | |
+ rtl8168_eri_write(ioaddr, 0x3F2, 2, csi_tmp, ERIAR_ExGMAC); | |
+ break; | |
+ } | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_22: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ rtl8168_csi_fun0_write_byte(tp, 0x99, 0x00); | |
+ break; | |
+ } | |
+} | |
+ | |
+static void | |
+rtl8168_enable_pci_offset_99(struct rtl8168_private *tp) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ u32 csi_tmp; | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_22: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ rtl8168_csi_fun0_write_byte(tp, 0x99, tp->org_pci_offset_99); | |
+ break; | |
+ } | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_22: | |
+ case CFG_METHOD_23: | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ csi_tmp = rtl8168_eri_read(ioaddr, 0x3F2, 2, ERIAR_ExGMAC); | |
+ csi_tmp &= ~(BIT_0 | BIT_1); | |
+ if (!(tp->org_pci_offset_99 & (BIT_5 | BIT_6))) | |
+ csi_tmp |= BIT_1; | |
+ if (!(tp->org_pci_offset_99 & BIT_2)) | |
+ csi_tmp |= BIT_0; | |
+ rtl8168_eri_write(ioaddr, 0x3F2, 2, csi_tmp, ERIAR_ExGMAC); | |
+ break; | |
+ } | |
+} | |
+ | |
+static void | |
+rtl8168_init_pci_offset_99(struct rtl8168_private *tp) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ u32 csi_tmp; | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_26: | |
+ if (tp->org_pci_offset_99 & BIT_2) { | |
+ csi_tmp = rtl8168_eri_read(ioaddr, 0x5C2, 1, ERIAR_ExGMAC); | |
+ csi_tmp &= ~BIT_1; | |
+ rtl8168_eri_write(ioaddr, 0x5C2, 1, csi_tmp, ERIAR_ExGMAC); | |
+ } | |
+ break; | |
+ } | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_22: | |
+ case CFG_METHOD_23: | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ csi_tmp = rtl8168_eri_read(ioaddr, 0x3F2, 2, ERIAR_ExGMAC); | |
+ csi_tmp &= ~( BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12 | BIT_13 | BIT_14 | BIT_15 ); | |
+ csi_tmp |= ( BIT_9 | BIT_10 | BIT_13 | BIT_14 | BIT_15 ); | |
+ rtl8168_eri_write(ioaddr, 0x3F2, 2, csi_tmp, ERIAR_ExGMAC); | |
+ csi_tmp = rtl8168_eri_read(ioaddr, 0x3F5, 1, ERIAR_ExGMAC); | |
+ csi_tmp |= BIT_6 | BIT_7; | |
+ rtl8168_eri_write(ioaddr, 0x3F5, 1, csi_tmp, ERIAR_ExGMAC); | |
+ mac_ocp_write(tp, 0xE02C, 0x1880); | |
+ mac_ocp_write(tp, 0xE02E, 0x4880); | |
+ break; | |
+ } | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_26: | |
+ rtl8168_eri_write(ioaddr, 0x5C0, 1, 0xFA, ERIAR_ExGMAC); | |
+ break; | |
+ } | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ if (tp->org_pci_offset_99 & BIT_2) { | |
+ csi_tmp = rtl8168_eri_read(ioaddr, 0x5C8, 1, ERIAR_ExGMAC); | |
+ csi_tmp |= BIT_0; | |
+ rtl8168_eri_write(ioaddr, 0x5C8, 1, csi_tmp, ERIAR_ExGMAC); | |
+ } | |
+ break; | |
+ } | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_23: | |
+ rtl8168_eri_write(ioaddr, 0x2E8, 2, 0x883C, ERIAR_ExGMAC); | |
+ rtl8168_eri_write(ioaddr, 0x2EA, 2, 0x8C12, ERIAR_ExGMAC); | |
+ rtl8168_eri_write(ioaddr, 0x2EC, 2, 0x9003, ERIAR_ExGMAC); | |
+ rtl8168_eri_write(ioaddr, 0x2E2, 2, 0x883C, ERIAR_ExGMAC); | |
+ rtl8168_eri_write(ioaddr, 0x2E4, 2, 0x8C12, ERIAR_ExGMAC); | |
+ rtl8168_eri_write(ioaddr, 0x2E6, 2, 0x9003, ERIAR_ExGMAC); | |
+ break; | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_22: | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ rtl8168_eri_write(ioaddr, 0x2E8, 2, 0x9003, ERIAR_ExGMAC); | |
+ rtl8168_eri_write(ioaddr, 0x2EA, 2, 0x9003, ERIAR_ExGMAC); | |
+ rtl8168_eri_write(ioaddr, 0x2EC, 2, 0x9003, ERIAR_ExGMAC); | |
+ rtl8168_eri_write(ioaddr, 0x2E2, 2, 0x883C, ERIAR_ExGMAC); | |
+ rtl8168_eri_write(ioaddr, 0x2E4, 2, 0x8C12, ERIAR_ExGMAC); | |
+ rtl8168_eri_write(ioaddr, 0x2E6, 2, 0x9003, ERIAR_ExGMAC); | |
+ break; | |
+ } | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_22: | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ csi_tmp = rtl8168_eri_read(ioaddr, 0x3FA, 2, ERIAR_ExGMAC); | |
+ csi_tmp |= BIT_14; | |
+ rtl8168_eri_write(ioaddr, 0x3FA, 2, csi_tmp, ERIAR_ExGMAC); | |
+ break; | |
+ } | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ if (tp->org_pci_offset_99 & BIT_2) | |
+ RTL_W8(0xB6, RTL_R8(0xB6) | BIT_0); | |
+ break; | |
+ } | |
+ | |
+ rtl8168_enable_pci_offset_99(tp); | |
+} | |
+ | |
+static void | |
+rtl8168_disable_pci_offset_180(struct rtl8168_private *tp) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ u32 csi_tmp; | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ csi_tmp = rtl8168_eri_read(ioaddr, 0x1E2, 1, ERIAR_ExGMAC); | |
+ csi_tmp &= ~BIT_2; | |
+ rtl8168_eri_write(ioaddr, 0x1E2, 1, csi_tmp, ERIAR_ExGMAC); | |
+ break; | |
+ } | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_26: | |
+ rtl8168_eri_write(ioaddr, 0x1E9, 1, 0x0A, ERIAR_ExGMAC); | |
+ break; | |
+ } | |
+} | |
+ | |
+static void | |
+rtl8168_enable_pci_offset_180(struct rtl8168_private *tp) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ u32 csi_tmp; | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_28: | |
+ csi_tmp = rtl8168_eri_read(ioaddr, 0x1E8, 4, ERIAR_ExGMAC); | |
+ csi_tmp &= ~(0x0000FF00); | |
+ csi_tmp |= (0x00006400); | |
+ rtl8168_eri_write(ioaddr, 0x1E8, 4, csi_tmp, ERIAR_ExGMAC); | |
+ | |
+ csi_tmp = rtl8168_eri_read(ioaddr, 0x1E4, 4, ERIAR_ExGMAC); | |
+ csi_tmp &= ~(0x0000FF00); | |
+ rtl8168_eri_write(ioaddr, 0x1E4, 4, csi_tmp, ERIAR_ExGMAC); | |
+ break; | |
+ } | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ csi_tmp = rtl8168_eri_read(ioaddr, 0x1E2, 1, ERIAR_ExGMAC); | |
+ csi_tmp |= BIT_2; | |
+ rtl8168_eri_write(ioaddr, 0x1E2, 1, csi_tmp, ERIAR_ExGMAC); | |
+ break; | |
+ } | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_26: | |
+ rtl8168_eri_write(ioaddr, 0x1E9, 1, 0x64, ERIAR_ExGMAC); | |
+ break; | |
+ } | |
+ | |
+ mac_ocp_write(tp, 0xE094, 0x0000); | |
+} | |
+ | |
+static void | |
+rtl8168_init_pci_offset_180(struct rtl8168_private *tp) | |
+{ | |
+ if (tp->org_pci_offset_180 & (BIT_0|BIT_1)) | |
+ rtl8168_enable_pci_offset_180(tp); | |
+ else | |
+ rtl8168_disable_pci_offset_180(tp); | |
+} | |
+ | |
+static void | |
+rtl8168_set_pci_99_180_exit_driver_para(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_22: | |
+ case CFG_METHOD_23: | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ rtl8168_issue_offset_99_event(tp); | |
+ break; | |
+ } | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_22: | |
+ case CFG_METHOD_23: | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ rtl8168_disable_pci_offset_99(tp); | |
+ break; | |
+ } | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ rtl8168_disable_pci_offset_180(tp); | |
+ break; | |
+ } | |
+} | |
+ | |
+static void | |
+rtl8168_enable_cfg9346_write(struct rtl8168_private *tp) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ | |
+ RTL_W8(Cfg9346, RTL_R8(Cfg9346) | Cfg9346_Unlock); | |
+} | |
+ | |
+static void | |
+rtl8168_disable_cfg9346_write(struct rtl8168_private *tp) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ | |
+ RTL_W8(Cfg9346, RTL_R8(Cfg9346) & ~Cfg9346_Unlock); | |
+} | |
+ | |
+static void | |
+rtl8168_hw_d3_para(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ unsigned long flags; | |
+ | |
+ RTL_W16(RxMaxSize, RX_BUF_SIZE); | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_14: | |
+ case CFG_METHOD_15: | |
+ case CFG_METHOD_16: | |
+ case CFG_METHOD_17: | |
+ case CFG_METHOD_18: | |
+ case CFG_METHOD_19: | |
+ case CFG_METHOD_20: | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_22: | |
+ case CFG_METHOD_23: | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ RTL_W8(0xF1, RTL_R8(0xF1) & ~BIT_7); | |
+ rtl8168_enable_cfg9346_write(tp); | |
+ RTL_W8(Config2, RTL_R8(Config2) & ~BIT_7); | |
+ RTL_W8(Config5, RTL_R8(Config5) & ~BIT_0); | |
+ rtl8168_disable_cfg9346_write(tp); | |
+ break; | |
+ } | |
+ | |
+ if (tp->mcfg == CFG_METHOD_18 || tp->mcfg == CFG_METHOD_19 || tp->mcfg == CFG_METHOD_20) { | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ rtl8168_eri_write(ioaddr, 0x1bc, 4, 0x0000001f, ERIAR_ExGMAC); | |
+ rtl8168_eri_write(ioaddr, 0x1dc, 4, 0x0000002d, ERIAR_ExGMAC); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ } else if (tp->mcfg == CFG_METHOD_16) { | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ rtl8168_eri_write(ioaddr, 0x1bc, 4, 0x0000001f, ERIAR_ExGMAC); | |
+ rtl8168_eri_write(ioaddr, 0x1dc, 4, 0x0000003f, ERIAR_ExGMAC); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ } | |
+ | |
+ if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 || | |
+ tp->mcfg == CFG_METHOD_23 || tp->mcfg == CFG_METHOD_24 || | |
+ tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 || | |
+ tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28) { | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ rtl8168_eri_write(ioaddr, 0x2F8, 2, 0x0064, ERIAR_ExGMAC); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ } | |
+ | |
+ if (tp->bios_setting & BIT_28) { | |
+ if (tp->mcfg == CFG_METHOD_18 || tp->mcfg == CFG_METHOD_19 || | |
+ tp->mcfg == CFG_METHOD_20) { | |
+ u32 gphy_val; | |
+ | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ mdio_write(tp, 0x04, 0x0061); | |
+ mdio_write(tp, 0x09, 0x0000); | |
+ mdio_write(tp, 0x00, 0x9200); | |
+ mdio_write(tp, 0x1F, 0x0005); | |
+ mdio_write(tp, 0x05, 0x8B80); | |
+ gphy_val = mdio_read(tp, 0x06); | |
+ gphy_val &= ~BIT_7; | |
+ mdio_write(tp, 0x06, gphy_val); | |
+ mdelay(1); | |
+ mdio_write(tp, 0x1F, 0x0007); | |
+ mdio_write(tp, 0x1E, 0x002C); | |
+ gphy_val = mdio_read(tp, 0x16); | |
+ gphy_val &= ~BIT_10; | |
+ mdio_write(tp, 0x16, gphy_val); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ } | |
+ } | |
+ | |
+ rtl8168_set_pci_99_180_exit_driver_para(dev); | |
+ | |
+ /*disable ocp phy power saving*/ | |
+ if (tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 || | |
+ tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 || | |
+ tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30) { | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write_phy_ocp(tp, 0x0C41, 0x13, 0x0000); | |
+ mdio_write_phy_ocp(tp, 0x0C41, 0x13, 0x0500); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ } | |
+ | |
+ rtl8168_disable_rxdvgate(dev); | |
+} | |
+ | |
+static void | |
+rtl8168_enable_magic_packet(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ u32 csi_tmp; | |
+ | |
+ switch (tp->HwSuppMagicPktVer) { | |
+ case WAKEUP_MAGIC_PACKET_V1: | |
+ rtl8168_enable_cfg9346_write(tp); | |
+ RTL_W8(Config3, RTL_R8(Config3) | MagicPacket); | |
+ rtl8168_disable_cfg9346_write(tp); | |
+ break; | |
+ case WAKEUP_MAGIC_PACKET_V2: | |
+ csi_tmp = rtl8168_eri_read(ioaddr, 0xDE, 1, ERIAR_ExGMAC); | |
+ csi_tmp |= BIT_0; | |
+ rtl8168_eri_write(ioaddr, 0xDE, 1, csi_tmp, ERIAR_ExGMAC); | |
+ break; | |
+ } | |
+} | |
+static void | |
+rtl8168_disable_magic_packet(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ u32 csi_tmp; | |
+ | |
+ switch (tp->HwSuppMagicPktVer) { | |
+ case WAKEUP_MAGIC_PACKET_V1: | |
+ rtl8168_enable_cfg9346_write(tp); | |
+ RTL_W8(Config3, RTL_R8(Config3) & ~MagicPacket); | |
+ rtl8168_disable_cfg9346_write(tp); | |
+ break; | |
+ case WAKEUP_MAGIC_PACKET_V2: | |
+ csi_tmp = rtl8168_eri_read(ioaddr, 0xDE, 1, ERIAR_ExGMAC); | |
+ csi_tmp &= ~BIT_0; | |
+ rtl8168_eri_write(ioaddr, 0xDE, 1, csi_tmp, ERIAR_ExGMAC); | |
+ break; | |
+ } | |
+} | |
+ | |
+#define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST) | |
+ | |
+static void | |
+rtl8168_get_hw_wol(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ u8 options; | |
+ u32 csi_tmp; | |
+ unsigned long flags; | |
+ | |
+ | |
+ spin_lock_irqsave(&tp->lock, flags); | |
+ | |
+ tp->wol_opts = 0; | |
+ options = RTL_R8(Config1); | |
+ if (!(options & PMEnable)) | |
+ goto out_unlock; | |
+ | |
+ options = RTL_R8(Config3); | |
+ if (options & LinkUp) | |
+ tp->wol_opts |= WAKE_PHY; | |
+ | |
+ switch (tp->HwSuppMagicPktVer) { | |
+ case WAKEUP_MAGIC_PACKET_V2: | |
+ csi_tmp = rtl8168_eri_read(ioaddr, 0xDE, 1, ERIAR_ExGMAC); | |
+ if (csi_tmp & BIT_0) | |
+ tp->wol_opts |= WAKE_MAGIC; | |
+ break; | |
+ default: | |
+ if (options & MagicPacket) | |
+ tp->wol_opts |= WAKE_MAGIC; | |
+ break; | |
+ } | |
+ | |
+ options = RTL_R8(Config5); | |
+ if (options & UWF) | |
+ tp->wol_opts |= WAKE_UCAST; | |
+ if (options & BWF) | |
+ tp->wol_opts |= WAKE_BCAST; | |
+ if (options & MWF) | |
+ tp->wol_opts |= WAKE_MCAST; | |
+ | |
+out_unlock: | |
+ tp->wol_enabled = (tp->wol_opts) ? WOL_ENABLED : WOL_DISABLED; | |
+ | |
+ spin_unlock_irqrestore(&tp->lock, flags); | |
+} | |
+ | |
+static void | |
+rtl8168_set_hw_wol(struct net_device *dev, u32 wolopts) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ int i,tmp; | |
+ static struct { | |
+ u32 opt; | |
+ u16 reg; | |
+ u8 mask; | |
+ } cfg[] = { | |
+ { WAKE_PHY, Config3, LinkUp }, | |
+ { WAKE_UCAST, Config5, UWF }, | |
+ { WAKE_BCAST, Config5, BWF }, | |
+ { WAKE_MCAST, Config5, MWF }, | |
+ { WAKE_ANY, Config5, LanWake }, | |
+ { WAKE_MAGIC, Config3, MagicPacket }, | |
+ }; | |
+ | |
+ rtl8168_enable_cfg9346_write(tp); | |
+ | |
+ switch (tp->HwSuppMagicPktVer) { | |
+ case WAKEUP_MAGIC_PACKET_V2: | |
+ tmp = ARRAY_SIZE(cfg) - 1; | |
+ | |
+ if (wolopts & WAKE_MAGIC) | |
+ rtl8168_enable_magic_packet(dev); | |
+ else | |
+ rtl8168_disable_magic_packet(dev); | |
+ break; | |
+ default: | |
+ tmp = ARRAY_SIZE(cfg); | |
+ break; | |
+ } | |
+ | |
+ for (i = 0; i < tmp; i++) { | |
+ u8 options = RTL_R8(cfg[i].reg) & ~cfg[i].mask; | |
+ if (wolopts & cfg[i].opt) | |
+ options |= cfg[i].mask; | |
+ RTL_W8(cfg[i].reg, options); | |
+ } | |
+ | |
+ rtl8168_disable_cfg9346_write(tp); | |
+} | |
+ | |
+static void | |
+rtl8168_powerdown_pll(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ | |
+ if (tp->wol_enabled == WOL_ENABLED || tp->DASH || tp->EnableKCPOffload) { | |
+ int auto_nego; | |
+ int giga_ctrl; | |
+ u16 val; | |
+ unsigned long flags; | |
+ | |
+ rtl8168_set_hw_wol(dev, tp->wol_opts); | |
+ | |
+ if (tp->mcfg == CFG_METHOD_16 || tp->mcfg == CFG_METHOD_17 || | |
+ tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22 || | |
+ tp->mcfg == CFG_METHOD_24 || tp->mcfg == CFG_METHOD_25 || | |
+ tp->mcfg == CFG_METHOD_26 || tp->mcfg == CFG_METHOD_23 || | |
+ tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 || | |
+ tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30) { | |
+ rtl8168_enable_cfg9346_write(tp); | |
+ RTL_W8(Config2, RTL_R8(Config2) | PMSTS_En); | |
+ rtl8168_disable_cfg9346_write(tp); | |
+ } | |
+ | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ auto_nego = mdio_read(tp, MII_ADVERTISE); | |
+ auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL | |
+ | ADVERTISE_100HALF | ADVERTISE_100FULL); | |
+ | |
+ val = mdio_read(tp, MII_LPA); | |
+ | |
+#ifdef CONFIG_DOWN_SPEED_100 | |
+ auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL); | |
+#else | |
+ if (val & (LPA_10HALF | LPA_10FULL)) | |
+ auto_nego |= (ADVERTISE_10HALF | ADVERTISE_10FULL); | |
+ else | |
+ auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL); | |
+#endif | |
+ | |
+ if (tp->DASH) | |
+ auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL); | |
+ | |
+ if (((tp->mcfg == CFG_METHOD_7) || (tp->mcfg == CFG_METHOD_8)) && (RTL_R16(CPlusCmd) & ASF)) | |
+ auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL); | |
+ | |
+ giga_ctrl = mdio_read(tp, MII_CTRL1000) & ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL); | |
+ mdio_write(tp, MII_ADVERTISE, auto_nego); | |
+ mdio_write(tp, MII_CTRL1000, giga_ctrl); | |
+ mdio_write(tp, MII_BMCR, BMCR_RESET | BMCR_ANENABLE | BMCR_ANRESTART); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ | |
+ RTL_W32(RxConfig, RTL_R32(RxConfig) | AcceptBroadcast | AcceptMulticast | AcceptMyPhys); | |
+ | |
+ return; | |
+ } | |
+ | |
+ if (tp->DASH) | |
+ return; | |
+ | |
+ if (((tp->mcfg == CFG_METHOD_7) || (tp->mcfg == CFG_METHOD_8)) && (RTL_R16(CPlusCmd) & ASF)) | |
+ return; | |
+ | |
+ if (tp->HwFiberModeVer != FIBER_MODE_NIC_ONLY) | |
+ return; | |
+ | |
+ rtl8168_phy_power_down(dev); | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_9: | |
+ case CFG_METHOD_10: | |
+ case CFG_METHOD_11: | |
+ case CFG_METHOD_12: | |
+ case CFG_METHOD_13: | |
+ case CFG_METHOD_14: | |
+ case CFG_METHOD_15: | |
+ case CFG_METHOD_17: | |
+ case CFG_METHOD_18: | |
+ case CFG_METHOD_19: | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_22: | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ RTL_W8(PMCH, RTL_R8(PMCH) & ~BIT_7); | |
+ break; | |
+ } | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ RTL_W8(0xD0, RTL_R8(0xD0) & ~BIT_6); | |
+ RTL_W8(0xF2, RTL_R8(0xF2) & ~BIT_6); | |
+ break; | |
+ } | |
+} | |
+ | |
+static void rtl8168_powerup_pll(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_9: | |
+ case CFG_METHOD_10: | |
+ case CFG_METHOD_11: | |
+ case CFG_METHOD_12: | |
+ case CFG_METHOD_13: | |
+ case CFG_METHOD_14: | |
+ case CFG_METHOD_15: | |
+ case CFG_METHOD_17: | |
+ case CFG_METHOD_18: | |
+ case CFG_METHOD_19: | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_22: | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ RTL_W8(PMCH, RTL_R8(PMCH) | BIT_7 | BIT_6); | |
+ break; | |
+ } | |
+ | |
+ rtl8168_phy_power_up(dev); | |
+} | |
+ | |
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22) | |
+static void | |
+rtl8168_get_wol(struct net_device *dev, | |
+ struct ethtool_wolinfo *wol) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ u8 options; | |
+ unsigned long flags; | |
+ | |
+ wol->wolopts = 0; | |
+ | |
+ if (tp->mcfg == CFG_METHOD_DEFAULT) { | |
+ wol->supported = 0; | |
+ return; | |
+ } else { | |
+ wol->supported = WAKE_ANY; | |
+ } | |
+ | |
+ spin_lock_irqsave(&tp->lock, flags); | |
+ | |
+ options = RTL_R8(Config1); | |
+ if (!(options & PMEnable)) | |
+ goto out_unlock; | |
+ | |
+ wol->wolopts = tp->wol_opts; | |
+ | |
+out_unlock: | |
+ spin_unlock_irqrestore(&tp->lock, flags); | |
+} | |
+ | |
+static int | |
+rtl8168_set_wol(struct net_device *dev, | |
+ struct ethtool_wolinfo *wol) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ unsigned long flags; | |
+ | |
+ if (tp->mcfg == CFG_METHOD_DEFAULT) | |
+ return -EOPNOTSUPP; | |
+ | |
+ spin_lock_irqsave(&tp->lock, flags); | |
+ | |
+ tp->wol_opts = wol->wolopts; | |
+ | |
+ tp->wol_enabled = (tp->wol_opts) ? WOL_ENABLED : WOL_DISABLED; | |
+ | |
+ spin_unlock_irqrestore(&tp->lock, flags); | |
+ | |
+ return 0; | |
+} | |
+ | |
+static void | |
+rtl8168_get_drvinfo(struct net_device *dev, | |
+ struct ethtool_drvinfo *info) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ | |
+ strcpy(info->driver, MODULENAME); | |
+ strcpy(info->version, RTL8168_VERSION); | |
+ strcpy(info->bus_info, pci_name(tp->pci_dev)); | |
+ info->regdump_len = R8168_REGS_DUMP_SIZE; | |
+ info->eedump_len = tp->eeprom_len; | |
+} | |
+ | |
+static int | |
+rtl8168_get_regs_len(struct net_device *dev) | |
+{ | |
+ return R8168_REGS_DUMP_SIZE; | |
+} | |
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22) | |
+ | |
+static int | |
+rtl8168_set_speed_xmii(struct net_device *dev, | |
+ u8 autoneg, | |
+ u16 speed, | |
+ u8 duplex) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ int auto_nego = 0; | |
+ int giga_ctrl = 0; | |
+ int bmcr_true_force = 0; | |
+ unsigned long flags; | |
+ | |
+ if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30) { | |
+ //Disable Giga Lite | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1F, 0x0A42); | |
+ ClearEthPhyBit(tp, 0x14, BIT_9); | |
+ mdio_write(tp, 0x1F, 0x0A40); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ } | |
+ | |
+ if ((speed != SPEED_1000) && | |
+ (speed != SPEED_100) && | |
+ (speed != SPEED_10)) { | |
+ speed = SPEED_1000; | |
+ duplex = DUPLEX_FULL; | |
+ } | |
+ | |
+ auto_nego = mdio_read(tp, MII_ADVERTISE); | |
+ auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL | ADVERTISE_100HALF | ADVERTISE_100FULL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); | |
+ | |
+ giga_ctrl = mdio_read(tp, MII_CTRL1000); | |
+ giga_ctrl &= ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL); | |
+ | |
+ if ((autoneg == AUTONEG_ENABLE) || (speed == SPEED_1000)) { | |
+ /*n-way force*/ | |
+ if ((speed == SPEED_10) && (duplex == DUPLEX_HALF)) { | |
+ auto_nego |= ADVERTISE_10HALF; | |
+ } else if ((speed == SPEED_10) && (duplex == DUPLEX_FULL)) { | |
+ auto_nego |= ADVERTISE_10HALF | | |
+ ADVERTISE_10FULL; | |
+ } else if ((speed == SPEED_100) && (duplex == DUPLEX_HALF)) { | |
+ auto_nego |= ADVERTISE_100HALF | | |
+ ADVERTISE_10HALF | | |
+ ADVERTISE_10FULL; | |
+ } else if ((speed == SPEED_100) && (duplex == DUPLEX_FULL)) { | |
+ auto_nego |= ADVERTISE_100HALF | | |
+ ADVERTISE_100FULL | | |
+ ADVERTISE_10HALF | | |
+ ADVERTISE_10FULL; | |
+ } else if (speed == SPEED_1000) { | |
+ giga_ctrl |= ADVERTISE_1000HALF | | |
+ ADVERTISE_1000FULL; | |
+ | |
+ auto_nego |= ADVERTISE_100HALF | | |
+ ADVERTISE_100FULL | | |
+ ADVERTISE_10HALF | | |
+ ADVERTISE_10FULL; | |
+ } | |
+ | |
+ //flow control | |
+ if (dev->mtu <= ETH_DATA_LEN) | |
+ auto_nego |= ADVERTISE_PAUSE_CAP|ADVERTISE_PAUSE_ASYM; | |
+ | |
+ tp->phy_auto_nego_reg = auto_nego; | |
+ tp->phy_1000_ctrl_reg = giga_ctrl; | |
+ | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, MII_ADVERTISE, auto_nego); | |
+ mdio_write(tp, MII_CTRL1000, giga_ctrl); | |
+ mdio_write(tp, MII_BMCR, BMCR_RESET | BMCR_ANENABLE | BMCR_ANRESTART); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ mdelay(20); | |
+ } else { | |
+ /*true force*/ | |
+#ifndef BMCR_SPEED100 | |
+#define BMCR_SPEED100 0x0040 | |
+#endif | |
+ | |
+#ifndef BMCR_SPEED10 | |
+#define BMCR_SPEED10 0x0000 | |
+#endif | |
+ if ((speed == SPEED_10) && (duplex == DUPLEX_HALF)) { | |
+ bmcr_true_force = BMCR_SPEED10; | |
+ } else if ((speed == SPEED_10) && (duplex == DUPLEX_FULL)) { | |
+ bmcr_true_force = BMCR_SPEED10 | BMCR_FULLDPLX; | |
+ } else if ((speed == SPEED_100) && (duplex == DUPLEX_HALF)) { | |
+ bmcr_true_force = BMCR_SPEED100; | |
+ } else if ((speed == SPEED_100) && (duplex == DUPLEX_FULL)) { | |
+ bmcr_true_force = BMCR_SPEED100 | BMCR_FULLDPLX; | |
+ } | |
+ | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, MII_BMCR, bmcr_true_force); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ } | |
+ | |
+ tp->autoneg = autoneg; | |
+ tp->speed = speed; | |
+ tp->duplex = duplex; | |
+ | |
+ if (tp->mcfg == CFG_METHOD_11) | |
+ rtl8168dp_10mbps_gphy_para(dev); | |
+ | |
+ return 0; | |
+} | |
+ | |
+static int | |
+rtl8168_set_speed(struct net_device *dev, | |
+ u8 autoneg, | |
+ u16 speed, | |
+ u8 duplex) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ int ret; | |
+ | |
+ ret = tp->set_speed(dev, autoneg, speed, duplex); | |
+ | |
+ return ret; | |
+} | |
+ | |
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22) | |
+static int | |
+rtl8168_set_settings(struct net_device *dev, | |
+ struct ethtool_cmd *cmd) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ int ret; | |
+ unsigned long flags; | |
+ | |
+ spin_lock_irqsave(&tp->lock, flags); | |
+ ret = rtl8168_set_speed(dev, cmd->autoneg, cmd->speed, cmd->duplex); | |
+ spin_unlock_irqrestore(&tp->lock, flags); | |
+ | |
+ return ret; | |
+} | |
+ | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0) | |
+static u32 | |
+rtl8168_get_tx_csum(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ u32 ret; | |
+ unsigned long flags; | |
+ | |
+ spin_lock_irqsave(&tp->lock, flags); | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0) | |
+ ret = ((dev->features & NETIF_F_IP_CSUM) != 0); | |
+#else | |
+ ret = ((dev->features & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)) != 0); | |
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0) | |
+ spin_unlock_irqrestore(&tp->lock, flags); | |
+ | |
+ return ret; | |
+} | |
+ | |
+static u32 | |
+rtl8168_get_rx_csum(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ u32 ret; | |
+ unsigned long flags; | |
+ | |
+ spin_lock_irqsave(&tp->lock, flags); | |
+ ret = tp->cp_cmd & RxChkSum; | |
+ spin_unlock_irqrestore(&tp->lock, flags); | |
+ | |
+ return ret; | |
+} | |
+ | |
+static int | |
+rtl8168_set_tx_csum(struct net_device *dev, | |
+ u32 data) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ unsigned long flags; | |
+ | |
+ if (tp->mcfg == CFG_METHOD_DEFAULT) | |
+ return -EOPNOTSUPP; | |
+ | |
+ spin_lock_irqsave(&tp->lock, flags); | |
+ | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0) | |
+ if (data) | |
+ dev->features |= NETIF_F_IP_CSUM; | |
+ else | |
+ dev->features &= ~NETIF_F_IP_CSUM; | |
+#else | |
+ if (data) | |
+ if ((tp->mcfg == CFG_METHOD_1) || (tp->mcfg == CFG_METHOD_2) || (tp->mcfg == CFG_METHOD_3)) | |
+ dev->features |= NETIF_F_IP_CSUM; | |
+ else | |
+ dev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM); | |
+ else | |
+ dev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM); | |
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0) | |
+ | |
+ spin_unlock_irqrestore(&tp->lock, flags); | |
+ | |
+ return 0; | |
+} | |
+ | |
+static int | |
+rtl8168_set_rx_csum(struct net_device *dev, | |
+ u32 data) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ unsigned long flags; | |
+ | |
+ if (tp->mcfg == CFG_METHOD_DEFAULT) | |
+ return -EOPNOTSUPP; | |
+ | |
+ spin_lock_irqsave(&tp->lock, flags); | |
+ | |
+ if (data) | |
+ tp->cp_cmd |= RxChkSum; | |
+ else | |
+ tp->cp_cmd &= ~RxChkSum; | |
+ | |
+ RTL_W16(CPlusCmd, tp->cp_cmd); | |
+ | |
+ spin_unlock_irqrestore(&tp->lock, flags); | |
+ | |
+ return 0; | |
+} | |
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0) | |
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22) | |
+ | |
+#ifdef CONFIG_R8168_VLAN | |
+ | |
+static inline u32 | |
+rtl8168_tx_vlan_tag(struct rtl8168_private *tp, | |
+ struct sk_buff *skb) | |
+{ | |
+ u32 tag; | |
+ | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0) | |
+ tag = (tp->vlgrp && vlan_tx_tag_present(skb)) ? | |
+ TxVlanTag | swab16(vlan_tx_tag_get(skb)) : 0x00; | |
+#elif LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) | |
+ tag = (vlan_tx_tag_present(skb)) ? | |
+ TxVlanTag | swab16(vlan_tx_tag_get(skb)) : 0x00; | |
+#else | |
+ tag = (skb_vlan_tag_present(skb)) ? | |
+ TxVlanTag | swab16(skb_vlan_tag_get(skb)) : 0x00; | |
+#endif | |
+ | |
+ return tag; | |
+} | |
+ | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0) | |
+ | |
+static void | |
+rtl8168_vlan_rx_register(struct net_device *dev, | |
+ struct vlan_group *grp) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ unsigned long flags; | |
+ | |
+ spin_lock_irqsave(&tp->lock, flags); | |
+ tp->vlgrp = grp; | |
+ if (tp->vlgrp) | |
+ tp->cp_cmd |= RxVlan; | |
+ else | |
+ tp->cp_cmd &= ~RxVlan; | |
+ RTL_W16(CPlusCmd, tp->cp_cmd); | |
+ RTL_R16(CPlusCmd); | |
+ spin_unlock_irqrestore(&tp->lock, flags); | |
+} | |
+ | |
+#endif | |
+ | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) | |
+static void | |
+rtl8168_vlan_rx_kill_vid(struct net_device *dev, | |
+ unsigned short vid) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ unsigned long flags; | |
+ | |
+ spin_lock_irqsave(&tp->lock, flags); | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21) | |
+ if (tp->vlgrp) | |
+ tp->vlgrp->vlan_devices[vid] = NULL; | |
+#else | |
+ vlan_group_set_device(tp->vlgrp, vid, NULL); | |
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21) | |
+ spin_unlock_irqrestore(&tp->lock, flags); | |
+} | |
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) | |
+ | |
+static int | |
+rtl8168_rx_vlan_skb(struct rtl8168_private *tp, | |
+ struct RxDesc *desc, | |
+ struct sk_buff *skb) | |
+{ | |
+ u32 opts2 = le32_to_cpu(desc->opts2); | |
+ int ret = -1; | |
+ | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0) | |
+ if (tp->vlgrp && (opts2 & RxVlanTag)) { | |
+ rtl8168_rx_hwaccel_skb(skb, tp->vlgrp, | |
+ swab16(opts2 & 0xffff)); | |
+ ret = 0; | |
+ } | |
+#elif LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0) | |
+ if (opts2 & RxVlanTag) | |
+ __vlan_hwaccel_put_tag(skb, swab16(opts2 & 0xffff)); | |
+#else | |
+ if (opts2 & RxVlanTag) | |
+ __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), swab16(opts2 & 0xffff)); | |
+#endif | |
+ | |
+ desc->opts2 = 0; | |
+ return ret; | |
+} | |
+ | |
+#else /* !CONFIG_R8168_VLAN */ | |
+ | |
+static inline u32 | |
+rtl8168_tx_vlan_tag(struct rtl8168_private *tp, | |
+ struct sk_buff *skb) | |
+{ | |
+ return 0; | |
+} | |
+ | |
+static int | |
+rtl8168_rx_vlan_skb(struct rtl8168_private *tp, | |
+ struct RxDesc *desc, | |
+ struct sk_buff *skb) | |
+{ | |
+ return -1; | |
+} | |
+ | |
+#endif | |
+ | |
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0) | |
+ | |
+static netdev_features_t rtl8168_fix_features(struct net_device *dev, | |
+ netdev_features_t features) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ unsigned long flags; | |
+ | |
+ spin_lock_irqsave(&tp->lock, flags); | |
+ if (dev->mtu > MSS_MAX) | |
+ features &= ~NETIF_F_ALL_TSO; | |
+ if (dev->mtu > ETH_DATA_LEN) { | |
+ features &= ~NETIF_F_ALL_TSO; | |
+ features &= ~NETIF_F_ALL_CSUM; | |
+ } | |
+ spin_unlock_irqrestore(&tp->lock, flags); | |
+ | |
+ return features; | |
+} | |
+ | |
+static int rtl8168_hw_set_features(struct net_device *dev, | |
+ netdev_features_t features) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ u32 rx_config; | |
+ | |
+ rx_config = RTL_R32(RxConfig); | |
+ if (features & NETIF_F_RXALL) | |
+ rx_config |= (AcceptErr | AcceptRunt); | |
+ else | |
+ rx_config &= ~(AcceptErr | AcceptRunt); | |
+ | |
+ RTL_W32(RxConfig, rx_config); | |
+ | |
+ if (features & NETIF_F_RXCSUM) | |
+ tp->cp_cmd |= RxChkSum; | |
+ else | |
+ tp->cp_cmd &= ~RxChkSum; | |
+ | |
+ if (dev->features & NETIF_F_HW_VLAN_RX) | |
+ tp->cp_cmd |= RxVlan; | |
+ else | |
+ tp->cp_cmd &= ~RxVlan; | |
+ | |
+ RTL_W16(CPlusCmd, tp->cp_cmd); | |
+ RTL_R16(CPlusCmd); | |
+ | |
+ return 0; | |
+} | |
+ | |
+static int rtl8168_set_features(struct net_device *dev, | |
+ netdev_features_t features) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ unsigned long flags; | |
+ | |
+ features &= NETIF_F_RXALL | NETIF_F_RXCSUM | NETIF_F_HW_VLAN_RX; | |
+ | |
+ spin_lock_irqsave(&tp->lock, flags); | |
+ if (features ^ dev->features) | |
+ rtl8168_hw_set_features(dev, features); | |
+ spin_unlock_irqrestore(&tp->lock, flags); | |
+ | |
+ return 0; | |
+} | |
+ | |
+#endif | |
+ | |
+static void rtl8168_gset_xmii(struct net_device *dev, | |
+ struct ethtool_cmd *cmd) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ u8 status; | |
+ unsigned long flags; | |
+ | |
+ cmd->supported = SUPPORTED_10baseT_Half | | |
+ SUPPORTED_10baseT_Full | | |
+ SUPPORTED_100baseT_Half | | |
+ SUPPORTED_100baseT_Full | | |
+ SUPPORTED_1000baseT_Full | | |
+ SUPPORTED_Autoneg | | |
+ SUPPORTED_TP; | |
+ | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ cmd->autoneg = (mdio_read(tp, MII_BMCR) & BMCR_ANENABLE) ? 1 : 0; | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ cmd->advertising = ADVERTISED_TP | ADVERTISED_Autoneg; | |
+ | |
+ if (tp->phy_auto_nego_reg & ADVERTISE_10HALF) | |
+ cmd->advertising |= ADVERTISED_10baseT_Half; | |
+ if (tp->phy_auto_nego_reg & ADVERTISE_10FULL) | |
+ cmd->advertising |= ADVERTISED_10baseT_Full; | |
+ if (tp->phy_auto_nego_reg & ADVERTISE_100HALF) | |
+ cmd->advertising |= ADVERTISED_100baseT_Half; | |
+ if (tp->phy_auto_nego_reg & ADVERTISE_100FULL) | |
+ cmd->advertising |= ADVERTISED_100baseT_Full; | |
+ if (tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL) | |
+ cmd->advertising |= ADVERTISED_1000baseT_Full; | |
+ | |
+ status = RTL_R8(PHYstatus); | |
+ | |
+ if (status & _1000bpsF) | |
+ cmd->speed = SPEED_1000; | |
+ else if (status & _100bps) | |
+ cmd->speed = SPEED_100; | |
+ else if (status & _10bps) | |
+ cmd->speed = SPEED_10; | |
+ | |
+ if (status & TxFlowCtrl) | |
+ cmd->advertising |= ADVERTISED_Asym_Pause; | |
+ | |
+ if (status & RxFlowCtrl) | |
+ cmd->advertising |= ADVERTISED_Pause; | |
+ | |
+ cmd->duplex = ((status & _1000bpsF) || (status & FullDup)) ? | |
+ DUPLEX_FULL : DUPLEX_HALF; | |
+ | |
+ | |
+} | |
+ | |
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22) | |
+static int | |
+rtl8168_get_settings(struct net_device *dev, | |
+ struct ethtool_cmd *cmd) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ | |
+ tp->get_settings(dev, cmd); | |
+ | |
+ return 0; | |
+} | |
+ | |
+static void rtl8168_get_regs(struct net_device *dev, struct ethtool_regs *regs, | |
+ void *p) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ unsigned int i; | |
+ u8 *data = p; | |
+ unsigned long flags; | |
+ | |
+ if (regs->len < R8168_REGS_DUMP_SIZE) | |
+ return /* -EINVAL */; | |
+ | |
+ memset(p, 0, regs->len); | |
+ | |
+ spin_lock_irqsave(&tp->lock, flags); | |
+ for (i = 0; i < R8168_MAC_REGS_SIZE; i++) | |
+ *data++ = readb(ioaddr + i); | |
+ spin_unlock_irqrestore(&tp->lock, flags); | |
+ data = (u8*)p + 256; | |
+ | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ for (i = 0; i < R8168_PHY_REGS_SIZE/2; i++) { | |
+ *(u16*)data = mdio_read(tp, i); | |
+ data += 2; | |
+ } | |
+ data = (u8*)p + 256 * 2; | |
+ | |
+ for (i = 0; i < R8168_EPHY_REGS_SIZE/2; i++) { | |
+ *(u16*)data = rtl8168_ephy_read(ioaddr, i); | |
+ data += 2; | |
+ } | |
+ data = (u8*)p + 256 * 3; | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_1: | |
+ case CFG_METHOD_2: | |
+ case CFG_METHOD_3: | |
+ /* RTL8168B does not support Extend GMAC */ | |
+ break; | |
+ default: | |
+ for (i = 0; i < R8168_ERI_REGS_SIZE; i+=4) { | |
+ *(u32*)data = rtl8168_eri_read(ioaddr, i , 4, ERIAR_ExGMAC); | |
+ data += 4; | |
+ } | |
+ break; | |
+ } | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+} | |
+ | |
+static u32 | |
+rtl8168_get_msglevel(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ | |
+ return tp->msg_enable; | |
+} | |
+ | |
+static void | |
+rtl8168_set_msglevel(struct net_device *dev, | |
+ u32 value) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ | |
+ tp->msg_enable = value; | |
+} | |
+ | |
+static const char rtl8168_gstrings[][ETH_GSTRING_LEN] = { | |
+ "tx_packets", | |
+ "rx_packets", | |
+ "tx_errors", | |
+ "rx_errors", | |
+ "rx_missed", | |
+ "align_errors", | |
+ "tx_single_collisions", | |
+ "tx_multi_collisions", | |
+ "unicast", | |
+ "broadcast", | |
+ "multicast", | |
+ "tx_aborted", | |
+ "tx_underrun", | |
+}; | |
+#endif //#LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22) | |
+ | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33) | |
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22) | |
+static int rtl8168_get_stats_count(struct net_device *dev) | |
+{ | |
+ return ARRAY_SIZE(rtl8168_gstrings); | |
+} | |
+#endif //#LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22) | |
+#else | |
+static int rtl8168_get_sset_count(struct net_device *dev, int sset) | |
+{ | |
+ switch (sset) { | |
+ case ETH_SS_STATS: | |
+ return ARRAY_SIZE(rtl8168_gstrings); | |
+ default: | |
+ return -EOPNOTSUPP; | |
+ } | |
+} | |
+#endif | |
+ | |
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22) | |
+static void | |
+rtl8168_get_ethtool_stats(struct net_device *dev, | |
+ struct ethtool_stats *stats, | |
+ u64 *data) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ struct rtl8168_counters *counters; | |
+ dma_addr_t paddr; | |
+ u32 cmd; | |
+ u32 WaitCnt; | |
+ unsigned long flags; | |
+ | |
+ ASSERT_RTNL(); | |
+ | |
+ counters = tp->tally_vaddr; | |
+ paddr = tp->tally_paddr; | |
+ if (!counters) | |
+ return; | |
+ | |
+ spin_lock_irqsave(&tp->lock, flags); | |
+ RTL_W32(CounterAddrHigh, (u64)paddr >> 32); | |
+ cmd = (u64)paddr & DMA_BIT_MASK(32); | |
+ RTL_W32(CounterAddrLow, cmd); | |
+ RTL_W32(CounterAddrLow, cmd | CounterDump); | |
+ | |
+ WaitCnt = 0; | |
+ while (RTL_R32(CounterAddrLow) & CounterDump) { | |
+ udelay(10); | |
+ | |
+ WaitCnt++; | |
+ if (WaitCnt > 20) | |
+ break; | |
+ } | |
+ spin_unlock_irqrestore(&tp->lock, flags); | |
+ | |
+ data[0] = le64_to_cpu(counters->tx_packets); | |
+ data[1] = le64_to_cpu(counters->rx_packets); | |
+ data[2] = le64_to_cpu(counters->tx_errors); | |
+ data[3] = le32_to_cpu(counters->rx_errors); | |
+ data[4] = le16_to_cpu(counters->rx_missed); | |
+ data[5] = le16_to_cpu(counters->align_errors); | |
+ data[6] = le32_to_cpu(counters->tx_one_collision); | |
+ data[7] = le32_to_cpu(counters->tx_multi_collision); | |
+ data[8] = le64_to_cpu(counters->rx_unicast); | |
+ data[9] = le64_to_cpu(counters->rx_broadcast); | |
+ data[10] = le32_to_cpu(counters->rx_multicast); | |
+ data[11] = le16_to_cpu(counters->tx_aborted); | |
+ data[12] = le16_to_cpu(counters->tx_underun); | |
+} | |
+ | |
+static void | |
+rtl8168_get_strings(struct net_device *dev, | |
+ u32 stringset, | |
+ u8 *data) | |
+{ | |
+ switch (stringset) { | |
+ case ETH_SS_STATS: | |
+ memcpy(data, *rtl8168_gstrings, sizeof(rtl8168_gstrings)); | |
+ break; | |
+ } | |
+} | |
+#endif //#LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22) | |
+ | |
+static int rtl_get_eeprom_len(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ | |
+ return tp->eeprom_len; | |
+} | |
+ | |
+static int rtl_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, u8 *buf) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ int i,j,ret; | |
+ int start_w, end_w; | |
+ int VPD_addr, VPD_data; | |
+ u32 *eeprom_buff; | |
+ u16 tmp; | |
+ | |
+ if (tp->eeprom_type == EEPROM_TYPE_NONE) { | |
+ dev_printk(KERN_DEBUG, &tp->pci_dev->dev, "Detect none EEPROM\n"); | |
+ return -EOPNOTSUPP; | |
+ } else if (eeprom->len == 0 || (eeprom->offset+eeprom->len) > tp->eeprom_len) { | |
+ dev_printk(KERN_DEBUG, &tp->pci_dev->dev, "Invalid parameter\n"); | |
+ return -EINVAL; | |
+ } | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_9: | |
+ case CFG_METHOD_10: | |
+ VPD_addr = 0xCE; | |
+ VPD_data = 0xD0; | |
+ break; | |
+ | |
+ case CFG_METHOD_1: | |
+ case CFG_METHOD_2: | |
+ case CFG_METHOD_3: | |
+ case CFG_METHOD_11: | |
+ case CFG_METHOD_12: | |
+ case CFG_METHOD_13: | |
+ return -EOPNOTSUPP; | |
+ default: | |
+ VPD_addr = 0xD2; | |
+ VPD_data = 0xD4; | |
+ break; | |
+ } | |
+ | |
+ start_w = eeprom->offset >> 2; | |
+ end_w = (eeprom->offset + eeprom->len - 1) >> 2; | |
+ | |
+ eeprom_buff = kmalloc(sizeof(u32)*(end_w - start_w + 1), GFP_KERNEL); | |
+ if (!eeprom_buff) | |
+ return -ENOMEM; | |
+ | |
+ rtl8168_enable_cfg9346_write(tp); | |
+ ret = -EFAULT; | |
+ for (i=start_w; i<=end_w; i++) { | |
+ pci_write_config_word(tp->pci_dev, VPD_addr, (u16)i*4); | |
+ ret = -EFAULT; | |
+ for (j = 0; j < 10; j++) { | |
+ udelay(400); | |
+ pci_read_config_word(tp->pci_dev, VPD_addr, &tmp); | |
+ if (tmp&0x8000) { | |
+ ret = 0; | |
+ break; | |
+ } | |
+ } | |
+ | |
+ if (ret) | |
+ break; | |
+ | |
+ pci_read_config_dword(tp->pci_dev, VPD_data, &eeprom_buff[i-start_w]); | |
+ } | |
+ rtl8168_disable_cfg9346_write(tp); | |
+ | |
+ if (!ret) | |
+ memcpy(buf, (u8 *)eeprom_buff + (eeprom->offset & 3), eeprom->len); | |
+ | |
+ kfree(eeprom_buff); | |
+ | |
+ return ret; | |
+} | |
+ | |
+#undef ethtool_op_get_link | |
+#define ethtool_op_get_link _kc_ethtool_op_get_link | |
+u32 _kc_ethtool_op_get_link(struct net_device *dev) | |
+{ | |
+ return netif_carrier_ok(dev) ? 1 : 0; | |
+} | |
+ | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0) | |
+#undef ethtool_op_get_sg | |
+#define ethtool_op_get_sg _kc_ethtool_op_get_sg | |
+u32 _kc_ethtool_op_get_sg(struct net_device *dev) | |
+{ | |
+#ifdef NETIF_F_SG | |
+ return (dev->features & NETIF_F_SG) != 0; | |
+#else | |
+ return 0; | |
+#endif | |
+} | |
+ | |
+#undef ethtool_op_set_sg | |
+#define ethtool_op_set_sg _kc_ethtool_op_set_sg | |
+int _kc_ethtool_op_set_sg(struct net_device *dev, u32 data) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ | |
+ if (tp->mcfg == CFG_METHOD_DEFAULT) | |
+ return -EOPNOTSUPP; | |
+ | |
+#ifdef NETIF_F_SG | |
+ if (data) | |
+ dev->features |= NETIF_F_SG; | |
+ else | |
+ dev->features &= ~NETIF_F_SG; | |
+#endif | |
+ | |
+ return 0; | |
+} | |
+#endif | |
+ | |
+#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22) | |
+static const struct ethtool_ops rtl8168_ethtool_ops = { | |
+ .get_drvinfo = rtl8168_get_drvinfo, | |
+ .get_regs_len = rtl8168_get_regs_len, | |
+ .get_link = ethtool_op_get_link, | |
+ .get_settings = rtl8168_get_settings, | |
+ .set_settings = rtl8168_set_settings, | |
+ .get_msglevel = rtl8168_get_msglevel, | |
+ .set_msglevel = rtl8168_set_msglevel, | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0) | |
+ .get_rx_csum = rtl8168_get_rx_csum, | |
+ .set_rx_csum = rtl8168_set_rx_csum, | |
+ .get_tx_csum = rtl8168_get_tx_csum, | |
+ .set_tx_csum = rtl8168_set_tx_csum, | |
+ .get_sg = ethtool_op_get_sg, | |
+ .set_sg = ethtool_op_set_sg, | |
+#ifdef NETIF_F_TSO | |
+ .get_tso = ethtool_op_get_tso, | |
+ .set_tso = ethtool_op_set_tso, | |
+#endif | |
+#endif | |
+ .get_regs = rtl8168_get_regs, | |
+ .get_wol = rtl8168_get_wol, | |
+ .set_wol = rtl8168_set_wol, | |
+ .get_strings = rtl8168_get_strings, | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33) | |
+ .get_stats_count = rtl8168_get_stats_count, | |
+#else | |
+ .get_sset_count = rtl8168_get_sset_count, | |
+#endif | |
+ .get_ethtool_stats = rtl8168_get_ethtool_stats, | |
+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23) | |
+#ifdef ETHTOOL_GPERMADDR | |
+ .get_perm_addr = ethtool_op_get_perm_addr, | |
+#endif | |
+#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23) | |
+ .get_eeprom = rtl_get_eeprom, | |
+ .get_eeprom_len = rtl_get_eeprom_len, | |
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,0) | |
+ .get_ts_info = ethtool_op_get_ts_info, | |
+#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,0) | |
+}; | |
+#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22) | |
+ | |
+static int rtl8168_enable_EEE(struct rtl8168_private *tp) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ int ret; | |
+ u16 data; | |
+ u16 PhyRegValue; | |
+ u32 WaitCnt; | |
+ unsigned long flags; | |
+ | |
+ ret = 0; | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_14: | |
+ case CFG_METHOD_15: | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1F, 0x0007); | |
+ mdio_write(tp, 0x1E, 0x0020); | |
+ data = mdio_read(tp, 0x15) | 0x0100; | |
+ mdio_write(tp, 0x15, data); | |
+ mdio_write(tp, 0x1F, 0x0005); | |
+ mdio_write(tp, 0x05, 0x8B85); | |
+ data = mdio_read(tp, 0x06) | 0x2000; | |
+ mdio_write(tp, 0x06, data); | |
+ mdio_write(tp, 0x1F, 0x0006); | |
+ mdio_write(tp, 0x00, 0x5A30); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ mdio_write(tp, 0x0D, 0x0007); | |
+ mdio_write(tp, 0x0E, 0x003C); | |
+ mdio_write(tp, 0x0D, 0x4007); | |
+ mdio_write(tp, 0x0E, 0x0006); | |
+ mdio_write(tp, 0x0D, 0x0000); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ if ((RTL_R8(Config4)&0x40) && (RTL_R8(0x6D) & BIT_7)) { | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1F, 0x0005); | |
+ mdio_write(tp, 0x05, 0x8AC8); | |
+ mdio_write(tp, 0x06, RTL_R16(CustomLED)); | |
+ mdio_write(tp, 0x05, 0x8B82); | |
+ data = mdio_read(tp, 0x06) | 0x0010; | |
+ mdio_write(tp, 0x05, 0x8B82); | |
+ mdio_write(tp, 0x06, data); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ } | |
+ break; | |
+ | |
+ case CFG_METHOD_16: | |
+ case CFG_METHOD_17: | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ data = rtl8168_eri_read(ioaddr,0x1B0 ,4,ERIAR_ExGMAC) | 0x0003; | |
+ rtl8168_eri_write(ioaddr, 0x1B0, 4, data, ERIAR_ExGMAC); | |
+ mdio_write(tp,0x1F , 0x0004); | |
+ mdio_write(tp,0x1F , 0x0007); | |
+ mdio_write(tp,0x1E , 0x0020); | |
+ data = mdio_read(tp, 0x15)|0x0100; | |
+ mdio_write(tp,0x15 , data); | |
+ mdio_write(tp,0x1F , 0x0002); | |
+ mdio_write(tp,0x1F , 0x0005); | |
+ mdio_write(tp,0x05 , 0x8B85); | |
+ data = mdio_read(tp, 0x06)|0x2000; | |
+ mdio_write(tp,0x06 , data); | |
+ mdio_write(tp,0x1F , 0x0000); | |
+ mdio_write(tp,0x0D , 0x0007); | |
+ mdio_write(tp,0x0E , 0x003C); | |
+ mdio_write(tp,0x0D , 0x4007); | |
+ mdio_write(tp,0x0E , 0x0006); | |
+ mdio_write(tp,0x0D , 0x0000); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ break; | |
+ | |
+ case CFG_METHOD_18: | |
+ case CFG_METHOD_19: | |
+ case CFG_METHOD_20: | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ data = rtl8168_eri_read(ioaddr,0x1B0 ,4,ERIAR_ExGMAC); | |
+ data |= BIT_1 | BIT_0; | |
+ rtl8168_eri_write(ioaddr, 0x1B0, 4, data, ERIAR_ExGMAC); | |
+ mdio_write(tp, 0x1F, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x0020); | |
+ data = mdio_read(tp, 0x15); | |
+ data |= BIT_8; | |
+ mdio_write(tp, 0x15, data); | |
+ mdio_write(tp, 0x1F, 0x0005); | |
+ mdio_write(tp, 0x05, 0x8B85); | |
+ data = mdio_read(tp, 0x06); | |
+ data |= BIT_13; | |
+ mdio_write(tp, 0x06, data); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ mdio_write(tp, 0x0D, 0x0007); | |
+ mdio_write(tp, 0x0E, 0x003C); | |
+ mdio_write(tp, 0x0D, 0x4007); | |
+ mdio_write(tp, 0x0E, 0x0006); | |
+ mdio_write(tp, 0x0D, 0x0000); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ break; | |
+ | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_22: | |
+ case CFG_METHOD_23: | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ data = rtl8168_eri_read(ioaddr, 0x1B0, 4, ERIAR_ExGMAC); | |
+ data |= BIT_1 | BIT_0; | |
+ rtl8168_eri_write(ioaddr, 0x1B0, 4, data, ERIAR_ExGMAC); | |
+ mdio_write(tp, 0x1F, 0x0A43); | |
+ data = mdio_read(tp, 0x11); | |
+ mdio_write(tp, 0x11, data | BIT_4); | |
+ mdio_write(tp, 0x1F, 0x0A5D); | |
+ mdio_write(tp, 0x10, 0x0006); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ break; | |
+ | |
+ default: | |
+// dev_printk(KERN_DEBUG, &tp->pci_dev->dev, "Not Support EEE\n"); | |
+ ret = -EOPNOTSUPP; | |
+ break; | |
+ } | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1F, 0x0A4A); | |
+ SetEthPhyBit(tp, 0x11, BIT_9); | |
+ mdio_write(tp, 0x1F, 0x0A42); | |
+ SetEthPhyBit(tp, 0x14, BIT_7); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ break; | |
+ } | |
+ | |
+ /*Advanced EEE*/ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp,0x1F, 0x0B82); | |
+ SetEthPhyBit(tp, 0x10, BIT_4); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp,0x1F, 0x0B80); | |
+ WaitCnt = 0; | |
+ do { | |
+ PhyRegValue = mdio_read(tp, 0x10); | |
+ PhyRegValue &= 0x0040; | |
+ udelay(100); | |
+ WaitCnt++; | |
+ } while(PhyRegValue != 0x0040 && WaitCnt <1000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ break; | |
+ } | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_25: | |
+ rtl8168_eri_write(ioaddr, 0x1EA, 1, 0xFA, ERIAR_ExGMAC); | |
+ | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1F, 0x0A43); | |
+ data = mdio_read(tp, 0x10); | |
+ if (data & BIT_10) { | |
+ mdio_write(tp, 0x1F, 0x0A42); | |
+ data = mdio_read(tp, 0x16); | |
+ data &= ~(BIT_1); | |
+ mdio_write(tp, 0x16, data); | |
+ } else { | |
+ mdio_write(tp, 0x1F, 0x0A42); | |
+ data = mdio_read(tp, 0x16); | |
+ data |= BIT_1; | |
+ mdio_write(tp, 0x16, data); | |
+ } | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ break; | |
+ case CFG_METHOD_26: | |
+ data = mac_ocp_read(tp, 0xE052); | |
+ data |= BIT_0; | |
+ mac_ocp_write(tp, 0xE052, data); | |
+ data = mac_ocp_read(tp, 0xE056); | |
+ data &= 0xFF0F; | |
+ data |= (BIT_4 | BIT_5 | BIT_6); | |
+ mac_ocp_write(tp, 0xE056, data); | |
+ | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1F, 0x0A43); | |
+ data = mdio_read(tp, 0x10); | |
+ if (data & BIT_10) { | |
+ mdio_write(tp, 0x1F, 0x0A42); | |
+ data = mdio_read(tp, 0x16); | |
+ data &= ~(BIT_1); | |
+ mdio_write(tp, 0x16, data); | |
+ } else { | |
+ mdio_write(tp, 0x1F, 0x0A42); | |
+ data = mdio_read(tp, 0x16); | |
+ data |= BIT_1; | |
+ mdio_write(tp, 0x16, data); | |
+ } | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ break; | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ OOB_mutex_lock(tp); | |
+ data = mac_ocp_read(tp, 0xE052); | |
+ data &= ~BIT_0; | |
+ mac_ocp_write(tp, 0xE052, data); | |
+ OOB_mutex_unlock(tp); | |
+ data = mac_ocp_read(tp, 0xE056); | |
+ data &= 0xFF0F; | |
+ data |= (BIT_4 | BIT_5 | BIT_6); | |
+ mac_ocp_write(tp, 0xE056, data); | |
+ break; | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ data = mac_ocp_read(tp, 0xE052); | |
+ data |= BIT_0; | |
+ mac_ocp_write(tp, 0xE052, data); | |
+ | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1F, 0x0A43); | |
+ data = mdio_read(tp, 0x10) | BIT_15; | |
+ mdio_write(tp, 0x10, data); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0A44); | |
+ data = mdio_read(tp, 0x11) | BIT_13 | BIT_14; | |
+ data &= ~(BIT_12); | |
+ mdio_write(tp, 0x11, data); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ break; | |
+ } | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1F, 0x0B82); | |
+ ClearEthPhyBit(tp, 0x10, BIT_4); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ break; | |
+ } | |
+ | |
+ return ret; | |
+} | |
+ | |
+static int rtl8168_disable_EEE(struct rtl8168_private *tp) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ int ret; | |
+ u16 data; | |
+ u16 PhyRegValue; | |
+ u32 WaitCnt; | |
+ unsigned long flags; | |
+ | |
+ ret = 0; | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_14: | |
+ case CFG_METHOD_15: | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1F, 0x0005); | |
+ mdio_write(tp, 0x05, 0x8B85); | |
+ data = mdio_read(tp, 0x06) & ~0x2000; | |
+ mdio_write(tp, 0x06, data); | |
+ mdio_write(tp, 0x1F, 0x0007); | |
+ mdio_write(tp, 0x1E, 0x0020); | |
+ data = mdio_read(tp, 0x15) & ~0x0100; | |
+ mdio_write(tp, 0x15, data); | |
+ mdio_write(tp, 0x1F, 0x0006); | |
+ mdio_write(tp, 0x00, 0x5A00); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ mdio_write(tp, 0x0D, 0x0007); | |
+ mdio_write(tp, 0x0E, 0x003C); | |
+ mdio_write(tp, 0x0D, 0x4007); | |
+ mdio_write(tp, 0x0E, 0x0000); | |
+ mdio_write(tp, 0x0D, 0x0000); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ if (RTL_R8(Config4) & 0x40) { | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1F, 0x0005); | |
+ mdio_write(tp, 0x05, 0x8B82); | |
+ data = mdio_read(tp, 0x06) & ~0x0010; | |
+ mdio_write(tp, 0x05, 0x8B82); | |
+ mdio_write(tp, 0x06, data); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ } | |
+ break; | |
+ | |
+ case CFG_METHOD_16: | |
+ case CFG_METHOD_17: | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ data = rtl8168_eri_read(ioaddr,0x1B0 ,4,ERIAR_ExGMAC)& ~0x0003; | |
+ rtl8168_eri_write(ioaddr, 0x1B0, 4, data, ERIAR_ExGMAC); | |
+ mdio_write(tp, 0x1F, 0x0005); | |
+ mdio_write(tp, 0x05, 0x8B85); | |
+ data = mdio_read(tp, 0x06) & ~0x2000; | |
+ mdio_write(tp, 0x06, data); | |
+ mdio_write(tp, 0x1F, 0x0004); | |
+ mdio_write(tp, 0x1F, 0x0007); | |
+ mdio_write(tp, 0x1E, 0x0020); | |
+ data = mdio_read(tp, 0x15) & ~0x0100; | |
+ mdio_write(tp,0x15 , data); | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ mdio_write(tp, 0x0D, 0x0007); | |
+ mdio_write(tp, 0x0E, 0x003C); | |
+ mdio_write(tp, 0x0D, 0x4007); | |
+ mdio_write(tp, 0x0E, 0x0000); | |
+ mdio_write(tp, 0x0D, 0x0000); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ break; | |
+ | |
+ case CFG_METHOD_18: | |
+ case CFG_METHOD_19: | |
+ case CFG_METHOD_20: | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ data = rtl8168_eri_read(ioaddr,0x1B0 ,4,ERIAR_ExGMAC); | |
+ data &= ~(BIT_1 | BIT_0); | |
+ rtl8168_eri_write(ioaddr, 0x1B0, 4, data, ERIAR_ExGMAC); | |
+ mdio_write(tp, 0x1F, 0x0005); | |
+ mdio_write(tp, 0x05, 0x8B85); | |
+ data = mdio_read(tp, 0x06); | |
+ data &= ~BIT_13; | |
+ mdio_write(tp, 0x06, data); | |
+ mdio_write(tp, 0x1F, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x0020); | |
+ data = mdio_read(tp, 0x15); | |
+ data &= ~BIT_8; | |
+ mdio_write(tp, 0x15, data); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ mdio_write(tp, 0x0D, 0x0007); | |
+ mdio_write(tp, 0x0E, 0x003C); | |
+ mdio_write(tp, 0x0D, 0x4007); | |
+ mdio_write(tp, 0x0E, 0x0000); | |
+ mdio_write(tp, 0x0D, 0x0000); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ break; | |
+ | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_22: | |
+ case CFG_METHOD_23: | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ data = rtl8168_eri_read(ioaddr, 0x1B0, 4, ERIAR_ExGMAC); | |
+ data &= ~(BIT_1 | BIT_0); | |
+ rtl8168_eri_write(ioaddr, 0x1B0, 4, data, ERIAR_ExGMAC); | |
+ mdio_write(tp, 0x1F, 0x0A43); | |
+ data = mdio_read(tp, 0x11); | |
+ mdio_write(tp, 0x11, data & ~BIT_4); | |
+ mdio_write(tp, 0x1F, 0x0A5D); | |
+ mdio_write(tp, 0x10, 0x0000); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ break; | |
+ | |
+ default: | |
+// dev_printk(KERN_DEBUG, &tp->pci_dev->dev, "Not Support EEE\n"); | |
+ ret = -EOPNOTSUPP; | |
+ break; | |
+ } | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1F, 0x0A42); | |
+ ClearEthPhyBit(tp, 0x14, BIT_7); | |
+ mdio_write(tp, 0x1F, 0x0A4A); | |
+ ClearEthPhyBit(tp, 0x11, BIT_9); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ break; | |
+ } | |
+ | |
+ /*Advanced EEE*/ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp,0x1F, 0x0B82); | |
+ SetEthPhyBit(tp, 0x10, BIT_4); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp,0x1F, 0x0B80); | |
+ WaitCnt = 0; | |
+ do { | |
+ PhyRegValue = mdio_read(tp, 0x10); | |
+ PhyRegValue &= 0x0040; | |
+ udelay(100); | |
+ WaitCnt++; | |
+ } while(PhyRegValue != 0x0040 && WaitCnt <1000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ break; | |
+ } | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_25: | |
+ rtl8168_eri_write(ioaddr, 0x1EA, 1, 0x00, ERIAR_ExGMAC); | |
+ | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1F, 0x0A42); | |
+ data = mdio_read(tp, 0x16); | |
+ data &= ~(BIT_1); | |
+ mdio_write(tp, 0x16, data); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ break; | |
+ case CFG_METHOD_26: | |
+ data = mac_ocp_read(tp, 0xE052); | |
+ data &= ~(BIT_0); | |
+ mac_ocp_write(tp, 0xE052, data); | |
+ | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1F, 0x0A42); | |
+ data = mdio_read(tp, 0x16); | |
+ data &= ~(BIT_1); | |
+ mdio_write(tp, 0x16, data); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ break; | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ data = mac_ocp_read(tp, 0xE052); | |
+ data &= ~(BIT_0); | |
+ mac_ocp_write(tp, 0xE052, data); | |
+ break; | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ data = mac_ocp_read(tp, 0xE052); | |
+ data &= ~(BIT_0); | |
+ mac_ocp_write(tp, 0xE052, data); | |
+ | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1F, 0x0A43); | |
+ data = mdio_read(tp, 0x10) & ~(BIT_15); | |
+ mdio_write(tp, 0x10, data); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0A44); | |
+ data = mdio_read(tp, 0x11) & ~(BIT_12 | BIT_13 | BIT_14); | |
+ mdio_write(tp, 0x11, data); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ break; | |
+ } | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1F, 0x0B82); | |
+ ClearEthPhyBit(tp, 0x10, BIT_4); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ break; | |
+ } | |
+ | |
+ return ret; | |
+} | |
+ | |
+#if 0 | |
+ | |
+static int rtl8168_enable_green_feature(struct rtl8168_private *tp) | |
+{ | |
+ u16 gphy_val; | |
+ unsigned long flags; | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_14: | |
+ case CFG_METHOD_15: | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1F, 0x0003); | |
+ gphy_val = mdio_read(tp, 0x10) | 0x0400; | |
+ mdio_write(tp, 0x10, gphy_val); | |
+ gphy_val = mdio_read(tp, 0x19) | 0x0001; | |
+ mdio_write(tp, 0x19, gphy_val); | |
+ mdio_write(tp, 0x1F, 0x0005); | |
+ gphy_val = mdio_read(tp, 0x01) & ~0x0100; | |
+ mdio_write(tp, 0x01, gphy_val); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ mdio_write(tp, 0x00, 0x9200); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ mdelay(20); | |
+ break; | |
+ | |
+ case CFG_METHOD_17: | |
+ case CFG_METHOD_18: | |
+ case CFG_METHOD_19: | |
+ case CFG_METHOD_20: | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1f, 0x0003); | |
+ gphy_val = mdio_read(tp, 0x10); | |
+ gphy_val |= BIT_10; | |
+ mdio_write(tp, 0x10, gphy_val); | |
+ gphy_val = mdio_read(tp, 0x19); | |
+ gphy_val |= BIT_0; | |
+ mdio_write(tp, 0x19, gphy_val); | |
+ mdio_write(tp, 0x1F, 0x0005); | |
+ gphy_val = mdio_read(tp, 0x01); | |
+ gphy_val |= BIT_8; | |
+ mdio_write(tp, 0x01, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x00, 0x9200); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ break; | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_23: | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1F, 0x0A43); | |
+ mdio_write(tp, 0x13, 0x8011); | |
+ if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30) { | |
+ SetEthPhyBit( tp, 0x14, BIT_15 ); | |
+ } else { | |
+ SetEthPhyBit( tp, 0x14, BIT_14 ); | |
+ } | |
+ mdio_write(tp, 0x1F, 0x0A40); | |
+ mdio_write(tp, 0x00, 0x9200); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ break; | |
+ | |
+ default: | |
+ dev_printk(KERN_DEBUG, &tp->pci_dev->dev, "Not Support Green Feature\n"); | |
+ break; | |
+ } | |
+ | |
+ return 0; | |
+} | |
+ | |
+static int rtl8168_disable_green_feature(struct rtl8168_private *tp) | |
+{ | |
+ u16 gphy_val; | |
+ unsigned long flags; | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_14: | |
+ case CFG_METHOD_15: | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1F, 0x0005); | |
+ gphy_val = mdio_read(tp, 0x01) | 0x0100; | |
+ mdio_write(tp, 0x01, gphy_val); | |
+ mdio_write(tp, 0x1F, 0x0003); | |
+ gphy_val = mdio_read(tp, 0x10) & ~0x0400; | |
+ mdio_write(tp, 0x10, gphy_val); | |
+ gphy_val = mdio_read(tp, 0x19) & ~0x0001; | |
+ mdio_write(tp, 0x19, gphy_val); | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ gphy_val = mdio_read(tp, 0x06) & ~0x7000; | |
+ gphy_val |= 0x3000; | |
+ mdio_write(tp, 0x06, gphy_val); | |
+ gphy_val = mdio_read(tp, 0x0D) & 0x0700; | |
+ gphy_val |= 0x0500; | |
+ mdio_write(tp, 0x0D, gphy_val); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ break; | |
+ | |
+ case CFG_METHOD_17: | |
+ case CFG_METHOD_18: | |
+ case CFG_METHOD_19: | |
+ case CFG_METHOD_20: | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1f, 0x0003); | |
+ gphy_val = mdio_read(tp, 0x19); | |
+ gphy_val &= ~BIT_0; | |
+ mdio_write(tp, 0x19, gphy_val); | |
+ gphy_val = mdio_read(tp, 0x10); | |
+ gphy_val &= ~BIT_10; | |
+ mdio_write(tp, 0x10, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ break; | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_23: | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write(tp, 0x1F, 0x0A43); | |
+ mdio_write(tp, 0x13, 0x8011); | |
+ if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30) { | |
+ ClearEthPhyBit( tp, 0x14, BIT_15 ); | |
+ } else { | |
+ ClearEthPhyBit( tp, 0x14, BIT_14 ); | |
+ } | |
+ mdio_write(tp, 0x1F, 0x0A40); | |
+ mdio_write(tp, 0x00, 0x9200); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ break; | |
+ | |
+ default: | |
+ dev_printk(KERN_DEBUG, &tp->pci_dev->dev, "Not Support Green Feature\n"); | |
+ break; | |
+ } | |
+ | |
+ return 0; | |
+} | |
+ | |
+#endif | |
+ | |
+static void rtl8168_get_mac_version(struct rtl8168_private *tp, void __iomem *ioaddr) | |
+{ | |
+ u32 reg,val32; | |
+ u32 ICVerID; | |
+ | |
+ val32 = RTL_R32(TxConfig) ; | |
+ reg = val32 & 0x7c800000; | |
+ ICVerID = val32 & 0x00700000; | |
+ | |
+ switch (reg) { | |
+ case 0x30000000: | |
+ tp->mcfg = CFG_METHOD_1; | |
+ tp->efuse_ver = EFUSE_NOT_SUPPORT; | |
+ break; | |
+ case 0x38000000: | |
+ if (ICVerID == 0x00000000) { | |
+ tp->mcfg = CFG_METHOD_2; | |
+ } else if (ICVerID == 0x00500000) { | |
+ tp->mcfg = CFG_METHOD_3; | |
+ } else { | |
+ tp->mcfg = CFG_METHOD_3; | |
+ tp->HwIcVerUnknown = TRUE; | |
+ } | |
+ tp->efuse_ver = EFUSE_NOT_SUPPORT; | |
+ break; | |
+ case 0x3C000000: | |
+ if (ICVerID == 0x00000000) { | |
+ tp->mcfg = CFG_METHOD_4; | |
+ } else if (ICVerID == 0x00200000) { | |
+ tp->mcfg = CFG_METHOD_5; | |
+ } else if (ICVerID == 0x00400000) { | |
+ tp->mcfg = CFG_METHOD_6; | |
+ } else { | |
+ tp->mcfg = CFG_METHOD_6; | |
+ tp->HwIcVerUnknown = TRUE; | |
+ } | |
+ tp->efuse_ver = EFUSE_NOT_SUPPORT; | |
+ break; | |
+ case 0x3C800000: | |
+ if (ICVerID == 0x00100000) { | |
+ tp->mcfg = CFG_METHOD_7; | |
+ } else if (ICVerID == 0x00300000) { | |
+ tp->mcfg = CFG_METHOD_8; | |
+ } else { | |
+ tp->mcfg = CFG_METHOD_8; | |
+ tp->HwIcVerUnknown = TRUE; | |
+ } | |
+ tp->efuse_ver = EFUSE_NOT_SUPPORT; | |
+ break; | |
+ case 0x28000000: | |
+ if (ICVerID == 0x00100000) { | |
+ tp->mcfg = CFG_METHOD_9; | |
+ } else if (ICVerID == 0x00300000) { | |
+ tp->mcfg = CFG_METHOD_10; | |
+ } else { | |
+ tp->mcfg = CFG_METHOD_10; | |
+ tp->HwIcVerUnknown = TRUE; | |
+ } | |
+ tp->efuse_ver = EFUSE_SUPPORT_V1; | |
+ break; | |
+ case 0x28800000: | |
+ if (ICVerID == 0x00000000) { | |
+ tp->mcfg = CFG_METHOD_11; | |
+ } else if (ICVerID == 0x00200000) { | |
+ tp->mcfg = CFG_METHOD_12; | |
+ RTL_W32(0xD0, RTL_R32(0xD0) | 0x00020000); | |
+ } else if (ICVerID == 0x00300000) { | |
+ tp->mcfg = CFG_METHOD_13; | |
+ } else { | |
+ tp->mcfg = CFG_METHOD_13; | |
+ tp->HwIcVerUnknown = TRUE; | |
+ } | |
+ tp->efuse_ver = EFUSE_SUPPORT_V1; | |
+ break; | |
+ case 0x2C000000: | |
+ if (ICVerID == 0x00100000) { | |
+ tp->mcfg = CFG_METHOD_14; | |
+ } else if (ICVerID == 0x00200000) { | |
+ tp->mcfg = CFG_METHOD_15; | |
+ } else { | |
+ tp->mcfg = CFG_METHOD_15; | |
+ tp->HwIcVerUnknown = TRUE; | |
+ } | |
+ tp->efuse_ver = EFUSE_SUPPORT_V2; | |
+ break; | |
+ case 0x2C800000: | |
+ if (ICVerID == 0x00000000) { | |
+ tp->mcfg = CFG_METHOD_16; | |
+ } else if (ICVerID == 0x00100000) { | |
+ tp->mcfg = CFG_METHOD_17; | |
+ } else { | |
+ tp->mcfg = CFG_METHOD_17; | |
+ tp->HwIcVerUnknown = TRUE; | |
+ } | |
+ tp->efuse_ver = EFUSE_SUPPORT_V3; | |
+ break; | |
+ case 0x48000000: | |
+ if (ICVerID == 0x00000000) { | |
+ tp->mcfg = CFG_METHOD_18; | |
+ } else if (ICVerID == 0x00100000) { | |
+ tp->mcfg = CFG_METHOD_19; | |
+ } else { | |
+ tp->mcfg = CFG_METHOD_19; | |
+ tp->HwIcVerUnknown = TRUE; | |
+ } | |
+ tp->efuse_ver = EFUSE_SUPPORT_V3; | |
+ break; | |
+ case 0x48800000: | |
+ if (ICVerID == 0x00000000) { | |
+ tp->mcfg = CFG_METHOD_20; | |
+ } else { | |
+ tp->mcfg = CFG_METHOD_20; | |
+ tp->HwIcVerUnknown = TRUE; | |
+ } | |
+ | |
+ tp->efuse_ver = EFUSE_SUPPORT_V3; | |
+ break; | |
+ case 0x4C000000: | |
+ if (ICVerID == 0x00000000) { | |
+ tp->mcfg = CFG_METHOD_21; | |
+ } else if (ICVerID == 0x00100000) { | |
+ tp->mcfg = CFG_METHOD_22; | |
+ } else { | |
+ tp->mcfg = CFG_METHOD_22; | |
+ tp->HwIcVerUnknown = TRUE; | |
+ } | |
+ tp->efuse_ver = EFUSE_SUPPORT_V3; | |
+ break; | |
+ case 0x50000000: | |
+ if (ICVerID == 0x00000000) { | |
+ tp->mcfg = CFG_METHOD_23; | |
+ } else if (ICVerID == 0x00100000) { | |
+ tp->mcfg = CFG_METHOD_27; | |
+ } else if (ICVerID == 0x00200000) { | |
+ tp->mcfg = CFG_METHOD_28; | |
+ } else { | |
+ tp->mcfg = CFG_METHOD_28; | |
+ tp->HwIcVerUnknown = TRUE; | |
+ } | |
+ tp->efuse_ver = EFUSE_SUPPORT_V3; | |
+ break; | |
+ case 0x50800000: | |
+ if (ICVerID == 0x00000000) { | |
+ tp->mcfg = CFG_METHOD_24; | |
+ } else if (ICVerID == 0x00100000) { | |
+ tp->mcfg = CFG_METHOD_25; | |
+ } else { | |
+ tp->mcfg = CFG_METHOD_25; | |
+ tp->HwIcVerUnknown = TRUE; | |
+ } | |
+ tp->efuse_ver = EFUSE_SUPPORT_V3; | |
+ break; | |
+ case 0x5C800000: | |
+ if (ICVerID == 0x00000000) { | |
+ tp->mcfg = CFG_METHOD_26; | |
+ } else { | |
+ tp->mcfg = CFG_METHOD_26; | |
+ tp->HwIcVerUnknown = TRUE; | |
+ } | |
+ | |
+ tp->efuse_ver = EFUSE_SUPPORT_V3; | |
+ break; | |
+ case 0x54000000: | |
+ if (ICVerID == 0x00000000) { | |
+ tp->mcfg = CFG_METHOD_29; | |
+ } else if (ICVerID == 0x00100000) { | |
+ tp->mcfg = CFG_METHOD_30; | |
+ } else { | |
+ tp->mcfg = CFG_METHOD_30; | |
+ tp->HwIcVerUnknown = TRUE; | |
+ } | |
+ | |
+ tp->efuse_ver = EFUSE_SUPPORT_V3; | |
+ break; | |
+ default: | |
+ printk("unknown chip version (%x)\n",reg); | |
+ tp->mcfg = CFG_METHOD_DEFAULT; | |
+ tp->HwIcVerUnknown = TRUE; | |
+ tp->efuse_ver = EFUSE_NOT_SUPPORT; | |
+ break; | |
+ } | |
+} | |
+ | |
+static void | |
+rtl8168_print_mac_version(struct rtl8168_private *tp) | |
+{ | |
+ int i; | |
+ for (i = ARRAY_SIZE(rtl_chip_info) - 1; i >= 0; i--) { | |
+ if (tp->mcfg == rtl_chip_info[i].mcfg) { | |
+ dprintk("Realtek PCIe GBE Family Controller mcfg = %04d\n", | |
+ rtl_chip_info[i].mcfg); | |
+ return; | |
+ } | |
+ } | |
+ | |
+ dprintk("mac_version == Unknown\n"); | |
+} | |
+ | |
+static u8 rtl8168_calc_efuse_dummy_bit(u16 reg) | |
+{ | |
+ int s,a,b; | |
+ u8 dummyBitPos = 0; | |
+ | |
+ | |
+ s=reg% 32; | |
+ a=s % 16; | |
+ b=s/16; | |
+ | |
+ if (s/16) { | |
+ dummyBitPos = (u8)(16-a); | |
+ } else { | |
+ dummyBitPos = (u8)a; | |
+ } | |
+ | |
+ return dummyBitPos; | |
+} | |
+ | |
+static u32 rtl8168_decode_efuse_cmd(struct rtl8168_private *tp, u32 DwCmd) | |
+{ | |
+ u16 reg = (u16)((DwCmd & 0x00FE0000) >> 17); | |
+ u32 DummyPos = rtl8168_calc_efuse_dummy_bit(reg); | |
+ u32 DeCodeDwCmd = DwCmd; | |
+ u32 Dw17BitData; | |
+ | |
+ | |
+ if(tp->efuse_ver < 3) { | |
+ DeCodeDwCmd = (DwCmd>>(DummyPos+1))<<DummyPos; | |
+ if(DummyPos > 0) { | |
+ DeCodeDwCmd |= ((DwCmd<<(32-DummyPos))>>(32-DummyPos)); | |
+ } | |
+ } else { | |
+ reg = (u16)((DwCmd & 0x007F0000) >> 16); | |
+ DummyPos = rtl8168_calc_efuse_dummy_bit(reg); | |
+ Dw17BitData = ((DwCmd & BIT_23) >> 23); | |
+ Dw17BitData <<= 16; | |
+ Dw17BitData |= (DwCmd & 0x0000FFFF); | |
+ DeCodeDwCmd = (Dw17BitData>>(DummyPos+1))<<DummyPos; | |
+ if(DummyPos > 0) { | |
+ DeCodeDwCmd |= ((Dw17BitData<<(32-DummyPos))>>(32-DummyPos)); | |
+ } | |
+ } | |
+ | |
+ return DeCodeDwCmd; | |
+} | |
+ | |
+static u8 rtl8168_efuse_read(struct rtl8168_private *tp, u16 reg) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ u8 efuse_data = 0; | |
+ u32 temp; | |
+ int cnt; | |
+ | |
+ if (tp->efuse_ver == EFUSE_NOT_SUPPORT) | |
+ return EFUSE_READ_FAIL; | |
+ | |
+ if (tp->efuse_ver == EFUSE_SUPPORT_V1) { | |
+ temp = EFUSE_READ | ((reg & EFUSE_Reg_Mask) << EFUSE_Reg_Shift); | |
+ RTL_W32(EFUSEAR, temp); | |
+ | |
+ cnt = 0; | |
+ do { | |
+ udelay(100); | |
+ temp = RTL_R32(EFUSEAR); | |
+ cnt++; | |
+ } while (!(temp & EFUSE_READ_OK) && (cnt < EFUSE_Check_Cnt)); | |
+ | |
+ if (cnt == EFUSE_Check_Cnt) | |
+ efuse_data = EFUSE_READ_FAIL; | |
+ else | |
+ efuse_data = (u8)(RTL_R32(EFUSEAR) & EFUSE_Data_Mask); | |
+ } else if (tp->efuse_ver == EFUSE_SUPPORT_V2) { | |
+ temp = (reg/2) & 0x03ff; | |
+ temp <<= 17; | |
+ temp |= EFUSE_READ; | |
+ RTL_W32(EFUSEAR, temp); | |
+ | |
+ cnt = 0; | |
+ do { | |
+ udelay(100); | |
+ temp = RTL_R32(EFUSEAR); | |
+ cnt++; | |
+ } while (!(temp & EFUSE_READ_OK) && (cnt < EFUSE_Check_Cnt)); | |
+ | |
+ if (cnt == EFUSE_Check_Cnt) { | |
+ efuse_data = EFUSE_READ_FAIL; | |
+ } else { | |
+ temp = RTL_R32(EFUSEAR); | |
+ temp = rtl8168_decode_efuse_cmd(tp, temp); | |
+ | |
+ if(reg%2) { | |
+ temp >>= 8; | |
+ efuse_data = (u8)temp; | |
+ } else { | |
+ efuse_data = (u8)temp; | |
+ } | |
+ } | |
+ | |
+ } else if (tp->efuse_ver == EFUSE_SUPPORT_V3) { | |
+ temp = (reg/2) & 0x03ff; | |
+ temp <<= 16; | |
+ temp |= EFUSE_READ; | |
+ RTL_W32(EFUSEAR, temp); | |
+ | |
+ cnt = 0; | |
+ do { | |
+ udelay(100); | |
+ temp = RTL_R32(EFUSEAR); | |
+ cnt++; | |
+ } while (!(temp & EFUSE_READ_OK) && (cnt < EFUSE_Check_Cnt)); | |
+ | |
+ if (cnt == EFUSE_Check_Cnt) { | |
+ efuse_data = EFUSE_READ_FAIL; | |
+ } else { | |
+ temp = RTL_R32(EFUSEAR); | |
+ temp = rtl8168_decode_efuse_cmd(tp, temp); | |
+ | |
+ if(reg%2) { | |
+ temp >>= 8; | |
+ efuse_data = (u8)temp; | |
+ } else { | |
+ efuse_data = (u8)temp; | |
+ } | |
+ } | |
+ } | |
+ | |
+ udelay(20); | |
+ | |
+ return efuse_data; | |
+} | |
+ | |
+static void | |
+rtl8168_tally_counter_addr_fill(struct rtl8168_private *tp) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ | |
+ if (!tp->tally_paddr) | |
+ return; | |
+ | |
+ RTL_W32(CounterAddrHigh, (u64)tp->tally_paddr >> 32); | |
+ RTL_W32(CounterAddrLow, (u64)tp->tally_paddr & (DMA_BIT_MASK(32))); | |
+} | |
+ | |
+static void | |
+rtl8168_tally_counter_clear(struct rtl8168_private *tp) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ | |
+ if (tp->mcfg == CFG_METHOD_1 || tp->mcfg == CFG_METHOD_2 || | |
+ tp->mcfg == CFG_METHOD_3 ) | |
+ return; | |
+ | |
+ if (!tp->tally_paddr) | |
+ return; | |
+ | |
+ RTL_W32(CounterAddrHigh, (u64)tp->tally_paddr >> 32); | |
+ RTL_W32(CounterAddrLow, ((u64)tp->tally_paddr & (DMA_BIT_MASK(32))) | CounterReset); | |
+} | |
+ | |
+static int | |
+rtl8168_is_ups_resume(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ | |
+ return (mac_ocp_read(tp, 0xD408) & BIT_0); | |
+} | |
+ | |
+static void | |
+rtl8168_clear_ups_resume_bit(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ | |
+ mac_ocp_write(tp, 0xD408, mac_ocp_read(tp, 0xD408) & ~(BIT_0)); | |
+} | |
+ | |
+static void | |
+rtl8168_wait_phy_ups_resume(struct net_device *dev, u16 PhyState) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ u16 TmpPhyState; | |
+ int i=0; | |
+ | |
+ do { | |
+ TmpPhyState = mdio_read_phy_ocp(tp, 0x0A42, 0x10); | |
+ TmpPhyState &= 0x7; | |
+ mdelay(1); | |
+ i++; | |
+ } while ((i < 100) && (TmpPhyState != PhyState)); | |
+ | |
+#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18) | |
+ WARN_ON_ONCE(i == 100); | |
+#endif | |
+} | |
+ | |
+void | |
+EnableNowIsOob(struct rtl8168_private *tp) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ | |
+ if( tp->HwSuppNowIsOobVer == 1 ) { | |
+ RTL_W8(MCUCmd_reg, RTL_R8(MCUCmd_reg) | Now_is_oob); | |
+ } | |
+} | |
+ | |
+void | |
+DisableNowIsOob(struct rtl8168_private *tp) | |
+{ | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ | |
+ if( tp->HwSuppNowIsOobVer == 1 ) { | |
+ RTL_W8(MCUCmd_reg, RTL_R8(MCUCmd_reg) & ~Now_is_oob); | |
+ } | |
+} | |
+ | |
+static void | |
+rtl8168_exit_oob(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ u16 data16; | |
+ | |
+ RTL_W32(RxConfig, RTL_R32(RxConfig) & ~(AcceptErr | AcceptRunt | AcceptBroadcast | AcceptMulticast | AcceptMyPhys | AcceptAllPhys)); | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_23: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ Dash2DisableTxRx(dev); | |
+ break; | |
+ } | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_11: | |
+ case CFG_METHOD_12: | |
+ case CFG_METHOD_13: | |
+ case CFG_METHOD_23: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ if (tp->DASH) { | |
+ rtl8168_driver_stop(tp); | |
+ rtl8168_driver_start(tp); | |
+#ifdef ENABLE_DASH_SUPPORT | |
+ DashHwInit(dev); | |
+#endif | |
+ } | |
+ break; | |
+ } | |
+ | |
+ //Disable realwow function | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_18: | |
+ case CFG_METHOD_19: | |
+ RTL_W32(MACOCP, 0xE5A90000); | |
+ RTL_W32(MACOCP, 0xF2100010); | |
+ break; | |
+ case CFG_METHOD_20: | |
+ RTL_W32(MACOCP, 0xE5A90000); | |
+ RTL_W32(MACOCP, 0xE4640000); | |
+ RTL_W32(MACOCP, 0xF2100010); | |
+ break; | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_22: | |
+ RTL_W32(MACOCP, 0x605E0000); | |
+ RTL_W32(MACOCP, (0xE05E << 16) | (RTL_R32(MACOCP) & 0xFFFE)); | |
+ RTL_W32(MACOCP, 0xE9720000); | |
+ RTL_W32(MACOCP, 0xF2140010); | |
+ break; | |
+ case CFG_METHOD_26: | |
+ RTL_W32(MACOCP, 0xE05E00FF); | |
+ RTL_W32(MACOCP, 0xE9720000); | |
+ mac_ocp_write(tp, 0xE428, 0x0010); | |
+ break; | |
+ } | |
+ | |
+#ifndef ENABLE_REALWOW_SUPPORT | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_22: | |
+ rtl8168_eri_write(ioaddr, 0x174, 2, 0x0000, ERIAR_ExGMAC); | |
+ mac_ocp_write(tp, 0xE428, 0x0010); | |
+ break; | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_28: | |
+ rtl8168_eri_write(ioaddr, 0x174, 2, 0x00FF, ERIAR_ExGMAC); | |
+ mac_ocp_write(tp, 0xE428, 0x0010); | |
+ break; | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: { | |
+ u32 csi_tmp; | |
+ csi_tmp = rtl8168_eri_read(ioaddr, 0x174, 2, ERIAR_ExGMAC); | |
+ csi_tmp &= ~(BIT_8); | |
+ csi_tmp |= (BIT_15); | |
+ rtl8168_eri_write(ioaddr, 0x174, 2, csi_tmp, ERIAR_ExGMAC); | |
+ mac_ocp_write(tp, 0xE428, 0x0010); | |
+ } | |
+ break; | |
+ } | |
+#endif //ENABLE_REALWOW_SUPPORT | |
+ | |
+#ifdef ENABLE_REALWOW_SUPPORT | |
+ realwow_hw_init(dev); | |
+#endif | |
+ | |
+ rtl8168_nic_reset(dev); | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_20: | |
+ rtl8168_wait_ll_share_fifo_ready(dev); | |
+ | |
+ data16 = mac_ocp_read(tp, 0xD4DE) | BIT_15; | |
+ mac_ocp_write(tp, 0xD4DE, data16); | |
+ | |
+ rtl8168_wait_ll_share_fifo_ready(dev); | |
+ break; | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_22: | |
+ case CFG_METHOD_23: | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ DisableNowIsOob(tp); | |
+ | |
+ data16 = mac_ocp_read(tp, 0xE8DE) & ~BIT_14; | |
+ mac_ocp_write(tp, 0xE8DE, data16); | |
+ rtl8168_wait_ll_share_fifo_ready(dev); | |
+ | |
+ data16 = mac_ocp_read(tp, 0xE8DE) | BIT_15; | |
+ mac_ocp_write(tp, 0xE8DE, data16); | |
+ | |
+ rtl8168_wait_ll_share_fifo_ready(dev); | |
+ break; | |
+ } | |
+ | |
+ //wait ups resume (phy state 2) | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ if (rtl8168_is_ups_resume(dev)) { | |
+ unsigned long flags; | |
+ | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ | |
+ rtl8168_wait_phy_ups_resume(dev, 2); | |
+ | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ | |
+ rtl8168_clear_ups_resume_bit(dev); | |
+ } | |
+ break; | |
+ }; | |
+} | |
+ | |
+void | |
+rtl8168_hw_disable_mac_mcu_bps(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_22: | |
+ case CFG_METHOD_23: | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ rtl8168_enable_cfg9346_write(tp); | |
+ RTL_W8(Config5, RTL_R8(Config5) & ~BIT_0); | |
+ RTL_W8(Config2, RTL_R8(Config2) & ~BIT_7); | |
+ rtl8168_disable_cfg9346_write(tp); | |
+ | |
+ mac_ocp_write(tp, 0xFC28, 0x0000); | |
+ mac_ocp_write(tp, 0xFC2A, 0x0000); | |
+ mac_ocp_write(tp, 0xFC2C, 0x0000); | |
+ mac_ocp_write(tp, 0xFC2E, 0x0000); | |
+ mac_ocp_write(tp, 0xFC30, 0x0000); | |
+ mac_ocp_write(tp, 0xFC32, 0x0000); | |
+ mac_ocp_write(tp, 0xFC34, 0x0000); | |
+ mac_ocp_write(tp, 0xFC36, 0x0000); | |
+ mdelay(3); | |
+ mac_ocp_write(tp, 0xFC26, 0x0000); | |
+ break; | |
+ } | |
+} | |
+ | |
+static void | |
+rtl8168_hw_mac_mcu_config(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ | |
+ if (tp->NotWrMcuPatchCode == TRUE) return; | |
+ | |
+ if (tp->mcfg == CFG_METHOD_21) { | |
+ mac_ocp_write(tp, 0xE43C, 0x0000); | |
+ mac_ocp_write(tp, 0xE43E, 0x0000); | |
+ | |
+ mac_ocp_write(tp, 0xE434, 0x0004); | |
+ mac_ocp_write(tp, 0xE43C, 0x0004); | |
+ | |
+ rtl8168_hw_disable_mac_mcu_bps(dev); | |
+ | |
+ mac_ocp_write( tp, 0xF800, 0xE008 ); | |
+ mac_ocp_write( tp, 0xF802, 0xE01B ); | |
+ mac_ocp_write( tp, 0xF804, 0xE022 ); | |
+ mac_ocp_write( tp, 0xF806, 0xE094 ); | |
+ mac_ocp_write( tp, 0xF808, 0xE097 ); | |
+ mac_ocp_write( tp, 0xF80A, 0xE09A ); | |
+ mac_ocp_write( tp, 0xF80C, 0xE0B3 ); | |
+ mac_ocp_write( tp, 0xF80E, 0xE0BA ); | |
+ mac_ocp_write( tp, 0xF810, 0x49D2 ); | |
+ mac_ocp_write( tp, 0xF812, 0xF10D ); | |
+ mac_ocp_write( tp, 0xF814, 0x766C ); | |
+ mac_ocp_write( tp, 0xF816, 0x49E2 ); | |
+ mac_ocp_write( tp, 0xF818, 0xF00A ); | |
+ mac_ocp_write( tp, 0xF81A, 0x1EC0 ); | |
+ mac_ocp_write( tp, 0xF81C, 0x8EE1 ); | |
+ mac_ocp_write( tp, 0xF81E, 0xC60A ); | |
+ mac_ocp_write( tp, 0xF820, 0x77C0 ); | |
+ mac_ocp_write( tp, 0xF822, 0x4870 ); | |
+ mac_ocp_write( tp, 0xF824, 0x9FC0 ); | |
+ mac_ocp_write( tp, 0xF826, 0x1EA0 ); | |
+ mac_ocp_write( tp, 0xF828, 0xC707 ); | |
+ mac_ocp_write( tp, 0xF82A, 0x8EE1 ); | |
+ mac_ocp_write( tp, 0xF82C, 0x9D6C ); | |
+ mac_ocp_write( tp, 0xF82E, 0xC603 ); | |
+ mac_ocp_write( tp, 0xF830, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF832, 0xB416 ); | |
+ mac_ocp_write( tp, 0xF834, 0x0076 ); | |
+ mac_ocp_write( tp, 0xF836, 0xE86C ); | |
+ mac_ocp_write( tp, 0xF838, 0xC406 ); | |
+ mac_ocp_write( tp, 0xF83A, 0x7580 ); | |
+ mac_ocp_write( tp, 0xF83C, 0x4852 ); | |
+ mac_ocp_write( tp, 0xF83E, 0x8D80 ); | |
+ mac_ocp_write( tp, 0xF840, 0xC403 ); | |
+ mac_ocp_write( tp, 0xF842, 0xBC00 ); | |
+ mac_ocp_write( tp, 0xF844, 0xD3E0 ); | |
+ mac_ocp_write( tp, 0xF846, 0x02C8 ); | |
+ mac_ocp_write( tp, 0xF848, 0x8918 ); | |
+ mac_ocp_write( tp, 0xF84A, 0xE815 ); | |
+ mac_ocp_write( tp, 0xF84C, 0x1100 ); | |
+ mac_ocp_write( tp, 0xF84E, 0xF011 ); | |
+ mac_ocp_write( tp, 0xF850, 0xE812 ); | |
+ mac_ocp_write( tp, 0xF852, 0x4990 ); | |
+ mac_ocp_write( tp, 0xF854, 0xF002 ); | |
+ mac_ocp_write( tp, 0xF856, 0xE817 ); | |
+ mac_ocp_write( tp, 0xF858, 0xE80E ); | |
+ mac_ocp_write( tp, 0xF85A, 0x4992 ); | |
+ mac_ocp_write( tp, 0xF85C, 0xF002 ); | |
+ mac_ocp_write( tp, 0xF85E, 0xE80E ); | |
+ mac_ocp_write( tp, 0xF860, 0xE80A ); | |
+ mac_ocp_write( tp, 0xF862, 0x4993 ); | |
+ mac_ocp_write( tp, 0xF864, 0xF002 ); | |
+ mac_ocp_write( tp, 0xF866, 0xE818 ); | |
+ mac_ocp_write( tp, 0xF868, 0xE806 ); | |
+ mac_ocp_write( tp, 0xF86A, 0x4991 ); | |
+ mac_ocp_write( tp, 0xF86C, 0xF002 ); | |
+ mac_ocp_write( tp, 0xF86E, 0xE838 ); | |
+ mac_ocp_write( tp, 0xF870, 0xC25E ); | |
+ mac_ocp_write( tp, 0xF872, 0xBA00 ); | |
+ mac_ocp_write( tp, 0xF874, 0xC056 ); | |
+ mac_ocp_write( tp, 0xF876, 0x7100 ); | |
+ mac_ocp_write( tp, 0xF878, 0xFF80 ); | |
+ mac_ocp_write( tp, 0xF87A, 0x7100 ); | |
+ mac_ocp_write( tp, 0xF87C, 0x4892 ); | |
+ mac_ocp_write( tp, 0xF87E, 0x4813 ); | |
+ mac_ocp_write( tp, 0xF880, 0x8900 ); | |
+ mac_ocp_write( tp, 0xF882, 0xE00A ); | |
+ mac_ocp_write( tp, 0xF884, 0x7100 ); | |
+ mac_ocp_write( tp, 0xF886, 0x4890 ); | |
+ mac_ocp_write( tp, 0xF888, 0x4813 ); | |
+ mac_ocp_write( tp, 0xF88A, 0x8900 ); | |
+ mac_ocp_write( tp, 0xF88C, 0xC74B ); | |
+ mac_ocp_write( tp, 0xF88E, 0x74F8 ); | |
+ mac_ocp_write( tp, 0xF890, 0x48C2 ); | |
+ mac_ocp_write( tp, 0xF892, 0x4841 ); | |
+ mac_ocp_write( tp, 0xF894, 0x8CF8 ); | |
+ mac_ocp_write( tp, 0xF896, 0xC746 ); | |
+ mac_ocp_write( tp, 0xF898, 0x74FC ); | |
+ mac_ocp_write( tp, 0xF89A, 0x49C0 ); | |
+ mac_ocp_write( tp, 0xF89C, 0xF120 ); | |
+ mac_ocp_write( tp, 0xF89E, 0x49C1 ); | |
+ mac_ocp_write( tp, 0xF8A0, 0xF11E ); | |
+ mac_ocp_write( tp, 0xF8A2, 0x74F8 ); | |
+ mac_ocp_write( tp, 0xF8A4, 0x49C0 ); | |
+ mac_ocp_write( tp, 0xF8A6, 0xF01B ); | |
+ mac_ocp_write( tp, 0xF8A8, 0x49C6 ); | |
+ mac_ocp_write( tp, 0xF8AA, 0xF119 ); | |
+ mac_ocp_write( tp, 0xF8AC, 0x74F8 ); | |
+ mac_ocp_write( tp, 0xF8AE, 0x49C4 ); | |
+ mac_ocp_write( tp, 0xF8B0, 0xF013 ); | |
+ mac_ocp_write( tp, 0xF8B2, 0xC536 ); | |
+ mac_ocp_write( tp, 0xF8B4, 0x74B0 ); | |
+ mac_ocp_write( tp, 0xF8B6, 0x49C1 ); | |
+ mac_ocp_write( tp, 0xF8B8, 0xF1FD ); | |
+ mac_ocp_write( tp, 0xF8BA, 0xC537 ); | |
+ mac_ocp_write( tp, 0xF8BC, 0xC434 ); | |
+ mac_ocp_write( tp, 0xF8BE, 0x9CA0 ); | |
+ mac_ocp_write( tp, 0xF8C0, 0xC435 ); | |
+ mac_ocp_write( tp, 0xF8C2, 0x1C13 ); | |
+ mac_ocp_write( tp, 0xF8C4, 0x484F ); | |
+ mac_ocp_write( tp, 0xF8C6, 0x9CA2 ); | |
+ mac_ocp_write( tp, 0xF8C8, 0xC52B ); | |
+ mac_ocp_write( tp, 0xF8CA, 0x74B0 ); | |
+ mac_ocp_write( tp, 0xF8CC, 0x49C1 ); | |
+ mac_ocp_write( tp, 0xF8CE, 0xF1FD ); | |
+ mac_ocp_write( tp, 0xF8D0, 0x74F8 ); | |
+ mac_ocp_write( tp, 0xF8D2, 0x48C4 ); | |
+ mac_ocp_write( tp, 0xF8D4, 0x8CF8 ); | |
+ mac_ocp_write( tp, 0xF8D6, 0x7100 ); | |
+ mac_ocp_write( tp, 0xF8D8, 0x4893 ); | |
+ mac_ocp_write( tp, 0xF8DA, 0x8900 ); | |
+ mac_ocp_write( tp, 0xF8DC, 0xFF80 ); | |
+ mac_ocp_write( tp, 0xF8DE, 0xC520 ); | |
+ mac_ocp_write( tp, 0xF8E0, 0x74B0 ); | |
+ mac_ocp_write( tp, 0xF8E2, 0x49C1 ); | |
+ mac_ocp_write( tp, 0xF8E4, 0xF11C ); | |
+ mac_ocp_write( tp, 0xF8E6, 0xC71E ); | |
+ mac_ocp_write( tp, 0xF8E8, 0x74FC ); | |
+ mac_ocp_write( tp, 0xF8EA, 0x49C1 ); | |
+ mac_ocp_write( tp, 0xF8EC, 0xF118 ); | |
+ mac_ocp_write( tp, 0xF8EE, 0x49C0 ); | |
+ mac_ocp_write( tp, 0xF8F0, 0xF116 ); | |
+ mac_ocp_write( tp, 0xF8F2, 0x74F8 ); | |
+ mac_ocp_write( tp, 0xF8F4, 0x49C0 ); | |
+ mac_ocp_write( tp, 0xF8F6, 0xF013 ); | |
+ mac_ocp_write( tp, 0xF8F8, 0x48C3 ); | |
+ mac_ocp_write( tp, 0xF8FA, 0x8CF8 ); | |
+ mac_ocp_write( tp, 0xF8FC, 0xC516 ); | |
+ mac_ocp_write( tp, 0xF8FE, 0x74A2 ); | |
+ mac_ocp_write( tp, 0xF900, 0x49CE ); | |
+ mac_ocp_write( tp, 0xF902, 0xF1FE ); | |
+ mac_ocp_write( tp, 0xF904, 0xC411 ); | |
+ mac_ocp_write( tp, 0xF906, 0x9CA0 ); | |
+ mac_ocp_write( tp, 0xF908, 0xC411 ); | |
+ mac_ocp_write( tp, 0xF90A, 0x1C13 ); | |
+ mac_ocp_write( tp, 0xF90C, 0x484F ); | |
+ mac_ocp_write( tp, 0xF90E, 0x9CA2 ); | |
+ mac_ocp_write( tp, 0xF910, 0x74A2 ); | |
+ mac_ocp_write( tp, 0xF912, 0x49CF ); | |
+ mac_ocp_write( tp, 0xF914, 0xF1FE ); | |
+ mac_ocp_write( tp, 0xF916, 0x7100 ); | |
+ mac_ocp_write( tp, 0xF918, 0x4891 ); | |
+ mac_ocp_write( tp, 0xF91A, 0x8900 ); | |
+ mac_ocp_write( tp, 0xF91C, 0xFF80 ); | |
+ mac_ocp_write( tp, 0xF91E, 0xE400 ); | |
+ mac_ocp_write( tp, 0xF920, 0xD3E0 ); | |
+ mac_ocp_write( tp, 0xF922, 0xE000 ); | |
+ mac_ocp_write( tp, 0xF924, 0x0481 ); | |
+ mac_ocp_write( tp, 0xF926, 0x0C81 ); | |
+ mac_ocp_write( tp, 0xF928, 0xDE20 ); | |
+ mac_ocp_write( tp, 0xF92A, 0x0000 ); | |
+ mac_ocp_write( tp, 0xF92C, 0x0992 ); | |
+ mac_ocp_write( tp, 0xF92E, 0x1B76 ); | |
+ mac_ocp_write( tp, 0xF930, 0xC602 ); | |
+ mac_ocp_write( tp, 0xF932, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF934, 0x059C ); | |
+ mac_ocp_write( tp, 0xF936, 0x1B76 ); | |
+ mac_ocp_write( tp, 0xF938, 0xC602 ); | |
+ mac_ocp_write( tp, 0xF93A, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF93C, 0x065A ); | |
+ mac_ocp_write( tp, 0xF93E, 0xB400 ); | |
+ mac_ocp_write( tp, 0xF940, 0x18DE ); | |
+ mac_ocp_write( tp, 0xF942, 0x2008 ); | |
+ mac_ocp_write( tp, 0xF944, 0x4001 ); | |
+ mac_ocp_write( tp, 0xF946, 0xF10F ); | |
+ mac_ocp_write( tp, 0xF948, 0x7342 ); | |
+ mac_ocp_write( tp, 0xF94A, 0x1880 ); | |
+ mac_ocp_write( tp, 0xF94C, 0x2008 ); | |
+ mac_ocp_write( tp, 0xF94E, 0x0009 ); | |
+ mac_ocp_write( tp, 0xF950, 0x4018 ); | |
+ mac_ocp_write( tp, 0xF952, 0xF109 ); | |
+ mac_ocp_write( tp, 0xF954, 0x7340 ); | |
+ mac_ocp_write( tp, 0xF956, 0x25BC ); | |
+ mac_ocp_write( tp, 0xF958, 0x130F ); | |
+ mac_ocp_write( tp, 0xF95A, 0xF105 ); | |
+ mac_ocp_write( tp, 0xF95C, 0xC00A ); | |
+ mac_ocp_write( tp, 0xF95E, 0x7300 ); | |
+ mac_ocp_write( tp, 0xF960, 0x4831 ); | |
+ mac_ocp_write( tp, 0xF962, 0x9B00 ); | |
+ mac_ocp_write( tp, 0xF964, 0xB000 ); | |
+ mac_ocp_write( tp, 0xF966, 0x7340 ); | |
+ mac_ocp_write( tp, 0xF968, 0x8320 ); | |
+ mac_ocp_write( tp, 0xF96A, 0xC302 ); | |
+ mac_ocp_write( tp, 0xF96C, 0xBB00 ); | |
+ mac_ocp_write( tp, 0xF96E, 0x0C12 ); | |
+ mac_ocp_write( tp, 0xF970, 0xE860 ); | |
+ mac_ocp_write( tp, 0xF972, 0xC406 ); | |
+ mac_ocp_write( tp, 0xF974, 0x7580 ); | |
+ mac_ocp_write( tp, 0xF976, 0x4851 ); | |
+ mac_ocp_write( tp, 0xF978, 0x8D80 ); | |
+ mac_ocp_write( tp, 0xF97A, 0xC403 ); | |
+ mac_ocp_write( tp, 0xF97C, 0xBC00 ); | |
+ mac_ocp_write( tp, 0xF97E, 0xD3E0 ); | |
+ mac_ocp_write( tp, 0xF980, 0x02C8 ); | |
+ mac_ocp_write( tp, 0xF982, 0xC406 ); | |
+ mac_ocp_write( tp, 0xF984, 0x7580 ); | |
+ mac_ocp_write( tp, 0xF986, 0x4850 ); | |
+ mac_ocp_write( tp, 0xF988, 0x8D80 ); | |
+ mac_ocp_write( tp, 0xF98A, 0xC403 ); | |
+ mac_ocp_write( tp, 0xF98C, 0xBC00 ); | |
+ mac_ocp_write( tp, 0xF98E, 0xD3E0 ); | |
+ mac_ocp_write( tp, 0xF990, 0x0298 ); | |
+ | |
+ mac_ocp_write( tp, 0xDE30, 0x0080 ); | |
+ | |
+ mac_ocp_write( tp, 0xFC26, 0x8000 ); | |
+ | |
+ mac_ocp_write( tp, 0xFC28, 0x0075 ); | |
+ mac_ocp_write( tp, 0xFC2A, 0x02B1 ); | |
+ mac_ocp_write( tp, 0xFC2C, 0x0991 ); | |
+ mac_ocp_write( tp, 0xFC2E, 0x059B ); | |
+ mac_ocp_write( tp, 0xFC30, 0x0659 ); | |
+ mac_ocp_write( tp, 0xFC32, 0x0000 ); | |
+ mac_ocp_write( tp, 0xFC34, 0x02C7 ); | |
+ mac_ocp_write( tp, 0xFC36, 0x0279 ); | |
+ } else if (tp->mcfg == CFG_METHOD_24) { | |
+ rtl8168_hw_disable_mac_mcu_bps(dev); | |
+ | |
+ mac_ocp_write( tp, 0xF800, 0xE008 ); | |
+ mac_ocp_write( tp, 0xF802, 0xE011 ); | |
+ mac_ocp_write( tp, 0xF804, 0xE015 ); | |
+ mac_ocp_write( tp, 0xF806, 0xE018 ); | |
+ mac_ocp_write( tp, 0xF808, 0xE01B ); | |
+ mac_ocp_write( tp, 0xF80A, 0xE027 ); | |
+ mac_ocp_write( tp, 0xF80C, 0xE043 ); | |
+ mac_ocp_write( tp, 0xF80E, 0xE065 ); | |
+ mac_ocp_write( tp, 0xF810, 0x49E2 ); | |
+ mac_ocp_write( tp, 0xF812, 0xF005 ); | |
+ mac_ocp_write( tp, 0xF814, 0x49EA ); | |
+ mac_ocp_write( tp, 0xF816, 0xF003 ); | |
+ mac_ocp_write( tp, 0xF818, 0xC404 ); | |
+ mac_ocp_write( tp, 0xF81A, 0xBC00 ); | |
+ mac_ocp_write( tp, 0xF81C, 0xC403 ); | |
+ mac_ocp_write( tp, 0xF81E, 0xBC00 ); | |
+ mac_ocp_write( tp, 0xF820, 0x0496 ); | |
+ mac_ocp_write( tp, 0xF822, 0x051A ); | |
+ mac_ocp_write( tp, 0xF824, 0x1D01 ); | |
+ mac_ocp_write( tp, 0xF826, 0x8DE8 ); | |
+ mac_ocp_write( tp, 0xF828, 0xC602 ); | |
+ mac_ocp_write( tp, 0xF82A, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF82C, 0x0206 ); | |
+ mac_ocp_write( tp, 0xF82E, 0x1B76 ); | |
+ mac_ocp_write( tp, 0xF830, 0xC202 ); | |
+ mac_ocp_write( tp, 0xF832, 0xBA00 ); | |
+ mac_ocp_write( tp, 0xF834, 0x058A ); | |
+ mac_ocp_write( tp, 0xF836, 0x1B76 ); | |
+ mac_ocp_write( tp, 0xF838, 0xC602 ); | |
+ mac_ocp_write( tp, 0xF83A, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF83C, 0x0648 ); | |
+ mac_ocp_write( tp, 0xF83E, 0x74E6 ); | |
+ mac_ocp_write( tp, 0xF840, 0x1B78 ); | |
+ mac_ocp_write( tp, 0xF842, 0x46DC ); | |
+ mac_ocp_write( tp, 0xF844, 0x1300 ); | |
+ mac_ocp_write( tp, 0xF846, 0xF005 ); | |
+ mac_ocp_write( tp, 0xF848, 0x74F8 ); | |
+ mac_ocp_write( tp, 0xF84A, 0x48C3 ); | |
+ mac_ocp_write( tp, 0xF84C, 0x48C4 ); | |
+ mac_ocp_write( tp, 0xF84E, 0x8CF8 ); | |
+ mac_ocp_write( tp, 0xF850, 0x64E7 ); | |
+ mac_ocp_write( tp, 0xF852, 0xC302 ); | |
+ mac_ocp_write( tp, 0xF854, 0xBB00 ); | |
+ mac_ocp_write( tp, 0xF856, 0x068E ); | |
+ mac_ocp_write( tp, 0xF858, 0x74E4 ); | |
+ mac_ocp_write( tp, 0xF85A, 0x49C5 ); | |
+ mac_ocp_write( tp, 0xF85C, 0xF106 ); | |
+ mac_ocp_write( tp, 0xF85E, 0x49C6 ); | |
+ mac_ocp_write( tp, 0xF860, 0xF107 ); | |
+ mac_ocp_write( tp, 0xF862, 0x48C8 ); | |
+ mac_ocp_write( tp, 0xF864, 0x48C9 ); | |
+ mac_ocp_write( tp, 0xF866, 0xE011 ); | |
+ mac_ocp_write( tp, 0xF868, 0x48C9 ); | |
+ mac_ocp_write( tp, 0xF86A, 0x4848 ); | |
+ mac_ocp_write( tp, 0xF86C, 0xE00E ); | |
+ mac_ocp_write( tp, 0xF86E, 0x4848 ); | |
+ mac_ocp_write( tp, 0xF870, 0x49C7 ); | |
+ mac_ocp_write( tp, 0xF872, 0xF00A ); | |
+ mac_ocp_write( tp, 0xF874, 0x48C9 ); | |
+ mac_ocp_write( tp, 0xF876, 0xC60D ); | |
+ mac_ocp_write( tp, 0xF878, 0x1D1F ); | |
+ mac_ocp_write( tp, 0xF87A, 0x8DC2 ); | |
+ mac_ocp_write( tp, 0xF87C, 0x1D00 ); | |
+ mac_ocp_write( tp, 0xF87E, 0x8DC3 ); | |
+ mac_ocp_write( tp, 0xF880, 0x1D11 ); | |
+ mac_ocp_write( tp, 0xF882, 0x8DC0 ); | |
+ mac_ocp_write( tp, 0xF884, 0xE002 ); | |
+ mac_ocp_write( tp, 0xF886, 0x4849 ); | |
+ mac_ocp_write( tp, 0xF888, 0x94E5 ); | |
+ mac_ocp_write( tp, 0xF88A, 0xC602 ); | |
+ mac_ocp_write( tp, 0xF88C, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF88E, 0x0238 ); | |
+ mac_ocp_write( tp, 0xF890, 0xE434 ); | |
+ mac_ocp_write( tp, 0xF892, 0x49D9 ); | |
+ mac_ocp_write( tp, 0xF894, 0xF01B ); | |
+ mac_ocp_write( tp, 0xF896, 0xC31E ); | |
+ mac_ocp_write( tp, 0xF898, 0x7464 ); | |
+ mac_ocp_write( tp, 0xF89A, 0x49C4 ); | |
+ mac_ocp_write( tp, 0xF89C, 0xF114 ); | |
+ mac_ocp_write( tp, 0xF89E, 0xC31B ); | |
+ mac_ocp_write( tp, 0xF8A0, 0x6460 ); | |
+ mac_ocp_write( tp, 0xF8A2, 0x14FA ); | |
+ mac_ocp_write( tp, 0xF8A4, 0xFA02 ); | |
+ mac_ocp_write( tp, 0xF8A6, 0xE00F ); | |
+ mac_ocp_write( tp, 0xF8A8, 0xC317 ); | |
+ mac_ocp_write( tp, 0xF8AA, 0x7460 ); | |
+ mac_ocp_write( tp, 0xF8AC, 0x49C0 ); | |
+ mac_ocp_write( tp, 0xF8AE, 0xF10B ); | |
+ mac_ocp_write( tp, 0xF8B0, 0xC311 ); | |
+ mac_ocp_write( tp, 0xF8B2, 0x7462 ); | |
+ mac_ocp_write( tp, 0xF8B4, 0x48C1 ); | |
+ mac_ocp_write( tp, 0xF8B6, 0x9C62 ); | |
+ mac_ocp_write( tp, 0xF8B8, 0x4841 ); | |
+ mac_ocp_write( tp, 0xF8BA, 0x9C62 ); | |
+ mac_ocp_write( tp, 0xF8BC, 0xC30A ); | |
+ mac_ocp_write( tp, 0xF8BE, 0x1C04 ); | |
+ mac_ocp_write( tp, 0xF8C0, 0x8C60 ); | |
+ mac_ocp_write( tp, 0xF8C2, 0xE004 ); | |
+ mac_ocp_write( tp, 0xF8C4, 0x1C15 ); | |
+ mac_ocp_write( tp, 0xF8C6, 0xC305 ); | |
+ mac_ocp_write( tp, 0xF8C8, 0x8C60 ); | |
+ mac_ocp_write( tp, 0xF8CA, 0xC602 ); | |
+ mac_ocp_write( tp, 0xF8CC, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF8CE, 0x0374 ); | |
+ mac_ocp_write( tp, 0xF8D0, 0xE434 ); | |
+ mac_ocp_write( tp, 0xF8D2, 0xE030 ); | |
+ mac_ocp_write( tp, 0xF8D4, 0xE61C ); | |
+ mac_ocp_write( tp, 0xF8D6, 0xE906 ); | |
+ mac_ocp_write( tp, 0xF8D8, 0xC602 ); | |
+ mac_ocp_write( tp, 0xF8DA, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF8DC, 0x0000 ); | |
+ | |
+ mac_ocp_write( tp, 0xFC26, 0x8000 ); | |
+ | |
+ mac_ocp_write( tp, 0xFC28, 0x0493 ); | |
+ mac_ocp_write( tp, 0xFC2A, 0x0205 ); | |
+ mac_ocp_write( tp, 0xFC2C, 0x0589 ); | |
+ mac_ocp_write( tp, 0xFC2E, 0x0647 ); | |
+ mac_ocp_write( tp, 0xFC30, 0x0000 ); | |
+ mac_ocp_write( tp, 0xFC32, 0x0215 ); | |
+ mac_ocp_write( tp, 0xFC34, 0x0285 ); | |
+ } else if (tp->mcfg == CFG_METHOD_25) { | |
+ rtl8168_hw_disable_mac_mcu_bps(dev); | |
+ | |
+ mac_ocp_write( tp, 0xF800, 0xE008 ); | |
+ mac_ocp_write( tp, 0xF802, 0xE00A ); | |
+ mac_ocp_write( tp, 0xF804, 0xE01B ); | |
+ mac_ocp_write( tp, 0xF806, 0xE03D ); | |
+ mac_ocp_write( tp, 0xF808, 0xE04C ); | |
+ mac_ocp_write( tp, 0xF80A, 0xE053 ); | |
+ mac_ocp_write( tp, 0xF80C, 0xE055 ); | |
+ mac_ocp_write( tp, 0xF80E, 0xE06C ); | |
+ mac_ocp_write( tp, 0xF810, 0xC202 ); | |
+ mac_ocp_write( tp, 0xF812, 0xBA00 ); | |
+ mac_ocp_write( tp, 0xF814, 0x0DFC ); | |
+ mac_ocp_write( tp, 0xF816, 0xC511 ); | |
+ mac_ocp_write( tp, 0xF818, 0x74A2 ); | |
+ mac_ocp_write( tp, 0xF81A, 0x8CA5 ); | |
+ mac_ocp_write( tp, 0xF81C, 0x74A0 ); | |
+ mac_ocp_write( tp, 0xF81E, 0xC50B ); | |
+ mac_ocp_write( tp, 0xF820, 0x9CA2 ); | |
+ mac_ocp_write( tp, 0xF822, 0x1C11 ); | |
+ mac_ocp_write( tp, 0xF824, 0x9CA0 ); | |
+ mac_ocp_write( tp, 0xF826, 0xC506 ); | |
+ mac_ocp_write( tp, 0xF828, 0xBD00 ); | |
+ mac_ocp_write( tp, 0xF82A, 0x7444 ); | |
+ mac_ocp_write( tp, 0xF82C, 0xC502 ); | |
+ mac_ocp_write( tp, 0xF82E, 0xBD00 ); | |
+ mac_ocp_write( tp, 0xF830, 0x0A30 ); | |
+ mac_ocp_write( tp, 0xF832, 0x0A46 ); | |
+ mac_ocp_write( tp, 0xF834, 0xE434 ); | |
+ mac_ocp_write( tp, 0xF836, 0xE096 ); | |
+ mac_ocp_write( tp, 0xF838, 0xD3C0 ); | |
+ mac_ocp_write( tp, 0xF83A, 0x49D9 ); | |
+ mac_ocp_write( tp, 0xF83C, 0xF019 ); | |
+ mac_ocp_write( tp, 0xF83E, 0xC520 ); | |
+ mac_ocp_write( tp, 0xF840, 0x64A5 ); | |
+ mac_ocp_write( tp, 0xF842, 0x1400 ); | |
+ mac_ocp_write( tp, 0xF844, 0xF007 ); | |
+ mac_ocp_write( tp, 0xF846, 0x0C01 ); | |
+ mac_ocp_write( tp, 0xF848, 0x8CA5 ); | |
+ mac_ocp_write( tp, 0xF84A, 0x1C15 ); | |
+ mac_ocp_write( tp, 0xF84C, 0xC515 ); | |
+ mac_ocp_write( tp, 0xF84E, 0x9CA0 ); | |
+ mac_ocp_write( tp, 0xF850, 0xE00F ); | |
+ mac_ocp_write( tp, 0xF852, 0xC513 ); | |
+ mac_ocp_write( tp, 0xF854, 0x74A0 ); | |
+ mac_ocp_write( tp, 0xF856, 0x48C8 ); | |
+ mac_ocp_write( tp, 0xF858, 0x48CA ); | |
+ mac_ocp_write( tp, 0xF85A, 0x9CA0 ); | |
+ mac_ocp_write( tp, 0xF85C, 0xC510 ); | |
+ mac_ocp_write( tp, 0xF85E, 0x1B00 ); | |
+ mac_ocp_write( tp, 0xF860, 0x9BA0 ); | |
+ mac_ocp_write( tp, 0xF862, 0x1B1C ); | |
+ mac_ocp_write( tp, 0xF864, 0x483F ); | |
+ mac_ocp_write( tp, 0xF866, 0x9BA2 ); | |
+ mac_ocp_write( tp, 0xF868, 0x1B04 ); | |
+ mac_ocp_write( tp, 0xF86A, 0xC506 ); | |
+ mac_ocp_write( tp, 0xF86C, 0x9BA0 ); | |
+ mac_ocp_write( tp, 0xF86E, 0xC603 ); | |
+ mac_ocp_write( tp, 0xF870, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF872, 0x0298 ); | |
+ mac_ocp_write( tp, 0xF874, 0x03DE ); | |
+ mac_ocp_write( tp, 0xF876, 0xE434 ); | |
+ mac_ocp_write( tp, 0xF878, 0xE096 ); | |
+ mac_ocp_write( tp, 0xF87A, 0xE860 ); | |
+ mac_ocp_write( tp, 0xF87C, 0xDE20 ); | |
+ mac_ocp_write( tp, 0xF87E, 0xD3C0 ); | |
+ mac_ocp_write( tp, 0xF880, 0xC50F ); | |
+ mac_ocp_write( tp, 0xF882, 0x76A4 ); | |
+ mac_ocp_write( tp, 0xF884, 0x49E3 ); | |
+ mac_ocp_write( tp, 0xF886, 0xF007 ); | |
+ mac_ocp_write( tp, 0xF888, 0x49C0 ); | |
+ mac_ocp_write( tp, 0xF88A, 0xF103 ); | |
+ mac_ocp_write( tp, 0xF88C, 0xC607 ); | |
+ mac_ocp_write( tp, 0xF88E, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF890, 0xC606 ); | |
+ mac_ocp_write( tp, 0xF892, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF894, 0xC602 ); | |
+ mac_ocp_write( tp, 0xF896, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF898, 0x0A88 ); | |
+ mac_ocp_write( tp, 0xF89A, 0x0A64 ); | |
+ mac_ocp_write( tp, 0xF89C, 0x0A68 ); | |
+ mac_ocp_write( tp, 0xF89E, 0xDC00 ); | |
+ mac_ocp_write( tp, 0xF8A0, 0xC707 ); | |
+ mac_ocp_write( tp, 0xF8A2, 0x1D00 ); | |
+ mac_ocp_write( tp, 0xF8A4, 0x8DE2 ); | |
+ mac_ocp_write( tp, 0xF8A6, 0x48C1 ); | |
+ mac_ocp_write( tp, 0xF8A8, 0xC502 ); | |
+ mac_ocp_write( tp, 0xF8AA, 0xBD00 ); | |
+ mac_ocp_write( tp, 0xF8AC, 0x00AA ); | |
+ mac_ocp_write( tp, 0xF8AE, 0xE0C0 ); | |
+ mac_ocp_write( tp, 0xF8B0, 0xC502 ); | |
+ mac_ocp_write( tp, 0xF8B2, 0xBD00 ); | |
+ mac_ocp_write( tp, 0xF8B4, 0x0132 ); | |
+ mac_ocp_write( tp, 0xF8B6, 0xC50C ); | |
+ mac_ocp_write( tp, 0xF8B8, 0x74A2 ); | |
+ mac_ocp_write( tp, 0xF8BA, 0x49CE ); | |
+ mac_ocp_write( tp, 0xF8BC, 0xF1FE ); | |
+ mac_ocp_write( tp, 0xF8BE, 0x1C00 ); | |
+ mac_ocp_write( tp, 0xF8C0, 0x9EA0 ); | |
+ mac_ocp_write( tp, 0xF8C2, 0x1C1C ); | |
+ mac_ocp_write( tp, 0xF8C4, 0x484F ); | |
+ mac_ocp_write( tp, 0xF8C6, 0x9CA2 ); | |
+ mac_ocp_write( tp, 0xF8C8, 0xC402 ); | |
+ mac_ocp_write( tp, 0xF8CA, 0xBC00 ); | |
+ mac_ocp_write( tp, 0xF8CC, 0x0AFA ); | |
+ mac_ocp_write( tp, 0xF8CE, 0xDE20 ); | |
+ mac_ocp_write( tp, 0xF8D0, 0xE000 ); | |
+ mac_ocp_write( tp, 0xF8D2, 0xE092 ); | |
+ mac_ocp_write( tp, 0xF8D4, 0xE430 ); | |
+ mac_ocp_write( tp, 0xF8D6, 0xDE20 ); | |
+ mac_ocp_write( tp, 0xF8D8, 0xE0C0 ); | |
+ mac_ocp_write( tp, 0xF8DA, 0xE860 ); | |
+ mac_ocp_write( tp, 0xF8DC, 0xE84C ); | |
+ mac_ocp_write( tp, 0xF8DE, 0xB400 ); | |
+ mac_ocp_write( tp, 0xF8E0, 0xB430 ); | |
+ mac_ocp_write( tp, 0xF8E2, 0xE410 ); | |
+ mac_ocp_write( tp, 0xF8E4, 0xC0AE ); | |
+ mac_ocp_write( tp, 0xF8E6, 0xB407 ); | |
+ mac_ocp_write( tp, 0xF8E8, 0xB406 ); | |
+ mac_ocp_write( tp, 0xF8EA, 0xB405 ); | |
+ mac_ocp_write( tp, 0xF8EC, 0xB404 ); | |
+ mac_ocp_write( tp, 0xF8EE, 0xB403 ); | |
+ mac_ocp_write( tp, 0xF8F0, 0xB402 ); | |
+ mac_ocp_write( tp, 0xF8F2, 0xB401 ); | |
+ mac_ocp_write( tp, 0xF8F4, 0xC7EE ); | |
+ mac_ocp_write( tp, 0xF8F6, 0x76F4 ); | |
+ mac_ocp_write( tp, 0xF8F8, 0xC2ED ); | |
+ mac_ocp_write( tp, 0xF8FA, 0xC3ED ); | |
+ mac_ocp_write( tp, 0xF8FC, 0xC1EF ); | |
+ mac_ocp_write( tp, 0xF8FE, 0xC5F3 ); | |
+ mac_ocp_write( tp, 0xF900, 0x74A0 ); | |
+ mac_ocp_write( tp, 0xF902, 0x49CD ); | |
+ mac_ocp_write( tp, 0xF904, 0xF001 ); | |
+ mac_ocp_write( tp, 0xF906, 0xC5EE ); | |
+ mac_ocp_write( tp, 0xF908, 0x74A0 ); | |
+ mac_ocp_write( tp, 0xF90A, 0x49C1 ); | |
+ mac_ocp_write( tp, 0xF90C, 0xF105 ); | |
+ mac_ocp_write( tp, 0xF90E, 0xC5E4 ); | |
+ mac_ocp_write( tp, 0xF910, 0x74A2 ); | |
+ mac_ocp_write( tp, 0xF912, 0x49CE ); | |
+ mac_ocp_write( tp, 0xF914, 0xF00B ); | |
+ mac_ocp_write( tp, 0xF916, 0x7444 ); | |
+ mac_ocp_write( tp, 0xF918, 0x484B ); | |
+ mac_ocp_write( tp, 0xF91A, 0x9C44 ); | |
+ mac_ocp_write( tp, 0xF91C, 0x1C10 ); | |
+ mac_ocp_write( tp, 0xF91E, 0x9C62 ); | |
+ mac_ocp_write( tp, 0xF920, 0x1C11 ); | |
+ mac_ocp_write( tp, 0xF922, 0x8C60 ); | |
+ mac_ocp_write( tp, 0xF924, 0x1C00 ); | |
+ mac_ocp_write( tp, 0xF926, 0x9CF6 ); | |
+ mac_ocp_write( tp, 0xF928, 0xE0E1 ); | |
+ mac_ocp_write( tp, 0xF92A, 0x49E7 ); | |
+ mac_ocp_write( tp, 0xF92C, 0xF016 ); | |
+ mac_ocp_write( tp, 0xF92E, 0x1D80 ); | |
+ mac_ocp_write( tp, 0xF930, 0x8DF4 ); | |
+ mac_ocp_write( tp, 0xF932, 0x74F8 ); | |
+ mac_ocp_write( tp, 0xF934, 0x4843 ); | |
+ mac_ocp_write( tp, 0xF936, 0x8CF8 ); | |
+ mac_ocp_write( tp, 0xF938, 0x74F8 ); | |
+ mac_ocp_write( tp, 0xF93A, 0x74F8 ); | |
+ mac_ocp_write( tp, 0xF93C, 0x7444 ); | |
+ mac_ocp_write( tp, 0xF93E, 0x48C8 ); | |
+ mac_ocp_write( tp, 0xF940, 0x48C9 ); | |
+ mac_ocp_write( tp, 0xF942, 0x48CA ); | |
+ mac_ocp_write( tp, 0xF944, 0x9C44 ); | |
+ mac_ocp_write( tp, 0xF946, 0x74F8 ); | |
+ mac_ocp_write( tp, 0xF948, 0x4844 ); | |
+ mac_ocp_write( tp, 0xF94A, 0x8CF8 ); | |
+ mac_ocp_write( tp, 0xF94C, 0x1E01 ); | |
+ mac_ocp_write( tp, 0xF94E, 0xE8D0 ); | |
+ mac_ocp_write( tp, 0xF950, 0x7420 ); | |
+ mac_ocp_write( tp, 0xF952, 0x48C1 ); | |
+ mac_ocp_write( tp, 0xF954, 0x9C20 ); | |
+ mac_ocp_write( tp, 0xF956, 0xE0CA ); | |
+ mac_ocp_write( tp, 0xF958, 0x49E6 ); | |
+ mac_ocp_write( tp, 0xF95A, 0xF029 ); | |
+ mac_ocp_write( tp, 0xF95C, 0x1D40 ); | |
+ mac_ocp_write( tp, 0xF95E, 0x8DF4 ); | |
+ mac_ocp_write( tp, 0xF960, 0x74FC ); | |
+ mac_ocp_write( tp, 0xF962, 0x49C0 ); | |
+ mac_ocp_write( tp, 0xF964, 0xF123 ); | |
+ mac_ocp_write( tp, 0xF966, 0x49C1 ); | |
+ mac_ocp_write( tp, 0xF968, 0xF121 ); | |
+ mac_ocp_write( tp, 0xF96A, 0x74F8 ); | |
+ mac_ocp_write( tp, 0xF96C, 0x49C0 ); | |
+ mac_ocp_write( tp, 0xF96E, 0xF01E ); | |
+ mac_ocp_write( tp, 0xF970, 0x48C4 ); | |
+ mac_ocp_write( tp, 0xF972, 0x8CF8 ); | |
+ mac_ocp_write( tp, 0xF974, 0x1E00 ); | |
+ mac_ocp_write( tp, 0xF976, 0xE8BC ); | |
+ mac_ocp_write( tp, 0xF978, 0xC5B2 ); | |
+ mac_ocp_write( tp, 0xF97A, 0x74A0 ); | |
+ mac_ocp_write( tp, 0xF97C, 0x49C3 ); | |
+ mac_ocp_write( tp, 0xF97E, 0xF016 ); | |
+ mac_ocp_write( tp, 0xF980, 0xC5B0 ); | |
+ mac_ocp_write( tp, 0xF982, 0x74A4 ); | |
+ mac_ocp_write( tp, 0xF984, 0x49C2 ); | |
+ mac_ocp_write( tp, 0xF986, 0xF005 ); | |
+ mac_ocp_write( tp, 0xF988, 0xC5AB ); | |
+ mac_ocp_write( tp, 0xF98A, 0x74B2 ); | |
+ mac_ocp_write( tp, 0xF98C, 0x49C9 ); | |
+ mac_ocp_write( tp, 0xF98E, 0xF10E ); | |
+ mac_ocp_write( tp, 0xF990, 0xC5A7 ); | |
+ mac_ocp_write( tp, 0xF992, 0x74A8 ); | |
+ mac_ocp_write( tp, 0xF994, 0x4845 ); | |
+ mac_ocp_write( tp, 0xF996, 0x4846 ); | |
+ mac_ocp_write( tp, 0xF998, 0x4847 ); | |
+ mac_ocp_write( tp, 0xF99A, 0x4848 ); | |
+ mac_ocp_write( tp, 0xF99C, 0x9CA8 ); | |
+ mac_ocp_write( tp, 0xF99E, 0x74B2 ); | |
+ mac_ocp_write( tp, 0xF9A0, 0x4849 ); | |
+ mac_ocp_write( tp, 0xF9A2, 0x9CB2 ); | |
+ mac_ocp_write( tp, 0xF9A4, 0x74A0 ); | |
+ mac_ocp_write( tp, 0xF9A6, 0x484F ); | |
+ mac_ocp_write( tp, 0xF9A8, 0x9CA0 ); | |
+ mac_ocp_write( tp, 0xF9AA, 0xE0A0 ); | |
+ mac_ocp_write( tp, 0xF9AC, 0x49E4 ); | |
+ mac_ocp_write( tp, 0xF9AE, 0xF018 ); | |
+ mac_ocp_write( tp, 0xF9B0, 0x1D10 ); | |
+ mac_ocp_write( tp, 0xF9B2, 0x8DF4 ); | |
+ mac_ocp_write( tp, 0xF9B4, 0x74F8 ); | |
+ mac_ocp_write( tp, 0xF9B6, 0x74F8 ); | |
+ mac_ocp_write( tp, 0xF9B8, 0x74F8 ); | |
+ mac_ocp_write( tp, 0xF9BA, 0x4843 ); | |
+ mac_ocp_write( tp, 0xF9BC, 0x8CF8 ); | |
+ mac_ocp_write( tp, 0xF9BE, 0x74F8 ); | |
+ mac_ocp_write( tp, 0xF9C0, 0x74F8 ); | |
+ mac_ocp_write( tp, 0xF9C2, 0x74F8 ); | |
+ mac_ocp_write( tp, 0xF9C4, 0x4844 ); | |
+ mac_ocp_write( tp, 0xF9C6, 0x4842 ); | |
+ mac_ocp_write( tp, 0xF9C8, 0x4841 ); | |
+ mac_ocp_write( tp, 0xF9CA, 0x8CF8 ); | |
+ mac_ocp_write( tp, 0xF9CC, 0x1E01 ); | |
+ mac_ocp_write( tp, 0xF9CE, 0xE890 ); | |
+ mac_ocp_write( tp, 0xF9D0, 0x7420 ); | |
+ mac_ocp_write( tp, 0xF9D2, 0x4841 ); | |
+ mac_ocp_write( tp, 0xF9D4, 0x9C20 ); | |
+ mac_ocp_write( tp, 0xF9D6, 0x7444 ); | |
+ mac_ocp_write( tp, 0xF9D8, 0x4848 ); | |
+ mac_ocp_write( tp, 0xF9DA, 0x9C44 ); | |
+ mac_ocp_write( tp, 0xF9DC, 0xE087 ); | |
+ mac_ocp_write( tp, 0xF9DE, 0x49E5 ); | |
+ mac_ocp_write( tp, 0xF9E0, 0xF038 ); | |
+ mac_ocp_write( tp, 0xF9E2, 0x1D20 ); | |
+ mac_ocp_write( tp, 0xF9E4, 0x8DF4 ); | |
+ mac_ocp_write( tp, 0xF9E6, 0x74F8 ); | |
+ mac_ocp_write( tp, 0xF9E8, 0x48C2 ); | |
+ mac_ocp_write( tp, 0xF9EA, 0x4841 ); | |
+ mac_ocp_write( tp, 0xF9EC, 0x8CF8 ); | |
+ mac_ocp_write( tp, 0xF9EE, 0x1E01 ); | |
+ mac_ocp_write( tp, 0xF9F0, 0x7444 ); | |
+ mac_ocp_write( tp, 0xF9F2, 0x49CA ); | |
+ mac_ocp_write( tp, 0xF9F4, 0xF103 ); | |
+ mac_ocp_write( tp, 0xF9F6, 0x49C2 ); | |
+ mac_ocp_write( tp, 0xF9F8, 0xF00C ); | |
+ mac_ocp_write( tp, 0xF9FA, 0x49C1 ); | |
+ mac_ocp_write( tp, 0xF9FC, 0xF004 ); | |
+ mac_ocp_write( tp, 0xF9FE, 0x6447 ); | |
+ mac_ocp_write( tp, 0xFA00, 0x2244 ); | |
+ mac_ocp_write( tp, 0xFA02, 0xE002 ); | |
+ mac_ocp_write( tp, 0xFA04, 0x1C01 ); | |
+ mac_ocp_write( tp, 0xFA06, 0x9C62 ); | |
+ mac_ocp_write( tp, 0xFA08, 0x1C11 ); | |
+ mac_ocp_write( tp, 0xFA0A, 0x8C60 ); | |
+ mac_ocp_write( tp, 0xFA0C, 0x1C00 ); | |
+ mac_ocp_write( tp, 0xFA0E, 0x9CF6 ); | |
+ mac_ocp_write( tp, 0xFA10, 0x7444 ); | |
+ mac_ocp_write( tp, 0xFA12, 0x49C8 ); | |
+ mac_ocp_write( tp, 0xFA14, 0xF017 ); | |
+ mac_ocp_write( tp, 0xFA16, 0x74FC ); | |
+ mac_ocp_write( tp, 0xFA18, 0x49C0 ); | |
+ mac_ocp_write( tp, 0xFA1A, 0xF114 ); | |
+ mac_ocp_write( tp, 0xFA1C, 0x49C1 ); | |
+ mac_ocp_write( tp, 0xFA1E, 0xF112 ); | |
+ mac_ocp_write( tp, 0xFA20, 0x74F8 ); | |
+ mac_ocp_write( tp, 0xFA22, 0x49C0 ); | |
+ mac_ocp_write( tp, 0xFA24, 0xF00F ); | |
+ mac_ocp_write( tp, 0xFA26, 0x49C6 ); | |
+ mac_ocp_write( tp, 0xFA28, 0xF10D ); | |
+ mac_ocp_write( tp, 0xFA2A, 0xE86B ); | |
+ mac_ocp_write( tp, 0xFA2C, 0x48C4 ); | |
+ mac_ocp_write( tp, 0xFA2E, 0x8CF8 ); | |
+ mac_ocp_write( tp, 0xFA30, 0x7420 ); | |
+ mac_ocp_write( tp, 0xFA32, 0x48C1 ); | |
+ mac_ocp_write( tp, 0xFA34, 0x9C20 ); | |
+ mac_ocp_write( tp, 0xFA36, 0x7444 ); | |
+ mac_ocp_write( tp, 0xFA38, 0x48C8 ); | |
+ mac_ocp_write( tp, 0xFA3A, 0x48CA ); | |
+ mac_ocp_write( tp, 0xFA3C, 0x9C44 ); | |
+ mac_ocp_write( tp, 0xFA3E, 0x48E0 ); | |
+ mac_ocp_write( tp, 0xFA40, 0xE006 ); | |
+ mac_ocp_write( tp, 0xFA42, 0x7444 ); | |
+ mac_ocp_write( tp, 0xFA44, 0x49CA ); | |
+ mac_ocp_write( tp, 0xFA46, 0xF004 ); | |
+ mac_ocp_write( tp, 0xFA48, 0x48CA ); | |
+ mac_ocp_write( tp, 0xFA4A, 0x9C44 ); | |
+ mac_ocp_write( tp, 0xFA4C, 0xE851 ); | |
+ mac_ocp_write( tp, 0xFA4E, 0xE04E ); | |
+ mac_ocp_write( tp, 0xFA50, 0x49E8 ); | |
+ mac_ocp_write( tp, 0xFA52, 0xF020 ); | |
+ mac_ocp_write( tp, 0xFA54, 0x1D01 ); | |
+ mac_ocp_write( tp, 0xFA56, 0x8DF5 ); | |
+ mac_ocp_write( tp, 0xFA58, 0x7440 ); | |
+ mac_ocp_write( tp, 0xFA5A, 0x49C0 ); | |
+ mac_ocp_write( tp, 0xFA5C, 0xF11A ); | |
+ mac_ocp_write( tp, 0xFA5E, 0x7444 ); | |
+ mac_ocp_write( tp, 0xFA60, 0x49C8 ); | |
+ mac_ocp_write( tp, 0xFA62, 0xF017 ); | |
+ mac_ocp_write( tp, 0xFA64, 0x49CA ); | |
+ mac_ocp_write( tp, 0xFA66, 0xF115 ); | |
+ mac_ocp_write( tp, 0xFA68, 0x49C0 ); | |
+ mac_ocp_write( tp, 0xFA6A, 0xF103 ); | |
+ mac_ocp_write( tp, 0xFA6C, 0x49C1 ); | |
+ mac_ocp_write( tp, 0xFA6E, 0xF011 ); | |
+ mac_ocp_write( tp, 0xFA70, 0x4849 ); | |
+ mac_ocp_write( tp, 0xFA72, 0x9C44 ); | |
+ mac_ocp_write( tp, 0xFA74, 0x1C00 ); | |
+ mac_ocp_write( tp, 0xFA76, 0x9CF6 ); | |
+ mac_ocp_write( tp, 0xFA78, 0x7444 ); | |
+ mac_ocp_write( tp, 0xFA7A, 0x49C1 ); | |
+ mac_ocp_write( tp, 0xFA7C, 0xF004 ); | |
+ mac_ocp_write( tp, 0xFA7E, 0x6446 ); | |
+ mac_ocp_write( tp, 0xFA80, 0x1E07 ); | |
+ mac_ocp_write( tp, 0xFA82, 0xE003 ); | |
+ mac_ocp_write( tp, 0xFA84, 0x1C01 ); | |
+ mac_ocp_write( tp, 0xFA86, 0x1E03 ); | |
+ mac_ocp_write( tp, 0xFA88, 0x9C62 ); | |
+ mac_ocp_write( tp, 0xFA8A, 0x1C11 ); | |
+ mac_ocp_write( tp, 0xFA8C, 0x8C60 ); | |
+ mac_ocp_write( tp, 0xFA8E, 0xE830 ); | |
+ mac_ocp_write( tp, 0xFA90, 0xE02D ); | |
+ mac_ocp_write( tp, 0xFA92, 0x49E9 ); | |
+ mac_ocp_write( tp, 0xFA94, 0xF004 ); | |
+ mac_ocp_write( tp, 0xFA96, 0x1D02 ); | |
+ mac_ocp_write( tp, 0xFA98, 0x8DF5 ); | |
+ mac_ocp_write( tp, 0xFA9A, 0xE7A6 ); | |
+ mac_ocp_write( tp, 0xFA9C, 0x49E3 ); | |
+ mac_ocp_write( tp, 0xFA9E, 0xF006 ); | |
+ mac_ocp_write( tp, 0xFAA0, 0x1D08 ); | |
+ mac_ocp_write( tp, 0xFAA2, 0x8DF4 ); | |
+ mac_ocp_write( tp, 0xFAA4, 0x74F8 ); | |
+ mac_ocp_write( tp, 0xFAA6, 0x74F8 ); | |
+ mac_ocp_write( tp, 0xFAA8, 0xE745 ); | |
+ mac_ocp_write( tp, 0xFAAA, 0x49E1 ); | |
+ mac_ocp_write( tp, 0xFAAC, 0xF007 ); | |
+ mac_ocp_write( tp, 0xFAAE, 0x1D02 ); | |
+ mac_ocp_write( tp, 0xFAB0, 0x8DF4 ); | |
+ mac_ocp_write( tp, 0xFAB2, 0x1E01 ); | |
+ mac_ocp_write( tp, 0xFAB4, 0xE7B1 ); | |
+ mac_ocp_write( tp, 0xFAB6, 0xDE20 ); | |
+ mac_ocp_write( tp, 0xFAB8, 0xE410 ); | |
+ mac_ocp_write( tp, 0xFABA, 0x49E0 ); | |
+ mac_ocp_write( tp, 0xFABC, 0xF017 ); | |
+ mac_ocp_write( tp, 0xFABE, 0x1D01 ); | |
+ mac_ocp_write( tp, 0xFAC0, 0x8DF4 ); | |
+ mac_ocp_write( tp, 0xFAC2, 0xC5FA ); | |
+ mac_ocp_write( tp, 0xFAC4, 0x1C00 ); | |
+ mac_ocp_write( tp, 0xFAC6, 0x8CA0 ); | |
+ mac_ocp_write( tp, 0xFAC8, 0x1C1B ); | |
+ mac_ocp_write( tp, 0xFACA, 0x9CA2 ); | |
+ mac_ocp_write( tp, 0xFACC, 0x74A2 ); | |
+ mac_ocp_write( tp, 0xFACE, 0x49CF ); | |
+ mac_ocp_write( tp, 0xFAD0, 0xF0FE ); | |
+ mac_ocp_write( tp, 0xFAD2, 0xC5F3 ); | |
+ mac_ocp_write( tp, 0xFAD4, 0x74A0 ); | |
+ mac_ocp_write( tp, 0xFAD6, 0x4849 ); | |
+ mac_ocp_write( tp, 0xFAD8, 0x9CA0 ); | |
+ mac_ocp_write( tp, 0xFADA, 0x74F8 ); | |
+ mac_ocp_write( tp, 0xFADC, 0x49C0 ); | |
+ mac_ocp_write( tp, 0xFADE, 0xF006 ); | |
+ mac_ocp_write( tp, 0xFAE0, 0x48C3 ); | |
+ mac_ocp_write( tp, 0xFAE2, 0x8CF8 ); | |
+ mac_ocp_write( tp, 0xFAE4, 0xE81C ); | |
+ mac_ocp_write( tp, 0xFAE6, 0x74F8 ); | |
+ mac_ocp_write( tp, 0xFAE8, 0x74F8 ); | |
+ mac_ocp_write( tp, 0xFAEA, 0xC42A ); | |
+ mac_ocp_write( tp, 0xFAEC, 0xBC00 ); | |
+ mac_ocp_write( tp, 0xFAEE, 0xC5E4 ); | |
+ mac_ocp_write( tp, 0xFAF0, 0x74A2 ); | |
+ mac_ocp_write( tp, 0xFAF2, 0x49CE ); | |
+ mac_ocp_write( tp, 0xFAF4, 0xF1FE ); | |
+ mac_ocp_write( tp, 0xFAF6, 0x9EA0 ); | |
+ mac_ocp_write( tp, 0xFAF8, 0x1C1C ); | |
+ mac_ocp_write( tp, 0xFAFA, 0x484F ); | |
+ mac_ocp_write( tp, 0xFAFC, 0x9CA2 ); | |
+ mac_ocp_write( tp, 0xFAFE, 0xFF80 ); | |
+ mac_ocp_write( tp, 0xFB00, 0xC5DB ); | |
+ mac_ocp_write( tp, 0xFB02, 0x74A2 ); | |
+ mac_ocp_write( tp, 0xFB04, 0x49CE ); | |
+ mac_ocp_write( tp, 0xFB06, 0xF1FE ); | |
+ mac_ocp_write( tp, 0xFB08, 0xC419 ); | |
+ mac_ocp_write( tp, 0xFB0A, 0x9CA0 ); | |
+ mac_ocp_write( tp, 0xFB0C, 0xC416 ); | |
+ mac_ocp_write( tp, 0xFB0E, 0x1C13 ); | |
+ mac_ocp_write( tp, 0xFB10, 0x484F ); | |
+ mac_ocp_write( tp, 0xFB12, 0x9CA2 ); | |
+ mac_ocp_write( tp, 0xFB14, 0x74A2 ); | |
+ mac_ocp_write( tp, 0xFB16, 0x49CF ); | |
+ mac_ocp_write( tp, 0xFB18, 0xF1FE ); | |
+ mac_ocp_write( tp, 0xFB1A, 0xFF80 ); | |
+ mac_ocp_write( tp, 0xFB1C, 0xC5CD ); | |
+ mac_ocp_write( tp, 0xFB1E, 0x74A2 ); | |
+ mac_ocp_write( tp, 0xFB20, 0x49CE ); | |
+ mac_ocp_write( tp, 0xFB22, 0xF1FE ); | |
+ mac_ocp_write( tp, 0xFB24, 0xC40C ); | |
+ mac_ocp_write( tp, 0xFB26, 0x9CA0 ); | |
+ mac_ocp_write( tp, 0xFB28, 0xC408 ); | |
+ mac_ocp_write( tp, 0xFB2A, 0x1C13 ); | |
+ mac_ocp_write( tp, 0xFB2C, 0x484F ); | |
+ mac_ocp_write( tp, 0xFB2E, 0x9CA2 ); | |
+ mac_ocp_write( tp, 0xFB30, 0x74A2 ); | |
+ mac_ocp_write( tp, 0xFB32, 0x49CF ); | |
+ mac_ocp_write( tp, 0xFB34, 0xF1FE ); | |
+ mac_ocp_write( tp, 0xFB36, 0xFF80 ); | |
+ mac_ocp_write( tp, 0xFB38, 0x0000 ); | |
+ mac_ocp_write( tp, 0xFB3A, 0x0481 ); | |
+ mac_ocp_write( tp, 0xFB3C, 0x0C81 ); | |
+ mac_ocp_write( tp, 0xFB3E, 0x0AE0 ); | |
+ | |
+ | |
+ mac_ocp_write( tp, 0xFC26, 0x8000 ); | |
+ | |
+ mac_ocp_write( tp, 0xFC28, 0x0000 ); | |
+ mac_ocp_write( tp, 0xFC2A, 0x0A2F ); | |
+ mac_ocp_write( tp, 0xFC2C, 0x0297 ); | |
+ mac_ocp_write( tp, 0xFC2E, 0x0A61 ); | |
+ mac_ocp_write( tp, 0xFC30, 0x00A9 ); | |
+ mac_ocp_write( tp, 0xFC32, 0x012D ); | |
+ mac_ocp_write( tp, 0xFC34, 0x0000 ); | |
+ mac_ocp_write( tp, 0xFC36, 0x08DF ); | |
+ } else if (tp->mcfg == CFG_METHOD_26) { | |
+ rtl8168_hw_disable_mac_mcu_bps(dev); | |
+ | |
+ mac_ocp_write( tp, 0xF800, 0xE008 ); | |
+ mac_ocp_write( tp, 0xF802, 0xE00A ); | |
+ mac_ocp_write( tp, 0xF804, 0xE00C ); | |
+ mac_ocp_write( tp, 0xF806, 0xE00E ); | |
+ mac_ocp_write( tp, 0xF808, 0xE027 ); | |
+ mac_ocp_write( tp, 0xF80A, 0xE04F ); | |
+ mac_ocp_write( tp, 0xF80C, 0xE05E ); | |
+ mac_ocp_write( tp, 0xF80E, 0xE065 ); | |
+ mac_ocp_write( tp, 0xF810, 0xC602 ); | |
+ mac_ocp_write( tp, 0xF812, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF814, 0x0000 ); | |
+ mac_ocp_write( tp, 0xF816, 0xC502 ); | |
+ mac_ocp_write( tp, 0xF818, 0xBD00 ); | |
+ mac_ocp_write( tp, 0xF81A, 0x074C ); | |
+ mac_ocp_write( tp, 0xF81C, 0xC302 ); | |
+ mac_ocp_write( tp, 0xF81E, 0xBB00 ); | |
+ mac_ocp_write( tp, 0xF820, 0x080A ); | |
+ mac_ocp_write( tp, 0xF822, 0x6420 ); | |
+ mac_ocp_write( tp, 0xF824, 0x48C2 ); | |
+ mac_ocp_write( tp, 0xF826, 0x8C20 ); | |
+ mac_ocp_write( tp, 0xF828, 0xC516 ); | |
+ mac_ocp_write( tp, 0xF82A, 0x64A4 ); | |
+ mac_ocp_write( tp, 0xF82C, 0x49C0 ); | |
+ mac_ocp_write( tp, 0xF82E, 0xF009 ); | |
+ mac_ocp_write( tp, 0xF830, 0x74A2 ); | |
+ mac_ocp_write( tp, 0xF832, 0x8CA5 ); | |
+ mac_ocp_write( tp, 0xF834, 0x74A0 ); | |
+ mac_ocp_write( tp, 0xF836, 0xC50E ); | |
+ mac_ocp_write( tp, 0xF838, 0x9CA2 ); | |
+ mac_ocp_write( tp, 0xF83A, 0x1C11 ); | |
+ mac_ocp_write( tp, 0xF83C, 0x9CA0 ); | |
+ mac_ocp_write( tp, 0xF83E, 0xE006 ); | |
+ mac_ocp_write( tp, 0xF840, 0x74F8 ); | |
+ mac_ocp_write( tp, 0xF842, 0x48C4 ); | |
+ mac_ocp_write( tp, 0xF844, 0x8CF8 ); | |
+ mac_ocp_write( tp, 0xF846, 0xC404 ); | |
+ mac_ocp_write( tp, 0xF848, 0xBC00 ); | |
+ mac_ocp_write( tp, 0xF84A, 0xC403 ); | |
+ mac_ocp_write( tp, 0xF84C, 0xBC00 ); | |
+ mac_ocp_write( tp, 0xF84E, 0x0BF2 ); | |
+ mac_ocp_write( tp, 0xF850, 0x0C0A ); | |
+ mac_ocp_write( tp, 0xF852, 0xE434 ); | |
+ mac_ocp_write( tp, 0xF854, 0xD3C0 ); | |
+ mac_ocp_write( tp, 0xF856, 0x49D9 ); | |
+ mac_ocp_write( tp, 0xF858, 0xF01F ); | |
+ mac_ocp_write( tp, 0xF85A, 0xC526 ); | |
+ mac_ocp_write( tp, 0xF85C, 0x64A5 ); | |
+ mac_ocp_write( tp, 0xF85E, 0x1400 ); | |
+ mac_ocp_write( tp, 0xF860, 0xF007 ); | |
+ mac_ocp_write( tp, 0xF862, 0x0C01 ); | |
+ mac_ocp_write( tp, 0xF864, 0x8CA5 ); | |
+ mac_ocp_write( tp, 0xF866, 0x1C15 ); | |
+ mac_ocp_write( tp, 0xF868, 0xC51B ); | |
+ mac_ocp_write( tp, 0xF86A, 0x9CA0 ); | |
+ mac_ocp_write( tp, 0xF86C, 0xE013 ); | |
+ mac_ocp_write( tp, 0xF86E, 0xC519 ); | |
+ mac_ocp_write( tp, 0xF870, 0x74A0 ); | |
+ mac_ocp_write( tp, 0xF872, 0x48C4 ); | |
+ mac_ocp_write( tp, 0xF874, 0x8CA0 ); | |
+ mac_ocp_write( tp, 0xF876, 0xC516 ); | |
+ mac_ocp_write( tp, 0xF878, 0x74A4 ); | |
+ mac_ocp_write( tp, 0xF87A, 0x48C8 ); | |
+ mac_ocp_write( tp, 0xF87C, 0x48CA ); | |
+ mac_ocp_write( tp, 0xF87E, 0x9CA4 ); | |
+ mac_ocp_write( tp, 0xF880, 0xC512 ); | |
+ mac_ocp_write( tp, 0xF882, 0x1B00 ); | |
+ mac_ocp_write( tp, 0xF884, 0x9BA0 ); | |
+ mac_ocp_write( tp, 0xF886, 0x1B1C ); | |
+ mac_ocp_write( tp, 0xF888, 0x483F ); | |
+ mac_ocp_write( tp, 0xF88A, 0x9BA2 ); | |
+ mac_ocp_write( tp, 0xF88C, 0x1B04 ); | |
+ mac_ocp_write( tp, 0xF88E, 0xC508 ); | |
+ mac_ocp_write( tp, 0xF890, 0x9BA0 ); | |
+ mac_ocp_write( tp, 0xF892, 0xC505 ); | |
+ mac_ocp_write( tp, 0xF894, 0xBD00 ); | |
+ mac_ocp_write( tp, 0xF896, 0xC502 ); | |
+ mac_ocp_write( tp, 0xF898, 0xBD00 ); | |
+ mac_ocp_write( tp, 0xF89A, 0x0300 ); | |
+ mac_ocp_write( tp, 0xF89C, 0x051E ); | |
+ mac_ocp_write( tp, 0xF89E, 0xE434 ); | |
+ mac_ocp_write( tp, 0xF8A0, 0xE018 ); | |
+ mac_ocp_write( tp, 0xF8A2, 0xE092 ); | |
+ mac_ocp_write( tp, 0xF8A4, 0xDE20 ); | |
+ mac_ocp_write( tp, 0xF8A6, 0xD3C0 ); | |
+ mac_ocp_write( tp, 0xF8A8, 0xC50F ); | |
+ mac_ocp_write( tp, 0xF8AA, 0x76A4 ); | |
+ mac_ocp_write( tp, 0xF8AC, 0x49E3 ); | |
+ mac_ocp_write( tp, 0xF8AE, 0xF007 ); | |
+ mac_ocp_write( tp, 0xF8B0, 0x49C0 ); | |
+ mac_ocp_write( tp, 0xF8B2, 0xF103 ); | |
+ mac_ocp_write( tp, 0xF8B4, 0xC607 ); | |
+ mac_ocp_write( tp, 0xF8B6, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF8B8, 0xC606 ); | |
+ mac_ocp_write( tp, 0xF8BA, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF8BC, 0xC602 ); | |
+ mac_ocp_write( tp, 0xF8BE, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF8C0, 0x0C4C ); | |
+ mac_ocp_write( tp, 0xF8C2, 0x0C28 ); | |
+ mac_ocp_write( tp, 0xF8C4, 0x0C2C ); | |
+ mac_ocp_write( tp, 0xF8C6, 0xDC00 ); | |
+ mac_ocp_write( tp, 0xF8C8, 0xC707 ); | |
+ mac_ocp_write( tp, 0xF8CA, 0x1D00 ); | |
+ mac_ocp_write( tp, 0xF8CC, 0x8DE2 ); | |
+ mac_ocp_write( tp, 0xF8CE, 0x48C1 ); | |
+ mac_ocp_write( tp, 0xF8D0, 0xC502 ); | |
+ mac_ocp_write( tp, 0xF8D2, 0xBD00 ); | |
+ mac_ocp_write( tp, 0xF8D4, 0x00AA ); | |
+ mac_ocp_write( tp, 0xF8D6, 0xE0C0 ); | |
+ mac_ocp_write( tp, 0xF8D8, 0xC502 ); | |
+ mac_ocp_write( tp, 0xF8DA, 0xBD00 ); | |
+ mac_ocp_write( tp, 0xF8DC, 0x0132 ); | |
+ | |
+ mac_ocp_write( tp, 0xFC26, 0x8000 ); | |
+ | |
+ mac_ocp_write( tp, 0xFC2A, 0x0743 ); | |
+ mac_ocp_write( tp, 0xFC2C, 0x0801 ); | |
+ mac_ocp_write( tp, 0xFC2E, 0x0BE9 ); | |
+ mac_ocp_write( tp, 0xFC30, 0x02FD ); | |
+ mac_ocp_write( tp, 0xFC32, 0x0C25 ); | |
+ mac_ocp_write( tp, 0xFC34, 0x00A9 ); | |
+ mac_ocp_write( tp, 0xFC36, 0x012D ); | |
+ } else if (tp->mcfg == CFG_METHOD_27) { | |
+ rtl8168_hw_disable_mac_mcu_bps(dev); | |
+ | |
+ mac_ocp_write( tp, 0xF800, 0xE008 ); | |
+ mac_ocp_write( tp, 0xF802, 0xE0D3 ); | |
+ mac_ocp_write( tp, 0xF804, 0xE0D6 ); | |
+ mac_ocp_write( tp, 0xF806, 0xE0D9 ); | |
+ mac_ocp_write( tp, 0xF808, 0xE0DB ); | |
+ mac_ocp_write( tp, 0xF80A, 0xE0DD ); | |
+ mac_ocp_write( tp, 0xF80C, 0xE0DF ); | |
+ mac_ocp_write( tp, 0xF80E, 0xE0E1 ); | |
+ mac_ocp_write( tp, 0xF810, 0xC251 ); | |
+ mac_ocp_write( tp, 0xF812, 0x7340 ); | |
+ mac_ocp_write( tp, 0xF814, 0x49B1 ); | |
+ mac_ocp_write( tp, 0xF816, 0xF010 ); | |
+ mac_ocp_write( tp, 0xF818, 0x1D02 ); | |
+ mac_ocp_write( tp, 0xF81A, 0x8D40 ); | |
+ mac_ocp_write( tp, 0xF81C, 0xC202 ); | |
+ mac_ocp_write( tp, 0xF81E, 0xBA00 ); | |
+ mac_ocp_write( tp, 0xF820, 0x2C3A ); | |
+ mac_ocp_write( tp, 0xF822, 0xC0F0 ); | |
+ mac_ocp_write( tp, 0xF824, 0xE8DE ); | |
+ mac_ocp_write( tp, 0xF826, 0x2000 ); | |
+ mac_ocp_write( tp, 0xF828, 0x8000 ); | |
+ mac_ocp_write( tp, 0xF82A, 0xC0B6 ); | |
+ mac_ocp_write( tp, 0xF82C, 0x268C ); | |
+ mac_ocp_write( tp, 0xF82E, 0x752C ); | |
+ mac_ocp_write( tp, 0xF830, 0x49D4 ); | |
+ mac_ocp_write( tp, 0xF832, 0xF112 ); | |
+ mac_ocp_write( tp, 0xF834, 0xE025 ); | |
+ mac_ocp_write( tp, 0xF836, 0xC2F6 ); | |
+ mac_ocp_write( tp, 0xF838, 0x7146 ); | |
+ mac_ocp_write( tp, 0xF83A, 0xC2F5 ); | |
+ mac_ocp_write( tp, 0xF83C, 0x7340 ); | |
+ mac_ocp_write( tp, 0xF83E, 0x49BE ); | |
+ mac_ocp_write( tp, 0xF840, 0xF103 ); | |
+ mac_ocp_write( tp, 0xF842, 0xC7F2 ); | |
+ mac_ocp_write( tp, 0xF844, 0xE002 ); | |
+ mac_ocp_write( tp, 0xF846, 0xC7F1 ); | |
+ mac_ocp_write( tp, 0xF848, 0x304F ); | |
+ mac_ocp_write( tp, 0xF84A, 0x6226 ); | |
+ mac_ocp_write( tp, 0xF84C, 0x49A1 ); | |
+ mac_ocp_write( tp, 0xF84E, 0xF1F0 ); | |
+ mac_ocp_write( tp, 0xF850, 0x7222 ); | |
+ mac_ocp_write( tp, 0xF852, 0x49A0 ); | |
+ mac_ocp_write( tp, 0xF854, 0xF1ED ); | |
+ mac_ocp_write( tp, 0xF856, 0x2525 ); | |
+ mac_ocp_write( tp, 0xF858, 0x1F28 ); | |
+ mac_ocp_write( tp, 0xF85A, 0x3097 ); | |
+ mac_ocp_write( tp, 0xF85C, 0x3091 ); | |
+ mac_ocp_write( tp, 0xF85E, 0x9A36 ); | |
+ mac_ocp_write( tp, 0xF860, 0x752C ); | |
+ mac_ocp_write( tp, 0xF862, 0x21DC ); | |
+ mac_ocp_write( tp, 0xF864, 0x25BC ); | |
+ mac_ocp_write( tp, 0xF866, 0xC6E2 ); | |
+ mac_ocp_write( tp, 0xF868, 0x77C0 ); | |
+ mac_ocp_write( tp, 0xF86A, 0x1304 ); | |
+ mac_ocp_write( tp, 0xF86C, 0xF014 ); | |
+ mac_ocp_write( tp, 0xF86E, 0x1303 ); | |
+ mac_ocp_write( tp, 0xF870, 0xF014 ); | |
+ mac_ocp_write( tp, 0xF872, 0x1302 ); | |
+ mac_ocp_write( tp, 0xF874, 0xF014 ); | |
+ mac_ocp_write( tp, 0xF876, 0x1301 ); | |
+ mac_ocp_write( tp, 0xF878, 0xF014 ); | |
+ mac_ocp_write( tp, 0xF87A, 0x49D4 ); | |
+ mac_ocp_write( tp, 0xF87C, 0xF103 ); | |
+ mac_ocp_write( tp, 0xF87E, 0xC3D7 ); | |
+ mac_ocp_write( tp, 0xF880, 0xBB00 ); | |
+ mac_ocp_write( tp, 0xF882, 0xC618 ); | |
+ mac_ocp_write( tp, 0xF884, 0x67C6 ); | |
+ mac_ocp_write( tp, 0xF886, 0x752E ); | |
+ mac_ocp_write( tp, 0xF888, 0x22D7 ); | |
+ mac_ocp_write( tp, 0xF88A, 0x26DD ); | |
+ mac_ocp_write( tp, 0xF88C, 0x1505 ); | |
+ mac_ocp_write( tp, 0xF88E, 0xF013 ); | |
+ mac_ocp_write( tp, 0xF890, 0xC60A ); | |
+ mac_ocp_write( tp, 0xF892, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF894, 0xC309 ); | |
+ mac_ocp_write( tp, 0xF896, 0xBB00 ); | |
+ mac_ocp_write( tp, 0xF898, 0xC308 ); | |
+ mac_ocp_write( tp, 0xF89A, 0xBB00 ); | |
+ mac_ocp_write( tp, 0xF89C, 0xC307 ); | |
+ mac_ocp_write( tp, 0xF89E, 0xBB00 ); | |
+ mac_ocp_write( tp, 0xF8A0, 0xC306 ); | |
+ mac_ocp_write( tp, 0xF8A2, 0xBB00 ); | |
+ mac_ocp_write( tp, 0xF8A4, 0x25C8 ); | |
+ mac_ocp_write( tp, 0xF8A6, 0x25A6 ); | |
+ mac_ocp_write( tp, 0xF8A8, 0x25AC ); | |
+ mac_ocp_write( tp, 0xF8AA, 0x25B2 ); | |
+ mac_ocp_write( tp, 0xF8AC, 0x25B8 ); | |
+ mac_ocp_write( tp, 0xF8AE, 0xCD08 ); | |
+ mac_ocp_write( tp, 0xF8B0, 0x0000 ); | |
+ mac_ocp_write( tp, 0xF8B2, 0xC0BC ); | |
+ mac_ocp_write( tp, 0xF8B4, 0xC2FF ); | |
+ mac_ocp_write( tp, 0xF8B6, 0x7340 ); | |
+ mac_ocp_write( tp, 0xF8B8, 0x49B0 ); | |
+ mac_ocp_write( tp, 0xF8BA, 0xF04E ); | |
+ mac_ocp_write( tp, 0xF8BC, 0x1F46 ); | |
+ mac_ocp_write( tp, 0xF8BE, 0x308F ); | |
+ mac_ocp_write( tp, 0xF8C0, 0xC3F7 ); | |
+ mac_ocp_write( tp, 0xF8C2, 0x1C04 ); | |
+ mac_ocp_write( tp, 0xF8C4, 0xE84D ); | |
+ mac_ocp_write( tp, 0xF8C6, 0x1401 ); | |
+ mac_ocp_write( tp, 0xF8C8, 0xF147 ); | |
+ mac_ocp_write( tp, 0xF8CA, 0x7226 ); | |
+ mac_ocp_write( tp, 0xF8CC, 0x49A7 ); | |
+ mac_ocp_write( tp, 0xF8CE, 0xF044 ); | |
+ mac_ocp_write( tp, 0xF8D0, 0x7222 ); | |
+ mac_ocp_write( tp, 0xF8D2, 0x2525 ); | |
+ mac_ocp_write( tp, 0xF8D4, 0x1F30 ); | |
+ mac_ocp_write( tp, 0xF8D6, 0x3097 ); | |
+ mac_ocp_write( tp, 0xF8D8, 0x3091 ); | |
+ mac_ocp_write( tp, 0xF8DA, 0x7340 ); | |
+ mac_ocp_write( tp, 0xF8DC, 0xC4EA ); | |
+ mac_ocp_write( tp, 0xF8DE, 0x401C ); | |
+ mac_ocp_write( tp, 0xF8E0, 0xF006 ); | |
+ mac_ocp_write( tp, 0xF8E2, 0xC6E8 ); | |
+ mac_ocp_write( tp, 0xF8E4, 0x75C0 ); | |
+ mac_ocp_write( tp, 0xF8E6, 0x49D7 ); | |
+ mac_ocp_write( tp, 0xF8E8, 0xF105 ); | |
+ mac_ocp_write( tp, 0xF8EA, 0xE036 ); | |
+ mac_ocp_write( tp, 0xF8EC, 0x1D08 ); | |
+ mac_ocp_write( tp, 0xF8EE, 0x8DC1 ); | |
+ mac_ocp_write( tp, 0xF8F0, 0x0208 ); | |
+ mac_ocp_write( tp, 0xF8F2, 0x6640 ); | |
+ mac_ocp_write( tp, 0xF8F4, 0x2764 ); | |
+ mac_ocp_write( tp, 0xF8F6, 0x1606 ); | |
+ mac_ocp_write( tp, 0xF8F8, 0xF12F ); | |
+ mac_ocp_write( tp, 0xF8FA, 0x6346 ); | |
+ mac_ocp_write( tp, 0xF8FC, 0x133B ); | |
+ mac_ocp_write( tp, 0xF8FE, 0xF12C ); | |
+ mac_ocp_write( tp, 0xF900, 0x9B34 ); | |
+ mac_ocp_write( tp, 0xF902, 0x1B18 ); | |
+ mac_ocp_write( tp, 0xF904, 0x3093 ); | |
+ mac_ocp_write( tp, 0xF906, 0xC32A ); | |
+ mac_ocp_write( tp, 0xF908, 0x1C10 ); | |
+ mac_ocp_write( tp, 0xF90A, 0xE82A ); | |
+ mac_ocp_write( tp, 0xF90C, 0x1401 ); | |
+ mac_ocp_write( tp, 0xF90E, 0xF124 ); | |
+ mac_ocp_write( tp, 0xF910, 0x1A36 ); | |
+ mac_ocp_write( tp, 0xF912, 0x308A ); | |
+ mac_ocp_write( tp, 0xF914, 0x7322 ); | |
+ mac_ocp_write( tp, 0xF916, 0x25B5 ); | |
+ mac_ocp_write( tp, 0xF918, 0x0B0E ); | |
+ mac_ocp_write( tp, 0xF91A, 0x1C00 ); | |
+ mac_ocp_write( tp, 0xF91C, 0xE82C ); | |
+ mac_ocp_write( tp, 0xF91E, 0xC71F ); | |
+ mac_ocp_write( tp, 0xF920, 0x4027 ); | |
+ mac_ocp_write( tp, 0xF922, 0xF11A ); | |
+ mac_ocp_write( tp, 0xF924, 0xE838 ); | |
+ mac_ocp_write( tp, 0xF926, 0x1F42 ); | |
+ mac_ocp_write( tp, 0xF928, 0x308F ); | |
+ mac_ocp_write( tp, 0xF92A, 0x1B08 ); | |
+ mac_ocp_write( tp, 0xF92C, 0xE824 ); | |
+ mac_ocp_write( tp, 0xF92E, 0x7236 ); | |
+ mac_ocp_write( tp, 0xF930, 0x7746 ); | |
+ mac_ocp_write( tp, 0xF932, 0x1700 ); | |
+ mac_ocp_write( tp, 0xF934, 0xF00D ); | |
+ mac_ocp_write( tp, 0xF936, 0xC313 ); | |
+ mac_ocp_write( tp, 0xF938, 0x401F ); | |
+ mac_ocp_write( tp, 0xF93A, 0xF103 ); | |
+ mac_ocp_write( tp, 0xF93C, 0x1F00 ); | |
+ mac_ocp_write( tp, 0xF93E, 0x9F46 ); | |
+ mac_ocp_write( tp, 0xF940, 0x7744 ); | |
+ mac_ocp_write( tp, 0xF942, 0x449F ); | |
+ mac_ocp_write( tp, 0xF944, 0x445F ); | |
+ mac_ocp_write( tp, 0xF946, 0xE817 ); | |
+ mac_ocp_write( tp, 0xF948, 0xC70A ); | |
+ mac_ocp_write( tp, 0xF94A, 0x4027 ); | |
+ mac_ocp_write( tp, 0xF94C, 0xF105 ); | |
+ mac_ocp_write( tp, 0xF94E, 0xC302 ); | |
+ mac_ocp_write( tp, 0xF950, 0xBB00 ); | |
+ mac_ocp_write( tp, 0xF952, 0x2E08 ); | |
+ mac_ocp_write( tp, 0xF954, 0x2DC2 ); | |
+ mac_ocp_write( tp, 0xF956, 0xC7FF ); | |
+ mac_ocp_write( tp, 0xF958, 0xBF00 ); | |
+ mac_ocp_write( tp, 0xF95A, 0xCDB8 ); | |
+ mac_ocp_write( tp, 0xF95C, 0xFFFF ); | |
+ mac_ocp_write( tp, 0xF95E, 0x0C02 ); | |
+ mac_ocp_write( tp, 0xF960, 0xA554 ); | |
+ mac_ocp_write( tp, 0xF962, 0xA5DC ); | |
+ mac_ocp_write( tp, 0xF964, 0x402F ); | |
+ mac_ocp_write( tp, 0xF966, 0xF105 ); | |
+ mac_ocp_write( tp, 0xF968, 0x1400 ); | |
+ mac_ocp_write( tp, 0xF96A, 0xF1FA ); | |
+ mac_ocp_write( tp, 0xF96C, 0x1C01 ); | |
+ mac_ocp_write( tp, 0xF96E, 0xE002 ); | |
+ mac_ocp_write( tp, 0xF970, 0x1C00 ); | |
+ mac_ocp_write( tp, 0xF972, 0xFF80 ); | |
+ mac_ocp_write( tp, 0xF974, 0x49B0 ); | |
+ mac_ocp_write( tp, 0xF976, 0xF004 ); | |
+ mac_ocp_write( tp, 0xF978, 0x0B01 ); | |
+ mac_ocp_write( tp, 0xF97A, 0xA1D3 ); | |
+ mac_ocp_write( tp, 0xF97C, 0xE003 ); | |
+ mac_ocp_write( tp, 0xF97E, 0x0B02 ); | |
+ mac_ocp_write( tp, 0xF980, 0xA5D3 ); | |
+ mac_ocp_write( tp, 0xF982, 0x3127 ); | |
+ mac_ocp_write( tp, 0xF984, 0x3720 ); | |
+ mac_ocp_write( tp, 0xF986, 0x0B02 ); | |
+ mac_ocp_write( tp, 0xF988, 0xA5D3 ); | |
+ mac_ocp_write( tp, 0xF98A, 0x3127 ); | |
+ mac_ocp_write( tp, 0xF98C, 0x3720 ); | |
+ mac_ocp_write( tp, 0xF98E, 0x1300 ); | |
+ mac_ocp_write( tp, 0xF990, 0xF1FB ); | |
+ mac_ocp_write( tp, 0xF992, 0xFF80 ); | |
+ mac_ocp_write( tp, 0xF994, 0x7322 ); | |
+ mac_ocp_write( tp, 0xF996, 0x25B5 ); | |
+ mac_ocp_write( tp, 0xF998, 0x1E28 ); | |
+ mac_ocp_write( tp, 0xF99A, 0x30DE ); | |
+ mac_ocp_write( tp, 0xF99C, 0x30D9 ); | |
+ mac_ocp_write( tp, 0xF99E, 0x7264 ); | |
+ mac_ocp_write( tp, 0xF9A0, 0x1E11 ); | |
+ mac_ocp_write( tp, 0xF9A2, 0x2368 ); | |
+ mac_ocp_write( tp, 0xF9A4, 0x3116 ); | |
+ mac_ocp_write( tp, 0xF9A6, 0xFF80 ); | |
+ mac_ocp_write( tp, 0xF9A8, 0x1B7E ); | |
+ mac_ocp_write( tp, 0xF9AA, 0xC602 ); | |
+ mac_ocp_write( tp, 0xF9AC, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF9AE, 0x06A6 ); | |
+ mac_ocp_write( tp, 0xF9B0, 0x1B7E ); | |
+ mac_ocp_write( tp, 0xF9B2, 0xC602 ); | |
+ mac_ocp_write( tp, 0xF9B4, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF9B6, 0x0764 ); | |
+ mac_ocp_write( tp, 0xF9B8, 0xC602 ); | |
+ mac_ocp_write( tp, 0xF9BA, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF9BC, 0x0000 ); | |
+ mac_ocp_write( tp, 0xF9BE, 0xC602 ); | |
+ mac_ocp_write( tp, 0xF9C0, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF9C2, 0x0000 ); | |
+ mac_ocp_write( tp, 0xF9C4, 0xC602 ); | |
+ mac_ocp_write( tp, 0xF9C6, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF9C8, 0x0000 ); | |
+ mac_ocp_write( tp, 0xF9CA, 0xC602 ); | |
+ mac_ocp_write( tp, 0xF9CC, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF9CE, 0x0000 ); | |
+ mac_ocp_write( tp, 0xF9D0, 0xC602 ); | |
+ mac_ocp_write( tp, 0xF9D2, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF9D4, 0x0000 ); | |
+ | |
+ mac_ocp_write( tp, 0xFC26, 0x8000 ); | |
+ | |
+ mac_ocp_write( tp, 0xFC28, 0x2549 ); | |
+ mac_ocp_write( tp, 0xFC2A, 0x06A5 ); | |
+ mac_ocp_write( tp, 0xFC2C, 0x0763 ); | |
+ } else if (tp->mcfg == CFG_METHOD_28) { | |
+ rtl8168_hw_disable_mac_mcu_bps(dev); | |
+ | |
+ mac_ocp_write( tp, 0xF800, 0xE008 ); | |
+ mac_ocp_write( tp, 0xF802, 0xE017 ); | |
+ mac_ocp_write( tp, 0xF804, 0xE019 ); | |
+ mac_ocp_write( tp, 0xF806, 0xE01B ); | |
+ mac_ocp_write( tp, 0xF808, 0xE01D ); | |
+ mac_ocp_write( tp, 0xF80A, 0xE01F ); | |
+ mac_ocp_write( tp, 0xF80C, 0xE021 ); | |
+ mac_ocp_write( tp, 0xF80E, 0xE023 ); | |
+ mac_ocp_write( tp, 0xF810, 0xC50F ); | |
+ mac_ocp_write( tp, 0xF812, 0x76A4 ); | |
+ mac_ocp_write( tp, 0xF814, 0x49E3 ); | |
+ mac_ocp_write( tp, 0xF816, 0xF007 ); | |
+ mac_ocp_write( tp, 0xF818, 0x49C0 ); | |
+ mac_ocp_write( tp, 0xF81A, 0xF103 ); | |
+ mac_ocp_write( tp, 0xF81C, 0xC607 ); | |
+ mac_ocp_write( tp, 0xF81E, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF820, 0xC606 ); | |
+ mac_ocp_write( tp, 0xF822, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF824, 0xC602 ); | |
+ mac_ocp_write( tp, 0xF826, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF828, 0x0BDA ); | |
+ mac_ocp_write( tp, 0xF82A, 0x0BB0 ); | |
+ mac_ocp_write( tp, 0xF82C, 0x0BBA ); | |
+ mac_ocp_write( tp, 0xF82E, 0xDC00 ); | |
+ mac_ocp_write( tp, 0xF830, 0xC602 ); | |
+ mac_ocp_write( tp, 0xF832, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF834, 0x0000 ); | |
+ mac_ocp_write( tp, 0xF836, 0xC602 ); | |
+ mac_ocp_write( tp, 0xF838, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF83A, 0x0000 ); | |
+ mac_ocp_write( tp, 0xF83C, 0xC602 ); | |
+ mac_ocp_write( tp, 0xF83E, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF840, 0x0000 ); | |
+ mac_ocp_write( tp, 0xF842, 0xC602 ); | |
+ mac_ocp_write( tp, 0xF844, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF846, 0x0000 ); | |
+ mac_ocp_write( tp, 0xF848, 0xC602 ); | |
+ mac_ocp_write( tp, 0xF84A, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF84C, 0x0000 ); | |
+ mac_ocp_write( tp, 0xF84E, 0xC602 ); | |
+ mac_ocp_write( tp, 0xF850, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF852, 0x0000 ); | |
+ mac_ocp_write( tp, 0xF854, 0xC602 ); | |
+ mac_ocp_write( tp, 0xF856, 0xBE00 ); | |
+ mac_ocp_write( tp, 0xF858, 0x0000 ); | |
+ | |
+ mac_ocp_write( tp, 0xFC26, 0x8000 ); | |
+ | |
+ mac_ocp_write( tp, 0xFC28, 0x0BB3 ); | |
+ } else if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30) { | |
+ rtl8168_hw_disable_mac_mcu_bps(dev); | |
+ | |
+ mac_ocp_write(tp, 0xF800, 0xE008); | |
+ mac_ocp_write(tp, 0xF802, 0xE00F); | |
+ mac_ocp_write(tp, 0xF804, 0xE011); | |
+ mac_ocp_write(tp, 0xF806, 0xE047); | |
+ mac_ocp_write(tp, 0xF808, 0xE049); | |
+ mac_ocp_write(tp, 0xF80A, 0xE073); | |
+ mac_ocp_write(tp, 0xF80C, 0xE075); | |
+ mac_ocp_write(tp, 0xF80E, 0xE077); | |
+ mac_ocp_write(tp, 0xF810, 0xC707); | |
+ mac_ocp_write(tp, 0xF812, 0x1D00); | |
+ mac_ocp_write(tp, 0xF814, 0x8DE2); | |
+ mac_ocp_write(tp, 0xF816, 0x48C1); | |
+ mac_ocp_write(tp, 0xF818, 0xC502); | |
+ mac_ocp_write(tp, 0xF81A, 0xBD00); | |
+ mac_ocp_write(tp, 0xF81C, 0x00E4); | |
+ mac_ocp_write(tp, 0xF81E, 0xE0C0); | |
+ mac_ocp_write(tp, 0xF820, 0xC502); | |
+ mac_ocp_write(tp, 0xF822, 0xBD00); | |
+ mac_ocp_write(tp, 0xF824, 0x0216); | |
+ mac_ocp_write(tp, 0xF826, 0xC634); | |
+ mac_ocp_write(tp, 0xF828, 0x75C0); | |
+ mac_ocp_write(tp, 0xF82A, 0x49D3); | |
+ mac_ocp_write(tp, 0xF82C, 0xF027); | |
+ mac_ocp_write(tp, 0xF82E, 0xC631); | |
+ mac_ocp_write(tp, 0xF830, 0x75C0); | |
+ mac_ocp_write(tp, 0xF832, 0x49D3); | |
+ mac_ocp_write(tp, 0xF834, 0xF123); | |
+ mac_ocp_write(tp, 0xF836, 0xC627); | |
+ mac_ocp_write(tp, 0xF838, 0x75C0); | |
+ mac_ocp_write(tp, 0xF83A, 0xB405); | |
+ mac_ocp_write(tp, 0xF83C, 0xC525); | |
+ mac_ocp_write(tp, 0xF83E, 0x9DC0); | |
+ mac_ocp_write(tp, 0xF840, 0xC621); | |
+ mac_ocp_write(tp, 0xF842, 0x75C8); | |
+ mac_ocp_write(tp, 0xF844, 0x49D5); | |
+ mac_ocp_write(tp, 0xF846, 0xF00A); | |
+ mac_ocp_write(tp, 0xF848, 0x49D6); | |
+ mac_ocp_write(tp, 0xF84A, 0xF008); | |
+ mac_ocp_write(tp, 0xF84C, 0x49D7); | |
+ mac_ocp_write(tp, 0xF84E, 0xF006); | |
+ mac_ocp_write(tp, 0xF850, 0x49D8); | |
+ mac_ocp_write(tp, 0xF852, 0xF004); | |
+ mac_ocp_write(tp, 0xF854, 0x75D2); | |
+ mac_ocp_write(tp, 0xF856, 0x49D9); | |
+ mac_ocp_write(tp, 0xF858, 0xF111); | |
+ mac_ocp_write(tp, 0xF85A, 0xC517); | |
+ mac_ocp_write(tp, 0xF85C, 0x9DC8); | |
+ mac_ocp_write(tp, 0xF85E, 0xC516); | |
+ mac_ocp_write(tp, 0xF860, 0x9DD2); | |
+ mac_ocp_write(tp, 0xF862, 0xC618); | |
+ mac_ocp_write(tp, 0xF864, 0x75C0); | |
+ mac_ocp_write(tp, 0xF866, 0x49D4); | |
+ mac_ocp_write(tp, 0xF868, 0xF003); | |
+ mac_ocp_write(tp, 0xF86A, 0x49D0); | |
+ mac_ocp_write(tp, 0xF86C, 0xF104); | |
+ mac_ocp_write(tp, 0xF86E, 0xC60A); | |
+ mac_ocp_write(tp, 0xF870, 0xC50E); | |
+ mac_ocp_write(tp, 0xF872, 0x9DC0); | |
+ mac_ocp_write(tp, 0xF874, 0xB005); | |
+ mac_ocp_write(tp, 0xF876, 0xC607); | |
+ mac_ocp_write(tp, 0xF878, 0x9DC0); | |
+ mac_ocp_write(tp, 0xF87A, 0xB007); | |
+ mac_ocp_write(tp, 0xF87C, 0xC602); | |
+ mac_ocp_write(tp, 0xF87E, 0xBE00); | |
+ mac_ocp_write(tp, 0xF880, 0x1A06); | |
+ mac_ocp_write(tp, 0xF882, 0xB400); | |
+ mac_ocp_write(tp, 0xF884, 0xE86C); | |
+ mac_ocp_write(tp, 0xF886, 0xA000); | |
+ mac_ocp_write(tp, 0xF888, 0x01E1); | |
+ mac_ocp_write(tp, 0xF88A, 0x0200); | |
+ mac_ocp_write(tp, 0xF88C, 0x9200); | |
+ mac_ocp_write(tp, 0xF88E, 0xE84C); | |
+ mac_ocp_write(tp, 0xF890, 0xE004); | |
+ mac_ocp_write(tp, 0xF892, 0xE908); | |
+ mac_ocp_write(tp, 0xF894, 0xC502); | |
+ mac_ocp_write(tp, 0xF896, 0xBD00); | |
+ mac_ocp_write(tp, 0xF898, 0x0B58); | |
+ mac_ocp_write(tp, 0xF89A, 0xB407); | |
+ mac_ocp_write(tp, 0xF89C, 0xB404); | |
+ mac_ocp_write(tp, 0xF89E, 0x2195); | |
+ mac_ocp_write(tp, 0xF8A0, 0x25BD); | |
+ mac_ocp_write(tp, 0xF8A2, 0x9BE0); | |
+ mac_ocp_write(tp, 0xF8A4, 0x1C1C); | |
+ mac_ocp_write(tp, 0xF8A6, 0x484F); | |
+ mac_ocp_write(tp, 0xF8A8, 0x9CE2); | |
+ mac_ocp_write(tp, 0xF8AA, 0x72E2); | |
+ mac_ocp_write(tp, 0xF8AC, 0x49AE); | |
+ mac_ocp_write(tp, 0xF8AE, 0xF1FE); | |
+ mac_ocp_write(tp, 0xF8B0, 0x0B00); | |
+ mac_ocp_write(tp, 0xF8B2, 0xF116); | |
+ mac_ocp_write(tp, 0xF8B4, 0xC71C); | |
+ mac_ocp_write(tp, 0xF8B6, 0xC419); | |
+ mac_ocp_write(tp, 0xF8B8, 0x9CE0); | |
+ mac_ocp_write(tp, 0xF8BA, 0x1C13); | |
+ mac_ocp_write(tp, 0xF8BC, 0x484F); | |
+ mac_ocp_write(tp, 0xF8BE, 0x9CE2); | |
+ mac_ocp_write(tp, 0xF8C0, 0x74E2); | |
+ mac_ocp_write(tp, 0xF8C2, 0x49CE); | |
+ mac_ocp_write(tp, 0xF8C4, 0xF1FE); | |
+ mac_ocp_write(tp, 0xF8C6, 0xC412); | |
+ mac_ocp_write(tp, 0xF8C8, 0x9CE0); | |
+ mac_ocp_write(tp, 0xF8CA, 0x1C13); | |
+ mac_ocp_write(tp, 0xF8CC, 0x484F); | |
+ mac_ocp_write(tp, 0xF8CE, 0x9CE2); | |
+ mac_ocp_write(tp, 0xF8D0, 0x74E2); | |
+ mac_ocp_write(tp, 0xF8D2, 0x49CE); | |
+ mac_ocp_write(tp, 0xF8D4, 0xF1FE); | |
+ mac_ocp_write(tp, 0xF8D6, 0xC70C); | |
+ mac_ocp_write(tp, 0xF8D8, 0x74F8); | |
+ mac_ocp_write(tp, 0xF8DA, 0x48C3); | |
+ mac_ocp_write(tp, 0xF8DC, 0x8CF8); | |
+ mac_ocp_write(tp, 0xF8DE, 0xB004); | |
+ mac_ocp_write(tp, 0xF8E0, 0xB007); | |
+ mac_ocp_write(tp, 0xF8E2, 0xC502); | |
+ mac_ocp_write(tp, 0xF8E4, 0xBD00); | |
+ mac_ocp_write(tp, 0xF8E6, 0x0F24); | |
+ mac_ocp_write(tp, 0xF8E8, 0x0481); | |
+ mac_ocp_write(tp, 0xF8EA, 0x0C81); | |
+ mac_ocp_write(tp, 0xF8EC, 0xDE24); | |
+ mac_ocp_write(tp, 0xF8EE, 0xE000); | |
+ mac_ocp_write(tp, 0xF8F0, 0xC602); | |
+ mac_ocp_write(tp, 0xF8F2, 0xBE00); | |
+ mac_ocp_write(tp, 0xF8F4, 0x0CA4); | |
+ mac_ocp_write(tp, 0xF8F6, 0xC502); | |
+ mac_ocp_write(tp, 0xF8F8, 0xBD00); | |
+ mac_ocp_write(tp, 0xF8FA, 0x0000); | |
+ mac_ocp_write(tp, 0xF8FC, 0xC602); | |
+ mac_ocp_write(tp, 0xF8FE, 0xBE00); | |
+ mac_ocp_write(tp, 0xF900, 0x0000); | |
+ | |
+ mac_ocp_write(tp, 0xFC26, 0x8000); | |
+ | |
+ mac_ocp_write(tp, 0xFC28, 0x00E2); | |
+ mac_ocp_write(tp, 0xFC2A, 0x0210); | |
+ mac_ocp_write(tp, 0xFC2C, 0x1A04); | |
+ mac_ocp_write(tp, 0xFC2E, 0x0B26); | |
+ mac_ocp_write(tp, 0xFC30, 0x0F02); | |
+ mac_ocp_write(tp, 0xFC32, 0x0CA0); | |
+ | |
+ mac_ocp_write(tp, 0xFC38, 0x003F); | |
+ } | |
+} | |
+ | |
+static void | |
+rtl8168_hw_init(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ unsigned long flags; | |
+ u32 csi_tmp; | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_14: | |
+ case CFG_METHOD_15: | |
+ case CFG_METHOD_16: | |
+ case CFG_METHOD_17: | |
+ case CFG_METHOD_18: | |
+ case CFG_METHOD_19: | |
+ case CFG_METHOD_20: | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_22: | |
+ case CFG_METHOD_23: | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ rtl8168_enable_cfg9346_write(tp); | |
+ RTL_W8(Config5, RTL_R8(Config5) & ~BIT_0); | |
+ RTL_W8(Config2, RTL_R8(Config2) & ~BIT_7); | |
+ rtl8168_disable_cfg9346_write(tp); | |
+ RTL_W8(0xF1, RTL_R8(0xF1) & ~BIT_7); | |
+ break; | |
+ } | |
+ | |
+ //Disable UPS | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ mac_ocp_write(tp, 0xD400, mac_ocp_read( tp, 0xD400) & ~(BIT_0)); | |
+ break; | |
+ } | |
+ | |
+ //Disable DMA Aggregation | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ mac_ocp_write(tp, 0xE63E, mac_ocp_read( tp, 0xE63E) & ~(BIT_3 | BIT_2 | BIT_1)); | |
+ mac_ocp_write(tp, 0xE63E, mac_ocp_read( tp, 0xE63E) | (BIT_0)); | |
+ mac_ocp_write(tp, 0xE63E, mac_ocp_read( tp, 0xE63E) & ~(BIT_0)); | |
+ mac_ocp_write(tp, 0xC094, 0x0); | |
+ mac_ocp_write(tp, 0xC09E, 0x0); | |
+ break; | |
+ } | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_9: | |
+ case CFG_METHOD_10: | |
+ RTL_W8(DBG_reg, RTL_R8(DBG_reg) | BIT_1 | BIT_7); | |
+ break; | |
+ } | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_14: | |
+ case CFG_METHOD_15: | |
+ case CFG_METHOD_16: | |
+ case CFG_METHOD_17: | |
+ case CFG_METHOD_18: | |
+ case CFG_METHOD_19: | |
+ RTL_W8(0xF2, (RTL_R8(0xF2) & ~(BIT_2 | BIT_1 | BIT_0))); | |
+ break; | |
+ } | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_16: | |
+ case CFG_METHOD_17: | |
+ case CFG_METHOD_18: | |
+ case CFG_METHOD_19: | |
+ case CFG_METHOD_20: | |
+ if (aspm) { | |
+ RTL_W8(0x6E, RTL_R8(0x6E) | BIT_6); | |
+ rtl8168_eri_write(ioaddr, 0x1AE, 2, 0x0403, ERIAR_ExGMAC); | |
+ } | |
+ break; | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_22: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ if (aspm) { | |
+ if ((mac_ocp_read(tp, 0xDC00) & BIT_3) || (RTL_R8(Config0) & 0x07)) { | |
+ RTL_W8(0x6E, RTL_R8(0x6E) | BIT_6); | |
+ rtl8168_eri_write(ioaddr, 0x1AE, 2, 0x0403, ERIAR_ExGMAC); | |
+ } | |
+ } | |
+ break; | |
+ } | |
+ | |
+ if (tp->mcfg == CFG_METHOD_10 || tp->mcfg == CFG_METHOD_14 || tp->mcfg == CFG_METHOD_15) | |
+ RTL_W8(0xF3, RTL_R8(0xF3) | BIT_2); | |
+ | |
+ rtl8168_hw_mac_mcu_config(dev); | |
+ | |
+ /*disable ocp phy power saving*/ | |
+ if (tp->mcfg == CFG_METHOD_25 || tp->mcfg == CFG_METHOD_26 || | |
+ tp->mcfg == CFG_METHOD_27 || tp->mcfg == CFG_METHOD_28 || | |
+ tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30) { | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ mdio_write_phy_ocp(tp, 0x0C41, 0x13, 0x0000); | |
+ mdio_write_phy_ocp(tp, 0x0C41, 0x13, 0x0500); | |
+ spin_unlock_irqrestore(&tp->phy_lock, flags); | |
+ } | |
+ | |
+ //Set PCIE uncorrectable error status mask pcie 0x108 | |
+ csi_tmp = rtl8168_csi_read(tp, 0x108); | |
+ csi_tmp |= BIT_20; | |
+ rtl8168_csi_write(tp, 0x108, csi_tmp); | |
+ | |
+ if (s0_magic_packet == 1) | |
+ rtl8168_enable_magic_packet(dev); | |
+} | |
+ | |
+static void | |
+rtl8168_hw_ephy_config(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ void __iomem *ioaddr = tp->mmio_addr; | |
+ u16 ephy_data; | |
+ | |
+ | |
+ if (tp->mcfg == CFG_METHOD_4) { | |
+ /*Set EPHY registers begin*/ | |
+ /*Set EPHY register offset 0x02 bit 11 to 0 and bit 12 to 1*/ | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x02); | |
+ ephy_data &= ~BIT_11; | |
+ ephy_data |= BIT_12; | |
+ rtl8168_ephy_write(ioaddr, 0x02, ephy_data); | |
+ | |
+ /*Set EPHY register offset 0x03 bit 1 to 1*/ | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x03); | |
+ ephy_data |= (1 << 1); | |
+ rtl8168_ephy_write(ioaddr, 0x03, ephy_data); | |
+ | |
+ /*Set EPHY register offset 0x06 bit 7 to 0*/ | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x06); | |
+ ephy_data &= ~(1 << 7); | |
+ rtl8168_ephy_write(ioaddr, 0x06, ephy_data); | |
+ /*Set EPHY registers end*/ | |
+ } else if (tp->mcfg == CFG_METHOD_5) { | |
+ /* set EPHY registers */ | |
+ SetPCIePhyBit(tp, 0x01, BIT_0); | |
+ | |
+ ClearAndSetPCIePhyBit(tp, | |
+ 0x03, | |
+ BIT_10, | |
+ BIT_5 | |
+ ); | |
+ } else if (tp->mcfg == CFG_METHOD_9) { | |
+ /* set EPHY registers */ | |
+ rtl8168_ephy_write(ioaddr, 0x01, 0x7C7F); | |
+ rtl8168_ephy_write(ioaddr, 0x02, 0x011F); | |
+ if(tp->eeprom_type != EEPROM_TYPE_NONE) { | |
+ ClearAndSetPCIePhyBit(tp, | |
+ 0x03, | |
+ 0xFFB0, | |
+ 0x05B0 | |
+ ); | |
+ } else { | |
+ ClearAndSetPCIePhyBit(tp, | |
+ 0x03, | |
+ 0xFFF0, | |
+ 0x05F0 | |
+ ); | |
+ } | |
+ rtl8168_ephy_write(ioaddr, 0x06, 0xB271); | |
+ rtl8168_ephy_write(ioaddr, 0x07, 0xCE00); | |
+ } else if (tp->mcfg == CFG_METHOD_10) { | |
+ /* set EPHY registers */ | |
+ rtl8168_ephy_write(ioaddr, 0x01, 0x6C7F); | |
+ rtl8168_ephy_write(ioaddr, 0x02, 0x011F); | |
+ ClearAndSetPCIePhyBit(tp, | |
+ 0x03, | |
+ 0xFFF0, | |
+ 0x01B0 | |
+ ); | |
+ rtl8168_ephy_write(ioaddr, 0x1A, 0x0546); | |
+ rtl8168_ephy_write(ioaddr, 0x1C, 0x80C4); | |
+ rtl8168_ephy_write(ioaddr, 0x1D, 0x78E5); | |
+ rtl8168_ephy_write(ioaddr, 0x0A, 0x8100); | |
+ } else if (tp->mcfg == CFG_METHOD_12) { | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x0B); | |
+ rtl8168_ephy_write(ioaddr, 0x0B, ephy_data|0x48); | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x19); | |
+ ephy_data &= ~0x20; | |
+ rtl8168_ephy_write(ioaddr, 0x19, ephy_data|0x50); | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x0C); | |
+ ephy_data &= ~0x100; | |
+ rtl8168_ephy_write(ioaddr, 0x0C, ephy_data|0x20); | |
+ } else if (tp->mcfg == CFG_METHOD_14 || tp->mcfg == CFG_METHOD_15) { | |
+ /* set EPHY registers */ | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x00) & ~0x0200; | |
+ ephy_data |= 0x0100; | |
+ rtl8168_ephy_write(ioaddr, 0x00, ephy_data); | |
+ | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x00); | |
+ ephy_data |= 0x0004; | |
+ rtl8168_ephy_write(ioaddr, 0x00, ephy_data); | |
+ | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x06) & ~0x0002; | |
+ ephy_data |= 0x0001; | |
+ rtl8168_ephy_write(ioaddr, 0x06, ephy_data); | |
+ | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x06); | |
+ ephy_data |= 0x0030; | |
+ rtl8168_ephy_write(ioaddr, 0x06, ephy_data); | |
+ | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x07); | |
+ ephy_data |= 0x2000; | |
+ rtl8168_ephy_write(ioaddr, 0x07, ephy_data); | |
+ | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x00); | |
+ ephy_data |= 0x0020; | |
+ rtl8168_ephy_write(ioaddr, 0x00, ephy_data); | |
+ | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x03) & ~0x5800; | |
+ ephy_data |= 0x2000; | |
+ rtl8168_ephy_write(ioaddr, 0x03, ephy_data); | |
+ | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x03); | |
+ ephy_data |= 0x0001; | |
+ rtl8168_ephy_write(ioaddr, 0x03, ephy_data); | |
+ | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x01) & ~0x0800; | |
+ ephy_data |= 0x1000; | |
+ rtl8168_ephy_write(ioaddr, 0x01, ephy_data); | |
+ | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x07); | |
+ ephy_data |= 0x4000; | |
+ rtl8168_ephy_write(ioaddr, 0x07, ephy_data); | |
+ | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x1E); | |
+ ephy_data |= 0x2000; | |
+ rtl8168_ephy_write(ioaddr, 0x1E, ephy_data); | |
+ | |
+ rtl8168_ephy_write(ioaddr, 0x19, 0xFE6C); | |
+ | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x0A); | |
+ ephy_data |= 0x0040; | |
+ rtl8168_ephy_write(ioaddr, 0x0A, ephy_data); | |
+ } else if (tp->mcfg == CFG_METHOD_16 || tp->mcfg == CFG_METHOD_17) { | |
+ if (tp->mcfg == CFG_METHOD_16) { | |
+ rtl8168_ephy_write(ioaddr, 0x06, 0xF020); | |
+ rtl8168_ephy_write(ioaddr, 0x07, 0x01FF); | |
+ rtl8168_ephy_write(ioaddr, 0x00, 0x5027); | |
+ rtl8168_ephy_write(ioaddr, 0x01, 0x0003); | |
+ rtl8168_ephy_write(ioaddr, 0x02, 0x2D16); | |
+ rtl8168_ephy_write(ioaddr, 0x03, 0x6D49); | |
+ rtl8168_ephy_write(ioaddr, 0x08, 0x0006); | |
+ rtl8168_ephy_write(ioaddr, 0x0A, 0x00C8); | |
+ } | |
+ | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x09); | |
+ ephy_data |= BIT_7; | |
+ rtl8168_ephy_write(ioaddr, 0x09, ephy_data); | |
+ | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x19); | |
+ ephy_data |= (BIT_2 | BIT_5 | BIT_9); | |
+ rtl8168_ephy_write(ioaddr, 0x19, ephy_data); | |
+ | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x00); | |
+ ephy_data |= BIT_3; | |
+ rtl8168_ephy_write(ioaddr, 0x00, ephy_data); | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x0C); | |
+ ephy_data &= ~(BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4); | |
+ ephy_data |= BIT_9; | |
+ rtl8168_ephy_write(ioaddr, 0x0C, ephy_data); | |
+ } else if (tp->mcfg == CFG_METHOD_18 || tp->mcfg == CFG_METHOD_19) { | |
+ if (tp->mcfg == CFG_METHOD_18) { | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x06); | |
+ ephy_data |= BIT_5; | |
+ ephy_data &= ~(BIT_7 | BIT_6); | |
+ rtl8168_ephy_write(ioaddr, 0x06, ephy_data); | |
+ | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x08); | |
+ ephy_data |= BIT_1; | |
+ ephy_data &= ~BIT_0; | |
+ rtl8168_ephy_write(ioaddr, 0x08, ephy_data); | |
+ } | |
+ | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x09); | |
+ ephy_data |= BIT_7; | |
+ rtl8168_ephy_write(ioaddr, 0x09, ephy_data); | |
+ | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x19); | |
+ ephy_data |= (BIT_2 | BIT_5 | BIT_9); | |
+ rtl8168_ephy_write(ioaddr, 0x19, ephy_data); | |
+ | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x00); | |
+ ephy_data |= BIT_3; | |
+ rtl8168_ephy_write(ioaddr, 0x00, ephy_data); | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x0C); | |
+ ephy_data &= ~(BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4); | |
+ ephy_data |= BIT_9; | |
+ rtl8168_ephy_write(ioaddr, 0x0C, ephy_data); | |
+ } else if (tp->mcfg == CFG_METHOD_20) { | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x06); | |
+ ephy_data |= BIT_5; | |
+ ephy_data &= ~(BIT_7 | BIT_6); | |
+ rtl8168_ephy_write(ioaddr, 0x06, ephy_data); | |
+ | |
+ rtl8168_ephy_write(ioaddr, 0x0f, 0x5200); | |
+ | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x19); | |
+ ephy_data |= (BIT_2 | BIT_5 | BIT_9); | |
+ rtl8168_ephy_write(ioaddr, 0x19, ephy_data); | |
+ | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x00); | |
+ ephy_data |= BIT_3; | |
+ rtl8168_ephy_write(ioaddr, 0x00, ephy_data); | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x0C); | |
+ ephy_data &= ~(BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4); | |
+ ephy_data |= BIT_9; | |
+ rtl8168_ephy_write(ioaddr, 0x0C, ephy_data); | |
+ } else if (tp->mcfg == CFG_METHOD_21 || tp->mcfg == CFG_METHOD_22) { | |
+ | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x00); | |
+ ephy_data &= ~(BIT_3); | |
+ rtl8168_ephy_write(ioaddr, 0x00, ephy_data); | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x0C); | |
+ ephy_data &= ~(BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4); | |
+ ephy_data |= (BIT_5 | BIT_11); | |
+ rtl8168_ephy_write(ioaddr, 0x0C, ephy_data); | |
+ | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x1E); | |
+ ephy_data |= (BIT_0); | |
+ rtl8168_ephy_write(ioaddr, 0x1E, ephy_data); | |
+ | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x19); | |
+ ephy_data &= ~(BIT_15); | |
+ rtl8168_ephy_write(ioaddr, 0x19, ephy_data); | |
+ } else if (tp->mcfg == CFG_METHOD_25) { | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x00); | |
+ ephy_data &= ~BIT_3; | |
+ rtl8168_ephy_write(ioaddr, 0x00, ephy_data); | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x0C); | |
+ ephy_data &= ~(BIT_13 | BIT_12 | BIT_11 | BIT_10| BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4); | |
+ ephy_data |= (BIT_5 | BIT_11); | |
+ rtl8168_ephy_write(ioaddr, 0x0C, ephy_data); | |
+ | |
+ rtl8168_ephy_write(ioaddr, 0x19, 0x7C00); | |
+ rtl8168_ephy_write(ioaddr, 0x1E, 0x20EB); | |
+ rtl8168_ephy_write(ioaddr, 0x0D, 0x1666); | |
+ rtl8168_ephy_write(ioaddr, 0x00, 0x10A3); | |
+ rtl8168_ephy_write(ioaddr, 0x06, 0xF050); | |
+ } else if (tp->mcfg == CFG_METHOD_26) { | |
+ ClearPCIePhyBit(tp, 0x00, BIT_3); | |
+ ClearAndSetPCIePhyBit( tp, | |
+ 0x0C, | |
+ (BIT_13 | BIT_12 | BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_4), | |
+ (BIT_5 | BIT_11) | |
+ ); | |
+ SetPCIePhyBit(tp, 0x1E, BIT_0); | |
+ ClearPCIePhyBit(tp, 0x19, BIT_15); | |
+ | |
+ ClearPCIePhyBit(tp, 0x19, (BIT_5 | BIT_0)); | |
+ | |
+ SetPCIePhyBit(tp, 0x1E, BIT_13); | |
+ ClearPCIePhyBit(tp, 0x0D, BIT_8); | |
+ SetPCIePhyBit(tp, 0x0D, BIT_9); | |
+ SetPCIePhyBit(tp, 0x00, BIT_7); | |
+ | |
+ SetPCIePhyBit(tp, 0x06, BIT_4); | |
+ } else if (tp->mcfg == CFG_METHOD_23) { | |
+ rtl8168_ephy_write(ioaddr, 0x00, 0x10AB); | |
+ rtl8168_ephy_write(ioaddr, 0x06, 0xf030); | |
+ rtl8168_ephy_write(ioaddr, 0x08, 0x2006); | |
+ rtl8168_ephy_write(ioaddr, 0x0D, 0x1666); | |
+ | |
+ ephy_data = rtl8168_ephy_read(ioaddr, 0x0C); | |
+ ephy_data &= ~(BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4); | |
+ rtl8168_ephy_write(ioaddr, 0x0C, ephy_data); | |
+ } else if (tp->mcfg == CFG_METHOD_27) { | |
+ rtl8168_ephy_write(ioaddr, 0x00, 0x10A3); | |
+ rtl8168_ephy_write(ioaddr, 0x19, 0xFC00); | |
+ rtl8168_ephy_write(ioaddr, 0x1E, 0x20EA); | |
+ } else if (tp->mcfg == CFG_METHOD_28) { | |
+ SetPCIePhyBit(tp, 0x00, BIT_7); | |
+ ClearAndSetPCIePhyBit(tp, | |
+ 0x0D, | |
+ BIT_8, | |
+ BIT_9 | |
+ ); | |
+ ClearPCIePhyBit(tp, 0x19, (BIT_15 | BIT_5 | BIT_0)); | |
+ SetPCIePhyBit(tp, 0x1E, BIT_13); | |
+ | |
+ } else if (tp->mcfg == CFG_METHOD_29 || tp->mcfg == CFG_METHOD_30) { | |
+ ClearPCIePhyBit(tp, 0x1E, BIT_11); | |
+ | |
+ SetPCIePhyBit(tp, 0x1E, BIT_0); | |
+ SetPCIePhyBit(tp, 0x1D, BIT_11); | |
+ | |
+ rtl8168_ephy_write(ioaddr, 0x05, 0x2089); | |
+ rtl8168_ephy_write(ioaddr, 0x06, 0x5881); | |
+ | |
+ rtl8168_ephy_write(ioaddr, 0x04, 0x154A); | |
+ rtl8168_ephy_write(ioaddr, 0x01, 0x068B); | |
+ } | |
+} | |
+ | |
+static int | |
+rtl8168_check_hw_phy_mcu_code_ver(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ int ram_code_ver_match = 0; | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_14: | |
+ case CFG_METHOD_15: | |
+ mdio_write(tp, 0x1F, 0x0005); | |
+ mdio_write(tp, 0x05, 0x8B60); | |
+ tp->hw_ram_code_ver = mdio_read(tp, 0x06); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ break; | |
+ case CFG_METHOD_16: | |
+ case CFG_METHOD_17: | |
+ case CFG_METHOD_18: | |
+ case CFG_METHOD_19: | |
+ case CFG_METHOD_20: | |
+ mdio_write(tp, 0x1F, 0x0005); | |
+ mdio_write(tp, 0x05, 0x8B30); | |
+ tp->hw_ram_code_ver = mdio_read(tp, 0x06); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ break; | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_22: | |
+ case CFG_METHOD_23: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ mdio_write(tp, 0x1F, 0x0A43); | |
+ mdio_write(tp, 0x13, 0x801E); | |
+ tp->hw_ram_code_ver = mdio_read(tp, 0x14); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ break; | |
+ default: | |
+ tp->hw_ram_code_ver = ~0; | |
+ break; | |
+ } | |
+ | |
+ if( tp->hw_ram_code_ver == tp->sw_ram_code_ver) { | |
+ ram_code_ver_match = 1; | |
+ tp->HwHasWrRamCodeToMicroP = TRUE; | |
+ } | |
+ | |
+ return ram_code_ver_match; | |
+} | |
+ | |
+static void | |
+rtl8168_write_hw_phy_mcu_code_ver(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_14: | |
+ case CFG_METHOD_15: | |
+ mdio_write(tp, 0x1F, 0x0005); | |
+ mdio_write(tp, 0x05, 0x8B60); | |
+ mdio_write(tp, 0x06, tp->sw_ram_code_ver); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ tp->hw_ram_code_ver = tp->sw_ram_code_ver; | |
+ break; | |
+ case CFG_METHOD_16: | |
+ case CFG_METHOD_17: | |
+ case CFG_METHOD_18: | |
+ case CFG_METHOD_19: | |
+ case CFG_METHOD_20: | |
+ mdio_write(tp, 0x1F, 0x0005); | |
+ mdio_write(tp, 0x05, 0x8B30); | |
+ mdio_write(tp, 0x06, tp->sw_ram_code_ver); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ tp->hw_ram_code_ver = tp->sw_ram_code_ver; | |
+ break; | |
+ case CFG_METHOD_21: | |
+ case CFG_METHOD_22: | |
+ case CFG_METHOD_23: | |
+ case CFG_METHOD_27: | |
+ case CFG_METHOD_28: | |
+ case CFG_METHOD_24: | |
+ case CFG_METHOD_25: | |
+ case CFG_METHOD_26: | |
+ case CFG_METHOD_29: | |
+ case CFG_METHOD_30: | |
+ mdio_write(tp, 0x1F, 0x0A43); | |
+ mdio_write(tp, 0x13, 0x801E); | |
+ mdio_write(tp, 0x14, tp->sw_ram_code_ver); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ tp->hw_ram_code_ver = tp->sw_ram_code_ver; | |
+ break; | |
+ } | |
+} | |
+static int | |
+rtl8168_phy_ram_code_check(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ u16 PhyRegValue; | |
+ u32 WaitCnt; | |
+ int retval = TRUE; | |
+ | |
+ switch(tp->mcfg) { | |
+ case CFG_METHOD_21: | |
+ mdio_write(tp, 0x1f, 0x0A40); | |
+ PhyRegValue = mdio_read(tp, 0x10); | |
+ PhyRegValue &= ~(BIT_11); | |
+ mdio_write(tp, 0x10, PhyRegValue); | |
+ | |
+ | |
+ mdio_write(tp, 0x1f, 0x0A00); | |
+ PhyRegValue = mdio_read(tp, 0x10); | |
+ PhyRegValue &= ~(BIT_12 | BIT_13 | BIT_14 | BIT_15); | |
+ mdio_write(tp, 0x10, PhyRegValue); | |
+ | |
+ mdio_write(tp, 0x1f, 0x0A43); | |
+ mdio_write(tp, 0x13, 0x8010); | |
+ PhyRegValue = mdio_read(tp, 0x14); | |
+ PhyRegValue &= ~(BIT_11); | |
+ mdio_write(tp, 0x14, PhyRegValue); | |
+ | |
+ mdio_write(tp,0x1f, 0x0B82); | |
+ PhyRegValue = mdio_read(tp, 0x10); | |
+ PhyRegValue |= BIT_4; | |
+ mdio_write(tp,0x10, PhyRegValue); | |
+ | |
+ mdio_write(tp,0x1f, 0x0B80); | |
+ WaitCnt = 0; | |
+ do { | |
+ PhyRegValue = mdio_read(tp, 0x10); | |
+ PhyRegValue &= 0x0040; | |
+ udelay(100); | |
+ WaitCnt++; | |
+ } while(PhyRegValue != 0x0040 && WaitCnt <1000); | |
+ | |
+ if(WaitCnt == 1000) { | |
+ retval = FALSE ; | |
+ } | |
+ | |
+ mdio_write(tp, 0x1f, 0x0A40); | |
+ mdio_write(tp, 0x10, 0x0140); | |
+ | |
+ mdio_write(tp, 0x1f, 0x0A4A); | |
+ PhyRegValue = mdio_read(tp, 0x13); | |
+ PhyRegValue &= ~(BIT_6); | |
+ PhyRegValue |= (BIT_7); | |
+ mdio_write(tp, 0x13, PhyRegValue); | |
+ | |
+ mdio_write(tp, 0x1f, 0x0A44); | |
+ PhyRegValue = mdio_read(tp, 0x14); | |
+ PhyRegValue |= (BIT_2); | |
+ mdio_write(tp, 0x14, PhyRegValue); | |
+ | |
+ mdio_write(tp, 0x1f, 0x0A50); | |
+ PhyRegValue = mdio_read(tp, 0x11); | |
+ PhyRegValue |= (BIT_11|BIT_12); | |
+ mdio_write(tp, 0x11, PhyRegValue); | |
+ | |
+ mdio_write(tp, 0x1f, 0x0B82); | |
+ PhyRegValue = mdio_read(tp, 0x10); | |
+ PhyRegValue &= ~(BIT_4); | |
+ mdio_write(tp, 0x10, PhyRegValue); | |
+ | |
+ mdio_write(tp,0x1f, 0x0A22); | |
+ WaitCnt = 0; | |
+ do { | |
+ PhyRegValue = mdio_read(tp, 0x12); | |
+ PhyRegValue &= 0x0010; | |
+ udelay(100); | |
+ WaitCnt++; | |
+ } while(PhyRegValue != 0x0010 && WaitCnt <1000); | |
+ | |
+ if(WaitCnt == 1000) { | |
+ retval = FALSE; | |
+ } | |
+ | |
+ mdio_write(tp, 0x1f, 0x0A40); | |
+ mdio_write(tp, 0x10, 0x1040); | |
+ | |
+ mdio_write(tp, 0x1f, 0x0A4A); | |
+ PhyRegValue = mdio_read(tp, 0x13); | |
+ PhyRegValue &= ~(BIT_6|BIT_7); | |
+ mdio_write(tp, 0x13, PhyRegValue); | |
+ | |
+ mdio_write(tp, 0x1f, 0x0A44); | |
+ PhyRegValue = mdio_read(tp, 0x14); | |
+ PhyRegValue &= ~(BIT_2); | |
+ mdio_write(tp, 0x14, PhyRegValue); | |
+ | |
+ mdio_write(tp, 0x1f, 0x0A50); | |
+ PhyRegValue = mdio_read(tp, 0x11); | |
+ PhyRegValue &= ~(BIT_11|BIT_12); | |
+ mdio_write(tp, 0x11, PhyRegValue); | |
+ | |
+ mdio_write(tp, 0x1f, 0x0A43); | |
+ mdio_write(tp, 0x13, 0x8010); | |
+ PhyRegValue = mdio_read(tp, 0x14); | |
+ PhyRegValue |= (BIT_11); | |
+ mdio_write(tp, 0x14, PhyRegValue); | |
+ | |
+ mdio_write(tp,0x1f, 0x0B82); | |
+ PhyRegValue = mdio_read(tp, 0x10); | |
+ PhyRegValue |= BIT_4; | |
+ mdio_write(tp,0x10, PhyRegValue); | |
+ | |
+ mdio_write(tp,0x1f, 0x0B80); | |
+ WaitCnt = 0; | |
+ do { | |
+ PhyRegValue = mdio_read(tp, 0x10); | |
+ PhyRegValue &= 0x0040; | |
+ udelay(100); | |
+ WaitCnt++; | |
+ } while(PhyRegValue != 0x0040 && WaitCnt <1000); | |
+ | |
+ if( WaitCnt == 1000) { | |
+ retval = FALSE; | |
+ } | |
+ | |
+ mdio_write(tp, 0x1f, 0x0A20); | |
+ PhyRegValue = mdio_read(tp, 0x13); | |
+ if(PhyRegValue & BIT_11) { | |
+ if(PhyRegValue & BIT_10) { | |
+ retval = FALSE; | |
+ } | |
+ } | |
+ | |
+ mdio_write(tp, 0x1f, 0x0B82); | |
+ PhyRegValue = mdio_read(tp, 0x10); | |
+ PhyRegValue &= ~(BIT_4); | |
+ mdio_write(tp, 0x10, PhyRegValue); | |
+ | |
+ mdelay(2); | |
+ break; | |
+ default: | |
+ break; | |
+ } | |
+ | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ return retval; | |
+} | |
+ | |
+static void | |
+rtl8168_set_phy_ram_code_check_fail_flag(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ u16 TmpUshort; | |
+ | |
+ switch(tp->mcfg) { | |
+ case CFG_METHOD_21: | |
+ TmpUshort = mac_ocp_read(tp, 0xD3C0); | |
+ TmpUshort |= BIT_0; | |
+ mac_ocp_write(tp, 0xD3C0, TmpUshort); | |
+ break; | |
+ } | |
+} | |
+ | |
+static void | |
+rtl8168_set_phy_mcu_8168e_1(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ unsigned int gphy_val,i; | |
+ | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x00, 0x1800); | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x0023); | |
+ mdio_write(tp, 0x17, 0x0117); | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1E, 0x002C); | |
+ mdio_write(tp, 0x1B, 0x5000); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x16, 0x4104); | |
+ for (i = 0; i < 200; i++) { | |
+ udelay(100); | |
+ gphy_val = mdio_read(tp, 0x1E); | |
+ gphy_val &= 0x03FF; | |
+ if (gphy_val == 0x000C) | |
+ break; | |
+ } | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ for (i = 0; i < 200; i++) { | |
+ udelay(100); | |
+ gphy_val = mdio_read(tp, 0x07); | |
+ if ((gphy_val & BIT_5) == 0) | |
+ break; | |
+ } | |
+ gphy_val = mdio_read(tp, 0x07); | |
+ if (gphy_val & BIT_5) { | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x00a1); | |
+ mdio_write(tp, 0x17, 0x1000); | |
+ mdio_write(tp, 0x17, 0x0000); | |
+ mdio_write(tp, 0x17, 0x2000); | |
+ mdio_write(tp, 0x1e, 0x002f); | |
+ mdio_write(tp, 0x18, 0x9bfb); | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ mdio_write(tp, 0x07, 0x0000); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ } | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ mdio_write(tp, 0x05, 0xfff6); | |
+ mdio_write(tp, 0x06, 0x0080); | |
+ gphy_val = mdio_read(tp, 0x00); | |
+ gphy_val &= ~(BIT_7); | |
+ mdio_write(tp, 0x00, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0002); | |
+ gphy_val = mdio_read(tp, 0x08); | |
+ gphy_val &= ~(BIT_7); | |
+ mdio_write(tp, 0x08, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x0023); | |
+ mdio_write(tp, 0x16, 0x0306); | |
+ mdio_write(tp, 0x16, 0x0307); | |
+ mdio_write(tp, 0x15, 0x000e); | |
+ mdio_write(tp, 0x19, 0x000a); | |
+ mdio_write(tp, 0x15, 0x0010); | |
+ mdio_write(tp, 0x19, 0x0008); | |
+ mdio_write(tp, 0x15, 0x0018); | |
+ mdio_write(tp, 0x19, 0x4801); | |
+ mdio_write(tp, 0x15, 0x0019); | |
+ mdio_write(tp, 0x19, 0x6801); | |
+ mdio_write(tp, 0x15, 0x001a); | |
+ mdio_write(tp, 0x19, 0x66a1); | |
+ mdio_write(tp, 0x15, 0x001f); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0020); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0021); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0022); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0023); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0024); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0025); | |
+ mdio_write(tp, 0x19, 0x64a1); | |
+ mdio_write(tp, 0x15, 0x0026); | |
+ mdio_write(tp, 0x19, 0x40ea); | |
+ mdio_write(tp, 0x15, 0x0027); | |
+ mdio_write(tp, 0x19, 0x4503); | |
+ mdio_write(tp, 0x15, 0x0028); | |
+ mdio_write(tp, 0x19, 0x9f00); | |
+ mdio_write(tp, 0x15, 0x0029); | |
+ mdio_write(tp, 0x19, 0xa631); | |
+ mdio_write(tp, 0x15, 0x002a); | |
+ mdio_write(tp, 0x19, 0x9717); | |
+ mdio_write(tp, 0x15, 0x002b); | |
+ mdio_write(tp, 0x19, 0x302c); | |
+ mdio_write(tp, 0x15, 0x002c); | |
+ mdio_write(tp, 0x19, 0x4802); | |
+ mdio_write(tp, 0x15, 0x002d); | |
+ mdio_write(tp, 0x19, 0x58da); | |
+ mdio_write(tp, 0x15, 0x002e); | |
+ mdio_write(tp, 0x19, 0x400d); | |
+ mdio_write(tp, 0x15, 0x002f); | |
+ mdio_write(tp, 0x19, 0x4488); | |
+ mdio_write(tp, 0x15, 0x0030); | |
+ mdio_write(tp, 0x19, 0x9e00); | |
+ mdio_write(tp, 0x15, 0x0031); | |
+ mdio_write(tp, 0x19, 0x63c8); | |
+ mdio_write(tp, 0x15, 0x0032); | |
+ mdio_write(tp, 0x19, 0x6481); | |
+ mdio_write(tp, 0x15, 0x0033); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0034); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0035); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0036); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0037); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0038); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0039); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x003a); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x003b); | |
+ mdio_write(tp, 0x19, 0x63e8); | |
+ mdio_write(tp, 0x15, 0x003c); | |
+ mdio_write(tp, 0x19, 0x7d00); | |
+ mdio_write(tp, 0x15, 0x003d); | |
+ mdio_write(tp, 0x19, 0x59d4); | |
+ mdio_write(tp, 0x15, 0x003e); | |
+ mdio_write(tp, 0x19, 0x63f8); | |
+ mdio_write(tp, 0x15, 0x0040); | |
+ mdio_write(tp, 0x19, 0x64a1); | |
+ mdio_write(tp, 0x15, 0x0041); | |
+ mdio_write(tp, 0x19, 0x30de); | |
+ mdio_write(tp, 0x15, 0x0044); | |
+ mdio_write(tp, 0x19, 0x480f); | |
+ mdio_write(tp, 0x15, 0x0045); | |
+ mdio_write(tp, 0x19, 0x6800); | |
+ mdio_write(tp, 0x15, 0x0046); | |
+ mdio_write(tp, 0x19, 0x6680); | |
+ mdio_write(tp, 0x15, 0x0047); | |
+ mdio_write(tp, 0x19, 0x7c10); | |
+ mdio_write(tp, 0x15, 0x0048); | |
+ mdio_write(tp, 0x19, 0x63c8); | |
+ mdio_write(tp, 0x15, 0x0049); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x004a); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x004b); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x004c); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x004d); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x004e); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x004f); | |
+ mdio_write(tp, 0x19, 0x40ea); | |
+ mdio_write(tp, 0x15, 0x0050); | |
+ mdio_write(tp, 0x19, 0x4503); | |
+ mdio_write(tp, 0x15, 0x0051); | |
+ mdio_write(tp, 0x19, 0x58ca); | |
+ mdio_write(tp, 0x15, 0x0052); | |
+ mdio_write(tp, 0x19, 0x63c8); | |
+ mdio_write(tp, 0x15, 0x0053); | |
+ mdio_write(tp, 0x19, 0x63d8); | |
+ mdio_write(tp, 0x15, 0x0054); | |
+ mdio_write(tp, 0x19, 0x66a0); | |
+ mdio_write(tp, 0x15, 0x0055); | |
+ mdio_write(tp, 0x19, 0x9f00); | |
+ mdio_write(tp, 0x15, 0x0056); | |
+ mdio_write(tp, 0x19, 0x3000); | |
+ mdio_write(tp, 0x15, 0x006E); | |
+ mdio_write(tp, 0x19, 0x9afa); | |
+ mdio_write(tp, 0x15, 0x00a1); | |
+ mdio_write(tp, 0x19, 0x3044); | |
+ mdio_write(tp, 0x15, 0x00ab); | |
+ mdio_write(tp, 0x19, 0x5820); | |
+ mdio_write(tp, 0x15, 0x00ac); | |
+ mdio_write(tp, 0x19, 0x5e04); | |
+ mdio_write(tp, 0x15, 0x00ad); | |
+ mdio_write(tp, 0x19, 0xb60c); | |
+ mdio_write(tp, 0x15, 0x00af); | |
+ mdio_write(tp, 0x19, 0x000a); | |
+ mdio_write(tp, 0x15, 0x00b2); | |
+ mdio_write(tp, 0x19, 0x30b9); | |
+ mdio_write(tp, 0x15, 0x00b9); | |
+ mdio_write(tp, 0x19, 0x4408); | |
+ mdio_write(tp, 0x15, 0x00ba); | |
+ mdio_write(tp, 0x19, 0x480b); | |
+ mdio_write(tp, 0x15, 0x00bb); | |
+ mdio_write(tp, 0x19, 0x5e00); | |
+ mdio_write(tp, 0x15, 0x00bc); | |
+ mdio_write(tp, 0x19, 0x405f); | |
+ mdio_write(tp, 0x15, 0x00bd); | |
+ mdio_write(tp, 0x19, 0x4448); | |
+ mdio_write(tp, 0x15, 0x00be); | |
+ mdio_write(tp, 0x19, 0x4020); | |
+ mdio_write(tp, 0x15, 0x00bf); | |
+ mdio_write(tp, 0x19, 0x4468); | |
+ mdio_write(tp, 0x15, 0x00c0); | |
+ mdio_write(tp, 0x19, 0x9c02); | |
+ mdio_write(tp, 0x15, 0x00c1); | |
+ mdio_write(tp, 0x19, 0x58a0); | |
+ mdio_write(tp, 0x15, 0x00c2); | |
+ mdio_write(tp, 0x19, 0xb605); | |
+ mdio_write(tp, 0x15, 0x00c3); | |
+ mdio_write(tp, 0x19, 0xc0d3); | |
+ mdio_write(tp, 0x15, 0x00c4); | |
+ mdio_write(tp, 0x19, 0x00e6); | |
+ mdio_write(tp, 0x15, 0x00c5); | |
+ mdio_write(tp, 0x19, 0xdaec); | |
+ mdio_write(tp, 0x15, 0x00c6); | |
+ mdio_write(tp, 0x19, 0x00fa); | |
+ mdio_write(tp, 0x15, 0x00c7); | |
+ mdio_write(tp, 0x19, 0x9df9); | |
+ mdio_write(tp, 0x15, 0x00c8); | |
+ mdio_write(tp, 0x19, 0x307a); | |
+ mdio_write(tp, 0x15, 0x0112); | |
+ mdio_write(tp, 0x19, 0x6421); | |
+ mdio_write(tp, 0x15, 0x0113); | |
+ mdio_write(tp, 0x19, 0x7c08); | |
+ mdio_write(tp, 0x15, 0x0114); | |
+ mdio_write(tp, 0x19, 0x63f0); | |
+ mdio_write(tp, 0x15, 0x0115); | |
+ mdio_write(tp, 0x19, 0x4003); | |
+ mdio_write(tp, 0x15, 0x0116); | |
+ mdio_write(tp, 0x19, 0x4418); | |
+ mdio_write(tp, 0x15, 0x0117); | |
+ mdio_write(tp, 0x19, 0x9b00); | |
+ mdio_write(tp, 0x15, 0x0118); | |
+ mdio_write(tp, 0x19, 0x6461); | |
+ mdio_write(tp, 0x15, 0x0119); | |
+ mdio_write(tp, 0x19, 0x64e1); | |
+ mdio_write(tp, 0x15, 0x011a); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0150); | |
+ mdio_write(tp, 0x19, 0x7c80); | |
+ mdio_write(tp, 0x15, 0x0151); | |
+ mdio_write(tp, 0x19, 0x6461); | |
+ mdio_write(tp, 0x15, 0x0152); | |
+ mdio_write(tp, 0x19, 0x4003); | |
+ mdio_write(tp, 0x15, 0x0153); | |
+ mdio_write(tp, 0x19, 0x4540); | |
+ mdio_write(tp, 0x15, 0x0154); | |
+ mdio_write(tp, 0x19, 0x9f00); | |
+ mdio_write(tp, 0x15, 0x0155); | |
+ mdio_write(tp, 0x19, 0x9d00); | |
+ mdio_write(tp, 0x15, 0x0156); | |
+ mdio_write(tp, 0x19, 0x7c40); | |
+ mdio_write(tp, 0x15, 0x0157); | |
+ mdio_write(tp, 0x19, 0x6421); | |
+ mdio_write(tp, 0x15, 0x0158); | |
+ mdio_write(tp, 0x19, 0x7c80); | |
+ mdio_write(tp, 0x15, 0x0159); | |
+ mdio_write(tp, 0x19, 0x64a1); | |
+ mdio_write(tp, 0x15, 0x015a); | |
+ mdio_write(tp, 0x19, 0x30fe); | |
+ mdio_write(tp, 0x15, 0x021e); | |
+ mdio_write(tp, 0x19, 0x5410); | |
+ mdio_write(tp, 0x15, 0x0225); | |
+ mdio_write(tp, 0x19, 0x5400); | |
+ mdio_write(tp, 0x15, 0x023D); | |
+ mdio_write(tp, 0x19, 0x4050); | |
+ mdio_write(tp, 0x15, 0x0295); | |
+ mdio_write(tp, 0x19, 0x6c08); | |
+ mdio_write(tp, 0x15, 0x02bd); | |
+ mdio_write(tp, 0x19, 0xa523); | |
+ mdio_write(tp, 0x15, 0x02be); | |
+ mdio_write(tp, 0x19, 0x32ca); | |
+ mdio_write(tp, 0x15, 0x02ca); | |
+ mdio_write(tp, 0x19, 0x48b3); | |
+ mdio_write(tp, 0x15, 0x02cb); | |
+ mdio_write(tp, 0x19, 0x4020); | |
+ mdio_write(tp, 0x15, 0x02cc); | |
+ mdio_write(tp, 0x19, 0x4823); | |
+ mdio_write(tp, 0x15, 0x02cd); | |
+ mdio_write(tp, 0x19, 0x4510); | |
+ mdio_write(tp, 0x15, 0x02ce); | |
+ mdio_write(tp, 0x19, 0xb63a); | |
+ mdio_write(tp, 0x15, 0x02cf); | |
+ mdio_write(tp, 0x19, 0x7dc8); | |
+ mdio_write(tp, 0x15, 0x02d6); | |
+ mdio_write(tp, 0x19, 0x9bf8); | |
+ mdio_write(tp, 0x15, 0x02d8); | |
+ mdio_write(tp, 0x19, 0x85f6); | |
+ mdio_write(tp, 0x15, 0x02d9); | |
+ mdio_write(tp, 0x19, 0x32e0); | |
+ mdio_write(tp, 0x15, 0x02e0); | |
+ mdio_write(tp, 0x19, 0x4834); | |
+ mdio_write(tp, 0x15, 0x02e1); | |
+ mdio_write(tp, 0x19, 0x6c08); | |
+ mdio_write(tp, 0x15, 0x02e2); | |
+ mdio_write(tp, 0x19, 0x4020); | |
+ mdio_write(tp, 0x15, 0x02e3); | |
+ mdio_write(tp, 0x19, 0x4824); | |
+ mdio_write(tp, 0x15, 0x02e4); | |
+ mdio_write(tp, 0x19, 0x4520); | |
+ mdio_write(tp, 0x15, 0x02e5); | |
+ mdio_write(tp, 0x19, 0x4008); | |
+ mdio_write(tp, 0x15, 0x02e6); | |
+ mdio_write(tp, 0x19, 0x4560); | |
+ mdio_write(tp, 0x15, 0x02e7); | |
+ mdio_write(tp, 0x19, 0x9d04); | |
+ mdio_write(tp, 0x15, 0x02e8); | |
+ mdio_write(tp, 0x19, 0x48c4); | |
+ mdio_write(tp, 0x15, 0x02e9); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x02ea); | |
+ mdio_write(tp, 0x19, 0x4844); | |
+ mdio_write(tp, 0x15, 0x02eb); | |
+ mdio_write(tp, 0x19, 0x7dc8); | |
+ mdio_write(tp, 0x15, 0x02f0); | |
+ mdio_write(tp, 0x19, 0x9cf7); | |
+ mdio_write(tp, 0x15, 0x02f1); | |
+ mdio_write(tp, 0x19, 0xdf94); | |
+ mdio_write(tp, 0x15, 0x02f2); | |
+ mdio_write(tp, 0x19, 0x0002); | |
+ mdio_write(tp, 0x15, 0x02f3); | |
+ mdio_write(tp, 0x19, 0x6810); | |
+ mdio_write(tp, 0x15, 0x02f4); | |
+ mdio_write(tp, 0x19, 0xb614); | |
+ mdio_write(tp, 0x15, 0x02f5); | |
+ mdio_write(tp, 0x19, 0xc42b); | |
+ mdio_write(tp, 0x15, 0x02f6); | |
+ mdio_write(tp, 0x19, 0x00d4); | |
+ mdio_write(tp, 0x15, 0x02f7); | |
+ mdio_write(tp, 0x19, 0xc455); | |
+ mdio_write(tp, 0x15, 0x02f8); | |
+ mdio_write(tp, 0x19, 0x0093); | |
+ mdio_write(tp, 0x15, 0x02f9); | |
+ mdio_write(tp, 0x19, 0x92ee); | |
+ mdio_write(tp, 0x15, 0x02fa); | |
+ mdio_write(tp, 0x19, 0xefed); | |
+ mdio_write(tp, 0x15, 0x02fb); | |
+ mdio_write(tp, 0x19, 0x3312); | |
+ mdio_write(tp, 0x15, 0x0312); | |
+ mdio_write(tp, 0x19, 0x49b5); | |
+ mdio_write(tp, 0x15, 0x0313); | |
+ mdio_write(tp, 0x19, 0x7d00); | |
+ mdio_write(tp, 0x15, 0x0314); | |
+ mdio_write(tp, 0x19, 0x4d00); | |
+ mdio_write(tp, 0x15, 0x0315); | |
+ mdio_write(tp, 0x19, 0x6810); | |
+ mdio_write(tp, 0x15, 0x031e); | |
+ mdio_write(tp, 0x19, 0x404f); | |
+ mdio_write(tp, 0x15, 0x031f); | |
+ mdio_write(tp, 0x19, 0x44c8); | |
+ mdio_write(tp, 0x15, 0x0320); | |
+ mdio_write(tp, 0x19, 0xd64f); | |
+ mdio_write(tp, 0x15, 0x0321); | |
+ mdio_write(tp, 0x19, 0x00e7); | |
+ mdio_write(tp, 0x15, 0x0322); | |
+ mdio_write(tp, 0x19, 0x7c08); | |
+ mdio_write(tp, 0x15, 0x0323); | |
+ mdio_write(tp, 0x19, 0x8203); | |
+ mdio_write(tp, 0x15, 0x0324); | |
+ mdio_write(tp, 0x19, 0x4d48); | |
+ mdio_write(tp, 0x15, 0x0325); | |
+ mdio_write(tp, 0x19, 0x3327); | |
+ mdio_write(tp, 0x15, 0x0326); | |
+ mdio_write(tp, 0x19, 0x4d40); | |
+ mdio_write(tp, 0x15, 0x0327); | |
+ mdio_write(tp, 0x19, 0xc8d7); | |
+ mdio_write(tp, 0x15, 0x0328); | |
+ mdio_write(tp, 0x19, 0x0003); | |
+ mdio_write(tp, 0x15, 0x0329); | |
+ mdio_write(tp, 0x19, 0x7c20); | |
+ mdio_write(tp, 0x15, 0x032a); | |
+ mdio_write(tp, 0x19, 0x4c20); | |
+ mdio_write(tp, 0x15, 0x032b); | |
+ mdio_write(tp, 0x19, 0xc8ed); | |
+ mdio_write(tp, 0x15, 0x032c); | |
+ mdio_write(tp, 0x19, 0x00f4); | |
+ mdio_write(tp, 0x15, 0x032d); | |
+ mdio_write(tp, 0x19, 0x82b3); | |
+ mdio_write(tp, 0x15, 0x032e); | |
+ mdio_write(tp, 0x19, 0xd11d); | |
+ mdio_write(tp, 0x15, 0x032f); | |
+ mdio_write(tp, 0x19, 0x00b1); | |
+ mdio_write(tp, 0x15, 0x0330); | |
+ mdio_write(tp, 0x19, 0xde18); | |
+ mdio_write(tp, 0x15, 0x0331); | |
+ mdio_write(tp, 0x19, 0x0008); | |
+ mdio_write(tp, 0x15, 0x0332); | |
+ mdio_write(tp, 0x19, 0x91ee); | |
+ mdio_write(tp, 0x15, 0x0333); | |
+ mdio_write(tp, 0x19, 0x3339); | |
+ mdio_write(tp, 0x15, 0x033a); | |
+ mdio_write(tp, 0x19, 0x4064); | |
+ mdio_write(tp, 0x15, 0x0340); | |
+ mdio_write(tp, 0x19, 0x9e06); | |
+ mdio_write(tp, 0x15, 0x0341); | |
+ mdio_write(tp, 0x19, 0x7c08); | |
+ mdio_write(tp, 0x15, 0x0342); | |
+ mdio_write(tp, 0x19, 0x8203); | |
+ mdio_write(tp, 0x15, 0x0343); | |
+ mdio_write(tp, 0x19, 0x4d48); | |
+ mdio_write(tp, 0x15, 0x0344); | |
+ mdio_write(tp, 0x19, 0x3346); | |
+ mdio_write(tp, 0x15, 0x0345); | |
+ mdio_write(tp, 0x19, 0x4d40); | |
+ mdio_write(tp, 0x15, 0x0346); | |
+ mdio_write(tp, 0x19, 0xd11d); | |
+ mdio_write(tp, 0x15, 0x0347); | |
+ mdio_write(tp, 0x19, 0x0099); | |
+ mdio_write(tp, 0x15, 0x0348); | |
+ mdio_write(tp, 0x19, 0xbb17); | |
+ mdio_write(tp, 0x15, 0x0349); | |
+ mdio_write(tp, 0x19, 0x8102); | |
+ mdio_write(tp, 0x15, 0x034a); | |
+ mdio_write(tp, 0x19, 0x334d); | |
+ mdio_write(tp, 0x15, 0x034b); | |
+ mdio_write(tp, 0x19, 0xa22c); | |
+ mdio_write(tp, 0x15, 0x034c); | |
+ mdio_write(tp, 0x19, 0x3397); | |
+ mdio_write(tp, 0x15, 0x034d); | |
+ mdio_write(tp, 0x19, 0x91f2); | |
+ mdio_write(tp, 0x15, 0x034e); | |
+ mdio_write(tp, 0x19, 0xc218); | |
+ mdio_write(tp, 0x15, 0x034f); | |
+ mdio_write(tp, 0x19, 0x00f0); | |
+ mdio_write(tp, 0x15, 0x0350); | |
+ mdio_write(tp, 0x19, 0x3397); | |
+ mdio_write(tp, 0x15, 0x0351); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0364); | |
+ mdio_write(tp, 0x19, 0xbc05); | |
+ mdio_write(tp, 0x15, 0x0367); | |
+ mdio_write(tp, 0x19, 0xa1fc); | |
+ mdio_write(tp, 0x15, 0x0368); | |
+ mdio_write(tp, 0x19, 0x3377); | |
+ mdio_write(tp, 0x15, 0x0369); | |
+ mdio_write(tp, 0x19, 0x328b); | |
+ mdio_write(tp, 0x15, 0x036a); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0377); | |
+ mdio_write(tp, 0x19, 0x4b97); | |
+ mdio_write(tp, 0x15, 0x0378); | |
+ mdio_write(tp, 0x19, 0x6818); | |
+ mdio_write(tp, 0x15, 0x0379); | |
+ mdio_write(tp, 0x19, 0x4b07); | |
+ mdio_write(tp, 0x15, 0x037a); | |
+ mdio_write(tp, 0x19, 0x40ac); | |
+ mdio_write(tp, 0x15, 0x037b); | |
+ mdio_write(tp, 0x19, 0x4445); | |
+ mdio_write(tp, 0x15, 0x037c); | |
+ mdio_write(tp, 0x19, 0x404e); | |
+ mdio_write(tp, 0x15, 0x037d); | |
+ mdio_write(tp, 0x19, 0x4461); | |
+ mdio_write(tp, 0x15, 0x037e); | |
+ mdio_write(tp, 0x19, 0x9c09); | |
+ mdio_write(tp, 0x15, 0x037f); | |
+ mdio_write(tp, 0x19, 0x63da); | |
+ mdio_write(tp, 0x15, 0x0380); | |
+ mdio_write(tp, 0x19, 0x5440); | |
+ mdio_write(tp, 0x15, 0x0381); | |
+ mdio_write(tp, 0x19, 0x4b98); | |
+ mdio_write(tp, 0x15, 0x0382); | |
+ mdio_write(tp, 0x19, 0x7c60); | |
+ mdio_write(tp, 0x15, 0x0383); | |
+ mdio_write(tp, 0x19, 0x4c00); | |
+ mdio_write(tp, 0x15, 0x0384); | |
+ mdio_write(tp, 0x19, 0x4b08); | |
+ mdio_write(tp, 0x15, 0x0385); | |
+ mdio_write(tp, 0x19, 0x63d8); | |
+ mdio_write(tp, 0x15, 0x0386); | |
+ mdio_write(tp, 0x19, 0x338d); | |
+ mdio_write(tp, 0x15, 0x0387); | |
+ mdio_write(tp, 0x19, 0xd64f); | |
+ mdio_write(tp, 0x15, 0x0388); | |
+ mdio_write(tp, 0x19, 0x0080); | |
+ mdio_write(tp, 0x15, 0x0389); | |
+ mdio_write(tp, 0x19, 0x820c); | |
+ mdio_write(tp, 0x15, 0x038a); | |
+ mdio_write(tp, 0x19, 0xa10b); | |
+ mdio_write(tp, 0x15, 0x038b); | |
+ mdio_write(tp, 0x19, 0x9df3); | |
+ mdio_write(tp, 0x15, 0x038c); | |
+ mdio_write(tp, 0x19, 0x3395); | |
+ mdio_write(tp, 0x15, 0x038d); | |
+ mdio_write(tp, 0x19, 0xd64f); | |
+ mdio_write(tp, 0x15, 0x038e); | |
+ mdio_write(tp, 0x19, 0x00f9); | |
+ mdio_write(tp, 0x15, 0x038f); | |
+ mdio_write(tp, 0x19, 0xc017); | |
+ mdio_write(tp, 0x15, 0x0390); | |
+ mdio_write(tp, 0x19, 0x0005); | |
+ mdio_write(tp, 0x15, 0x0391); | |
+ mdio_write(tp, 0x19, 0x6c0b); | |
+ mdio_write(tp, 0x15, 0x0392); | |
+ mdio_write(tp, 0x19, 0xa103); | |
+ mdio_write(tp, 0x15, 0x0393); | |
+ mdio_write(tp, 0x19, 0x6c08); | |
+ mdio_write(tp, 0x15, 0x0394); | |
+ mdio_write(tp, 0x19, 0x9df9); | |
+ mdio_write(tp, 0x15, 0x0395); | |
+ mdio_write(tp, 0x19, 0x6c08); | |
+ mdio_write(tp, 0x15, 0x0396); | |
+ mdio_write(tp, 0x19, 0x3397); | |
+ mdio_write(tp, 0x15, 0x0399); | |
+ mdio_write(tp, 0x19, 0x6810); | |
+ mdio_write(tp, 0x15, 0x03a4); | |
+ mdio_write(tp, 0x19, 0x7c08); | |
+ mdio_write(tp, 0x15, 0x03a5); | |
+ mdio_write(tp, 0x19, 0x8203); | |
+ mdio_write(tp, 0x15, 0x03a6); | |
+ mdio_write(tp, 0x19, 0x4d08); | |
+ mdio_write(tp, 0x15, 0x03a7); | |
+ mdio_write(tp, 0x19, 0x33a9); | |
+ mdio_write(tp, 0x15, 0x03a8); | |
+ mdio_write(tp, 0x19, 0x4d00); | |
+ mdio_write(tp, 0x15, 0x03a9); | |
+ mdio_write(tp, 0x19, 0x9bfa); | |
+ mdio_write(tp, 0x15, 0x03aa); | |
+ mdio_write(tp, 0x19, 0x33b6); | |
+ mdio_write(tp, 0x15, 0x03bb); | |
+ mdio_write(tp, 0x19, 0x4056); | |
+ mdio_write(tp, 0x15, 0x03bc); | |
+ mdio_write(tp, 0x19, 0x44e9); | |
+ mdio_write(tp, 0x15, 0x03bd); | |
+ mdio_write(tp, 0x19, 0x405e); | |
+ mdio_write(tp, 0x15, 0x03be); | |
+ mdio_write(tp, 0x19, 0x44f8); | |
+ mdio_write(tp, 0x15, 0x03bf); | |
+ mdio_write(tp, 0x19, 0xd64f); | |
+ mdio_write(tp, 0x15, 0x03c0); | |
+ mdio_write(tp, 0x19, 0x0037); | |
+ mdio_write(tp, 0x15, 0x03c1); | |
+ mdio_write(tp, 0x19, 0xbd37); | |
+ mdio_write(tp, 0x15, 0x03c2); | |
+ mdio_write(tp, 0x19, 0x9cfd); | |
+ mdio_write(tp, 0x15, 0x03c3); | |
+ mdio_write(tp, 0x19, 0xc639); | |
+ mdio_write(tp, 0x15, 0x03c4); | |
+ mdio_write(tp, 0x19, 0x0011); | |
+ mdio_write(tp, 0x15, 0x03c5); | |
+ mdio_write(tp, 0x19, 0x9b03); | |
+ mdio_write(tp, 0x15, 0x03c6); | |
+ mdio_write(tp, 0x19, 0x7c01); | |
+ mdio_write(tp, 0x15, 0x03c7); | |
+ mdio_write(tp, 0x19, 0x4c01); | |
+ mdio_write(tp, 0x15, 0x03c8); | |
+ mdio_write(tp, 0x19, 0x9e03); | |
+ mdio_write(tp, 0x15, 0x03c9); | |
+ mdio_write(tp, 0x19, 0x7c20); | |
+ mdio_write(tp, 0x15, 0x03ca); | |
+ mdio_write(tp, 0x19, 0x4c20); | |
+ mdio_write(tp, 0x15, 0x03cb); | |
+ mdio_write(tp, 0x19, 0x9af4); | |
+ mdio_write(tp, 0x15, 0x03cc); | |
+ mdio_write(tp, 0x19, 0x7c12); | |
+ mdio_write(tp, 0x15, 0x03cd); | |
+ mdio_write(tp, 0x19, 0x4c52); | |
+ mdio_write(tp, 0x15, 0x03ce); | |
+ mdio_write(tp, 0x19, 0x4470); | |
+ mdio_write(tp, 0x15, 0x03cf); | |
+ mdio_write(tp, 0x19, 0x7c12); | |
+ mdio_write(tp, 0x15, 0x03d0); | |
+ mdio_write(tp, 0x19, 0x4c40); | |
+ mdio_write(tp, 0x15, 0x03d1); | |
+ mdio_write(tp, 0x19, 0x33bf); | |
+ mdio_write(tp, 0x15, 0x03d6); | |
+ mdio_write(tp, 0x19, 0x4047); | |
+ mdio_write(tp, 0x15, 0x03d7); | |
+ mdio_write(tp, 0x19, 0x4469); | |
+ mdio_write(tp, 0x15, 0x03d8); | |
+ mdio_write(tp, 0x19, 0x492b); | |
+ mdio_write(tp, 0x15, 0x03d9); | |
+ mdio_write(tp, 0x19, 0x4479); | |
+ mdio_write(tp, 0x15, 0x03da); | |
+ mdio_write(tp, 0x19, 0x7c09); | |
+ mdio_write(tp, 0x15, 0x03db); | |
+ mdio_write(tp, 0x19, 0x8203); | |
+ mdio_write(tp, 0x15, 0x03dc); | |
+ mdio_write(tp, 0x19, 0x4d48); | |
+ mdio_write(tp, 0x15, 0x03dd); | |
+ mdio_write(tp, 0x19, 0x33df); | |
+ mdio_write(tp, 0x15, 0x03de); | |
+ mdio_write(tp, 0x19, 0x4d40); | |
+ mdio_write(tp, 0x15, 0x03df); | |
+ mdio_write(tp, 0x19, 0xd64f); | |
+ mdio_write(tp, 0x15, 0x03e0); | |
+ mdio_write(tp, 0x19, 0x0017); | |
+ mdio_write(tp, 0x15, 0x03e1); | |
+ mdio_write(tp, 0x19, 0xbd17); | |
+ mdio_write(tp, 0x15, 0x03e2); | |
+ mdio_write(tp, 0x19, 0x9b03); | |
+ mdio_write(tp, 0x15, 0x03e3); | |
+ mdio_write(tp, 0x19, 0x7c20); | |
+ mdio_write(tp, 0x15, 0x03e4); | |
+ mdio_write(tp, 0x19, 0x4c20); | |
+ mdio_write(tp, 0x15, 0x03e5); | |
+ mdio_write(tp, 0x19, 0x88f5); | |
+ mdio_write(tp, 0x15, 0x03e6); | |
+ mdio_write(tp, 0x19, 0xc428); | |
+ mdio_write(tp, 0x15, 0x03e7); | |
+ mdio_write(tp, 0x19, 0x0008); | |
+ mdio_write(tp, 0x15, 0x03e8); | |
+ mdio_write(tp, 0x19, 0x9af2); | |
+ mdio_write(tp, 0x15, 0x03e9); | |
+ mdio_write(tp, 0x19, 0x7c12); | |
+ mdio_write(tp, 0x15, 0x03ea); | |
+ mdio_write(tp, 0x19, 0x4c52); | |
+ mdio_write(tp, 0x15, 0x03eb); | |
+ mdio_write(tp, 0x19, 0x4470); | |
+ mdio_write(tp, 0x15, 0x03ec); | |
+ mdio_write(tp, 0x19, 0x7c12); | |
+ mdio_write(tp, 0x15, 0x03ed); | |
+ mdio_write(tp, 0x19, 0x4c40); | |
+ mdio_write(tp, 0x15, 0x03ee); | |
+ mdio_write(tp, 0x19, 0x33da); | |
+ mdio_write(tp, 0x15, 0x03ef); | |
+ mdio_write(tp, 0x19, 0x3312); | |
+ mdio_write(tp, 0x16, 0x0306); | |
+ mdio_write(tp, 0x16, 0x0300); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x17, 0x2179); | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x0040); | |
+ mdio_write(tp, 0x18, 0x0645); | |
+ mdio_write(tp, 0x19, 0xe200); | |
+ mdio_write(tp, 0x18, 0x0655); | |
+ mdio_write(tp, 0x19, 0x9000); | |
+ mdio_write(tp, 0x18, 0x0d05); | |
+ mdio_write(tp, 0x19, 0xbe00); | |
+ mdio_write(tp, 0x18, 0x0d15); | |
+ mdio_write(tp, 0x19, 0xd300); | |
+ mdio_write(tp, 0x18, 0x0d25); | |
+ mdio_write(tp, 0x19, 0xfe00); | |
+ mdio_write(tp, 0x18, 0x0d35); | |
+ mdio_write(tp, 0x19, 0x4000); | |
+ mdio_write(tp, 0x18, 0x0d45); | |
+ mdio_write(tp, 0x19, 0x7f00); | |
+ mdio_write(tp, 0x18, 0x0d55); | |
+ mdio_write(tp, 0x19, 0x1000); | |
+ mdio_write(tp, 0x18, 0x0d65); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x18, 0x0d75); | |
+ mdio_write(tp, 0x19, 0x8200); | |
+ mdio_write(tp, 0x18, 0x0d85); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x18, 0x0d95); | |
+ mdio_write(tp, 0x19, 0x7000); | |
+ mdio_write(tp, 0x18, 0x0da5); | |
+ mdio_write(tp, 0x19, 0x0f00); | |
+ mdio_write(tp, 0x18, 0x0db5); | |
+ mdio_write(tp, 0x19, 0x0100); | |
+ mdio_write(tp, 0x18, 0x0dc5); | |
+ mdio_write(tp, 0x19, 0x9b00); | |
+ mdio_write(tp, 0x18, 0x0dd5); | |
+ mdio_write(tp, 0x19, 0x7f00); | |
+ mdio_write(tp, 0x18, 0x0de5); | |
+ mdio_write(tp, 0x19, 0xe000); | |
+ mdio_write(tp, 0x18, 0x0df5); | |
+ mdio_write(tp, 0x19, 0xef00); | |
+ mdio_write(tp, 0x18, 0x16d5); | |
+ mdio_write(tp, 0x19, 0xe200); | |
+ mdio_write(tp, 0x18, 0x16e5); | |
+ mdio_write(tp, 0x19, 0xab00); | |
+ mdio_write(tp, 0x18, 0x2904); | |
+ mdio_write(tp, 0x19, 0x4000); | |
+ mdio_write(tp, 0x18, 0x2914); | |
+ mdio_write(tp, 0x19, 0x7f00); | |
+ mdio_write(tp, 0x18, 0x2924); | |
+ mdio_write(tp, 0x19, 0x0100); | |
+ mdio_write(tp, 0x18, 0x2934); | |
+ mdio_write(tp, 0x19, 0x2000); | |
+ mdio_write(tp, 0x18, 0x2944); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x18, 0x2954); | |
+ mdio_write(tp, 0x19, 0x4600); | |
+ mdio_write(tp, 0x18, 0x2964); | |
+ mdio_write(tp, 0x19, 0xfc00); | |
+ mdio_write(tp, 0x18, 0x2974); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x18, 0x2984); | |
+ mdio_write(tp, 0x19, 0x5000); | |
+ mdio_write(tp, 0x18, 0x2994); | |
+ mdio_write(tp, 0x19, 0x9d00); | |
+ mdio_write(tp, 0x18, 0x29a4); | |
+ mdio_write(tp, 0x19, 0xff00); | |
+ mdio_write(tp, 0x18, 0x29b4); | |
+ mdio_write(tp, 0x19, 0x4000); | |
+ mdio_write(tp, 0x18, 0x29c4); | |
+ mdio_write(tp, 0x19, 0x7f00); | |
+ mdio_write(tp, 0x18, 0x29d4); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x18, 0x29e4); | |
+ mdio_write(tp, 0x19, 0x2000); | |
+ mdio_write(tp, 0x18, 0x29f4); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x18, 0x2a04); | |
+ mdio_write(tp, 0x19, 0xe600); | |
+ mdio_write(tp, 0x18, 0x2a14); | |
+ mdio_write(tp, 0x19, 0xff00); | |
+ mdio_write(tp, 0x18, 0x2a24); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x18, 0x2a34); | |
+ mdio_write(tp, 0x19, 0x5000); | |
+ mdio_write(tp, 0x18, 0x2a44); | |
+ mdio_write(tp, 0x19, 0x8500); | |
+ mdio_write(tp, 0x18, 0x2a54); | |
+ mdio_write(tp, 0x19, 0x7f00); | |
+ mdio_write(tp, 0x18, 0x2a64); | |
+ mdio_write(tp, 0x19, 0xac00); | |
+ mdio_write(tp, 0x18, 0x2a74); | |
+ mdio_write(tp, 0x19, 0x0800); | |
+ mdio_write(tp, 0x18, 0x2a84); | |
+ mdio_write(tp, 0x19, 0xfc00); | |
+ mdio_write(tp, 0x18, 0x2a94); | |
+ mdio_write(tp, 0x19, 0xe000); | |
+ mdio_write(tp, 0x18, 0x2aa4); | |
+ mdio_write(tp, 0x19, 0x7400); | |
+ mdio_write(tp, 0x18, 0x2ab4); | |
+ mdio_write(tp, 0x19, 0x4000); | |
+ mdio_write(tp, 0x18, 0x2ac4); | |
+ mdio_write(tp, 0x19, 0x7f00); | |
+ mdio_write(tp, 0x18, 0x2ad4); | |
+ mdio_write(tp, 0x19, 0x0100); | |
+ mdio_write(tp, 0x18, 0x2ae4); | |
+ mdio_write(tp, 0x19, 0xff00); | |
+ mdio_write(tp, 0x18, 0x2af4); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x18, 0x2b04); | |
+ mdio_write(tp, 0x19, 0x4400); | |
+ mdio_write(tp, 0x18, 0x2b14); | |
+ mdio_write(tp, 0x19, 0xfc00); | |
+ mdio_write(tp, 0x18, 0x2b24); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x18, 0x2b34); | |
+ mdio_write(tp, 0x19, 0x4000); | |
+ mdio_write(tp, 0x18, 0x2b44); | |
+ mdio_write(tp, 0x19, 0x9d00); | |
+ mdio_write(tp, 0x18, 0x2b54); | |
+ mdio_write(tp, 0x19, 0xff00); | |
+ mdio_write(tp, 0x18, 0x2b64); | |
+ mdio_write(tp, 0x19, 0x4000); | |
+ mdio_write(tp, 0x18, 0x2b74); | |
+ mdio_write(tp, 0x19, 0x7f00); | |
+ mdio_write(tp, 0x18, 0x2b84); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x18, 0x2b94); | |
+ mdio_write(tp, 0x19, 0xff00); | |
+ mdio_write(tp, 0x18, 0x2ba4); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x18, 0x2bb4); | |
+ mdio_write(tp, 0x19, 0xfc00); | |
+ mdio_write(tp, 0x18, 0x2bc4); | |
+ mdio_write(tp, 0x19, 0xff00); | |
+ mdio_write(tp, 0x18, 0x2bd4); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x18, 0x2be4); | |
+ mdio_write(tp, 0x19, 0x4000); | |
+ mdio_write(tp, 0x18, 0x2bf4); | |
+ mdio_write(tp, 0x19, 0x8900); | |
+ mdio_write(tp, 0x18, 0x2c04); | |
+ mdio_write(tp, 0x19, 0x8300); | |
+ mdio_write(tp, 0x18, 0x2c14); | |
+ mdio_write(tp, 0x19, 0xe000); | |
+ mdio_write(tp, 0x18, 0x2c24); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x18, 0x2c34); | |
+ mdio_write(tp, 0x19, 0xac00); | |
+ mdio_write(tp, 0x18, 0x2c44); | |
+ mdio_write(tp, 0x19, 0x0800); | |
+ mdio_write(tp, 0x18, 0x2c54); | |
+ mdio_write(tp, 0x19, 0xfa00); | |
+ mdio_write(tp, 0x18, 0x2c64); | |
+ mdio_write(tp, 0x19, 0xe100); | |
+ mdio_write(tp, 0x18, 0x2c74); | |
+ mdio_write(tp, 0x19, 0x7f00); | |
+ mdio_write(tp, 0x18, 0x0001); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x17, 0x2100); | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ mdio_write(tp, 0x05, 0xfff6); | |
+ mdio_write(tp, 0x06, 0x0080); | |
+ mdio_write(tp, 0x05, 0x8b88); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x05, 0x8000); | |
+ mdio_write(tp, 0x06, 0xd480); | |
+ mdio_write(tp, 0x06, 0xc1e4); | |
+ mdio_write(tp, 0x06, 0x8b9a); | |
+ mdio_write(tp, 0x06, 0xe58b); | |
+ mdio_write(tp, 0x06, 0x9bee); | |
+ mdio_write(tp, 0x06, 0x8b83); | |
+ mdio_write(tp, 0x06, 0x41bf); | |
+ mdio_write(tp, 0x06, 0x8b88); | |
+ mdio_write(tp, 0x06, 0xec00); | |
+ mdio_write(tp, 0x06, 0x19a9); | |
+ mdio_write(tp, 0x06, 0x8b90); | |
+ mdio_write(tp, 0x06, 0xf9ee); | |
+ mdio_write(tp, 0x06, 0xfff6); | |
+ mdio_write(tp, 0x06, 0x00ee); | |
+ mdio_write(tp, 0x06, 0xfff7); | |
+ mdio_write(tp, 0x06, 0xffe0); | |
+ mdio_write(tp, 0x06, 0xe140); | |
+ mdio_write(tp, 0x06, 0xe1e1); | |
+ mdio_write(tp, 0x06, 0x41f7); | |
+ mdio_write(tp, 0x06, 0x2ff6); | |
+ mdio_write(tp, 0x06, 0x28e4); | |
+ mdio_write(tp, 0x06, 0xe140); | |
+ mdio_write(tp, 0x06, 0xe5e1); | |
+ mdio_write(tp, 0x06, 0x41f7); | |
+ mdio_write(tp, 0x06, 0x0002); | |
+ mdio_write(tp, 0x06, 0x020c); | |
+ mdio_write(tp, 0x06, 0x0202); | |
+ mdio_write(tp, 0x06, 0x1d02); | |
+ mdio_write(tp, 0x06, 0x0230); | |
+ mdio_write(tp, 0x06, 0x0202); | |
+ mdio_write(tp, 0x06, 0x4002); | |
+ mdio_write(tp, 0x06, 0x028b); | |
+ mdio_write(tp, 0x06, 0x0280); | |
+ mdio_write(tp, 0x06, 0x6c02); | |
+ mdio_write(tp, 0x06, 0x8085); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x88e1); | |
+ mdio_write(tp, 0x06, 0x8b89); | |
+ mdio_write(tp, 0x06, 0x1e01); | |
+ mdio_write(tp, 0x06, 0xe18b); | |
+ mdio_write(tp, 0x06, 0x8a1e); | |
+ mdio_write(tp, 0x06, 0x01e1); | |
+ mdio_write(tp, 0x06, 0x8b8b); | |
+ mdio_write(tp, 0x06, 0x1e01); | |
+ mdio_write(tp, 0x06, 0xe18b); | |
+ mdio_write(tp, 0x06, 0x8c1e); | |
+ mdio_write(tp, 0x06, 0x01e1); | |
+ mdio_write(tp, 0x06, 0x8b8d); | |
+ mdio_write(tp, 0x06, 0x1e01); | |
+ mdio_write(tp, 0x06, 0xe18b); | |
+ mdio_write(tp, 0x06, 0x8e1e); | |
+ mdio_write(tp, 0x06, 0x01a0); | |
+ mdio_write(tp, 0x06, 0x00c7); | |
+ mdio_write(tp, 0x06, 0xaec3); | |
+ mdio_write(tp, 0x06, 0xf8e0); | |
+ mdio_write(tp, 0x06, 0x8b8d); | |
+ mdio_write(tp, 0x06, 0xad20); | |
+ mdio_write(tp, 0x06, 0x10ee); | |
+ mdio_write(tp, 0x06, 0x8b8d); | |
+ mdio_write(tp, 0x06, 0x0002); | |
+ mdio_write(tp, 0x06, 0x1310); | |
+ mdio_write(tp, 0x06, 0x021f); | |
+ mdio_write(tp, 0x06, 0x9d02); | |
+ mdio_write(tp, 0x06, 0x1f0c); | |
+ mdio_write(tp, 0x06, 0x0227); | |
+ mdio_write(tp, 0x06, 0x49fc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x8ead); | |
+ mdio_write(tp, 0x06, 0x200b); | |
+ mdio_write(tp, 0x06, 0xf620); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x8e02); | |
+ mdio_write(tp, 0x06, 0x830e); | |
+ mdio_write(tp, 0x06, 0x021b); | |
+ mdio_write(tp, 0x06, 0x67ad); | |
+ mdio_write(tp, 0x06, 0x2211); | |
+ mdio_write(tp, 0x06, 0xf622); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x8e02); | |
+ mdio_write(tp, 0x06, 0x2ba5); | |
+ mdio_write(tp, 0x06, 0x022a); | |
+ mdio_write(tp, 0x06, 0x2402); | |
+ mdio_write(tp, 0x06, 0x80c6); | |
+ mdio_write(tp, 0x06, 0x022a); | |
+ mdio_write(tp, 0x06, 0xf0ad); | |
+ mdio_write(tp, 0x06, 0x2511); | |
+ mdio_write(tp, 0x06, 0xf625); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x8e02); | |
+ mdio_write(tp, 0x06, 0x8226); | |
+ mdio_write(tp, 0x06, 0x0204); | |
+ mdio_write(tp, 0x06, 0x0302); | |
+ mdio_write(tp, 0x06, 0x19cc); | |
+ mdio_write(tp, 0x06, 0x022b); | |
+ mdio_write(tp, 0x06, 0x5bfc); | |
+ mdio_write(tp, 0x06, 0x04ee); | |
+ mdio_write(tp, 0x06, 0x8b8d); | |
+ mdio_write(tp, 0x06, 0x0105); | |
+ mdio_write(tp, 0x06, 0xf8e0); | |
+ mdio_write(tp, 0x06, 0x8b83); | |
+ mdio_write(tp, 0x06, 0xad24); | |
+ mdio_write(tp, 0x06, 0x44e0); | |
+ mdio_write(tp, 0x06, 0xe022); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0x23ad); | |
+ mdio_write(tp, 0x06, 0x223b); | |
+ mdio_write(tp, 0x06, 0xe08a); | |
+ mdio_write(tp, 0x06, 0xbea0); | |
+ mdio_write(tp, 0x06, 0x0005); | |
+ mdio_write(tp, 0x06, 0x0228); | |
+ mdio_write(tp, 0x06, 0xdeae); | |
+ mdio_write(tp, 0x06, 0x42a0); | |
+ mdio_write(tp, 0x06, 0x0105); | |
+ mdio_write(tp, 0x06, 0x0228); | |
+ mdio_write(tp, 0x06, 0xf1ae); | |
+ mdio_write(tp, 0x06, 0x3aa0); | |
+ mdio_write(tp, 0x06, 0x0205); | |
+ mdio_write(tp, 0x06, 0x0281); | |
+ mdio_write(tp, 0x06, 0x25ae); | |
+ mdio_write(tp, 0x06, 0x32a0); | |
+ mdio_write(tp, 0x06, 0x0305); | |
+ mdio_write(tp, 0x06, 0x0229); | |
+ mdio_write(tp, 0x06, 0x9aae); | |
+ mdio_write(tp, 0x06, 0x2aa0); | |
+ mdio_write(tp, 0x06, 0x0405); | |
+ mdio_write(tp, 0x06, 0x0229); | |
+ mdio_write(tp, 0x06, 0xaeae); | |
+ mdio_write(tp, 0x06, 0x22a0); | |
+ mdio_write(tp, 0x06, 0x0505); | |
+ mdio_write(tp, 0x06, 0x0229); | |
+ mdio_write(tp, 0x06, 0xd7ae); | |
+ mdio_write(tp, 0x06, 0x1aa0); | |
+ mdio_write(tp, 0x06, 0x0605); | |
+ mdio_write(tp, 0x06, 0x0229); | |
+ mdio_write(tp, 0x06, 0xfeae); | |
+ mdio_write(tp, 0x06, 0x12ee); | |
+ mdio_write(tp, 0x06, 0x8ac0); | |
+ mdio_write(tp, 0x06, 0x00ee); | |
+ mdio_write(tp, 0x06, 0x8ac1); | |
+ mdio_write(tp, 0x06, 0x00ee); | |
+ mdio_write(tp, 0x06, 0x8ac6); | |
+ mdio_write(tp, 0x06, 0x00ee); | |
+ mdio_write(tp, 0x06, 0x8abe); | |
+ mdio_write(tp, 0x06, 0x00ae); | |
+ mdio_write(tp, 0x06, 0x00fc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0x022a); | |
+ mdio_write(tp, 0x06, 0x67e0); | |
+ mdio_write(tp, 0x06, 0xe022); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0x230d); | |
+ mdio_write(tp, 0x06, 0x0658); | |
+ mdio_write(tp, 0x06, 0x03a0); | |
+ mdio_write(tp, 0x06, 0x0202); | |
+ mdio_write(tp, 0x06, 0xae2d); | |
+ mdio_write(tp, 0x06, 0xa001); | |
+ mdio_write(tp, 0x06, 0x02ae); | |
+ mdio_write(tp, 0x06, 0x2da0); | |
+ mdio_write(tp, 0x06, 0x004d); | |
+ mdio_write(tp, 0x06, 0xe0e2); | |
+ mdio_write(tp, 0x06, 0x00e1); | |
+ mdio_write(tp, 0x06, 0xe201); | |
+ mdio_write(tp, 0x06, 0xad24); | |
+ mdio_write(tp, 0x06, 0x44e0); | |
+ mdio_write(tp, 0x06, 0x8ac2); | |
+ mdio_write(tp, 0x06, 0xe48a); | |
+ mdio_write(tp, 0x06, 0xc4e0); | |
+ mdio_write(tp, 0x06, 0x8ac3); | |
+ mdio_write(tp, 0x06, 0xe48a); | |
+ mdio_write(tp, 0x06, 0xc5ee); | |
+ mdio_write(tp, 0x06, 0x8abe); | |
+ mdio_write(tp, 0x06, 0x03e0); | |
+ mdio_write(tp, 0x06, 0x8b83); | |
+ mdio_write(tp, 0x06, 0xad25); | |
+ mdio_write(tp, 0x06, 0x3aee); | |
+ mdio_write(tp, 0x06, 0x8abe); | |
+ mdio_write(tp, 0x06, 0x05ae); | |
+ mdio_write(tp, 0x06, 0x34e0); | |
+ mdio_write(tp, 0x06, 0x8ace); | |
+ mdio_write(tp, 0x06, 0xae03); | |
+ mdio_write(tp, 0x06, 0xe08a); | |
+ mdio_write(tp, 0x06, 0xcfe1); | |
+ mdio_write(tp, 0x06, 0x8ac2); | |
+ mdio_write(tp, 0x06, 0x4905); | |
+ mdio_write(tp, 0x06, 0xe58a); | |
+ mdio_write(tp, 0x06, 0xc4e1); | |
+ mdio_write(tp, 0x06, 0x8ac3); | |
+ mdio_write(tp, 0x06, 0x4905); | |
+ mdio_write(tp, 0x06, 0xe58a); | |
+ mdio_write(tp, 0x06, 0xc5ee); | |
+ mdio_write(tp, 0x06, 0x8abe); | |
+ mdio_write(tp, 0x06, 0x0502); | |
+ mdio_write(tp, 0x06, 0x2ab6); | |
+ mdio_write(tp, 0x06, 0xac20); | |
+ mdio_write(tp, 0x06, 0x1202); | |
+ mdio_write(tp, 0x06, 0x819b); | |
+ mdio_write(tp, 0x06, 0xac20); | |
+ mdio_write(tp, 0x06, 0x0cee); | |
+ mdio_write(tp, 0x06, 0x8ac1); | |
+ mdio_write(tp, 0x06, 0x00ee); | |
+ mdio_write(tp, 0x06, 0x8ac6); | |
+ mdio_write(tp, 0x06, 0x00ee); | |
+ mdio_write(tp, 0x06, 0x8abe); | |
+ mdio_write(tp, 0x06, 0x02fc); | |
+ mdio_write(tp, 0x06, 0x04d0); | |
+ mdio_write(tp, 0x06, 0x0002); | |
+ mdio_write(tp, 0x06, 0x81ad); | |
+ mdio_write(tp, 0x06, 0x590f); | |
+ mdio_write(tp, 0x06, 0x3902); | |
+ mdio_write(tp, 0x06, 0xaa04); | |
+ mdio_write(tp, 0x06, 0xd001); | |
+ mdio_write(tp, 0x06, 0xae02); | |
+ mdio_write(tp, 0x06, 0xd000); | |
+ mdio_write(tp, 0x06, 0x04f9); | |
+ mdio_write(tp, 0x06, 0xfae2); | |
+ mdio_write(tp, 0x06, 0xe2d2); | |
+ mdio_write(tp, 0x06, 0xe3e2); | |
+ mdio_write(tp, 0x06, 0xd3f9); | |
+ mdio_write(tp, 0x06, 0x5af7); | |
+ mdio_write(tp, 0x06, 0xe6e2); | |
+ mdio_write(tp, 0x06, 0xd2e7); | |
+ mdio_write(tp, 0x06, 0xe2d3); | |
+ mdio_write(tp, 0x06, 0xe2e0); | |
+ mdio_write(tp, 0x06, 0x2ce3); | |
+ mdio_write(tp, 0x06, 0xe02d); | |
+ mdio_write(tp, 0x06, 0xf95b); | |
+ mdio_write(tp, 0x06, 0xe01e); | |
+ mdio_write(tp, 0x06, 0x30e6); | |
+ mdio_write(tp, 0x06, 0xe02c); | |
+ mdio_write(tp, 0x06, 0xe7e0); | |
+ mdio_write(tp, 0x06, 0x2de2); | |
+ mdio_write(tp, 0x06, 0xe2cc); | |
+ mdio_write(tp, 0x06, 0xe3e2); | |
+ mdio_write(tp, 0x06, 0xcdf9); | |
+ mdio_write(tp, 0x06, 0x5a0f); | |
+ mdio_write(tp, 0x06, 0x6a50); | |
+ mdio_write(tp, 0x06, 0xe6e2); | |
+ mdio_write(tp, 0x06, 0xcce7); | |
+ mdio_write(tp, 0x06, 0xe2cd); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0x3ce1); | |
+ mdio_write(tp, 0x06, 0xe03d); | |
+ mdio_write(tp, 0x06, 0xef64); | |
+ mdio_write(tp, 0x06, 0xfde0); | |
+ mdio_write(tp, 0x06, 0xe2cc); | |
+ mdio_write(tp, 0x06, 0xe1e2); | |
+ mdio_write(tp, 0x06, 0xcd58); | |
+ mdio_write(tp, 0x06, 0x0f5a); | |
+ mdio_write(tp, 0x06, 0xf01e); | |
+ mdio_write(tp, 0x06, 0x02e4); | |
+ mdio_write(tp, 0x06, 0xe2cc); | |
+ mdio_write(tp, 0x06, 0xe5e2); | |
+ mdio_write(tp, 0x06, 0xcdfd); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0x2ce1); | |
+ mdio_write(tp, 0x06, 0xe02d); | |
+ mdio_write(tp, 0x06, 0x59e0); | |
+ mdio_write(tp, 0x06, 0x5b1f); | |
+ mdio_write(tp, 0x06, 0x1e13); | |
+ mdio_write(tp, 0x06, 0xe4e0); | |
+ mdio_write(tp, 0x06, 0x2ce5); | |
+ mdio_write(tp, 0x06, 0xe02d); | |
+ mdio_write(tp, 0x06, 0xfde0); | |
+ mdio_write(tp, 0x06, 0xe2d2); | |
+ mdio_write(tp, 0x06, 0xe1e2); | |
+ mdio_write(tp, 0x06, 0xd358); | |
+ mdio_write(tp, 0x06, 0xf75a); | |
+ mdio_write(tp, 0x06, 0x081e); | |
+ mdio_write(tp, 0x06, 0x02e4); | |
+ mdio_write(tp, 0x06, 0xe2d2); | |
+ mdio_write(tp, 0x06, 0xe5e2); | |
+ mdio_write(tp, 0x06, 0xd3ef); | |
+ mdio_write(tp, 0x06, 0x46fe); | |
+ mdio_write(tp, 0x06, 0xfd04); | |
+ mdio_write(tp, 0x06, 0xf8f9); | |
+ mdio_write(tp, 0x06, 0xfaef); | |
+ mdio_write(tp, 0x06, 0x69e0); | |
+ mdio_write(tp, 0x06, 0xe022); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0x2358); | |
+ mdio_write(tp, 0x06, 0xc4e1); | |
+ mdio_write(tp, 0x06, 0x8b6e); | |
+ mdio_write(tp, 0x06, 0x1f10); | |
+ mdio_write(tp, 0x06, 0x9e58); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x6ead); | |
+ mdio_write(tp, 0x06, 0x2222); | |
+ mdio_write(tp, 0x06, 0xac27); | |
+ mdio_write(tp, 0x06, 0x55ac); | |
+ mdio_write(tp, 0x06, 0x2602); | |
+ mdio_write(tp, 0x06, 0xae1a); | |
+ mdio_write(tp, 0x06, 0xd106); | |
+ mdio_write(tp, 0x06, 0xbf3b); | |
+ mdio_write(tp, 0x06, 0xba02); | |
+ mdio_write(tp, 0x06, 0x2dc1); | |
+ mdio_write(tp, 0x06, 0xd107); | |
+ mdio_write(tp, 0x06, 0xbf3b); | |
+ mdio_write(tp, 0x06, 0xbd02); | |
+ mdio_write(tp, 0x06, 0x2dc1); | |
+ mdio_write(tp, 0x06, 0xd107); | |
+ mdio_write(tp, 0x06, 0xbf3b); | |
+ mdio_write(tp, 0x06, 0xc002); | |
+ mdio_write(tp, 0x06, 0x2dc1); | |
+ mdio_write(tp, 0x06, 0xae30); | |
+ mdio_write(tp, 0x06, 0xd103); | |
+ mdio_write(tp, 0x06, 0xbf3b); | |
+ mdio_write(tp, 0x06, 0xc302); | |
+ mdio_write(tp, 0x06, 0x2dc1); | |
+ mdio_write(tp, 0x06, 0xd100); | |
+ mdio_write(tp, 0x06, 0xbf3b); | |
+ mdio_write(tp, 0x06, 0xc602); | |
+ mdio_write(tp, 0x06, 0x2dc1); | |
+ mdio_write(tp, 0x06, 0xd100); | |
+ mdio_write(tp, 0x06, 0xbf82); | |
+ mdio_write(tp, 0x06, 0xca02); | |
+ mdio_write(tp, 0x06, 0x2dc1); | |
+ mdio_write(tp, 0x06, 0xd10f); | |
+ mdio_write(tp, 0x06, 0xbf3b); | |
+ mdio_write(tp, 0x06, 0xba02); | |
+ mdio_write(tp, 0x06, 0x2dc1); | |
+ mdio_write(tp, 0x06, 0xd101); | |
+ mdio_write(tp, 0x06, 0xbf3b); | |
+ mdio_write(tp, 0x06, 0xbd02); | |
+ mdio_write(tp, 0x06, 0x2dc1); | |
+ mdio_write(tp, 0x06, 0xd101); | |
+ mdio_write(tp, 0x06, 0xbf3b); | |
+ mdio_write(tp, 0x06, 0xc002); | |
+ mdio_write(tp, 0x06, 0x2dc1); | |
+ mdio_write(tp, 0x06, 0xef96); | |
+ mdio_write(tp, 0x06, 0xfefd); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xd100); | |
+ mdio_write(tp, 0x06, 0xbf3b); | |
+ mdio_write(tp, 0x06, 0xc302); | |
+ mdio_write(tp, 0x06, 0x2dc1); | |
+ mdio_write(tp, 0x06, 0xd011); | |
+ mdio_write(tp, 0x06, 0x022b); | |
+ mdio_write(tp, 0x06, 0xfb59); | |
+ mdio_write(tp, 0x06, 0x03ef); | |
+ mdio_write(tp, 0x06, 0x01d1); | |
+ mdio_write(tp, 0x06, 0x00a0); | |
+ mdio_write(tp, 0x06, 0x0002); | |
+ mdio_write(tp, 0x06, 0xd101); | |
+ mdio_write(tp, 0x06, 0xbf3b); | |
+ mdio_write(tp, 0x06, 0xc602); | |
+ mdio_write(tp, 0x06, 0x2dc1); | |
+ mdio_write(tp, 0x06, 0xd111); | |
+ mdio_write(tp, 0x06, 0xad20); | |
+ mdio_write(tp, 0x06, 0x020c); | |
+ mdio_write(tp, 0x06, 0x11ad); | |
+ mdio_write(tp, 0x06, 0x2102); | |
+ mdio_write(tp, 0x06, 0x0c12); | |
+ mdio_write(tp, 0x06, 0xbf82); | |
+ mdio_write(tp, 0x06, 0xca02); | |
+ mdio_write(tp, 0x06, 0x2dc1); | |
+ mdio_write(tp, 0x06, 0xaec8); | |
+ mdio_write(tp, 0x06, 0x70e4); | |
+ mdio_write(tp, 0x06, 0x2602); | |
+ mdio_write(tp, 0x06, 0x82d1); | |
+ mdio_write(tp, 0x06, 0x05f8); | |
+ mdio_write(tp, 0x06, 0xfaef); | |
+ mdio_write(tp, 0x06, 0x69e0); | |
+ mdio_write(tp, 0x06, 0xe2fe); | |
+ mdio_write(tp, 0x06, 0xe1e2); | |
+ mdio_write(tp, 0x06, 0xffad); | |
+ mdio_write(tp, 0x06, 0x2d1a); | |
+ mdio_write(tp, 0x06, 0xe0e1); | |
+ mdio_write(tp, 0x06, 0x4ee1); | |
+ mdio_write(tp, 0x06, 0xe14f); | |
+ mdio_write(tp, 0x06, 0xac2d); | |
+ mdio_write(tp, 0x06, 0x22f6); | |
+ mdio_write(tp, 0x06, 0x0302); | |
+ mdio_write(tp, 0x06, 0x033b); | |
+ mdio_write(tp, 0x06, 0xf703); | |
+ mdio_write(tp, 0x06, 0xf706); | |
+ mdio_write(tp, 0x06, 0xbf84); | |
+ mdio_write(tp, 0x06, 0x4402); | |
+ mdio_write(tp, 0x06, 0x2d21); | |
+ mdio_write(tp, 0x06, 0xae11); | |
+ mdio_write(tp, 0x06, 0xe0e1); | |
+ mdio_write(tp, 0x06, 0x4ee1); | |
+ mdio_write(tp, 0x06, 0xe14f); | |
+ mdio_write(tp, 0x06, 0xad2d); | |
+ mdio_write(tp, 0x06, 0x08bf); | |
+ mdio_write(tp, 0x06, 0x844f); | |
+ mdio_write(tp, 0x06, 0x022d); | |
+ mdio_write(tp, 0x06, 0x21f6); | |
+ mdio_write(tp, 0x06, 0x06ef); | |
+ mdio_write(tp, 0x06, 0x96fe); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8fa); | |
+ mdio_write(tp, 0x06, 0xef69); | |
+ mdio_write(tp, 0x06, 0x0283); | |
+ mdio_write(tp, 0x06, 0x4502); | |
+ mdio_write(tp, 0x06, 0x83a2); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0x00e1); | |
+ mdio_write(tp, 0x06, 0xe001); | |
+ mdio_write(tp, 0x06, 0xad27); | |
+ mdio_write(tp, 0x06, 0x1fd1); | |
+ mdio_write(tp, 0x06, 0x01bf); | |
+ mdio_write(tp, 0x06, 0x843b); | |
+ mdio_write(tp, 0x06, 0x022d); | |
+ mdio_write(tp, 0x06, 0xc1e0); | |
+ mdio_write(tp, 0x06, 0xe020); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0x21ad); | |
+ mdio_write(tp, 0x06, 0x200e); | |
+ mdio_write(tp, 0x06, 0xd100); | |
+ mdio_write(tp, 0x06, 0xbf84); | |
+ mdio_write(tp, 0x06, 0x3b02); | |
+ mdio_write(tp, 0x06, 0x2dc1); | |
+ mdio_write(tp, 0x06, 0xbf3b); | |
+ mdio_write(tp, 0x06, 0x9602); | |
+ mdio_write(tp, 0x06, 0x2d21); | |
+ mdio_write(tp, 0x06, 0xef96); | |
+ mdio_write(tp, 0x06, 0xfefc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xf9fa); | |
+ mdio_write(tp, 0x06, 0xef69); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x87ad); | |
+ mdio_write(tp, 0x06, 0x204c); | |
+ mdio_write(tp, 0x06, 0xd200); | |
+ mdio_write(tp, 0x06, 0xe0e2); | |
+ mdio_write(tp, 0x06, 0x0058); | |
+ mdio_write(tp, 0x06, 0x010c); | |
+ mdio_write(tp, 0x06, 0x021e); | |
+ mdio_write(tp, 0x06, 0x20e0); | |
+ mdio_write(tp, 0x06, 0xe000); | |
+ mdio_write(tp, 0x06, 0x5810); | |
+ mdio_write(tp, 0x06, 0x1e20); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0x3658); | |
+ mdio_write(tp, 0x06, 0x031e); | |
+ mdio_write(tp, 0x06, 0x20e0); | |
+ mdio_write(tp, 0x06, 0xe022); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0x2358); | |
+ mdio_write(tp, 0x06, 0xe01e); | |
+ mdio_write(tp, 0x06, 0x20e0); | |
+ mdio_write(tp, 0x06, 0x8b64); | |
+ mdio_write(tp, 0x06, 0x1f02); | |
+ mdio_write(tp, 0x06, 0x9e22); | |
+ mdio_write(tp, 0x06, 0xe68b); | |
+ mdio_write(tp, 0x06, 0x64ad); | |
+ mdio_write(tp, 0x06, 0x3214); | |
+ mdio_write(tp, 0x06, 0xad34); | |
+ mdio_write(tp, 0x06, 0x11ef); | |
+ mdio_write(tp, 0x06, 0x0258); | |
+ mdio_write(tp, 0x06, 0x039e); | |
+ mdio_write(tp, 0x06, 0x07ad); | |
+ mdio_write(tp, 0x06, 0x3508); | |
+ mdio_write(tp, 0x06, 0x5ac0); | |
+ mdio_write(tp, 0x06, 0x9f04); | |
+ mdio_write(tp, 0x06, 0xd101); | |
+ mdio_write(tp, 0x06, 0xae02); | |
+ mdio_write(tp, 0x06, 0xd100); | |
+ mdio_write(tp, 0x06, 0xbf84); | |
+ mdio_write(tp, 0x06, 0x3e02); | |
+ mdio_write(tp, 0x06, 0x2dc1); | |
+ mdio_write(tp, 0x06, 0xef96); | |
+ mdio_write(tp, 0x06, 0xfefd); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8f9); | |
+ mdio_write(tp, 0x06, 0xfbe0); | |
+ mdio_write(tp, 0x06, 0x8b85); | |
+ mdio_write(tp, 0x06, 0xad25); | |
+ mdio_write(tp, 0x06, 0x22e0); | |
+ mdio_write(tp, 0x06, 0xe022); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0x23e2); | |
+ mdio_write(tp, 0x06, 0xe036); | |
+ mdio_write(tp, 0x06, 0xe3e0); | |
+ mdio_write(tp, 0x06, 0x375a); | |
+ mdio_write(tp, 0x06, 0xc40d); | |
+ mdio_write(tp, 0x06, 0x0158); | |
+ mdio_write(tp, 0x06, 0x021e); | |
+ mdio_write(tp, 0x06, 0x20e3); | |
+ mdio_write(tp, 0x06, 0x8ae7); | |
+ mdio_write(tp, 0x06, 0xac31); | |
+ mdio_write(tp, 0x06, 0x60ac); | |
+ mdio_write(tp, 0x06, 0x3a08); | |
+ mdio_write(tp, 0x06, 0xac3e); | |
+ mdio_write(tp, 0x06, 0x26ae); | |
+ mdio_write(tp, 0x06, 0x67af); | |
+ mdio_write(tp, 0x06, 0x8437); | |
+ mdio_write(tp, 0x06, 0xad37); | |
+ mdio_write(tp, 0x06, 0x61e0); | |
+ mdio_write(tp, 0x06, 0x8ae8); | |
+ mdio_write(tp, 0x06, 0x10e4); | |
+ mdio_write(tp, 0x06, 0x8ae8); | |
+ mdio_write(tp, 0x06, 0xe18a); | |
+ mdio_write(tp, 0x06, 0xe91b); | |
+ mdio_write(tp, 0x06, 0x109e); | |
+ mdio_write(tp, 0x06, 0x02ae); | |
+ mdio_write(tp, 0x06, 0x51d1); | |
+ mdio_write(tp, 0x06, 0x00bf); | |
+ mdio_write(tp, 0x06, 0x8441); | |
+ mdio_write(tp, 0x06, 0x022d); | |
+ mdio_write(tp, 0x06, 0xc1ee); | |
+ mdio_write(tp, 0x06, 0x8ae8); | |
+ mdio_write(tp, 0x06, 0x00ae); | |
+ mdio_write(tp, 0x06, 0x43ad); | |
+ mdio_write(tp, 0x06, 0x3627); | |
+ mdio_write(tp, 0x06, 0xe08a); | |
+ mdio_write(tp, 0x06, 0xeee1); | |
+ mdio_write(tp, 0x06, 0x8aef); | |
+ mdio_write(tp, 0x06, 0xef74); | |
+ mdio_write(tp, 0x06, 0xe08a); | |
+ mdio_write(tp, 0x06, 0xeae1); | |
+ mdio_write(tp, 0x06, 0x8aeb); | |
+ mdio_write(tp, 0x06, 0x1b74); | |
+ mdio_write(tp, 0x06, 0x9e2e); | |
+ mdio_write(tp, 0x06, 0x14e4); | |
+ mdio_write(tp, 0x06, 0x8aea); | |
+ mdio_write(tp, 0x06, 0xe58a); | |
+ mdio_write(tp, 0x06, 0xebef); | |
+ mdio_write(tp, 0x06, 0x74e0); | |
+ mdio_write(tp, 0x06, 0x8aee); | |
+ mdio_write(tp, 0x06, 0xe18a); | |
+ mdio_write(tp, 0x06, 0xef1b); | |
+ mdio_write(tp, 0x06, 0x479e); | |
+ mdio_write(tp, 0x06, 0x0fae); | |
+ mdio_write(tp, 0x06, 0x19ee); | |
+ mdio_write(tp, 0x06, 0x8aea); | |
+ mdio_write(tp, 0x06, 0x00ee); | |
+ mdio_write(tp, 0x06, 0x8aeb); | |
+ mdio_write(tp, 0x06, 0x00ae); | |
+ mdio_write(tp, 0x06, 0x0fac); | |
+ mdio_write(tp, 0x06, 0x390c); | |
+ mdio_write(tp, 0x06, 0xd101); | |
+ mdio_write(tp, 0x06, 0xbf84); | |
+ mdio_write(tp, 0x06, 0x4102); | |
+ mdio_write(tp, 0x06, 0x2dc1); | |
+ mdio_write(tp, 0x06, 0xee8a); | |
+ mdio_write(tp, 0x06, 0xe800); | |
+ mdio_write(tp, 0x06, 0xe68a); | |
+ mdio_write(tp, 0x06, 0xe7ff); | |
+ mdio_write(tp, 0x06, 0xfdfc); | |
+ mdio_write(tp, 0x06, 0x0400); | |
+ mdio_write(tp, 0x06, 0xe234); | |
+ mdio_write(tp, 0x06, 0xcce2); | |
+ mdio_write(tp, 0x06, 0x0088); | |
+ mdio_write(tp, 0x06, 0xe200); | |
+ mdio_write(tp, 0x06, 0xa725); | |
+ mdio_write(tp, 0x06, 0xe50a); | |
+ mdio_write(tp, 0x06, 0x1de5); | |
+ mdio_write(tp, 0x06, 0x0a2c); | |
+ mdio_write(tp, 0x06, 0xe50a); | |
+ mdio_write(tp, 0x06, 0x6de5); | |
+ mdio_write(tp, 0x06, 0x0a1d); | |
+ mdio_write(tp, 0x06, 0xe50a); | |
+ mdio_write(tp, 0x06, 0x1ce5); | |
+ mdio_write(tp, 0x06, 0x0a2d); | |
+ mdio_write(tp, 0x06, 0xa755); | |
+ mdio_write(tp, 0x05, 0x8b64); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x05, 0x8b94); | |
+ mdio_write(tp, 0x06, 0x82cd); | |
+ mdio_write(tp, 0x05, 0x8b85); | |
+ mdio_write(tp, 0x06, 0x2000); | |
+ mdio_write(tp, 0x05, 0x8aee); | |
+ mdio_write(tp, 0x06, 0x03b8); | |
+ mdio_write(tp, 0x05, 0x8ae8); | |
+ mdio_write(tp, 0x06, 0x0002); | |
+ gphy_val = mdio_read(tp, 0x01); | |
+ gphy_val |= BIT_0; | |
+ mdio_write(tp, 0x01, gphy_val); | |
+ gphy_val = mdio_read(tp, 0x00); | |
+ gphy_val |= BIT_0; | |
+ mdio_write(tp, 0x00, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ for (i = 0; i < 200; i++) { | |
+ udelay(100); | |
+ gphy_val = mdio_read(tp, 0x00); | |
+ if (gphy_val & BIT_7) | |
+ break; | |
+ } | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x0023); | |
+ gphy_val = mdio_read(tp, 0x17); | |
+ gphy_val &= ~(BIT_0); | |
+ if (tp->RequiredSecLanDonglePatch) | |
+ gphy_val &= ~(BIT_2); | |
+ mdio_write(tp, 0x17, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x0028); | |
+ mdio_write(tp, 0x15, 0x0010); | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x0041); | |
+ mdio_write(tp, 0x15, 0x0802); | |
+ mdio_write(tp, 0x16, 0x2185); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+} | |
+ | |
+static void | |
+rtl8168_set_phy_mcu_8168e_2(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ unsigned int gphy_val,i; | |
+ | |
+ if (rtl8168_efuse_read(tp, 0x22) == 0x0c) { | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x00, 0x1800); | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x0023); | |
+ mdio_write(tp, 0x17, 0x0117); | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1E, 0x002C); | |
+ mdio_write(tp, 0x1B, 0x5000); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x16, 0x4104); | |
+ for (i = 0; i < 200; i++) { | |
+ udelay(100); | |
+ gphy_val = mdio_read(tp, 0x1E); | |
+ gphy_val &= 0x03FF; | |
+ if (gphy_val==0x000C) | |
+ break; | |
+ } | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ for (i = 0; i < 200; i++) { | |
+ udelay(100); | |
+ gphy_val = mdio_read(tp, 0x07); | |
+ if ((gphy_val & BIT_5) == 0) | |
+ break; | |
+ } | |
+ gphy_val = mdio_read(tp, 0x07); | |
+ if (gphy_val & BIT_5) { | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x00a1); | |
+ mdio_write(tp, 0x17, 0x1000); | |
+ mdio_write(tp, 0x17, 0x0000); | |
+ mdio_write(tp, 0x17, 0x2000); | |
+ mdio_write(tp, 0x1e, 0x002f); | |
+ mdio_write(tp, 0x18, 0x9bfb); | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ mdio_write(tp, 0x07, 0x0000); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ } | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ mdio_write(tp, 0x05, 0xfff6); | |
+ mdio_write(tp, 0x06, 0x0080); | |
+ gphy_val = mdio_read(tp, 0x00); | |
+ gphy_val &= ~(BIT_7); | |
+ mdio_write(tp, 0x00, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0002); | |
+ gphy_val = mdio_read(tp, 0x08); | |
+ gphy_val &= ~(BIT_7); | |
+ mdio_write(tp, 0x08, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x0023); | |
+ mdio_write(tp, 0x16, 0x0306); | |
+ mdio_write(tp, 0x16, 0x0307); | |
+ mdio_write(tp, 0x15, 0x000e); | |
+ mdio_write(tp, 0x19, 0x000a); | |
+ mdio_write(tp, 0x15, 0x0010); | |
+ mdio_write(tp, 0x19, 0x0008); | |
+ mdio_write(tp, 0x15, 0x0018); | |
+ mdio_write(tp, 0x19, 0x4801); | |
+ mdio_write(tp, 0x15, 0x0019); | |
+ mdio_write(tp, 0x19, 0x6801); | |
+ mdio_write(tp, 0x15, 0x001a); | |
+ mdio_write(tp, 0x19, 0x66a1); | |
+ mdio_write(tp, 0x15, 0x001f); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0020); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0021); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0022); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0023); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0024); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0025); | |
+ mdio_write(tp, 0x19, 0x64a1); | |
+ mdio_write(tp, 0x15, 0x0026); | |
+ mdio_write(tp, 0x19, 0x40ea); | |
+ mdio_write(tp, 0x15, 0x0027); | |
+ mdio_write(tp, 0x19, 0x4503); | |
+ mdio_write(tp, 0x15, 0x0028); | |
+ mdio_write(tp, 0x19, 0x9f00); | |
+ mdio_write(tp, 0x15, 0x0029); | |
+ mdio_write(tp, 0x19, 0xa631); | |
+ mdio_write(tp, 0x15, 0x002a); | |
+ mdio_write(tp, 0x19, 0x9717); | |
+ mdio_write(tp, 0x15, 0x002b); | |
+ mdio_write(tp, 0x19, 0x302c); | |
+ mdio_write(tp, 0x15, 0x002c); | |
+ mdio_write(tp, 0x19, 0x4802); | |
+ mdio_write(tp, 0x15, 0x002d); | |
+ mdio_write(tp, 0x19, 0x58da); | |
+ mdio_write(tp, 0x15, 0x002e); | |
+ mdio_write(tp, 0x19, 0x400d); | |
+ mdio_write(tp, 0x15, 0x002f); | |
+ mdio_write(tp, 0x19, 0x4488); | |
+ mdio_write(tp, 0x15, 0x0030); | |
+ mdio_write(tp, 0x19, 0x9e00); | |
+ mdio_write(tp, 0x15, 0x0031); | |
+ mdio_write(tp, 0x19, 0x63c8); | |
+ mdio_write(tp, 0x15, 0x0032); | |
+ mdio_write(tp, 0x19, 0x6481); | |
+ mdio_write(tp, 0x15, 0x0033); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0034); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0035); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0036); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0037); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0038); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0039); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x003a); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x003b); | |
+ mdio_write(tp, 0x19, 0x63e8); | |
+ mdio_write(tp, 0x15, 0x003c); | |
+ mdio_write(tp, 0x19, 0x7d00); | |
+ mdio_write(tp, 0x15, 0x003d); | |
+ mdio_write(tp, 0x19, 0x59d4); | |
+ mdio_write(tp, 0x15, 0x003e); | |
+ mdio_write(tp, 0x19, 0x63f8); | |
+ mdio_write(tp, 0x15, 0x0040); | |
+ mdio_write(tp, 0x19, 0x64a1); | |
+ mdio_write(tp, 0x15, 0x0041); | |
+ mdio_write(tp, 0x19, 0x30de); | |
+ mdio_write(tp, 0x15, 0x0044); | |
+ mdio_write(tp, 0x19, 0x480f); | |
+ mdio_write(tp, 0x15, 0x0045); | |
+ mdio_write(tp, 0x19, 0x6800); | |
+ mdio_write(tp, 0x15, 0x0046); | |
+ mdio_write(tp, 0x19, 0x6680); | |
+ mdio_write(tp, 0x15, 0x0047); | |
+ mdio_write(tp, 0x19, 0x7c10); | |
+ mdio_write(tp, 0x15, 0x0048); | |
+ mdio_write(tp, 0x19, 0x63c8); | |
+ mdio_write(tp, 0x15, 0x0049); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x004a); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x004b); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x004c); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x004d); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x004e); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x004f); | |
+ mdio_write(tp, 0x19, 0x40ea); | |
+ mdio_write(tp, 0x15, 0x0050); | |
+ mdio_write(tp, 0x19, 0x4503); | |
+ mdio_write(tp, 0x15, 0x0051); | |
+ mdio_write(tp, 0x19, 0x58ca); | |
+ mdio_write(tp, 0x15, 0x0052); | |
+ mdio_write(tp, 0x19, 0x63c8); | |
+ mdio_write(tp, 0x15, 0x0053); | |
+ mdio_write(tp, 0x19, 0x63d8); | |
+ mdio_write(tp, 0x15, 0x0054); | |
+ mdio_write(tp, 0x19, 0x66a0); | |
+ mdio_write(tp, 0x15, 0x0055); | |
+ mdio_write(tp, 0x19, 0x9f00); | |
+ mdio_write(tp, 0x15, 0x0056); | |
+ mdio_write(tp, 0x19, 0x3000); | |
+ mdio_write(tp, 0x15, 0x00a1); | |
+ mdio_write(tp, 0x19, 0x3044); | |
+ mdio_write(tp, 0x15, 0x00ab); | |
+ mdio_write(tp, 0x19, 0x5820); | |
+ mdio_write(tp, 0x15, 0x00ac); | |
+ mdio_write(tp, 0x19, 0x5e04); | |
+ mdio_write(tp, 0x15, 0x00ad); | |
+ mdio_write(tp, 0x19, 0xb60c); | |
+ mdio_write(tp, 0x15, 0x00af); | |
+ mdio_write(tp, 0x19, 0x000a); | |
+ mdio_write(tp, 0x15, 0x00b2); | |
+ mdio_write(tp, 0x19, 0x30b9); | |
+ mdio_write(tp, 0x15, 0x00b9); | |
+ mdio_write(tp, 0x19, 0x4408); | |
+ mdio_write(tp, 0x15, 0x00ba); | |
+ mdio_write(tp, 0x19, 0x480b); | |
+ mdio_write(tp, 0x15, 0x00bb); | |
+ mdio_write(tp, 0x19, 0x5e00); | |
+ mdio_write(tp, 0x15, 0x00bc); | |
+ mdio_write(tp, 0x19, 0x405f); | |
+ mdio_write(tp, 0x15, 0x00bd); | |
+ mdio_write(tp, 0x19, 0x4448); | |
+ mdio_write(tp, 0x15, 0x00be); | |
+ mdio_write(tp, 0x19, 0x4020); | |
+ mdio_write(tp, 0x15, 0x00bf); | |
+ mdio_write(tp, 0x19, 0x4468); | |
+ mdio_write(tp, 0x15, 0x00c0); | |
+ mdio_write(tp, 0x19, 0x9c02); | |
+ mdio_write(tp, 0x15, 0x00c1); | |
+ mdio_write(tp, 0x19, 0x58a0); | |
+ mdio_write(tp, 0x15, 0x00c2); | |
+ mdio_write(tp, 0x19, 0xb605); | |
+ mdio_write(tp, 0x15, 0x00c3); | |
+ mdio_write(tp, 0x19, 0xc0d3); | |
+ mdio_write(tp, 0x15, 0x00c4); | |
+ mdio_write(tp, 0x19, 0x00e6); | |
+ mdio_write(tp, 0x15, 0x00c5); | |
+ mdio_write(tp, 0x19, 0xdaec); | |
+ mdio_write(tp, 0x15, 0x00c6); | |
+ mdio_write(tp, 0x19, 0x00fa); | |
+ mdio_write(tp, 0x15, 0x00c7); | |
+ mdio_write(tp, 0x19, 0x9df9); | |
+ mdio_write(tp, 0x15, 0x0112); | |
+ mdio_write(tp, 0x19, 0x6421); | |
+ mdio_write(tp, 0x15, 0x0113); | |
+ mdio_write(tp, 0x19, 0x7c08); | |
+ mdio_write(tp, 0x15, 0x0114); | |
+ mdio_write(tp, 0x19, 0x63f0); | |
+ mdio_write(tp, 0x15, 0x0115); | |
+ mdio_write(tp, 0x19, 0x4003); | |
+ mdio_write(tp, 0x15, 0x0116); | |
+ mdio_write(tp, 0x19, 0x4418); | |
+ mdio_write(tp, 0x15, 0x0117); | |
+ mdio_write(tp, 0x19, 0x9b00); | |
+ mdio_write(tp, 0x15, 0x0118); | |
+ mdio_write(tp, 0x19, 0x6461); | |
+ mdio_write(tp, 0x15, 0x0119); | |
+ mdio_write(tp, 0x19, 0x64e1); | |
+ mdio_write(tp, 0x15, 0x011a); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0150); | |
+ mdio_write(tp, 0x19, 0x7c80); | |
+ mdio_write(tp, 0x15, 0x0151); | |
+ mdio_write(tp, 0x19, 0x6461); | |
+ mdio_write(tp, 0x15, 0x0152); | |
+ mdio_write(tp, 0x19, 0x4003); | |
+ mdio_write(tp, 0x15, 0x0153); | |
+ mdio_write(tp, 0x19, 0x4540); | |
+ mdio_write(tp, 0x15, 0x0154); | |
+ mdio_write(tp, 0x19, 0x9f00); | |
+ mdio_write(tp, 0x15, 0x0155); | |
+ mdio_write(tp, 0x19, 0x9d00); | |
+ mdio_write(tp, 0x15, 0x0156); | |
+ mdio_write(tp, 0x19, 0x7c40); | |
+ mdio_write(tp, 0x15, 0x0157); | |
+ mdio_write(tp, 0x19, 0x6421); | |
+ mdio_write(tp, 0x15, 0x0158); | |
+ mdio_write(tp, 0x19, 0x7c80); | |
+ mdio_write(tp, 0x15, 0x0159); | |
+ mdio_write(tp, 0x19, 0x64a1); | |
+ mdio_write(tp, 0x15, 0x015a); | |
+ mdio_write(tp, 0x19, 0x30fe); | |
+ mdio_write(tp, 0x15, 0x029c); | |
+ mdio_write(tp, 0x19, 0x0070); | |
+ mdio_write(tp, 0x15, 0x02b2); | |
+ mdio_write(tp, 0x19, 0x005a); | |
+ mdio_write(tp, 0x15, 0x02bd); | |
+ mdio_write(tp, 0x19, 0xa522); | |
+ mdio_write(tp, 0x15, 0x02ce); | |
+ mdio_write(tp, 0x19, 0xb63e); | |
+ mdio_write(tp, 0x15, 0x02d9); | |
+ mdio_write(tp, 0x19, 0x32df); | |
+ mdio_write(tp, 0x15, 0x02df); | |
+ mdio_write(tp, 0x19, 0x4500); | |
+ mdio_write(tp, 0x15, 0x02e7); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x02f4); | |
+ mdio_write(tp, 0x19, 0xb618); | |
+ mdio_write(tp, 0x15, 0x02fb); | |
+ mdio_write(tp, 0x19, 0xb900); | |
+ mdio_write(tp, 0x15, 0x02fc); | |
+ mdio_write(tp, 0x19, 0x49b5); | |
+ mdio_write(tp, 0x15, 0x02fd); | |
+ mdio_write(tp, 0x19, 0x6812); | |
+ mdio_write(tp, 0x15, 0x02fe); | |
+ mdio_write(tp, 0x19, 0x66a0); | |
+ mdio_write(tp, 0x15, 0x02ff); | |
+ mdio_write(tp, 0x19, 0x9900); | |
+ mdio_write(tp, 0x15, 0x0300); | |
+ mdio_write(tp, 0x19, 0x64a0); | |
+ mdio_write(tp, 0x15, 0x0301); | |
+ mdio_write(tp, 0x19, 0x3316); | |
+ mdio_write(tp, 0x15, 0x0308); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x030c); | |
+ mdio_write(tp, 0x19, 0x3000); | |
+ mdio_write(tp, 0x15, 0x0312); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0313); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0314); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0315); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0316); | |
+ mdio_write(tp, 0x19, 0x49b5); | |
+ mdio_write(tp, 0x15, 0x0317); | |
+ mdio_write(tp, 0x19, 0x7d00); | |
+ mdio_write(tp, 0x15, 0x0318); | |
+ mdio_write(tp, 0x19, 0x4d00); | |
+ mdio_write(tp, 0x15, 0x0319); | |
+ mdio_write(tp, 0x19, 0x6810); | |
+ mdio_write(tp, 0x15, 0x031a); | |
+ mdio_write(tp, 0x19, 0x6c08); | |
+ mdio_write(tp, 0x15, 0x031b); | |
+ mdio_write(tp, 0x19, 0x4925); | |
+ mdio_write(tp, 0x15, 0x031c); | |
+ mdio_write(tp, 0x19, 0x403b); | |
+ mdio_write(tp, 0x15, 0x031d); | |
+ mdio_write(tp, 0x19, 0xa602); | |
+ mdio_write(tp, 0x15, 0x031e); | |
+ mdio_write(tp, 0x19, 0x402f); | |
+ mdio_write(tp, 0x15, 0x031f); | |
+ mdio_write(tp, 0x19, 0x4484); | |
+ mdio_write(tp, 0x15, 0x0320); | |
+ mdio_write(tp, 0x19, 0x40c8); | |
+ mdio_write(tp, 0x15, 0x0321); | |
+ mdio_write(tp, 0x19, 0x44c4); | |
+ mdio_write(tp, 0x15, 0x0322); | |
+ mdio_write(tp, 0x19, 0x404f); | |
+ mdio_write(tp, 0x15, 0x0323); | |
+ mdio_write(tp, 0x19, 0x44c8); | |
+ mdio_write(tp, 0x15, 0x0324); | |
+ mdio_write(tp, 0x19, 0xd64f); | |
+ mdio_write(tp, 0x15, 0x0325); | |
+ mdio_write(tp, 0x19, 0x00e7); | |
+ mdio_write(tp, 0x15, 0x0326); | |
+ mdio_write(tp, 0x19, 0x7c08); | |
+ mdio_write(tp, 0x15, 0x0327); | |
+ mdio_write(tp, 0x19, 0x8203); | |
+ mdio_write(tp, 0x15, 0x0328); | |
+ mdio_write(tp, 0x19, 0x4d48); | |
+ mdio_write(tp, 0x15, 0x0329); | |
+ mdio_write(tp, 0x19, 0x332b); | |
+ mdio_write(tp, 0x15, 0x032a); | |
+ mdio_write(tp, 0x19, 0x4d40); | |
+ mdio_write(tp, 0x15, 0x032c); | |
+ mdio_write(tp, 0x19, 0x00f8); | |
+ mdio_write(tp, 0x15, 0x032d); | |
+ mdio_write(tp, 0x19, 0x82b2); | |
+ mdio_write(tp, 0x15, 0x032f); | |
+ mdio_write(tp, 0x19, 0x00b0); | |
+ mdio_write(tp, 0x15, 0x0332); | |
+ mdio_write(tp, 0x19, 0x91f2); | |
+ mdio_write(tp, 0x15, 0x033f); | |
+ mdio_write(tp, 0x19, 0xb6cd); | |
+ mdio_write(tp, 0x15, 0x0340); | |
+ mdio_write(tp, 0x19, 0x9e01); | |
+ mdio_write(tp, 0x15, 0x0341); | |
+ mdio_write(tp, 0x19, 0xd11d); | |
+ mdio_write(tp, 0x15, 0x0342); | |
+ mdio_write(tp, 0x19, 0x009d); | |
+ mdio_write(tp, 0x15, 0x0343); | |
+ mdio_write(tp, 0x19, 0xbb1c); | |
+ mdio_write(tp, 0x15, 0x0344); | |
+ mdio_write(tp, 0x19, 0x8102); | |
+ mdio_write(tp, 0x15, 0x0345); | |
+ mdio_write(tp, 0x19, 0x3348); | |
+ mdio_write(tp, 0x15, 0x0346); | |
+ mdio_write(tp, 0x19, 0xa231); | |
+ mdio_write(tp, 0x15, 0x0347); | |
+ mdio_write(tp, 0x19, 0x335b); | |
+ mdio_write(tp, 0x15, 0x0348); | |
+ mdio_write(tp, 0x19, 0x91f7); | |
+ mdio_write(tp, 0x15, 0x0349); | |
+ mdio_write(tp, 0x19, 0xc218); | |
+ mdio_write(tp, 0x15, 0x034a); | |
+ mdio_write(tp, 0x19, 0x00f5); | |
+ mdio_write(tp, 0x15, 0x034b); | |
+ mdio_write(tp, 0x19, 0x335b); | |
+ mdio_write(tp, 0x15, 0x034c); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x034d); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x034e); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x034f); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0350); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x035b); | |
+ mdio_write(tp, 0x19, 0xa23c); | |
+ mdio_write(tp, 0x15, 0x035c); | |
+ mdio_write(tp, 0x19, 0x7c08); | |
+ mdio_write(tp, 0x15, 0x035d); | |
+ mdio_write(tp, 0x19, 0x4c00); | |
+ mdio_write(tp, 0x15, 0x035e); | |
+ mdio_write(tp, 0x19, 0x3397); | |
+ mdio_write(tp, 0x15, 0x0363); | |
+ mdio_write(tp, 0x19, 0xb6a9); | |
+ mdio_write(tp, 0x15, 0x0366); | |
+ mdio_write(tp, 0x19, 0x00f5); | |
+ mdio_write(tp, 0x15, 0x0382); | |
+ mdio_write(tp, 0x19, 0x7c40); | |
+ mdio_write(tp, 0x15, 0x0388); | |
+ mdio_write(tp, 0x19, 0x0084); | |
+ mdio_write(tp, 0x15, 0x0389); | |
+ mdio_write(tp, 0x19, 0xdd17); | |
+ mdio_write(tp, 0x15, 0x038a); | |
+ mdio_write(tp, 0x19, 0x000b); | |
+ mdio_write(tp, 0x15, 0x038b); | |
+ mdio_write(tp, 0x19, 0xa10a); | |
+ mdio_write(tp, 0x15, 0x038c); | |
+ mdio_write(tp, 0x19, 0x337e); | |
+ mdio_write(tp, 0x15, 0x038d); | |
+ mdio_write(tp, 0x19, 0x6c0b); | |
+ mdio_write(tp, 0x15, 0x038e); | |
+ mdio_write(tp, 0x19, 0xa107); | |
+ mdio_write(tp, 0x15, 0x038f); | |
+ mdio_write(tp, 0x19, 0x6c08); | |
+ mdio_write(tp, 0x15, 0x0390); | |
+ mdio_write(tp, 0x19, 0xc017); | |
+ mdio_write(tp, 0x15, 0x0391); | |
+ mdio_write(tp, 0x19, 0x0004); | |
+ mdio_write(tp, 0x15, 0x0392); | |
+ mdio_write(tp, 0x19, 0xd64f); | |
+ mdio_write(tp, 0x15, 0x0393); | |
+ mdio_write(tp, 0x19, 0x00f4); | |
+ mdio_write(tp, 0x15, 0x0397); | |
+ mdio_write(tp, 0x19, 0x4098); | |
+ mdio_write(tp, 0x15, 0x0398); | |
+ mdio_write(tp, 0x19, 0x4408); | |
+ mdio_write(tp, 0x15, 0x0399); | |
+ mdio_write(tp, 0x19, 0x55bf); | |
+ mdio_write(tp, 0x15, 0x039a); | |
+ mdio_write(tp, 0x19, 0x4bb9); | |
+ mdio_write(tp, 0x15, 0x039b); | |
+ mdio_write(tp, 0x19, 0x6810); | |
+ mdio_write(tp, 0x15, 0x039c); | |
+ mdio_write(tp, 0x19, 0x4b29); | |
+ mdio_write(tp, 0x15, 0x039d); | |
+ mdio_write(tp, 0x19, 0x4041); | |
+ mdio_write(tp, 0x15, 0x039e); | |
+ mdio_write(tp, 0x19, 0x442a); | |
+ mdio_write(tp, 0x15, 0x039f); | |
+ mdio_write(tp, 0x19, 0x4029); | |
+ mdio_write(tp, 0x15, 0x03aa); | |
+ mdio_write(tp, 0x19, 0x33b8); | |
+ mdio_write(tp, 0x15, 0x03b6); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03b7); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03b8); | |
+ mdio_write(tp, 0x19, 0x543f); | |
+ mdio_write(tp, 0x15, 0x03b9); | |
+ mdio_write(tp, 0x19, 0x499a); | |
+ mdio_write(tp, 0x15, 0x03ba); | |
+ mdio_write(tp, 0x19, 0x7c40); | |
+ mdio_write(tp, 0x15, 0x03bb); | |
+ mdio_write(tp, 0x19, 0x4c40); | |
+ mdio_write(tp, 0x15, 0x03bc); | |
+ mdio_write(tp, 0x19, 0x490a); | |
+ mdio_write(tp, 0x15, 0x03bd); | |
+ mdio_write(tp, 0x19, 0x405e); | |
+ mdio_write(tp, 0x15, 0x03c2); | |
+ mdio_write(tp, 0x19, 0x9a03); | |
+ mdio_write(tp, 0x15, 0x03c4); | |
+ mdio_write(tp, 0x19, 0x0015); | |
+ mdio_write(tp, 0x15, 0x03c5); | |
+ mdio_write(tp, 0x19, 0x9e03); | |
+ mdio_write(tp, 0x15, 0x03c8); | |
+ mdio_write(tp, 0x19, 0x9cf7); | |
+ mdio_write(tp, 0x15, 0x03c9); | |
+ mdio_write(tp, 0x19, 0x7c12); | |
+ mdio_write(tp, 0x15, 0x03ca); | |
+ mdio_write(tp, 0x19, 0x4c52); | |
+ mdio_write(tp, 0x15, 0x03cb); | |
+ mdio_write(tp, 0x19, 0x4458); | |
+ mdio_write(tp, 0x15, 0x03cd); | |
+ mdio_write(tp, 0x19, 0x4c40); | |
+ mdio_write(tp, 0x15, 0x03ce); | |
+ mdio_write(tp, 0x19, 0x33bf); | |
+ mdio_write(tp, 0x15, 0x03cf); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03d0); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03d1); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03d5); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03d6); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03d7); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03d8); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03d9); | |
+ mdio_write(tp, 0x19, 0x49bb); | |
+ mdio_write(tp, 0x15, 0x03da); | |
+ mdio_write(tp, 0x19, 0x4478); | |
+ mdio_write(tp, 0x15, 0x03db); | |
+ mdio_write(tp, 0x19, 0x492b); | |
+ mdio_write(tp, 0x15, 0x03dc); | |
+ mdio_write(tp, 0x19, 0x7c01); | |
+ mdio_write(tp, 0x15, 0x03dd); | |
+ mdio_write(tp, 0x19, 0x4c00); | |
+ mdio_write(tp, 0x15, 0x03de); | |
+ mdio_write(tp, 0x19, 0xbd1a); | |
+ mdio_write(tp, 0x15, 0x03df); | |
+ mdio_write(tp, 0x19, 0xc428); | |
+ mdio_write(tp, 0x15, 0x03e0); | |
+ mdio_write(tp, 0x19, 0x0008); | |
+ mdio_write(tp, 0x15, 0x03e1); | |
+ mdio_write(tp, 0x19, 0x9cfd); | |
+ mdio_write(tp, 0x15, 0x03e2); | |
+ mdio_write(tp, 0x19, 0x7c12); | |
+ mdio_write(tp, 0x15, 0x03e3); | |
+ mdio_write(tp, 0x19, 0x4c52); | |
+ mdio_write(tp, 0x15, 0x03e4); | |
+ mdio_write(tp, 0x19, 0x4458); | |
+ mdio_write(tp, 0x15, 0x03e5); | |
+ mdio_write(tp, 0x19, 0x7c12); | |
+ mdio_write(tp, 0x15, 0x03e6); | |
+ mdio_write(tp, 0x19, 0x4c40); | |
+ mdio_write(tp, 0x15, 0x03e7); | |
+ mdio_write(tp, 0x19, 0x33de); | |
+ mdio_write(tp, 0x15, 0x03e8); | |
+ mdio_write(tp, 0x19, 0xc218); | |
+ mdio_write(tp, 0x15, 0x03e9); | |
+ mdio_write(tp, 0x19, 0x0002); | |
+ mdio_write(tp, 0x15, 0x03ea); | |
+ mdio_write(tp, 0x19, 0x32df); | |
+ mdio_write(tp, 0x15, 0x03eb); | |
+ mdio_write(tp, 0x19, 0x3316); | |
+ mdio_write(tp, 0x15, 0x03ec); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03ed); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03ee); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03ef); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03f7); | |
+ mdio_write(tp, 0x19, 0x330c); | |
+ mdio_write(tp, 0x16, 0x0306); | |
+ mdio_write(tp, 0x16, 0x0300); | |
+ | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ mdio_write(tp, 0x05, 0xfff6); | |
+ mdio_write(tp, 0x06, 0x0080); | |
+ mdio_write(tp, 0x05, 0x8000); | |
+ mdio_write(tp, 0x06, 0x0280); | |
+ mdio_write(tp, 0x06, 0x48f7); | |
+ mdio_write(tp, 0x06, 0x00e0); | |
+ mdio_write(tp, 0x06, 0xfff7); | |
+ mdio_write(tp, 0x06, 0xa080); | |
+ mdio_write(tp, 0x06, 0x02ae); | |
+ mdio_write(tp, 0x06, 0xf602); | |
+ mdio_write(tp, 0x06, 0x0200); | |
+ mdio_write(tp, 0x06, 0x0280); | |
+ mdio_write(tp, 0x06, 0x9002); | |
+ mdio_write(tp, 0x06, 0x0224); | |
+ mdio_write(tp, 0x06, 0x0202); | |
+ mdio_write(tp, 0x06, 0x3402); | |
+ mdio_write(tp, 0x06, 0x027f); | |
+ mdio_write(tp, 0x06, 0x0280); | |
+ mdio_write(tp, 0x06, 0xa602); | |
+ mdio_write(tp, 0x06, 0x80bf); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x88e1); | |
+ mdio_write(tp, 0x06, 0x8b89); | |
+ mdio_write(tp, 0x06, 0x1e01); | |
+ mdio_write(tp, 0x06, 0xe18b); | |
+ mdio_write(tp, 0x06, 0x8a1e); | |
+ mdio_write(tp, 0x06, 0x01e1); | |
+ mdio_write(tp, 0x06, 0x8b8b); | |
+ mdio_write(tp, 0x06, 0x1e01); | |
+ mdio_write(tp, 0x06, 0xe18b); | |
+ mdio_write(tp, 0x06, 0x8c1e); | |
+ mdio_write(tp, 0x06, 0x01e1); | |
+ mdio_write(tp, 0x06, 0x8b8d); | |
+ mdio_write(tp, 0x06, 0x1e01); | |
+ mdio_write(tp, 0x06, 0xe18b); | |
+ mdio_write(tp, 0x06, 0x8e1e); | |
+ mdio_write(tp, 0x06, 0x01a0); | |
+ mdio_write(tp, 0x06, 0x00c7); | |
+ mdio_write(tp, 0x06, 0xaebb); | |
+ mdio_write(tp, 0x06, 0xee8a); | |
+ mdio_write(tp, 0x06, 0xe600); | |
+ mdio_write(tp, 0x06, 0xee8a); | |
+ mdio_write(tp, 0x06, 0xee03); | |
+ mdio_write(tp, 0x06, 0xee8a); | |
+ mdio_write(tp, 0x06, 0xefb8); | |
+ mdio_write(tp, 0x06, 0xee8a); | |
+ mdio_write(tp, 0x06, 0xe902); | |
+ mdio_write(tp, 0x06, 0xee8b); | |
+ mdio_write(tp, 0x06, 0x8285); | |
+ mdio_write(tp, 0x06, 0xee8b); | |
+ mdio_write(tp, 0x06, 0x8520); | |
+ mdio_write(tp, 0x06, 0xee8b); | |
+ mdio_write(tp, 0x06, 0x8701); | |
+ mdio_write(tp, 0x06, 0xd481); | |
+ mdio_write(tp, 0x06, 0x35e4); | |
+ mdio_write(tp, 0x06, 0x8b94); | |
+ mdio_write(tp, 0x06, 0xe58b); | |
+ mdio_write(tp, 0x06, 0x95bf); | |
+ mdio_write(tp, 0x06, 0x8b88); | |
+ mdio_write(tp, 0x06, 0xec00); | |
+ mdio_write(tp, 0x06, 0x19a9); | |
+ mdio_write(tp, 0x06, 0x8b90); | |
+ mdio_write(tp, 0x06, 0xf9ee); | |
+ mdio_write(tp, 0x06, 0xfff6); | |
+ mdio_write(tp, 0x06, 0x00ee); | |
+ mdio_write(tp, 0x06, 0xfff7); | |
+ mdio_write(tp, 0x06, 0xffe0); | |
+ mdio_write(tp, 0x06, 0xe140); | |
+ mdio_write(tp, 0x06, 0xe1e1); | |
+ mdio_write(tp, 0x06, 0x41f7); | |
+ mdio_write(tp, 0x06, 0x2ff6); | |
+ mdio_write(tp, 0x06, 0x28e4); | |
+ mdio_write(tp, 0x06, 0xe140); | |
+ mdio_write(tp, 0x06, 0xe5e1); | |
+ mdio_write(tp, 0x06, 0x4104); | |
+ mdio_write(tp, 0x06, 0xf8e0); | |
+ mdio_write(tp, 0x06, 0x8b89); | |
+ mdio_write(tp, 0x06, 0xad20); | |
+ mdio_write(tp, 0x06, 0x0dee); | |
+ mdio_write(tp, 0x06, 0x8b89); | |
+ mdio_write(tp, 0x06, 0x0002); | |
+ mdio_write(tp, 0x06, 0x82f4); | |
+ mdio_write(tp, 0x06, 0x021f); | |
+ mdio_write(tp, 0x06, 0x4102); | |
+ mdio_write(tp, 0x06, 0x2812); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8e0); | |
+ mdio_write(tp, 0x06, 0x8b8d); | |
+ mdio_write(tp, 0x06, 0xad20); | |
+ mdio_write(tp, 0x06, 0x10ee); | |
+ mdio_write(tp, 0x06, 0x8b8d); | |
+ mdio_write(tp, 0x06, 0x0002); | |
+ mdio_write(tp, 0x06, 0x139d); | |
+ mdio_write(tp, 0x06, 0x0281); | |
+ mdio_write(tp, 0x06, 0xd602); | |
+ mdio_write(tp, 0x06, 0x1f99); | |
+ mdio_write(tp, 0x06, 0x0227); | |
+ mdio_write(tp, 0x06, 0xeafc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x8ead); | |
+ mdio_write(tp, 0x06, 0x2014); | |
+ mdio_write(tp, 0x06, 0xf620); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x8e02); | |
+ mdio_write(tp, 0x06, 0x8104); | |
+ mdio_write(tp, 0x06, 0x021b); | |
+ mdio_write(tp, 0x06, 0xf402); | |
+ mdio_write(tp, 0x06, 0x2c9c); | |
+ mdio_write(tp, 0x06, 0x0281); | |
+ mdio_write(tp, 0x06, 0x7902); | |
+ mdio_write(tp, 0x06, 0x8443); | |
+ mdio_write(tp, 0x06, 0xad22); | |
+ mdio_write(tp, 0x06, 0x11f6); | |
+ mdio_write(tp, 0x06, 0x22e4); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0x022c); | |
+ mdio_write(tp, 0x06, 0x4602); | |
+ mdio_write(tp, 0x06, 0x2ac5); | |
+ mdio_write(tp, 0x06, 0x0229); | |
+ mdio_write(tp, 0x06, 0x2002); | |
+ mdio_write(tp, 0x06, 0x2b91); | |
+ mdio_write(tp, 0x06, 0xad25); | |
+ mdio_write(tp, 0x06, 0x11f6); | |
+ mdio_write(tp, 0x06, 0x25e4); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0x0284); | |
+ mdio_write(tp, 0x06, 0xe202); | |
+ mdio_write(tp, 0x06, 0x043a); | |
+ mdio_write(tp, 0x06, 0x021a); | |
+ mdio_write(tp, 0x06, 0x5902); | |
+ mdio_write(tp, 0x06, 0x2bfc); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8fa); | |
+ mdio_write(tp, 0x06, 0xef69); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0x00e1); | |
+ mdio_write(tp, 0x06, 0xe001); | |
+ mdio_write(tp, 0x06, 0xad27); | |
+ mdio_write(tp, 0x06, 0x1fd1); | |
+ mdio_write(tp, 0x06, 0x01bf); | |
+ mdio_write(tp, 0x06, 0x8638); | |
+ mdio_write(tp, 0x06, 0x022f); | |
+ mdio_write(tp, 0x06, 0x50e0); | |
+ mdio_write(tp, 0x06, 0xe020); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0x21ad); | |
+ mdio_write(tp, 0x06, 0x200e); | |
+ mdio_write(tp, 0x06, 0xd100); | |
+ mdio_write(tp, 0x06, 0xbf86); | |
+ mdio_write(tp, 0x06, 0x3802); | |
+ mdio_write(tp, 0x06, 0x2f50); | |
+ mdio_write(tp, 0x06, 0xbf3d); | |
+ mdio_write(tp, 0x06, 0x3902); | |
+ mdio_write(tp, 0x06, 0x2eb0); | |
+ mdio_write(tp, 0x06, 0xef96); | |
+ mdio_write(tp, 0x06, 0xfefc); | |
+ mdio_write(tp, 0x06, 0x0402); | |
+ mdio_write(tp, 0x06, 0x8591); | |
+ mdio_write(tp, 0x06, 0x0281); | |
+ mdio_write(tp, 0x06, 0x3c05); | |
+ mdio_write(tp, 0x06, 0xf8fa); | |
+ mdio_write(tp, 0x06, 0xef69); | |
+ mdio_write(tp, 0x06, 0xe0e2); | |
+ mdio_write(tp, 0x06, 0xfee1); | |
+ mdio_write(tp, 0x06, 0xe2ff); | |
+ mdio_write(tp, 0x06, 0xad2d); | |
+ mdio_write(tp, 0x06, 0x1ae0); | |
+ mdio_write(tp, 0x06, 0xe14e); | |
+ mdio_write(tp, 0x06, 0xe1e1); | |
+ mdio_write(tp, 0x06, 0x4fac); | |
+ mdio_write(tp, 0x06, 0x2d22); | |
+ mdio_write(tp, 0x06, 0xf603); | |
+ mdio_write(tp, 0x06, 0x0203); | |
+ mdio_write(tp, 0x06, 0x36f7); | |
+ mdio_write(tp, 0x06, 0x03f7); | |
+ mdio_write(tp, 0x06, 0x06bf); | |
+ mdio_write(tp, 0x06, 0x8622); | |
+ mdio_write(tp, 0x06, 0x022e); | |
+ mdio_write(tp, 0x06, 0xb0ae); | |
+ mdio_write(tp, 0x06, 0x11e0); | |
+ mdio_write(tp, 0x06, 0xe14e); | |
+ mdio_write(tp, 0x06, 0xe1e1); | |
+ mdio_write(tp, 0x06, 0x4fad); | |
+ mdio_write(tp, 0x06, 0x2d08); | |
+ mdio_write(tp, 0x06, 0xbf86); | |
+ mdio_write(tp, 0x06, 0x2d02); | |
+ mdio_write(tp, 0x06, 0x2eb0); | |
+ mdio_write(tp, 0x06, 0xf606); | |
+ mdio_write(tp, 0x06, 0xef96); | |
+ mdio_write(tp, 0x06, 0xfefc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xf9fa); | |
+ mdio_write(tp, 0x06, 0xef69); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x87ad); | |
+ mdio_write(tp, 0x06, 0x204c); | |
+ mdio_write(tp, 0x06, 0xd200); | |
+ mdio_write(tp, 0x06, 0xe0e2); | |
+ mdio_write(tp, 0x06, 0x0058); | |
+ mdio_write(tp, 0x06, 0x010c); | |
+ mdio_write(tp, 0x06, 0x021e); | |
+ mdio_write(tp, 0x06, 0x20e0); | |
+ mdio_write(tp, 0x06, 0xe000); | |
+ mdio_write(tp, 0x06, 0x5810); | |
+ mdio_write(tp, 0x06, 0x1e20); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0x3658); | |
+ mdio_write(tp, 0x06, 0x031e); | |
+ mdio_write(tp, 0x06, 0x20e0); | |
+ mdio_write(tp, 0x06, 0xe022); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0x2358); | |
+ mdio_write(tp, 0x06, 0xe01e); | |
+ mdio_write(tp, 0x06, 0x20e0); | |
+ mdio_write(tp, 0x06, 0x8ae6); | |
+ mdio_write(tp, 0x06, 0x1f02); | |
+ mdio_write(tp, 0x06, 0x9e22); | |
+ mdio_write(tp, 0x06, 0xe68a); | |
+ mdio_write(tp, 0x06, 0xe6ad); | |
+ mdio_write(tp, 0x06, 0x3214); | |
+ mdio_write(tp, 0x06, 0xad34); | |
+ mdio_write(tp, 0x06, 0x11ef); | |
+ mdio_write(tp, 0x06, 0x0258); | |
+ mdio_write(tp, 0x06, 0x039e); | |
+ mdio_write(tp, 0x06, 0x07ad); | |
+ mdio_write(tp, 0x06, 0x3508); | |
+ mdio_write(tp, 0x06, 0x5ac0); | |
+ mdio_write(tp, 0x06, 0x9f04); | |
+ mdio_write(tp, 0x06, 0xd101); | |
+ mdio_write(tp, 0x06, 0xae02); | |
+ mdio_write(tp, 0x06, 0xd100); | |
+ mdio_write(tp, 0x06, 0xbf86); | |
+ mdio_write(tp, 0x06, 0x3e02); | |
+ mdio_write(tp, 0x06, 0x2f50); | |
+ mdio_write(tp, 0x06, 0xef96); | |
+ mdio_write(tp, 0x06, 0xfefd); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8f9); | |
+ mdio_write(tp, 0x06, 0xfae0); | |
+ mdio_write(tp, 0x06, 0x8b81); | |
+ mdio_write(tp, 0x06, 0xac26); | |
+ mdio_write(tp, 0x06, 0x0ee0); | |
+ mdio_write(tp, 0x06, 0x8b81); | |
+ mdio_write(tp, 0x06, 0xac21); | |
+ mdio_write(tp, 0x06, 0x08e0); | |
+ mdio_write(tp, 0x06, 0x8b87); | |
+ mdio_write(tp, 0x06, 0xac24); | |
+ mdio_write(tp, 0x06, 0x02ae); | |
+ mdio_write(tp, 0x06, 0x6bee); | |
+ mdio_write(tp, 0x06, 0xe0ea); | |
+ mdio_write(tp, 0x06, 0x00ee); | |
+ mdio_write(tp, 0x06, 0xe0eb); | |
+ mdio_write(tp, 0x06, 0x00e2); | |
+ mdio_write(tp, 0x06, 0xe07c); | |
+ mdio_write(tp, 0x06, 0xe3e0); | |
+ mdio_write(tp, 0x06, 0x7da5); | |
+ mdio_write(tp, 0x06, 0x1111); | |
+ mdio_write(tp, 0x06, 0x15d2); | |
+ mdio_write(tp, 0x06, 0x60d6); | |
+ mdio_write(tp, 0x06, 0x6666); | |
+ mdio_write(tp, 0x06, 0x0207); | |
+ mdio_write(tp, 0x06, 0xf9d2); | |
+ mdio_write(tp, 0x06, 0xa0d6); | |
+ mdio_write(tp, 0x06, 0xaaaa); | |
+ mdio_write(tp, 0x06, 0x0207); | |
+ mdio_write(tp, 0x06, 0xf902); | |
+ mdio_write(tp, 0x06, 0x825c); | |
+ mdio_write(tp, 0x06, 0xae44); | |
+ mdio_write(tp, 0x06, 0xa566); | |
+ mdio_write(tp, 0x06, 0x6602); | |
+ mdio_write(tp, 0x06, 0xae38); | |
+ mdio_write(tp, 0x06, 0xa5aa); | |
+ mdio_write(tp, 0x06, 0xaa02); | |
+ mdio_write(tp, 0x06, 0xae32); | |
+ mdio_write(tp, 0x06, 0xeee0); | |
+ mdio_write(tp, 0x06, 0xea04); | |
+ mdio_write(tp, 0x06, 0xeee0); | |
+ mdio_write(tp, 0x06, 0xeb06); | |
+ mdio_write(tp, 0x06, 0xe2e0); | |
+ mdio_write(tp, 0x06, 0x7ce3); | |
+ mdio_write(tp, 0x06, 0xe07d); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0x38e1); | |
+ mdio_write(tp, 0x06, 0xe039); | |
+ mdio_write(tp, 0x06, 0xad2e); | |
+ mdio_write(tp, 0x06, 0x21ad); | |
+ mdio_write(tp, 0x06, 0x3f13); | |
+ mdio_write(tp, 0x06, 0xe0e4); | |
+ mdio_write(tp, 0x06, 0x14e1); | |
+ mdio_write(tp, 0x06, 0xe415); | |
+ mdio_write(tp, 0x06, 0x6880); | |
+ mdio_write(tp, 0x06, 0xe4e4); | |
+ mdio_write(tp, 0x06, 0x14e5); | |
+ mdio_write(tp, 0x06, 0xe415); | |
+ mdio_write(tp, 0x06, 0x0282); | |
+ mdio_write(tp, 0x06, 0x5cae); | |
+ mdio_write(tp, 0x06, 0x0bac); | |
+ mdio_write(tp, 0x06, 0x3e02); | |
+ mdio_write(tp, 0x06, 0xae06); | |
+ mdio_write(tp, 0x06, 0x0282); | |
+ mdio_write(tp, 0x06, 0x8602); | |
+ mdio_write(tp, 0x06, 0x82b0); | |
+ mdio_write(tp, 0x06, 0xfefd); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8e1); | |
+ mdio_write(tp, 0x06, 0x8b2e); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x81ad); | |
+ mdio_write(tp, 0x06, 0x2605); | |
+ mdio_write(tp, 0x06, 0x0221); | |
+ mdio_write(tp, 0x06, 0xf3f7); | |
+ mdio_write(tp, 0x06, 0x28e0); | |
+ mdio_write(tp, 0x06, 0x8b81); | |
+ mdio_write(tp, 0x06, 0xad21); | |
+ mdio_write(tp, 0x06, 0x0502); | |
+ mdio_write(tp, 0x06, 0x22f8); | |
+ mdio_write(tp, 0x06, 0xf729); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x87ad); | |
+ mdio_write(tp, 0x06, 0x2405); | |
+ mdio_write(tp, 0x06, 0x0282); | |
+ mdio_write(tp, 0x06, 0xebf7); | |
+ mdio_write(tp, 0x06, 0x2ae5); | |
+ mdio_write(tp, 0x06, 0x8b2e); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8e0); | |
+ mdio_write(tp, 0x06, 0x8b81); | |
+ mdio_write(tp, 0x06, 0xad26); | |
+ mdio_write(tp, 0x06, 0x0302); | |
+ mdio_write(tp, 0x06, 0x2134); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x81ad); | |
+ mdio_write(tp, 0x06, 0x2109); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x2eac); | |
+ mdio_write(tp, 0x06, 0x2003); | |
+ mdio_write(tp, 0x06, 0x0283); | |
+ mdio_write(tp, 0x06, 0x52e0); | |
+ mdio_write(tp, 0x06, 0x8b87); | |
+ mdio_write(tp, 0x06, 0xad24); | |
+ mdio_write(tp, 0x06, 0x09e0); | |
+ mdio_write(tp, 0x06, 0x8b2e); | |
+ mdio_write(tp, 0x06, 0xac21); | |
+ mdio_write(tp, 0x06, 0x0302); | |
+ mdio_write(tp, 0x06, 0x8337); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8e1); | |
+ mdio_write(tp, 0x06, 0x8b2e); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x81ad); | |
+ mdio_write(tp, 0x06, 0x2608); | |
+ mdio_write(tp, 0x06, 0xe085); | |
+ mdio_write(tp, 0x06, 0xd2ad); | |
+ mdio_write(tp, 0x06, 0x2502); | |
+ mdio_write(tp, 0x06, 0xf628); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x81ad); | |
+ mdio_write(tp, 0x06, 0x210a); | |
+ mdio_write(tp, 0x06, 0xe086); | |
+ mdio_write(tp, 0x06, 0x0af6); | |
+ mdio_write(tp, 0x06, 0x27a0); | |
+ mdio_write(tp, 0x06, 0x0502); | |
+ mdio_write(tp, 0x06, 0xf629); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x87ad); | |
+ mdio_write(tp, 0x06, 0x2408); | |
+ mdio_write(tp, 0x06, 0xe08a); | |
+ mdio_write(tp, 0x06, 0xedad); | |
+ mdio_write(tp, 0x06, 0x2002); | |
+ mdio_write(tp, 0x06, 0xf62a); | |
+ mdio_write(tp, 0x06, 0xe58b); | |
+ mdio_write(tp, 0x06, 0x2ea1); | |
+ mdio_write(tp, 0x06, 0x0003); | |
+ mdio_write(tp, 0x06, 0x0221); | |
+ mdio_write(tp, 0x06, 0x11fc); | |
+ mdio_write(tp, 0x06, 0x04ee); | |
+ mdio_write(tp, 0x06, 0x8aed); | |
+ mdio_write(tp, 0x06, 0x00ee); | |
+ mdio_write(tp, 0x06, 0x8aec); | |
+ mdio_write(tp, 0x06, 0x0004); | |
+ mdio_write(tp, 0x06, 0xf8e0); | |
+ mdio_write(tp, 0x06, 0x8b87); | |
+ mdio_write(tp, 0x06, 0xad24); | |
+ mdio_write(tp, 0x06, 0x3ae0); | |
+ mdio_write(tp, 0x06, 0xe0ea); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0xeb58); | |
+ mdio_write(tp, 0x06, 0xf8d1); | |
+ mdio_write(tp, 0x06, 0x01e4); | |
+ mdio_write(tp, 0x06, 0xe0ea); | |
+ mdio_write(tp, 0x06, 0xe5e0); | |
+ mdio_write(tp, 0x06, 0xebe0); | |
+ mdio_write(tp, 0x06, 0xe07c); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0x7d5c); | |
+ mdio_write(tp, 0x06, 0x00ff); | |
+ mdio_write(tp, 0x06, 0x3c00); | |
+ mdio_write(tp, 0x06, 0x1eab); | |
+ mdio_write(tp, 0x06, 0x1ce0); | |
+ mdio_write(tp, 0x06, 0xe04c); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0x4d58); | |
+ mdio_write(tp, 0x06, 0xc1e4); | |
+ mdio_write(tp, 0x06, 0xe04c); | |
+ mdio_write(tp, 0x06, 0xe5e0); | |
+ mdio_write(tp, 0x06, 0x4de0); | |
+ mdio_write(tp, 0x06, 0xe0ee); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0xef69); | |
+ mdio_write(tp, 0x06, 0x3ce4); | |
+ mdio_write(tp, 0x06, 0xe0ee); | |
+ mdio_write(tp, 0x06, 0xe5e0); | |
+ mdio_write(tp, 0x06, 0xeffc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x87ad); | |
+ mdio_write(tp, 0x06, 0x2412); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0xeee1); | |
+ mdio_write(tp, 0x06, 0xe0ef); | |
+ mdio_write(tp, 0x06, 0x59c3); | |
+ mdio_write(tp, 0x06, 0xe4e0); | |
+ mdio_write(tp, 0x06, 0xeee5); | |
+ mdio_write(tp, 0x06, 0xe0ef); | |
+ mdio_write(tp, 0x06, 0xee8a); | |
+ mdio_write(tp, 0x06, 0xed01); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8e0); | |
+ mdio_write(tp, 0x06, 0x8b81); | |
+ mdio_write(tp, 0x06, 0xac25); | |
+ mdio_write(tp, 0x06, 0x0502); | |
+ mdio_write(tp, 0x06, 0x8363); | |
+ mdio_write(tp, 0x06, 0xae03); | |
+ mdio_write(tp, 0x06, 0x0225); | |
+ mdio_write(tp, 0x06, 0x16fc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xf9fa); | |
+ mdio_write(tp, 0x06, 0xef69); | |
+ mdio_write(tp, 0x06, 0xfae0); | |
+ mdio_write(tp, 0x06, 0x860a); | |
+ mdio_write(tp, 0x06, 0xa000); | |
+ mdio_write(tp, 0x06, 0x19e0); | |
+ mdio_write(tp, 0x06, 0x860b); | |
+ mdio_write(tp, 0x06, 0xe18b); | |
+ mdio_write(tp, 0x06, 0x331b); | |
+ mdio_write(tp, 0x06, 0x109e); | |
+ mdio_write(tp, 0x06, 0x04aa); | |
+ mdio_write(tp, 0x06, 0x02ae); | |
+ mdio_write(tp, 0x06, 0x06ee); | |
+ mdio_write(tp, 0x06, 0x860a); | |
+ mdio_write(tp, 0x06, 0x01ae); | |
+ mdio_write(tp, 0x06, 0xe602); | |
+ mdio_write(tp, 0x06, 0x241e); | |
+ mdio_write(tp, 0x06, 0xae14); | |
+ mdio_write(tp, 0x06, 0xa001); | |
+ mdio_write(tp, 0x06, 0x1402); | |
+ mdio_write(tp, 0x06, 0x2426); | |
+ mdio_write(tp, 0x06, 0xbf26); | |
+ mdio_write(tp, 0x06, 0x6d02); | |
+ mdio_write(tp, 0x06, 0x2eb0); | |
+ mdio_write(tp, 0x06, 0xee86); | |
+ mdio_write(tp, 0x06, 0x0b00); | |
+ mdio_write(tp, 0x06, 0xee86); | |
+ mdio_write(tp, 0x06, 0x0a02); | |
+ mdio_write(tp, 0x06, 0xaf84); | |
+ mdio_write(tp, 0x06, 0x3ca0); | |
+ mdio_write(tp, 0x06, 0x0252); | |
+ mdio_write(tp, 0x06, 0xee86); | |
+ mdio_write(tp, 0x06, 0x0400); | |
+ mdio_write(tp, 0x06, 0xee86); | |
+ mdio_write(tp, 0x06, 0x0500); | |
+ mdio_write(tp, 0x06, 0xe086); | |
+ mdio_write(tp, 0x06, 0x0be1); | |
+ mdio_write(tp, 0x06, 0x8b32); | |
+ mdio_write(tp, 0x06, 0x1b10); | |
+ mdio_write(tp, 0x06, 0x9e04); | |
+ mdio_write(tp, 0x06, 0xaa02); | |
+ mdio_write(tp, 0x06, 0xaecb); | |
+ mdio_write(tp, 0x06, 0xee86); | |
+ mdio_write(tp, 0x06, 0x0b00); | |
+ mdio_write(tp, 0x06, 0x0224); | |
+ mdio_write(tp, 0x06, 0x3ae2); | |
+ mdio_write(tp, 0x06, 0x8604); | |
+ mdio_write(tp, 0x06, 0xe386); | |
+ mdio_write(tp, 0x06, 0x05ef); | |
+ mdio_write(tp, 0x06, 0x65e2); | |
+ mdio_write(tp, 0x06, 0x8606); | |
+ mdio_write(tp, 0x06, 0xe386); | |
+ mdio_write(tp, 0x06, 0x071b); | |
+ mdio_write(tp, 0x06, 0x56aa); | |
+ mdio_write(tp, 0x06, 0x0eef); | |
+ mdio_write(tp, 0x06, 0x56e6); | |
+ mdio_write(tp, 0x06, 0x8606); | |
+ mdio_write(tp, 0x06, 0xe786); | |
+ mdio_write(tp, 0x06, 0x07e2); | |
+ mdio_write(tp, 0x06, 0x8609); | |
+ mdio_write(tp, 0x06, 0xe686); | |
+ mdio_write(tp, 0x06, 0x08e0); | |
+ mdio_write(tp, 0x06, 0x8609); | |
+ mdio_write(tp, 0x06, 0xa000); | |
+ mdio_write(tp, 0x06, 0x07ee); | |
+ mdio_write(tp, 0x06, 0x860a); | |
+ mdio_write(tp, 0x06, 0x03af); | |
+ mdio_write(tp, 0x06, 0x8369); | |
+ mdio_write(tp, 0x06, 0x0224); | |
+ mdio_write(tp, 0x06, 0x8e02); | |
+ mdio_write(tp, 0x06, 0x2426); | |
+ mdio_write(tp, 0x06, 0xae48); | |
+ mdio_write(tp, 0x06, 0xa003); | |
+ mdio_write(tp, 0x06, 0x21e0); | |
+ mdio_write(tp, 0x06, 0x8608); | |
+ mdio_write(tp, 0x06, 0xe186); | |
+ mdio_write(tp, 0x06, 0x091b); | |
+ mdio_write(tp, 0x06, 0x019e); | |
+ mdio_write(tp, 0x06, 0x0caa); | |
+ mdio_write(tp, 0x06, 0x0502); | |
+ mdio_write(tp, 0x06, 0x249d); | |
+ mdio_write(tp, 0x06, 0xaee7); | |
+ mdio_write(tp, 0x06, 0x0224); | |
+ mdio_write(tp, 0x06, 0x8eae); | |
+ mdio_write(tp, 0x06, 0xe2ee); | |
+ mdio_write(tp, 0x06, 0x860a); | |
+ mdio_write(tp, 0x06, 0x04ee); | |
+ mdio_write(tp, 0x06, 0x860b); | |
+ mdio_write(tp, 0x06, 0x00af); | |
+ mdio_write(tp, 0x06, 0x8369); | |
+ mdio_write(tp, 0x06, 0xa004); | |
+ mdio_write(tp, 0x06, 0x15e0); | |
+ mdio_write(tp, 0x06, 0x860b); | |
+ mdio_write(tp, 0x06, 0xe18b); | |
+ mdio_write(tp, 0x06, 0x341b); | |
+ mdio_write(tp, 0x06, 0x109e); | |
+ mdio_write(tp, 0x06, 0x05aa); | |
+ mdio_write(tp, 0x06, 0x03af); | |
+ mdio_write(tp, 0x06, 0x8383); | |
+ mdio_write(tp, 0x06, 0xee86); | |
+ mdio_write(tp, 0x06, 0x0a05); | |
+ mdio_write(tp, 0x06, 0xae0c); | |
+ mdio_write(tp, 0x06, 0xa005); | |
+ mdio_write(tp, 0x06, 0x02ae); | |
+ mdio_write(tp, 0x06, 0x0702); | |
+ mdio_write(tp, 0x06, 0x2309); | |
+ mdio_write(tp, 0x06, 0xee86); | |
+ mdio_write(tp, 0x06, 0x0a00); | |
+ mdio_write(tp, 0x06, 0xfeef); | |
+ mdio_write(tp, 0x06, 0x96fe); | |
+ mdio_write(tp, 0x06, 0xfdfc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xf9fa); | |
+ mdio_write(tp, 0x06, 0xef69); | |
+ mdio_write(tp, 0x06, 0xfbe0); | |
+ mdio_write(tp, 0x06, 0x8b85); | |
+ mdio_write(tp, 0x06, 0xad25); | |
+ mdio_write(tp, 0x06, 0x22e0); | |
+ mdio_write(tp, 0x06, 0xe022); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0x23e2); | |
+ mdio_write(tp, 0x06, 0xe036); | |
+ mdio_write(tp, 0x06, 0xe3e0); | |
+ mdio_write(tp, 0x06, 0x375a); | |
+ mdio_write(tp, 0x06, 0xc40d); | |
+ mdio_write(tp, 0x06, 0x0158); | |
+ mdio_write(tp, 0x06, 0x021e); | |
+ mdio_write(tp, 0x06, 0x20e3); | |
+ mdio_write(tp, 0x06, 0x8ae7); | |
+ mdio_write(tp, 0x06, 0xac31); | |
+ mdio_write(tp, 0x06, 0x60ac); | |
+ mdio_write(tp, 0x06, 0x3a08); | |
+ mdio_write(tp, 0x06, 0xac3e); | |
+ mdio_write(tp, 0x06, 0x26ae); | |
+ mdio_write(tp, 0x06, 0x67af); | |
+ mdio_write(tp, 0x06, 0x84db); | |
+ mdio_write(tp, 0x06, 0xad37); | |
+ mdio_write(tp, 0x06, 0x61e0); | |
+ mdio_write(tp, 0x06, 0x8ae8); | |
+ mdio_write(tp, 0x06, 0x10e4); | |
+ mdio_write(tp, 0x06, 0x8ae8); | |
+ mdio_write(tp, 0x06, 0xe18a); | |
+ mdio_write(tp, 0x06, 0xe91b); | |
+ mdio_write(tp, 0x06, 0x109e); | |
+ mdio_write(tp, 0x06, 0x02ae); | |
+ mdio_write(tp, 0x06, 0x51d1); | |
+ mdio_write(tp, 0x06, 0x00bf); | |
+ mdio_write(tp, 0x06, 0x863b); | |
+ mdio_write(tp, 0x06, 0x022f); | |
+ mdio_write(tp, 0x06, 0x50ee); | |
+ mdio_write(tp, 0x06, 0x8ae8); | |
+ mdio_write(tp, 0x06, 0x00ae); | |
+ mdio_write(tp, 0x06, 0x43ad); | |
+ mdio_write(tp, 0x06, 0x3627); | |
+ mdio_write(tp, 0x06, 0xe08a); | |
+ mdio_write(tp, 0x06, 0xeee1); | |
+ mdio_write(tp, 0x06, 0x8aef); | |
+ mdio_write(tp, 0x06, 0xef74); | |
+ mdio_write(tp, 0x06, 0xe08a); | |
+ mdio_write(tp, 0x06, 0xeae1); | |
+ mdio_write(tp, 0x06, 0x8aeb); | |
+ mdio_write(tp, 0x06, 0x1b74); | |
+ mdio_write(tp, 0x06, 0x9e2e); | |
+ mdio_write(tp, 0x06, 0x14e4); | |
+ mdio_write(tp, 0x06, 0x8aea); | |
+ mdio_write(tp, 0x06, 0xe58a); | |
+ mdio_write(tp, 0x06, 0xebef); | |
+ mdio_write(tp, 0x06, 0x74e0); | |
+ mdio_write(tp, 0x06, 0x8aee); | |
+ mdio_write(tp, 0x06, 0xe18a); | |
+ mdio_write(tp, 0x06, 0xef1b); | |
+ mdio_write(tp, 0x06, 0x479e); | |
+ mdio_write(tp, 0x06, 0x0fae); | |
+ mdio_write(tp, 0x06, 0x19ee); | |
+ mdio_write(tp, 0x06, 0x8aea); | |
+ mdio_write(tp, 0x06, 0x00ee); | |
+ mdio_write(tp, 0x06, 0x8aeb); | |
+ mdio_write(tp, 0x06, 0x00ae); | |
+ mdio_write(tp, 0x06, 0x0fac); | |
+ mdio_write(tp, 0x06, 0x390c); | |
+ mdio_write(tp, 0x06, 0xd101); | |
+ mdio_write(tp, 0x06, 0xbf86); | |
+ mdio_write(tp, 0x06, 0x3b02); | |
+ mdio_write(tp, 0x06, 0x2f50); | |
+ mdio_write(tp, 0x06, 0xee8a); | |
+ mdio_write(tp, 0x06, 0xe800); | |
+ mdio_write(tp, 0x06, 0xe68a); | |
+ mdio_write(tp, 0x06, 0xe7ff); | |
+ mdio_write(tp, 0x06, 0xef96); | |
+ mdio_write(tp, 0x06, 0xfefd); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8f9); | |
+ mdio_write(tp, 0x06, 0xfaef); | |
+ mdio_write(tp, 0x06, 0x69e0); | |
+ mdio_write(tp, 0x06, 0xe022); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0x2358); | |
+ mdio_write(tp, 0x06, 0xc4e1); | |
+ mdio_write(tp, 0x06, 0x8b6e); | |
+ mdio_write(tp, 0x06, 0x1f10); | |
+ mdio_write(tp, 0x06, 0x9e24); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x6ead); | |
+ mdio_write(tp, 0x06, 0x2218); | |
+ mdio_write(tp, 0x06, 0xac27); | |
+ mdio_write(tp, 0x06, 0x0dac); | |
+ mdio_write(tp, 0x06, 0x2605); | |
+ mdio_write(tp, 0x06, 0x0203); | |
+ mdio_write(tp, 0x06, 0x8fae); | |
+ mdio_write(tp, 0x06, 0x1302); | |
+ mdio_write(tp, 0x06, 0x03c8); | |
+ mdio_write(tp, 0x06, 0xae0e); | |
+ mdio_write(tp, 0x06, 0x0203); | |
+ mdio_write(tp, 0x06, 0xe102); | |
+ mdio_write(tp, 0x06, 0x8520); | |
+ mdio_write(tp, 0x06, 0xae06); | |
+ mdio_write(tp, 0x06, 0x0203); | |
+ mdio_write(tp, 0x06, 0x8f02); | |
+ mdio_write(tp, 0x06, 0x8566); | |
+ mdio_write(tp, 0x06, 0xef96); | |
+ mdio_write(tp, 0x06, 0xfefd); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8fa); | |
+ mdio_write(tp, 0x06, 0xef69); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x82ad); | |
+ mdio_write(tp, 0x06, 0x2737); | |
+ mdio_write(tp, 0x06, 0xbf86); | |
+ mdio_write(tp, 0x06, 0x4402); | |
+ mdio_write(tp, 0x06, 0x2f23); | |
+ mdio_write(tp, 0x06, 0xac28); | |
+ mdio_write(tp, 0x06, 0x2ed1); | |
+ mdio_write(tp, 0x06, 0x01bf); | |
+ mdio_write(tp, 0x06, 0x8647); | |
+ mdio_write(tp, 0x06, 0x022f); | |
+ mdio_write(tp, 0x06, 0x50bf); | |
+ mdio_write(tp, 0x06, 0x8641); | |
+ mdio_write(tp, 0x06, 0x022f); | |
+ mdio_write(tp, 0x06, 0x23e5); | |
+ mdio_write(tp, 0x06, 0x8af0); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0x22e1); | |
+ mdio_write(tp, 0x06, 0xe023); | |
+ mdio_write(tp, 0x06, 0xac2e); | |
+ mdio_write(tp, 0x06, 0x04d1); | |
+ mdio_write(tp, 0x06, 0x01ae); | |
+ mdio_write(tp, 0x06, 0x02d1); | |
+ mdio_write(tp, 0x06, 0x00bf); | |
+ mdio_write(tp, 0x06, 0x8641); | |
+ mdio_write(tp, 0x06, 0x022f); | |
+ mdio_write(tp, 0x06, 0x50d1); | |
+ mdio_write(tp, 0x06, 0x01bf); | |
+ mdio_write(tp, 0x06, 0x8644); | |
+ mdio_write(tp, 0x06, 0x022f); | |
+ mdio_write(tp, 0x06, 0x50ef); | |
+ mdio_write(tp, 0x06, 0x96fe); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8fa); | |
+ mdio_write(tp, 0x06, 0xef69); | |
+ mdio_write(tp, 0x06, 0xbf86); | |
+ mdio_write(tp, 0x06, 0x4702); | |
+ mdio_write(tp, 0x06, 0x2f23); | |
+ mdio_write(tp, 0x06, 0xad28); | |
+ mdio_write(tp, 0x06, 0x19d1); | |
+ mdio_write(tp, 0x06, 0x00bf); | |
+ mdio_write(tp, 0x06, 0x8644); | |
+ mdio_write(tp, 0x06, 0x022f); | |
+ mdio_write(tp, 0x06, 0x50e1); | |
+ mdio_write(tp, 0x06, 0x8af0); | |
+ mdio_write(tp, 0x06, 0xbf86); | |
+ mdio_write(tp, 0x06, 0x4102); | |
+ mdio_write(tp, 0x06, 0x2f50); | |
+ mdio_write(tp, 0x06, 0xd100); | |
+ mdio_write(tp, 0x06, 0xbf86); | |
+ mdio_write(tp, 0x06, 0x4702); | |
+ mdio_write(tp, 0x06, 0x2f50); | |
+ mdio_write(tp, 0x06, 0xef96); | |
+ mdio_write(tp, 0x06, 0xfefc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xe0e2); | |
+ mdio_write(tp, 0x06, 0xfee1); | |
+ mdio_write(tp, 0x06, 0xe2ff); | |
+ mdio_write(tp, 0x06, 0xad2e); | |
+ mdio_write(tp, 0x06, 0x63e0); | |
+ mdio_write(tp, 0x06, 0xe038); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0x39ad); | |
+ mdio_write(tp, 0x06, 0x2f10); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0x34e1); | |
+ mdio_write(tp, 0x06, 0xe035); | |
+ mdio_write(tp, 0x06, 0xf726); | |
+ mdio_write(tp, 0x06, 0xe4e0); | |
+ mdio_write(tp, 0x06, 0x34e5); | |
+ mdio_write(tp, 0x06, 0xe035); | |
+ mdio_write(tp, 0x06, 0xae0e); | |
+ mdio_write(tp, 0x06, 0xe0e2); | |
+ mdio_write(tp, 0x06, 0xd6e1); | |
+ mdio_write(tp, 0x06, 0xe2d7); | |
+ mdio_write(tp, 0x06, 0xf728); | |
+ mdio_write(tp, 0x06, 0xe4e2); | |
+ mdio_write(tp, 0x06, 0xd6e5); | |
+ mdio_write(tp, 0x06, 0xe2d7); | |
+ mdio_write(tp, 0x06, 0xe0e2); | |
+ mdio_write(tp, 0x06, 0x34e1); | |
+ mdio_write(tp, 0x06, 0xe235); | |
+ mdio_write(tp, 0x06, 0xf72b); | |
+ mdio_write(tp, 0x06, 0xe4e2); | |
+ mdio_write(tp, 0x06, 0x34e5); | |
+ mdio_write(tp, 0x06, 0xe235); | |
+ mdio_write(tp, 0x06, 0xd07d); | |
+ mdio_write(tp, 0x06, 0xb0fe); | |
+ mdio_write(tp, 0x06, 0xe0e2); | |
+ mdio_write(tp, 0x06, 0x34e1); | |
+ mdio_write(tp, 0x06, 0xe235); | |
+ mdio_write(tp, 0x06, 0xf62b); | |
+ mdio_write(tp, 0x06, 0xe4e2); | |
+ mdio_write(tp, 0x06, 0x34e5); | |
+ mdio_write(tp, 0x06, 0xe235); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0x34e1); | |
+ mdio_write(tp, 0x06, 0xe035); | |
+ mdio_write(tp, 0x06, 0xf626); | |
+ mdio_write(tp, 0x06, 0xe4e0); | |
+ mdio_write(tp, 0x06, 0x34e5); | |
+ mdio_write(tp, 0x06, 0xe035); | |
+ mdio_write(tp, 0x06, 0xe0e2); | |
+ mdio_write(tp, 0x06, 0xd6e1); | |
+ mdio_write(tp, 0x06, 0xe2d7); | |
+ mdio_write(tp, 0x06, 0xf628); | |
+ mdio_write(tp, 0x06, 0xe4e2); | |
+ mdio_write(tp, 0x06, 0xd6e5); | |
+ mdio_write(tp, 0x06, 0xe2d7); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xae20); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0xa725); | |
+ mdio_write(tp, 0x06, 0xe50a); | |
+ mdio_write(tp, 0x06, 0x1de5); | |
+ mdio_write(tp, 0x06, 0x0a2c); | |
+ mdio_write(tp, 0x06, 0xe50a); | |
+ mdio_write(tp, 0x06, 0x6de5); | |
+ mdio_write(tp, 0x06, 0x0a1d); | |
+ mdio_write(tp, 0x06, 0xe50a); | |
+ mdio_write(tp, 0x06, 0x1ce5); | |
+ mdio_write(tp, 0x06, 0x0a2d); | |
+ mdio_write(tp, 0x06, 0xa755); | |
+ mdio_write(tp, 0x06, 0x00e2); | |
+ mdio_write(tp, 0x06, 0x3488); | |
+ mdio_write(tp, 0x06, 0xe200); | |
+ mdio_write(tp, 0x06, 0xcce2); | |
+ mdio_write(tp, 0x06, 0x0055); | |
+ mdio_write(tp, 0x06, 0xe020); | |
+ mdio_write(tp, 0x06, 0x55e2); | |
+ mdio_write(tp, 0x06, 0xd600); | |
+ mdio_write(tp, 0x06, 0xe24a); | |
+ gphy_val = mdio_read(tp, 0x01); | |
+ gphy_val |= BIT_0; | |
+ mdio_write(tp, 0x01, gphy_val); | |
+ gphy_val = mdio_read(tp, 0x00); | |
+ gphy_val |= BIT_0; | |
+ mdio_write(tp, 0x00, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x17, 0x2179); | |
+ mdio_write(tp, 0x1f, 0x0001); | |
+ mdio_write(tp, 0x10, 0xf274); | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x0042); | |
+ mdio_write(tp, 0x15, 0x0f00); | |
+ mdio_write(tp, 0x15, 0x0f00); | |
+ mdio_write(tp, 0x16, 0x7408); | |
+ mdio_write(tp, 0x15, 0x0e00); | |
+ mdio_write(tp, 0x15, 0x0f00); | |
+ mdio_write(tp, 0x15, 0x0f01); | |
+ mdio_write(tp, 0x16, 0x4000); | |
+ mdio_write(tp, 0x15, 0x0e01); | |
+ mdio_write(tp, 0x15, 0x0f01); | |
+ mdio_write(tp, 0x15, 0x0f02); | |
+ mdio_write(tp, 0x16, 0x9400); | |
+ mdio_write(tp, 0x15, 0x0e02); | |
+ mdio_write(tp, 0x15, 0x0f02); | |
+ mdio_write(tp, 0x15, 0x0f03); | |
+ mdio_write(tp, 0x16, 0x7408); | |
+ mdio_write(tp, 0x15, 0x0e03); | |
+ mdio_write(tp, 0x15, 0x0f03); | |
+ mdio_write(tp, 0x15, 0x0f04); | |
+ mdio_write(tp, 0x16, 0x4008); | |
+ mdio_write(tp, 0x15, 0x0e04); | |
+ mdio_write(tp, 0x15, 0x0f04); | |
+ mdio_write(tp, 0x15, 0x0f05); | |
+ mdio_write(tp, 0x16, 0x9400); | |
+ mdio_write(tp, 0x15, 0x0e05); | |
+ mdio_write(tp, 0x15, 0x0f05); | |
+ mdio_write(tp, 0x15, 0x0f06); | |
+ mdio_write(tp, 0x16, 0x0803); | |
+ mdio_write(tp, 0x15, 0x0e06); | |
+ mdio_write(tp, 0x15, 0x0f06); | |
+ mdio_write(tp, 0x15, 0x0d00); | |
+ mdio_write(tp, 0x15, 0x0100); | |
+ mdio_write(tp, 0x1f, 0x0001); | |
+ mdio_write(tp, 0x10, 0xf074); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x17, 0x2149); | |
+ | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ for (i = 0; i < 200; i++) { | |
+ udelay(100); | |
+ gphy_val = mdio_read(tp, 0x00); | |
+ if (gphy_val & BIT_7) | |
+ break; | |
+ } | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x0023); | |
+ gphy_val = mdio_read(tp, 0x17); | |
+ gphy_val &= ~(BIT_0); | |
+ if (tp->RequiredSecLanDonglePatch) | |
+ gphy_val &= ~(BIT_2); | |
+ mdio_write(tp, 0x17, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x0023); | |
+ gphy_val = mdio_read(tp, 0x17); | |
+ gphy_val |= BIT_14; | |
+ mdio_write(tp, 0x17, gphy_val); | |
+ mdio_write(tp, 0x1e, 0x0020); | |
+ gphy_val = mdio_read(tp, 0x1b); | |
+ gphy_val |= BIT_7; | |
+ mdio_write(tp, 0x1b, gphy_val); | |
+ mdio_write(tp, 0x1e, 0x0041); | |
+ mdio_write(tp, 0x15, 0x0e02); | |
+ mdio_write(tp, 0x1e, 0x0028); | |
+ gphy_val = mdio_read(tp, 0x19); | |
+ gphy_val |= BIT_15; | |
+ mdio_write(tp, 0x19, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ } else { | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x00, 0x1800); | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x0023); | |
+ mdio_write(tp, 0x17, 0x0117); | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1E, 0x002C); | |
+ mdio_write(tp, 0x1B, 0x5000); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x16, 0x4104); | |
+ for (i = 0; i < 200; i++) { | |
+ udelay(100); | |
+ gphy_val = mdio_read(tp, 0x1E); | |
+ gphy_val &= 0x03FF; | |
+ if (gphy_val==0x000C) | |
+ break; | |
+ } | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ for (i = 0; i < 200; i++) { | |
+ udelay(100); | |
+ gphy_val = mdio_read(tp, 0x07); | |
+ if ((gphy_val & BIT_5) == 0) | |
+ break; | |
+ } | |
+ gphy_val = mdio_read(tp, 0x07); | |
+ if (gphy_val & BIT_5) { | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x00a1); | |
+ mdio_write(tp, 0x17, 0x1000); | |
+ mdio_write(tp, 0x17, 0x0000); | |
+ mdio_write(tp, 0x17, 0x2000); | |
+ mdio_write(tp, 0x1e, 0x002f); | |
+ mdio_write(tp, 0x18, 0x9bfb); | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ mdio_write(tp, 0x07, 0x0000); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ } | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ mdio_write(tp, 0x05, 0xfff6); | |
+ mdio_write(tp, 0x06, 0x0080); | |
+ gphy_val = mdio_read(tp, 0x00); | |
+ gphy_val &= ~(BIT_7); | |
+ mdio_write(tp, 0x00, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0002); | |
+ gphy_val = mdio_read(tp, 0x08); | |
+ gphy_val &= ~(BIT_7); | |
+ mdio_write(tp, 0x08, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x0023); | |
+ mdio_write(tp, 0x16, 0x0306); | |
+ mdio_write(tp, 0x16, 0x0307); | |
+ mdio_write(tp, 0x15, 0x000e); | |
+ mdio_write(tp, 0x19, 0x000a); | |
+ mdio_write(tp, 0x15, 0x0010); | |
+ mdio_write(tp, 0x19, 0x0008); | |
+ mdio_write(tp, 0x15, 0x0018); | |
+ mdio_write(tp, 0x19, 0x4801); | |
+ mdio_write(tp, 0x15, 0x0019); | |
+ mdio_write(tp, 0x19, 0x6801); | |
+ mdio_write(tp, 0x15, 0x001a); | |
+ mdio_write(tp, 0x19, 0x66a1); | |
+ mdio_write(tp, 0x15, 0x001f); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0020); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0021); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0022); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0023); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0024); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0025); | |
+ mdio_write(tp, 0x19, 0x64a1); | |
+ mdio_write(tp, 0x15, 0x0026); | |
+ mdio_write(tp, 0x19, 0x40ea); | |
+ mdio_write(tp, 0x15, 0x0027); | |
+ mdio_write(tp, 0x19, 0x4503); | |
+ mdio_write(tp, 0x15, 0x0028); | |
+ mdio_write(tp, 0x19, 0x9f00); | |
+ mdio_write(tp, 0x15, 0x0029); | |
+ mdio_write(tp, 0x19, 0xa631); | |
+ mdio_write(tp, 0x15, 0x002a); | |
+ mdio_write(tp, 0x19, 0x9717); | |
+ mdio_write(tp, 0x15, 0x002b); | |
+ mdio_write(tp, 0x19, 0x302c); | |
+ mdio_write(tp, 0x15, 0x002c); | |
+ mdio_write(tp, 0x19, 0x4802); | |
+ mdio_write(tp, 0x15, 0x002d); | |
+ mdio_write(tp, 0x19, 0x58da); | |
+ mdio_write(tp, 0x15, 0x002e); | |
+ mdio_write(tp, 0x19, 0x400d); | |
+ mdio_write(tp, 0x15, 0x002f); | |
+ mdio_write(tp, 0x19, 0x4488); | |
+ mdio_write(tp, 0x15, 0x0030); | |
+ mdio_write(tp, 0x19, 0x9e00); | |
+ mdio_write(tp, 0x15, 0x0031); | |
+ mdio_write(tp, 0x19, 0x63c8); | |
+ mdio_write(tp, 0x15, 0x0032); | |
+ mdio_write(tp, 0x19, 0x6481); | |
+ mdio_write(tp, 0x15, 0x0033); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0034); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0035); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0036); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0037); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0038); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0039); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x003a); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x003b); | |
+ mdio_write(tp, 0x19, 0x63e8); | |
+ mdio_write(tp, 0x15, 0x003c); | |
+ mdio_write(tp, 0x19, 0x7d00); | |
+ mdio_write(tp, 0x15, 0x003d); | |
+ mdio_write(tp, 0x19, 0x59d4); | |
+ mdio_write(tp, 0x15, 0x003e); | |
+ mdio_write(tp, 0x19, 0x63f8); | |
+ mdio_write(tp, 0x15, 0x0040); | |
+ mdio_write(tp, 0x19, 0x64a1); | |
+ mdio_write(tp, 0x15, 0x0041); | |
+ mdio_write(tp, 0x19, 0x30de); | |
+ mdio_write(tp, 0x15, 0x0044); | |
+ mdio_write(tp, 0x19, 0x480f); | |
+ mdio_write(tp, 0x15, 0x0045); | |
+ mdio_write(tp, 0x19, 0x6800); | |
+ mdio_write(tp, 0x15, 0x0046); | |
+ mdio_write(tp, 0x19, 0x6680); | |
+ mdio_write(tp, 0x15, 0x0047); | |
+ mdio_write(tp, 0x19, 0x7c10); | |
+ mdio_write(tp, 0x15, 0x0048); | |
+ mdio_write(tp, 0x19, 0x63c8); | |
+ mdio_write(tp, 0x15, 0x0049); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x004a); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x004b); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x004c); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x004d); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x004e); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x004f); | |
+ mdio_write(tp, 0x19, 0x40ea); | |
+ mdio_write(tp, 0x15, 0x0050); | |
+ mdio_write(tp, 0x19, 0x4503); | |
+ mdio_write(tp, 0x15, 0x0051); | |
+ mdio_write(tp, 0x19, 0x58ca); | |
+ mdio_write(tp, 0x15, 0x0052); | |
+ mdio_write(tp, 0x19, 0x63c8); | |
+ mdio_write(tp, 0x15, 0x0053); | |
+ mdio_write(tp, 0x19, 0x63d8); | |
+ mdio_write(tp, 0x15, 0x0054); | |
+ mdio_write(tp, 0x19, 0x66a0); | |
+ mdio_write(tp, 0x15, 0x0055); | |
+ mdio_write(tp, 0x19, 0x9f00); | |
+ mdio_write(tp, 0x15, 0x0056); | |
+ mdio_write(tp, 0x19, 0x3000); | |
+ mdio_write(tp, 0x15, 0x00a1); | |
+ mdio_write(tp, 0x19, 0x3044); | |
+ mdio_write(tp, 0x15, 0x00ab); | |
+ mdio_write(tp, 0x19, 0x5820); | |
+ mdio_write(tp, 0x15, 0x00ac); | |
+ mdio_write(tp, 0x19, 0x5e04); | |
+ mdio_write(tp, 0x15, 0x00ad); | |
+ mdio_write(tp, 0x19, 0xb60c); | |
+ mdio_write(tp, 0x15, 0x00af); | |
+ mdio_write(tp, 0x19, 0x000a); | |
+ mdio_write(tp, 0x15, 0x00b2); | |
+ mdio_write(tp, 0x19, 0x30b9); | |
+ mdio_write(tp, 0x15, 0x00b9); | |
+ mdio_write(tp, 0x19, 0x4408); | |
+ mdio_write(tp, 0x15, 0x00ba); | |
+ mdio_write(tp, 0x19, 0x480b); | |
+ mdio_write(tp, 0x15, 0x00bb); | |
+ mdio_write(tp, 0x19, 0x5e00); | |
+ mdio_write(tp, 0x15, 0x00bc); | |
+ mdio_write(tp, 0x19, 0x405f); | |
+ mdio_write(tp, 0x15, 0x00bd); | |
+ mdio_write(tp, 0x19, 0x4448); | |
+ mdio_write(tp, 0x15, 0x00be); | |
+ mdio_write(tp, 0x19, 0x4020); | |
+ mdio_write(tp, 0x15, 0x00bf); | |
+ mdio_write(tp, 0x19, 0x4468); | |
+ mdio_write(tp, 0x15, 0x00c0); | |
+ mdio_write(tp, 0x19, 0x9c02); | |
+ mdio_write(tp, 0x15, 0x00c1); | |
+ mdio_write(tp, 0x19, 0x58a0); | |
+ mdio_write(tp, 0x15, 0x00c2); | |
+ mdio_write(tp, 0x19, 0xb605); | |
+ mdio_write(tp, 0x15, 0x00c3); | |
+ mdio_write(tp, 0x19, 0xc0d3); | |
+ mdio_write(tp, 0x15, 0x00c4); | |
+ mdio_write(tp, 0x19, 0x00e6); | |
+ mdio_write(tp, 0x15, 0x00c5); | |
+ mdio_write(tp, 0x19, 0xdaec); | |
+ mdio_write(tp, 0x15, 0x00c6); | |
+ mdio_write(tp, 0x19, 0x00fa); | |
+ mdio_write(tp, 0x15, 0x00c7); | |
+ mdio_write(tp, 0x19, 0x9df9); | |
+ mdio_write(tp, 0x15, 0x0112); | |
+ mdio_write(tp, 0x19, 0x6421); | |
+ mdio_write(tp, 0x15, 0x0113); | |
+ mdio_write(tp, 0x19, 0x7c08); | |
+ mdio_write(tp, 0x15, 0x0114); | |
+ mdio_write(tp, 0x19, 0x63f0); | |
+ mdio_write(tp, 0x15, 0x0115); | |
+ mdio_write(tp, 0x19, 0x4003); | |
+ mdio_write(tp, 0x15, 0x0116); | |
+ mdio_write(tp, 0x19, 0x4418); | |
+ mdio_write(tp, 0x15, 0x0117); | |
+ mdio_write(tp, 0x19, 0x9b00); | |
+ mdio_write(tp, 0x15, 0x0118); | |
+ mdio_write(tp, 0x19, 0x6461); | |
+ mdio_write(tp, 0x15, 0x0119); | |
+ mdio_write(tp, 0x19, 0x64e1); | |
+ mdio_write(tp, 0x15, 0x011a); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0150); | |
+ mdio_write(tp, 0x19, 0x7c80); | |
+ mdio_write(tp, 0x15, 0x0151); | |
+ mdio_write(tp, 0x19, 0x6461); | |
+ mdio_write(tp, 0x15, 0x0152); | |
+ mdio_write(tp, 0x19, 0x4003); | |
+ mdio_write(tp, 0x15, 0x0153); | |
+ mdio_write(tp, 0x19, 0x4540); | |
+ mdio_write(tp, 0x15, 0x0154); | |
+ mdio_write(tp, 0x19, 0x9f00); | |
+ mdio_write(tp, 0x15, 0x0155); | |
+ mdio_write(tp, 0x19, 0x9d00); | |
+ mdio_write(tp, 0x15, 0x0156); | |
+ mdio_write(tp, 0x19, 0x7c40); | |
+ mdio_write(tp, 0x15, 0x0157); | |
+ mdio_write(tp, 0x19, 0x6421); | |
+ mdio_write(tp, 0x15, 0x0158); | |
+ mdio_write(tp, 0x19, 0x7c80); | |
+ mdio_write(tp, 0x15, 0x0159); | |
+ mdio_write(tp, 0x19, 0x64a1); | |
+ mdio_write(tp, 0x15, 0x015a); | |
+ mdio_write(tp, 0x19, 0x30fe); | |
+ mdio_write(tp, 0x15, 0x029c); | |
+ mdio_write(tp, 0x19, 0x0070); | |
+ mdio_write(tp, 0x15, 0x02b2); | |
+ mdio_write(tp, 0x19, 0x005a); | |
+ mdio_write(tp, 0x15, 0x02bd); | |
+ mdio_write(tp, 0x19, 0xa522); | |
+ mdio_write(tp, 0x15, 0x02ce); | |
+ mdio_write(tp, 0x19, 0xb63e); | |
+ mdio_write(tp, 0x15, 0x02d9); | |
+ mdio_write(tp, 0x19, 0x32df); | |
+ mdio_write(tp, 0x15, 0x02df); | |
+ mdio_write(tp, 0x19, 0x4500); | |
+ mdio_write(tp, 0x15, 0x02f4); | |
+ mdio_write(tp, 0x19, 0xb618); | |
+ mdio_write(tp, 0x15, 0x02fb); | |
+ mdio_write(tp, 0x19, 0xb900); | |
+ mdio_write(tp, 0x15, 0x02fc); | |
+ mdio_write(tp, 0x19, 0x49b5); | |
+ mdio_write(tp, 0x15, 0x02fd); | |
+ mdio_write(tp, 0x19, 0x6812); | |
+ mdio_write(tp, 0x15, 0x02fe); | |
+ mdio_write(tp, 0x19, 0x66a0); | |
+ mdio_write(tp, 0x15, 0x02ff); | |
+ mdio_write(tp, 0x19, 0x9900); | |
+ mdio_write(tp, 0x15, 0x0300); | |
+ mdio_write(tp, 0x19, 0x64a0); | |
+ mdio_write(tp, 0x15, 0x0301); | |
+ mdio_write(tp, 0x19, 0x3316); | |
+ mdio_write(tp, 0x15, 0x0308); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x030c); | |
+ mdio_write(tp, 0x19, 0x3000); | |
+ mdio_write(tp, 0x15, 0x0312); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0313); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0314); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0315); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0316); | |
+ mdio_write(tp, 0x19, 0x49b5); | |
+ mdio_write(tp, 0x15, 0x0317); | |
+ mdio_write(tp, 0x19, 0x7d00); | |
+ mdio_write(tp, 0x15, 0x0318); | |
+ mdio_write(tp, 0x19, 0x4d00); | |
+ mdio_write(tp, 0x15, 0x0319); | |
+ mdio_write(tp, 0x19, 0x6810); | |
+ mdio_write(tp, 0x15, 0x031a); | |
+ mdio_write(tp, 0x19, 0x6c08); | |
+ mdio_write(tp, 0x15, 0x031b); | |
+ mdio_write(tp, 0x19, 0x4925); | |
+ mdio_write(tp, 0x15, 0x031c); | |
+ mdio_write(tp, 0x19, 0x403b); | |
+ mdio_write(tp, 0x15, 0x031d); | |
+ mdio_write(tp, 0x19, 0xa602); | |
+ mdio_write(tp, 0x15, 0x031e); | |
+ mdio_write(tp, 0x19, 0x402f); | |
+ mdio_write(tp, 0x15, 0x031f); | |
+ mdio_write(tp, 0x19, 0x4484); | |
+ mdio_write(tp, 0x15, 0x0320); | |
+ mdio_write(tp, 0x19, 0x40c8); | |
+ mdio_write(tp, 0x15, 0x0321); | |
+ mdio_write(tp, 0x19, 0x44c4); | |
+ mdio_write(tp, 0x15, 0x0322); | |
+ mdio_write(tp, 0x19, 0x404f); | |
+ mdio_write(tp, 0x15, 0x0323); | |
+ mdio_write(tp, 0x19, 0x44c8); | |
+ mdio_write(tp, 0x15, 0x0324); | |
+ mdio_write(tp, 0x19, 0xd64f); | |
+ mdio_write(tp, 0x15, 0x0325); | |
+ mdio_write(tp, 0x19, 0x00e7); | |
+ mdio_write(tp, 0x15, 0x0326); | |
+ mdio_write(tp, 0x19, 0x7c08); | |
+ mdio_write(tp, 0x15, 0x0327); | |
+ mdio_write(tp, 0x19, 0x8203); | |
+ mdio_write(tp, 0x15, 0x0328); | |
+ mdio_write(tp, 0x19, 0x4d48); | |
+ mdio_write(tp, 0x15, 0x0329); | |
+ mdio_write(tp, 0x19, 0x332b); | |
+ mdio_write(tp, 0x15, 0x032a); | |
+ mdio_write(tp, 0x19, 0x4d40); | |
+ mdio_write(tp, 0x15, 0x032c); | |
+ mdio_write(tp, 0x19, 0x00f8); | |
+ mdio_write(tp, 0x15, 0x032d); | |
+ mdio_write(tp, 0x19, 0x82b2); | |
+ mdio_write(tp, 0x15, 0x032f); | |
+ mdio_write(tp, 0x19, 0x00b0); | |
+ mdio_write(tp, 0x15, 0x0332); | |
+ mdio_write(tp, 0x19, 0x91f2); | |
+ mdio_write(tp, 0x15, 0x033f); | |
+ mdio_write(tp, 0x19, 0xb6cd); | |
+ mdio_write(tp, 0x15, 0x0340); | |
+ mdio_write(tp, 0x19, 0x9e01); | |
+ mdio_write(tp, 0x15, 0x0341); | |
+ mdio_write(tp, 0x19, 0xd11d); | |
+ mdio_write(tp, 0x15, 0x0342); | |
+ mdio_write(tp, 0x19, 0x009d); | |
+ mdio_write(tp, 0x15, 0x0343); | |
+ mdio_write(tp, 0x19, 0xbb1c); | |
+ mdio_write(tp, 0x15, 0x0344); | |
+ mdio_write(tp, 0x19, 0x8102); | |
+ mdio_write(tp, 0x15, 0x0345); | |
+ mdio_write(tp, 0x19, 0x3348); | |
+ mdio_write(tp, 0x15, 0x0346); | |
+ mdio_write(tp, 0x19, 0xa231); | |
+ mdio_write(tp, 0x15, 0x0347); | |
+ mdio_write(tp, 0x19, 0x335b); | |
+ mdio_write(tp, 0x15, 0x0348); | |
+ mdio_write(tp, 0x19, 0x91f7); | |
+ mdio_write(tp, 0x15, 0x0349); | |
+ mdio_write(tp, 0x19, 0xc218); | |
+ mdio_write(tp, 0x15, 0x034a); | |
+ mdio_write(tp, 0x19, 0x00f5); | |
+ mdio_write(tp, 0x15, 0x034b); | |
+ mdio_write(tp, 0x19, 0x335b); | |
+ mdio_write(tp, 0x15, 0x034c); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x034d); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x034e); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x034f); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0350); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x035b); | |
+ mdio_write(tp, 0x19, 0xa23c); | |
+ mdio_write(tp, 0x15, 0x035c); | |
+ mdio_write(tp, 0x19, 0x7c08); | |
+ mdio_write(tp, 0x15, 0x035d); | |
+ mdio_write(tp, 0x19, 0x4c00); | |
+ mdio_write(tp, 0x15, 0x035e); | |
+ mdio_write(tp, 0x19, 0x3397); | |
+ mdio_write(tp, 0x15, 0x0363); | |
+ mdio_write(tp, 0x19, 0xb6a9); | |
+ mdio_write(tp, 0x15, 0x0366); | |
+ mdio_write(tp, 0x19, 0x00f5); | |
+ mdio_write(tp, 0x15, 0x0382); | |
+ mdio_write(tp, 0x19, 0x7c40); | |
+ mdio_write(tp, 0x15, 0x0388); | |
+ mdio_write(tp, 0x19, 0x0084); | |
+ mdio_write(tp, 0x15, 0x0389); | |
+ mdio_write(tp, 0x19, 0xdd17); | |
+ mdio_write(tp, 0x15, 0x038a); | |
+ mdio_write(tp, 0x19, 0x000b); | |
+ mdio_write(tp, 0x15, 0x038b); | |
+ mdio_write(tp, 0x19, 0xa10a); | |
+ mdio_write(tp, 0x15, 0x038c); | |
+ mdio_write(tp, 0x19, 0x337e); | |
+ mdio_write(tp, 0x15, 0x038d); | |
+ mdio_write(tp, 0x19, 0x6c0b); | |
+ mdio_write(tp, 0x15, 0x038e); | |
+ mdio_write(tp, 0x19, 0xa107); | |
+ mdio_write(tp, 0x15, 0x038f); | |
+ mdio_write(tp, 0x19, 0x6c08); | |
+ mdio_write(tp, 0x15, 0x0390); | |
+ mdio_write(tp, 0x19, 0xc017); | |
+ mdio_write(tp, 0x15, 0x0391); | |
+ mdio_write(tp, 0x19, 0x0004); | |
+ mdio_write(tp, 0x15, 0x0392); | |
+ mdio_write(tp, 0x19, 0xd64f); | |
+ mdio_write(tp, 0x15, 0x0393); | |
+ mdio_write(tp, 0x19, 0x00f4); | |
+ mdio_write(tp, 0x15, 0x0397); | |
+ mdio_write(tp, 0x19, 0x4098); | |
+ mdio_write(tp, 0x15, 0x0398); | |
+ mdio_write(tp, 0x19, 0x4408); | |
+ mdio_write(tp, 0x15, 0x0399); | |
+ mdio_write(tp, 0x19, 0x55bf); | |
+ mdio_write(tp, 0x15, 0x039a); | |
+ mdio_write(tp, 0x19, 0x4bb9); | |
+ mdio_write(tp, 0x15, 0x039b); | |
+ mdio_write(tp, 0x19, 0x6810); | |
+ mdio_write(tp, 0x15, 0x039c); | |
+ mdio_write(tp, 0x19, 0x4b29); | |
+ mdio_write(tp, 0x15, 0x039d); | |
+ mdio_write(tp, 0x19, 0x4041); | |
+ mdio_write(tp, 0x15, 0x039e); | |
+ mdio_write(tp, 0x19, 0x442a); | |
+ mdio_write(tp, 0x15, 0x039f); | |
+ mdio_write(tp, 0x19, 0x4029); | |
+ mdio_write(tp, 0x15, 0x03aa); | |
+ mdio_write(tp, 0x19, 0x33b8); | |
+ mdio_write(tp, 0x15, 0x03b6); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03b7); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03b8); | |
+ mdio_write(tp, 0x19, 0x543f); | |
+ mdio_write(tp, 0x15, 0x03b9); | |
+ mdio_write(tp, 0x19, 0x499a); | |
+ mdio_write(tp, 0x15, 0x03ba); | |
+ mdio_write(tp, 0x19, 0x7c40); | |
+ mdio_write(tp, 0x15, 0x03bb); | |
+ mdio_write(tp, 0x19, 0x4c40); | |
+ mdio_write(tp, 0x15, 0x03bc); | |
+ mdio_write(tp, 0x19, 0x490a); | |
+ mdio_write(tp, 0x15, 0x03bd); | |
+ mdio_write(tp, 0x19, 0x405e); | |
+ mdio_write(tp, 0x15, 0x03c2); | |
+ mdio_write(tp, 0x19, 0x9a03); | |
+ mdio_write(tp, 0x15, 0x03c4); | |
+ mdio_write(tp, 0x19, 0x0015); | |
+ mdio_write(tp, 0x15, 0x03c5); | |
+ mdio_write(tp, 0x19, 0x9e03); | |
+ mdio_write(tp, 0x15, 0x03c8); | |
+ mdio_write(tp, 0x19, 0x9cf7); | |
+ mdio_write(tp, 0x15, 0x03c9); | |
+ mdio_write(tp, 0x19, 0x7c12); | |
+ mdio_write(tp, 0x15, 0x03ca); | |
+ mdio_write(tp, 0x19, 0x4c52); | |
+ mdio_write(tp, 0x15, 0x03cb); | |
+ mdio_write(tp, 0x19, 0x4458); | |
+ mdio_write(tp, 0x15, 0x03cd); | |
+ mdio_write(tp, 0x19, 0x4c40); | |
+ mdio_write(tp, 0x15, 0x03ce); | |
+ mdio_write(tp, 0x19, 0x33bf); | |
+ mdio_write(tp, 0x15, 0x03cf); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03d0); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03d1); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03d5); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03d6); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03d7); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03d8); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03d9); | |
+ mdio_write(tp, 0x19, 0x49bb); | |
+ mdio_write(tp, 0x15, 0x03da); | |
+ mdio_write(tp, 0x19, 0x4478); | |
+ mdio_write(tp, 0x15, 0x03db); | |
+ mdio_write(tp, 0x19, 0x492b); | |
+ mdio_write(tp, 0x15, 0x03dc); | |
+ mdio_write(tp, 0x19, 0x7c01); | |
+ mdio_write(tp, 0x15, 0x03dd); | |
+ mdio_write(tp, 0x19, 0x4c00); | |
+ mdio_write(tp, 0x15, 0x03de); | |
+ mdio_write(tp, 0x19, 0xbd1a); | |
+ mdio_write(tp, 0x15, 0x03df); | |
+ mdio_write(tp, 0x19, 0xc428); | |
+ mdio_write(tp, 0x15, 0x03e0); | |
+ mdio_write(tp, 0x19, 0x0008); | |
+ mdio_write(tp, 0x15, 0x03e1); | |
+ mdio_write(tp, 0x19, 0x9cfd); | |
+ mdio_write(tp, 0x15, 0x03e2); | |
+ mdio_write(tp, 0x19, 0x7c12); | |
+ mdio_write(tp, 0x15, 0x03e3); | |
+ mdio_write(tp, 0x19, 0x4c52); | |
+ mdio_write(tp, 0x15, 0x03e4); | |
+ mdio_write(tp, 0x19, 0x4458); | |
+ mdio_write(tp, 0x15, 0x03e5); | |
+ mdio_write(tp, 0x19, 0x7c12); | |
+ mdio_write(tp, 0x15, 0x03e6); | |
+ mdio_write(tp, 0x19, 0x4c40); | |
+ mdio_write(tp, 0x15, 0x03e7); | |
+ mdio_write(tp, 0x19, 0x33de); | |
+ mdio_write(tp, 0x15, 0x03e8); | |
+ mdio_write(tp, 0x19, 0xc218); | |
+ mdio_write(tp, 0x15, 0x03e9); | |
+ mdio_write(tp, 0x19, 0x0002); | |
+ mdio_write(tp, 0x15, 0x03ea); | |
+ mdio_write(tp, 0x19, 0x32df); | |
+ mdio_write(tp, 0x15, 0x03eb); | |
+ mdio_write(tp, 0x19, 0x3316); | |
+ mdio_write(tp, 0x15, 0x03ec); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03ed); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03ee); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03ef); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03f7); | |
+ mdio_write(tp, 0x19, 0x330c); | |
+ mdio_write(tp, 0x16, 0x0306); | |
+ mdio_write(tp, 0x16, 0x0300); | |
+ | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ mdio_write(tp, 0x05, 0xfff6); | |
+ mdio_write(tp, 0x06, 0x0080); | |
+ mdio_write(tp, 0x05, 0x8000); | |
+ mdio_write(tp, 0x06, 0x0280); | |
+ mdio_write(tp, 0x06, 0x48f7); | |
+ mdio_write(tp, 0x06, 0x00e0); | |
+ mdio_write(tp, 0x06, 0xfff7); | |
+ mdio_write(tp, 0x06, 0xa080); | |
+ mdio_write(tp, 0x06, 0x02ae); | |
+ mdio_write(tp, 0x06, 0xf602); | |
+ mdio_write(tp, 0x06, 0x0200); | |
+ mdio_write(tp, 0x06, 0x0280); | |
+ mdio_write(tp, 0x06, 0x9002); | |
+ mdio_write(tp, 0x06, 0x0224); | |
+ mdio_write(tp, 0x06, 0x0202); | |
+ mdio_write(tp, 0x06, 0x3402); | |
+ mdio_write(tp, 0x06, 0x027f); | |
+ mdio_write(tp, 0x06, 0x0280); | |
+ mdio_write(tp, 0x06, 0xa602); | |
+ mdio_write(tp, 0x06, 0x80bf); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x88e1); | |
+ mdio_write(tp, 0x06, 0x8b89); | |
+ mdio_write(tp, 0x06, 0x1e01); | |
+ mdio_write(tp, 0x06, 0xe18b); | |
+ mdio_write(tp, 0x06, 0x8a1e); | |
+ mdio_write(tp, 0x06, 0x01e1); | |
+ mdio_write(tp, 0x06, 0x8b8b); | |
+ mdio_write(tp, 0x06, 0x1e01); | |
+ mdio_write(tp, 0x06, 0xe18b); | |
+ mdio_write(tp, 0x06, 0x8c1e); | |
+ mdio_write(tp, 0x06, 0x01e1); | |
+ mdio_write(tp, 0x06, 0x8b8d); | |
+ mdio_write(tp, 0x06, 0x1e01); | |
+ mdio_write(tp, 0x06, 0xe18b); | |
+ mdio_write(tp, 0x06, 0x8e1e); | |
+ mdio_write(tp, 0x06, 0x01a0); | |
+ mdio_write(tp, 0x06, 0x00c7); | |
+ mdio_write(tp, 0x06, 0xaebb); | |
+ mdio_write(tp, 0x06, 0xee8a); | |
+ mdio_write(tp, 0x06, 0xe600); | |
+ mdio_write(tp, 0x06, 0xee8a); | |
+ mdio_write(tp, 0x06, 0xee03); | |
+ mdio_write(tp, 0x06, 0xee8a); | |
+ mdio_write(tp, 0x06, 0xefb8); | |
+ mdio_write(tp, 0x06, 0xee8a); | |
+ mdio_write(tp, 0x06, 0xe902); | |
+ mdio_write(tp, 0x06, 0xee8b); | |
+ mdio_write(tp, 0x06, 0x8285); | |
+ mdio_write(tp, 0x06, 0xee8b); | |
+ mdio_write(tp, 0x06, 0x8520); | |
+ mdio_write(tp, 0x06, 0xee8b); | |
+ mdio_write(tp, 0x06, 0x8701); | |
+ mdio_write(tp, 0x06, 0xd481); | |
+ mdio_write(tp, 0x06, 0x35e4); | |
+ mdio_write(tp, 0x06, 0x8b94); | |
+ mdio_write(tp, 0x06, 0xe58b); | |
+ mdio_write(tp, 0x06, 0x95bf); | |
+ mdio_write(tp, 0x06, 0x8b88); | |
+ mdio_write(tp, 0x06, 0xec00); | |
+ mdio_write(tp, 0x06, 0x19a9); | |
+ mdio_write(tp, 0x06, 0x8b90); | |
+ mdio_write(tp, 0x06, 0xf9ee); | |
+ mdio_write(tp, 0x06, 0xfff6); | |
+ mdio_write(tp, 0x06, 0x00ee); | |
+ mdio_write(tp, 0x06, 0xfff7); | |
+ mdio_write(tp, 0x06, 0xffe0); | |
+ mdio_write(tp, 0x06, 0xe140); | |
+ mdio_write(tp, 0x06, 0xe1e1); | |
+ mdio_write(tp, 0x06, 0x41f7); | |
+ mdio_write(tp, 0x06, 0x2ff6); | |
+ mdio_write(tp, 0x06, 0x28e4); | |
+ mdio_write(tp, 0x06, 0xe140); | |
+ mdio_write(tp, 0x06, 0xe5e1); | |
+ mdio_write(tp, 0x06, 0x4104); | |
+ mdio_write(tp, 0x06, 0xf8e0); | |
+ mdio_write(tp, 0x06, 0x8b89); | |
+ mdio_write(tp, 0x06, 0xad20); | |
+ mdio_write(tp, 0x06, 0x0dee); | |
+ mdio_write(tp, 0x06, 0x8b89); | |
+ mdio_write(tp, 0x06, 0x0002); | |
+ mdio_write(tp, 0x06, 0x82f4); | |
+ mdio_write(tp, 0x06, 0x021f); | |
+ mdio_write(tp, 0x06, 0x4102); | |
+ mdio_write(tp, 0x06, 0x2812); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8e0); | |
+ mdio_write(tp, 0x06, 0x8b8d); | |
+ mdio_write(tp, 0x06, 0xad20); | |
+ mdio_write(tp, 0x06, 0x10ee); | |
+ mdio_write(tp, 0x06, 0x8b8d); | |
+ mdio_write(tp, 0x06, 0x0002); | |
+ mdio_write(tp, 0x06, 0x139d); | |
+ mdio_write(tp, 0x06, 0x0281); | |
+ mdio_write(tp, 0x06, 0xd602); | |
+ mdio_write(tp, 0x06, 0x1f99); | |
+ mdio_write(tp, 0x06, 0x0227); | |
+ mdio_write(tp, 0x06, 0xeafc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x8ead); | |
+ mdio_write(tp, 0x06, 0x2014); | |
+ mdio_write(tp, 0x06, 0xf620); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x8e02); | |
+ mdio_write(tp, 0x06, 0x8104); | |
+ mdio_write(tp, 0x06, 0x021b); | |
+ mdio_write(tp, 0x06, 0xf402); | |
+ mdio_write(tp, 0x06, 0x2c9c); | |
+ mdio_write(tp, 0x06, 0x0281); | |
+ mdio_write(tp, 0x06, 0x7902); | |
+ mdio_write(tp, 0x06, 0x8443); | |
+ mdio_write(tp, 0x06, 0xad22); | |
+ mdio_write(tp, 0x06, 0x11f6); | |
+ mdio_write(tp, 0x06, 0x22e4); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0x022c); | |
+ mdio_write(tp, 0x06, 0x4602); | |
+ mdio_write(tp, 0x06, 0x2ac5); | |
+ mdio_write(tp, 0x06, 0x0229); | |
+ mdio_write(tp, 0x06, 0x2002); | |
+ mdio_write(tp, 0x06, 0x2b91); | |
+ mdio_write(tp, 0x06, 0xad25); | |
+ mdio_write(tp, 0x06, 0x11f6); | |
+ mdio_write(tp, 0x06, 0x25e4); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0x0284); | |
+ mdio_write(tp, 0x06, 0xe202); | |
+ mdio_write(tp, 0x06, 0x043a); | |
+ mdio_write(tp, 0x06, 0x021a); | |
+ mdio_write(tp, 0x06, 0x5902); | |
+ mdio_write(tp, 0x06, 0x2bfc); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8fa); | |
+ mdio_write(tp, 0x06, 0xef69); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0x00e1); | |
+ mdio_write(tp, 0x06, 0xe001); | |
+ mdio_write(tp, 0x06, 0xad27); | |
+ mdio_write(tp, 0x06, 0x1fd1); | |
+ mdio_write(tp, 0x06, 0x01bf); | |
+ mdio_write(tp, 0x06, 0x8638); | |
+ mdio_write(tp, 0x06, 0x022f); | |
+ mdio_write(tp, 0x06, 0x50e0); | |
+ mdio_write(tp, 0x06, 0xe020); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0x21ad); | |
+ mdio_write(tp, 0x06, 0x200e); | |
+ mdio_write(tp, 0x06, 0xd100); | |
+ mdio_write(tp, 0x06, 0xbf86); | |
+ mdio_write(tp, 0x06, 0x3802); | |
+ mdio_write(tp, 0x06, 0x2f50); | |
+ mdio_write(tp, 0x06, 0xbf3d); | |
+ mdio_write(tp, 0x06, 0x3902); | |
+ mdio_write(tp, 0x06, 0x2eb0); | |
+ mdio_write(tp, 0x06, 0xef96); | |
+ mdio_write(tp, 0x06, 0xfefc); | |
+ mdio_write(tp, 0x06, 0x0402); | |
+ mdio_write(tp, 0x06, 0x8591); | |
+ mdio_write(tp, 0x06, 0x0281); | |
+ mdio_write(tp, 0x06, 0x3c05); | |
+ mdio_write(tp, 0x06, 0xf8fa); | |
+ mdio_write(tp, 0x06, 0xef69); | |
+ mdio_write(tp, 0x06, 0xe0e2); | |
+ mdio_write(tp, 0x06, 0xfee1); | |
+ mdio_write(tp, 0x06, 0xe2ff); | |
+ mdio_write(tp, 0x06, 0xad2d); | |
+ mdio_write(tp, 0x06, 0x1ae0); | |
+ mdio_write(tp, 0x06, 0xe14e); | |
+ mdio_write(tp, 0x06, 0xe1e1); | |
+ mdio_write(tp, 0x06, 0x4fac); | |
+ mdio_write(tp, 0x06, 0x2d22); | |
+ mdio_write(tp, 0x06, 0xf603); | |
+ mdio_write(tp, 0x06, 0x0203); | |
+ mdio_write(tp, 0x06, 0x36f7); | |
+ mdio_write(tp, 0x06, 0x03f7); | |
+ mdio_write(tp, 0x06, 0x06bf); | |
+ mdio_write(tp, 0x06, 0x8622); | |
+ mdio_write(tp, 0x06, 0x022e); | |
+ mdio_write(tp, 0x06, 0xb0ae); | |
+ mdio_write(tp, 0x06, 0x11e0); | |
+ mdio_write(tp, 0x06, 0xe14e); | |
+ mdio_write(tp, 0x06, 0xe1e1); | |
+ mdio_write(tp, 0x06, 0x4fad); | |
+ mdio_write(tp, 0x06, 0x2d08); | |
+ mdio_write(tp, 0x06, 0xbf86); | |
+ mdio_write(tp, 0x06, 0x2d02); | |
+ mdio_write(tp, 0x06, 0x2eb0); | |
+ mdio_write(tp, 0x06, 0xf606); | |
+ mdio_write(tp, 0x06, 0xef96); | |
+ mdio_write(tp, 0x06, 0xfefc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xf9fa); | |
+ mdio_write(tp, 0x06, 0xef69); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x87ad); | |
+ mdio_write(tp, 0x06, 0x204c); | |
+ mdio_write(tp, 0x06, 0xd200); | |
+ mdio_write(tp, 0x06, 0xe0e2); | |
+ mdio_write(tp, 0x06, 0x0058); | |
+ mdio_write(tp, 0x06, 0x010c); | |
+ mdio_write(tp, 0x06, 0x021e); | |
+ mdio_write(tp, 0x06, 0x20e0); | |
+ mdio_write(tp, 0x06, 0xe000); | |
+ mdio_write(tp, 0x06, 0x5810); | |
+ mdio_write(tp, 0x06, 0x1e20); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0x3658); | |
+ mdio_write(tp, 0x06, 0x031e); | |
+ mdio_write(tp, 0x06, 0x20e0); | |
+ mdio_write(tp, 0x06, 0xe022); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0x2358); | |
+ mdio_write(tp, 0x06, 0xe01e); | |
+ mdio_write(tp, 0x06, 0x20e0); | |
+ mdio_write(tp, 0x06, 0x8ae6); | |
+ mdio_write(tp, 0x06, 0x1f02); | |
+ mdio_write(tp, 0x06, 0x9e22); | |
+ mdio_write(tp, 0x06, 0xe68a); | |
+ mdio_write(tp, 0x06, 0xe6ad); | |
+ mdio_write(tp, 0x06, 0x3214); | |
+ mdio_write(tp, 0x06, 0xad34); | |
+ mdio_write(tp, 0x06, 0x11ef); | |
+ mdio_write(tp, 0x06, 0x0258); | |
+ mdio_write(tp, 0x06, 0x039e); | |
+ mdio_write(tp, 0x06, 0x07ad); | |
+ mdio_write(tp, 0x06, 0x3508); | |
+ mdio_write(tp, 0x06, 0x5ac0); | |
+ mdio_write(tp, 0x06, 0x9f04); | |
+ mdio_write(tp, 0x06, 0xd101); | |
+ mdio_write(tp, 0x06, 0xae02); | |
+ mdio_write(tp, 0x06, 0xd100); | |
+ mdio_write(tp, 0x06, 0xbf86); | |
+ mdio_write(tp, 0x06, 0x3e02); | |
+ mdio_write(tp, 0x06, 0x2f50); | |
+ mdio_write(tp, 0x06, 0xef96); | |
+ mdio_write(tp, 0x06, 0xfefd); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8f9); | |
+ mdio_write(tp, 0x06, 0xfae0); | |
+ mdio_write(tp, 0x06, 0x8b81); | |
+ mdio_write(tp, 0x06, 0xac26); | |
+ mdio_write(tp, 0x06, 0x0ee0); | |
+ mdio_write(tp, 0x06, 0x8b81); | |
+ mdio_write(tp, 0x06, 0xac21); | |
+ mdio_write(tp, 0x06, 0x08e0); | |
+ mdio_write(tp, 0x06, 0x8b87); | |
+ mdio_write(tp, 0x06, 0xac24); | |
+ mdio_write(tp, 0x06, 0x02ae); | |
+ mdio_write(tp, 0x06, 0x6bee); | |
+ mdio_write(tp, 0x06, 0xe0ea); | |
+ mdio_write(tp, 0x06, 0x00ee); | |
+ mdio_write(tp, 0x06, 0xe0eb); | |
+ mdio_write(tp, 0x06, 0x00e2); | |
+ mdio_write(tp, 0x06, 0xe07c); | |
+ mdio_write(tp, 0x06, 0xe3e0); | |
+ mdio_write(tp, 0x06, 0x7da5); | |
+ mdio_write(tp, 0x06, 0x1111); | |
+ mdio_write(tp, 0x06, 0x15d2); | |
+ mdio_write(tp, 0x06, 0x60d6); | |
+ mdio_write(tp, 0x06, 0x6666); | |
+ mdio_write(tp, 0x06, 0x0207); | |
+ mdio_write(tp, 0x06, 0xf9d2); | |
+ mdio_write(tp, 0x06, 0xa0d6); | |
+ mdio_write(tp, 0x06, 0xaaaa); | |
+ mdio_write(tp, 0x06, 0x0207); | |
+ mdio_write(tp, 0x06, 0xf902); | |
+ mdio_write(tp, 0x06, 0x825c); | |
+ mdio_write(tp, 0x06, 0xae44); | |
+ mdio_write(tp, 0x06, 0xa566); | |
+ mdio_write(tp, 0x06, 0x6602); | |
+ mdio_write(tp, 0x06, 0xae38); | |
+ mdio_write(tp, 0x06, 0xa5aa); | |
+ mdio_write(tp, 0x06, 0xaa02); | |
+ mdio_write(tp, 0x06, 0xae32); | |
+ mdio_write(tp, 0x06, 0xeee0); | |
+ mdio_write(tp, 0x06, 0xea04); | |
+ mdio_write(tp, 0x06, 0xeee0); | |
+ mdio_write(tp, 0x06, 0xeb06); | |
+ mdio_write(tp, 0x06, 0xe2e0); | |
+ mdio_write(tp, 0x06, 0x7ce3); | |
+ mdio_write(tp, 0x06, 0xe07d); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0x38e1); | |
+ mdio_write(tp, 0x06, 0xe039); | |
+ mdio_write(tp, 0x06, 0xad2e); | |
+ mdio_write(tp, 0x06, 0x21ad); | |
+ mdio_write(tp, 0x06, 0x3f13); | |
+ mdio_write(tp, 0x06, 0xe0e4); | |
+ mdio_write(tp, 0x06, 0x14e1); | |
+ mdio_write(tp, 0x06, 0xe415); | |
+ mdio_write(tp, 0x06, 0x6880); | |
+ mdio_write(tp, 0x06, 0xe4e4); | |
+ mdio_write(tp, 0x06, 0x14e5); | |
+ mdio_write(tp, 0x06, 0xe415); | |
+ mdio_write(tp, 0x06, 0x0282); | |
+ mdio_write(tp, 0x06, 0x5cae); | |
+ mdio_write(tp, 0x06, 0x0bac); | |
+ mdio_write(tp, 0x06, 0x3e02); | |
+ mdio_write(tp, 0x06, 0xae06); | |
+ mdio_write(tp, 0x06, 0x0282); | |
+ mdio_write(tp, 0x06, 0x8602); | |
+ mdio_write(tp, 0x06, 0x82b0); | |
+ mdio_write(tp, 0x06, 0xfefd); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8e1); | |
+ mdio_write(tp, 0x06, 0x8b2e); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x81ad); | |
+ mdio_write(tp, 0x06, 0x2605); | |
+ mdio_write(tp, 0x06, 0x0221); | |
+ mdio_write(tp, 0x06, 0xf3f7); | |
+ mdio_write(tp, 0x06, 0x28e0); | |
+ mdio_write(tp, 0x06, 0x8b81); | |
+ mdio_write(tp, 0x06, 0xad21); | |
+ mdio_write(tp, 0x06, 0x0502); | |
+ mdio_write(tp, 0x06, 0x22f8); | |
+ mdio_write(tp, 0x06, 0xf729); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x87ad); | |
+ mdio_write(tp, 0x06, 0x2405); | |
+ mdio_write(tp, 0x06, 0x0282); | |
+ mdio_write(tp, 0x06, 0xebf7); | |
+ mdio_write(tp, 0x06, 0x2ae5); | |
+ mdio_write(tp, 0x06, 0x8b2e); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8e0); | |
+ mdio_write(tp, 0x06, 0x8b81); | |
+ mdio_write(tp, 0x06, 0xad26); | |
+ mdio_write(tp, 0x06, 0x0302); | |
+ mdio_write(tp, 0x06, 0x2134); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x81ad); | |
+ mdio_write(tp, 0x06, 0x2109); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x2eac); | |
+ mdio_write(tp, 0x06, 0x2003); | |
+ mdio_write(tp, 0x06, 0x0283); | |
+ mdio_write(tp, 0x06, 0x52e0); | |
+ mdio_write(tp, 0x06, 0x8b87); | |
+ mdio_write(tp, 0x06, 0xad24); | |
+ mdio_write(tp, 0x06, 0x09e0); | |
+ mdio_write(tp, 0x06, 0x8b2e); | |
+ mdio_write(tp, 0x06, 0xac21); | |
+ mdio_write(tp, 0x06, 0x0302); | |
+ mdio_write(tp, 0x06, 0x8337); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8e1); | |
+ mdio_write(tp, 0x06, 0x8b2e); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x81ad); | |
+ mdio_write(tp, 0x06, 0x2608); | |
+ mdio_write(tp, 0x06, 0xe085); | |
+ mdio_write(tp, 0x06, 0xd2ad); | |
+ mdio_write(tp, 0x06, 0x2502); | |
+ mdio_write(tp, 0x06, 0xf628); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x81ad); | |
+ mdio_write(tp, 0x06, 0x210a); | |
+ mdio_write(tp, 0x06, 0xe086); | |
+ mdio_write(tp, 0x06, 0x0af6); | |
+ mdio_write(tp, 0x06, 0x27a0); | |
+ mdio_write(tp, 0x06, 0x0502); | |
+ mdio_write(tp, 0x06, 0xf629); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x87ad); | |
+ mdio_write(tp, 0x06, 0x2408); | |
+ mdio_write(tp, 0x06, 0xe08a); | |
+ mdio_write(tp, 0x06, 0xedad); | |
+ mdio_write(tp, 0x06, 0x2002); | |
+ mdio_write(tp, 0x06, 0xf62a); | |
+ mdio_write(tp, 0x06, 0xe58b); | |
+ mdio_write(tp, 0x06, 0x2ea1); | |
+ mdio_write(tp, 0x06, 0x0003); | |
+ mdio_write(tp, 0x06, 0x0221); | |
+ mdio_write(tp, 0x06, 0x11fc); | |
+ mdio_write(tp, 0x06, 0x04ee); | |
+ mdio_write(tp, 0x06, 0x8aed); | |
+ mdio_write(tp, 0x06, 0x00ee); | |
+ mdio_write(tp, 0x06, 0x8aec); | |
+ mdio_write(tp, 0x06, 0x0004); | |
+ mdio_write(tp, 0x06, 0xf8e0); | |
+ mdio_write(tp, 0x06, 0x8b87); | |
+ mdio_write(tp, 0x06, 0xad24); | |
+ mdio_write(tp, 0x06, 0x3ae0); | |
+ mdio_write(tp, 0x06, 0xe0ea); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0xeb58); | |
+ mdio_write(tp, 0x06, 0xf8d1); | |
+ mdio_write(tp, 0x06, 0x01e4); | |
+ mdio_write(tp, 0x06, 0xe0ea); | |
+ mdio_write(tp, 0x06, 0xe5e0); | |
+ mdio_write(tp, 0x06, 0xebe0); | |
+ mdio_write(tp, 0x06, 0xe07c); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0x7d5c); | |
+ mdio_write(tp, 0x06, 0x00ff); | |
+ mdio_write(tp, 0x06, 0x3c00); | |
+ mdio_write(tp, 0x06, 0x1eab); | |
+ mdio_write(tp, 0x06, 0x1ce0); | |
+ mdio_write(tp, 0x06, 0xe04c); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0x4d58); | |
+ mdio_write(tp, 0x06, 0xc1e4); | |
+ mdio_write(tp, 0x06, 0xe04c); | |
+ mdio_write(tp, 0x06, 0xe5e0); | |
+ mdio_write(tp, 0x06, 0x4de0); | |
+ mdio_write(tp, 0x06, 0xe0ee); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0xef69); | |
+ mdio_write(tp, 0x06, 0x3ce4); | |
+ mdio_write(tp, 0x06, 0xe0ee); | |
+ mdio_write(tp, 0x06, 0xe5e0); | |
+ mdio_write(tp, 0x06, 0xeffc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x87ad); | |
+ mdio_write(tp, 0x06, 0x2412); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0xeee1); | |
+ mdio_write(tp, 0x06, 0xe0ef); | |
+ mdio_write(tp, 0x06, 0x59c3); | |
+ mdio_write(tp, 0x06, 0xe4e0); | |
+ mdio_write(tp, 0x06, 0xeee5); | |
+ mdio_write(tp, 0x06, 0xe0ef); | |
+ mdio_write(tp, 0x06, 0xee8a); | |
+ mdio_write(tp, 0x06, 0xed01); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8e0); | |
+ mdio_write(tp, 0x06, 0x8b81); | |
+ mdio_write(tp, 0x06, 0xac25); | |
+ mdio_write(tp, 0x06, 0x0502); | |
+ mdio_write(tp, 0x06, 0x8363); | |
+ mdio_write(tp, 0x06, 0xae03); | |
+ mdio_write(tp, 0x06, 0x0225); | |
+ mdio_write(tp, 0x06, 0x16fc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xf9fa); | |
+ mdio_write(tp, 0x06, 0xef69); | |
+ mdio_write(tp, 0x06, 0xfae0); | |
+ mdio_write(tp, 0x06, 0x860a); | |
+ mdio_write(tp, 0x06, 0xa000); | |
+ mdio_write(tp, 0x06, 0x19e0); | |
+ mdio_write(tp, 0x06, 0x860b); | |
+ mdio_write(tp, 0x06, 0xe18b); | |
+ mdio_write(tp, 0x06, 0x331b); | |
+ mdio_write(tp, 0x06, 0x109e); | |
+ mdio_write(tp, 0x06, 0x04aa); | |
+ mdio_write(tp, 0x06, 0x02ae); | |
+ mdio_write(tp, 0x06, 0x06ee); | |
+ mdio_write(tp, 0x06, 0x860a); | |
+ mdio_write(tp, 0x06, 0x01ae); | |
+ mdio_write(tp, 0x06, 0xe602); | |
+ mdio_write(tp, 0x06, 0x241e); | |
+ mdio_write(tp, 0x06, 0xae14); | |
+ mdio_write(tp, 0x06, 0xa001); | |
+ mdio_write(tp, 0x06, 0x1402); | |
+ mdio_write(tp, 0x06, 0x2426); | |
+ mdio_write(tp, 0x06, 0xbf26); | |
+ mdio_write(tp, 0x06, 0x6d02); | |
+ mdio_write(tp, 0x06, 0x2eb0); | |
+ mdio_write(tp, 0x06, 0xee86); | |
+ mdio_write(tp, 0x06, 0x0b00); | |
+ mdio_write(tp, 0x06, 0xee86); | |
+ mdio_write(tp, 0x06, 0x0a02); | |
+ mdio_write(tp, 0x06, 0xaf84); | |
+ mdio_write(tp, 0x06, 0x3ca0); | |
+ mdio_write(tp, 0x06, 0x0252); | |
+ mdio_write(tp, 0x06, 0xee86); | |
+ mdio_write(tp, 0x06, 0x0400); | |
+ mdio_write(tp, 0x06, 0xee86); | |
+ mdio_write(tp, 0x06, 0x0500); | |
+ mdio_write(tp, 0x06, 0xe086); | |
+ mdio_write(tp, 0x06, 0x0be1); | |
+ mdio_write(tp, 0x06, 0x8b32); | |
+ mdio_write(tp, 0x06, 0x1b10); | |
+ mdio_write(tp, 0x06, 0x9e04); | |
+ mdio_write(tp, 0x06, 0xaa02); | |
+ mdio_write(tp, 0x06, 0xaecb); | |
+ mdio_write(tp, 0x06, 0xee86); | |
+ mdio_write(tp, 0x06, 0x0b00); | |
+ mdio_write(tp, 0x06, 0x0224); | |
+ mdio_write(tp, 0x06, 0x3ae2); | |
+ mdio_write(tp, 0x06, 0x8604); | |
+ mdio_write(tp, 0x06, 0xe386); | |
+ mdio_write(tp, 0x06, 0x05ef); | |
+ mdio_write(tp, 0x06, 0x65e2); | |
+ mdio_write(tp, 0x06, 0x8606); | |
+ mdio_write(tp, 0x06, 0xe386); | |
+ mdio_write(tp, 0x06, 0x071b); | |
+ mdio_write(tp, 0x06, 0x56aa); | |
+ mdio_write(tp, 0x06, 0x0eef); | |
+ mdio_write(tp, 0x06, 0x56e6); | |
+ mdio_write(tp, 0x06, 0x8606); | |
+ mdio_write(tp, 0x06, 0xe786); | |
+ mdio_write(tp, 0x06, 0x07e2); | |
+ mdio_write(tp, 0x06, 0x8609); | |
+ mdio_write(tp, 0x06, 0xe686); | |
+ mdio_write(tp, 0x06, 0x08e0); | |
+ mdio_write(tp, 0x06, 0x8609); | |
+ mdio_write(tp, 0x06, 0xa000); | |
+ mdio_write(tp, 0x06, 0x07ee); | |
+ mdio_write(tp, 0x06, 0x860a); | |
+ mdio_write(tp, 0x06, 0x03af); | |
+ mdio_write(tp, 0x06, 0x8369); | |
+ mdio_write(tp, 0x06, 0x0224); | |
+ mdio_write(tp, 0x06, 0x8e02); | |
+ mdio_write(tp, 0x06, 0x2426); | |
+ mdio_write(tp, 0x06, 0xae48); | |
+ mdio_write(tp, 0x06, 0xa003); | |
+ mdio_write(tp, 0x06, 0x21e0); | |
+ mdio_write(tp, 0x06, 0x8608); | |
+ mdio_write(tp, 0x06, 0xe186); | |
+ mdio_write(tp, 0x06, 0x091b); | |
+ mdio_write(tp, 0x06, 0x019e); | |
+ mdio_write(tp, 0x06, 0x0caa); | |
+ mdio_write(tp, 0x06, 0x0502); | |
+ mdio_write(tp, 0x06, 0x249d); | |
+ mdio_write(tp, 0x06, 0xaee7); | |
+ mdio_write(tp, 0x06, 0x0224); | |
+ mdio_write(tp, 0x06, 0x8eae); | |
+ mdio_write(tp, 0x06, 0xe2ee); | |
+ mdio_write(tp, 0x06, 0x860a); | |
+ mdio_write(tp, 0x06, 0x04ee); | |
+ mdio_write(tp, 0x06, 0x860b); | |
+ mdio_write(tp, 0x06, 0x00af); | |
+ mdio_write(tp, 0x06, 0x8369); | |
+ mdio_write(tp, 0x06, 0xa004); | |
+ mdio_write(tp, 0x06, 0x15e0); | |
+ mdio_write(tp, 0x06, 0x860b); | |
+ mdio_write(tp, 0x06, 0xe18b); | |
+ mdio_write(tp, 0x06, 0x341b); | |
+ mdio_write(tp, 0x06, 0x109e); | |
+ mdio_write(tp, 0x06, 0x05aa); | |
+ mdio_write(tp, 0x06, 0x03af); | |
+ mdio_write(tp, 0x06, 0x8383); | |
+ mdio_write(tp, 0x06, 0xee86); | |
+ mdio_write(tp, 0x06, 0x0a05); | |
+ mdio_write(tp, 0x06, 0xae0c); | |
+ mdio_write(tp, 0x06, 0xa005); | |
+ mdio_write(tp, 0x06, 0x02ae); | |
+ mdio_write(tp, 0x06, 0x0702); | |
+ mdio_write(tp, 0x06, 0x2309); | |
+ mdio_write(tp, 0x06, 0xee86); | |
+ mdio_write(tp, 0x06, 0x0a00); | |
+ mdio_write(tp, 0x06, 0xfeef); | |
+ mdio_write(tp, 0x06, 0x96fe); | |
+ mdio_write(tp, 0x06, 0xfdfc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xf9fa); | |
+ mdio_write(tp, 0x06, 0xef69); | |
+ mdio_write(tp, 0x06, 0xfbe0); | |
+ mdio_write(tp, 0x06, 0x8b85); | |
+ mdio_write(tp, 0x06, 0xad25); | |
+ mdio_write(tp, 0x06, 0x22e0); | |
+ mdio_write(tp, 0x06, 0xe022); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0x23e2); | |
+ mdio_write(tp, 0x06, 0xe036); | |
+ mdio_write(tp, 0x06, 0xe3e0); | |
+ mdio_write(tp, 0x06, 0x375a); | |
+ mdio_write(tp, 0x06, 0xc40d); | |
+ mdio_write(tp, 0x06, 0x0158); | |
+ mdio_write(tp, 0x06, 0x021e); | |
+ mdio_write(tp, 0x06, 0x20e3); | |
+ mdio_write(tp, 0x06, 0x8ae7); | |
+ mdio_write(tp, 0x06, 0xac31); | |
+ mdio_write(tp, 0x06, 0x60ac); | |
+ mdio_write(tp, 0x06, 0x3a08); | |
+ mdio_write(tp, 0x06, 0xac3e); | |
+ mdio_write(tp, 0x06, 0x26ae); | |
+ mdio_write(tp, 0x06, 0x67af); | |
+ mdio_write(tp, 0x06, 0x84db); | |
+ mdio_write(tp, 0x06, 0xad37); | |
+ mdio_write(tp, 0x06, 0x61e0); | |
+ mdio_write(tp, 0x06, 0x8ae8); | |
+ mdio_write(tp, 0x06, 0x10e4); | |
+ mdio_write(tp, 0x06, 0x8ae8); | |
+ mdio_write(tp, 0x06, 0xe18a); | |
+ mdio_write(tp, 0x06, 0xe91b); | |
+ mdio_write(tp, 0x06, 0x109e); | |
+ mdio_write(tp, 0x06, 0x02ae); | |
+ mdio_write(tp, 0x06, 0x51d1); | |
+ mdio_write(tp, 0x06, 0x00bf); | |
+ mdio_write(tp, 0x06, 0x863b); | |
+ mdio_write(tp, 0x06, 0x022f); | |
+ mdio_write(tp, 0x06, 0x50ee); | |
+ mdio_write(tp, 0x06, 0x8ae8); | |
+ mdio_write(tp, 0x06, 0x00ae); | |
+ mdio_write(tp, 0x06, 0x43ad); | |
+ mdio_write(tp, 0x06, 0x3627); | |
+ mdio_write(tp, 0x06, 0xe08a); | |
+ mdio_write(tp, 0x06, 0xeee1); | |
+ mdio_write(tp, 0x06, 0x8aef); | |
+ mdio_write(tp, 0x06, 0xef74); | |
+ mdio_write(tp, 0x06, 0xe08a); | |
+ mdio_write(tp, 0x06, 0xeae1); | |
+ mdio_write(tp, 0x06, 0x8aeb); | |
+ mdio_write(tp, 0x06, 0x1b74); | |
+ mdio_write(tp, 0x06, 0x9e2e); | |
+ mdio_write(tp, 0x06, 0x14e4); | |
+ mdio_write(tp, 0x06, 0x8aea); | |
+ mdio_write(tp, 0x06, 0xe58a); | |
+ mdio_write(tp, 0x06, 0xebef); | |
+ mdio_write(tp, 0x06, 0x74e0); | |
+ mdio_write(tp, 0x06, 0x8aee); | |
+ mdio_write(tp, 0x06, 0xe18a); | |
+ mdio_write(tp, 0x06, 0xef1b); | |
+ mdio_write(tp, 0x06, 0x479e); | |
+ mdio_write(tp, 0x06, 0x0fae); | |
+ mdio_write(tp, 0x06, 0x19ee); | |
+ mdio_write(tp, 0x06, 0x8aea); | |
+ mdio_write(tp, 0x06, 0x00ee); | |
+ mdio_write(tp, 0x06, 0x8aeb); | |
+ mdio_write(tp, 0x06, 0x00ae); | |
+ mdio_write(tp, 0x06, 0x0fac); | |
+ mdio_write(tp, 0x06, 0x390c); | |
+ mdio_write(tp, 0x06, 0xd101); | |
+ mdio_write(tp, 0x06, 0xbf86); | |
+ mdio_write(tp, 0x06, 0x3b02); | |
+ mdio_write(tp, 0x06, 0x2f50); | |
+ mdio_write(tp, 0x06, 0xee8a); | |
+ mdio_write(tp, 0x06, 0xe800); | |
+ mdio_write(tp, 0x06, 0xe68a); | |
+ mdio_write(tp, 0x06, 0xe7ff); | |
+ mdio_write(tp, 0x06, 0xef96); | |
+ mdio_write(tp, 0x06, 0xfefd); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8f9); | |
+ mdio_write(tp, 0x06, 0xfaef); | |
+ mdio_write(tp, 0x06, 0x69e0); | |
+ mdio_write(tp, 0x06, 0xe022); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0x2358); | |
+ mdio_write(tp, 0x06, 0xc4e1); | |
+ mdio_write(tp, 0x06, 0x8b6e); | |
+ mdio_write(tp, 0x06, 0x1f10); | |
+ mdio_write(tp, 0x06, 0x9e24); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x6ead); | |
+ mdio_write(tp, 0x06, 0x2218); | |
+ mdio_write(tp, 0x06, 0xac27); | |
+ mdio_write(tp, 0x06, 0x0dac); | |
+ mdio_write(tp, 0x06, 0x2605); | |
+ mdio_write(tp, 0x06, 0x0203); | |
+ mdio_write(tp, 0x06, 0x8fae); | |
+ mdio_write(tp, 0x06, 0x1302); | |
+ mdio_write(tp, 0x06, 0x03c8); | |
+ mdio_write(tp, 0x06, 0xae0e); | |
+ mdio_write(tp, 0x06, 0x0203); | |
+ mdio_write(tp, 0x06, 0xe102); | |
+ mdio_write(tp, 0x06, 0x8520); | |
+ mdio_write(tp, 0x06, 0xae06); | |
+ mdio_write(tp, 0x06, 0x0203); | |
+ mdio_write(tp, 0x06, 0x8f02); | |
+ mdio_write(tp, 0x06, 0x8566); | |
+ mdio_write(tp, 0x06, 0xef96); | |
+ mdio_write(tp, 0x06, 0xfefd); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8fa); | |
+ mdio_write(tp, 0x06, 0xef69); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x82ad); | |
+ mdio_write(tp, 0x06, 0x2737); | |
+ mdio_write(tp, 0x06, 0xbf86); | |
+ mdio_write(tp, 0x06, 0x4402); | |
+ mdio_write(tp, 0x06, 0x2f23); | |
+ mdio_write(tp, 0x06, 0xac28); | |
+ mdio_write(tp, 0x06, 0x2ed1); | |
+ mdio_write(tp, 0x06, 0x01bf); | |
+ mdio_write(tp, 0x06, 0x8647); | |
+ mdio_write(tp, 0x06, 0x022f); | |
+ mdio_write(tp, 0x06, 0x50bf); | |
+ mdio_write(tp, 0x06, 0x8641); | |
+ mdio_write(tp, 0x06, 0x022f); | |
+ mdio_write(tp, 0x06, 0x23e5); | |
+ mdio_write(tp, 0x06, 0x8af0); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0x22e1); | |
+ mdio_write(tp, 0x06, 0xe023); | |
+ mdio_write(tp, 0x06, 0xac2e); | |
+ mdio_write(tp, 0x06, 0x04d1); | |
+ mdio_write(tp, 0x06, 0x01ae); | |
+ mdio_write(tp, 0x06, 0x02d1); | |
+ mdio_write(tp, 0x06, 0x00bf); | |
+ mdio_write(tp, 0x06, 0x8641); | |
+ mdio_write(tp, 0x06, 0x022f); | |
+ mdio_write(tp, 0x06, 0x50d1); | |
+ mdio_write(tp, 0x06, 0x01bf); | |
+ mdio_write(tp, 0x06, 0x8644); | |
+ mdio_write(tp, 0x06, 0x022f); | |
+ mdio_write(tp, 0x06, 0x50ef); | |
+ mdio_write(tp, 0x06, 0x96fe); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8fa); | |
+ mdio_write(tp, 0x06, 0xef69); | |
+ mdio_write(tp, 0x06, 0xbf86); | |
+ mdio_write(tp, 0x06, 0x4702); | |
+ mdio_write(tp, 0x06, 0x2f23); | |
+ mdio_write(tp, 0x06, 0xad28); | |
+ mdio_write(tp, 0x06, 0x19d1); | |
+ mdio_write(tp, 0x06, 0x00bf); | |
+ mdio_write(tp, 0x06, 0x8644); | |
+ mdio_write(tp, 0x06, 0x022f); | |
+ mdio_write(tp, 0x06, 0x50e1); | |
+ mdio_write(tp, 0x06, 0x8af0); | |
+ mdio_write(tp, 0x06, 0xbf86); | |
+ mdio_write(tp, 0x06, 0x4102); | |
+ mdio_write(tp, 0x06, 0x2f50); | |
+ mdio_write(tp, 0x06, 0xd100); | |
+ mdio_write(tp, 0x06, 0xbf86); | |
+ mdio_write(tp, 0x06, 0x4702); | |
+ mdio_write(tp, 0x06, 0x2f50); | |
+ mdio_write(tp, 0x06, 0xef96); | |
+ mdio_write(tp, 0x06, 0xfefc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xe0e2); | |
+ mdio_write(tp, 0x06, 0xfee1); | |
+ mdio_write(tp, 0x06, 0xe2ff); | |
+ mdio_write(tp, 0x06, 0xad2e); | |
+ mdio_write(tp, 0x06, 0x63e0); | |
+ mdio_write(tp, 0x06, 0xe038); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0x39ad); | |
+ mdio_write(tp, 0x06, 0x2f10); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0x34e1); | |
+ mdio_write(tp, 0x06, 0xe035); | |
+ mdio_write(tp, 0x06, 0xf726); | |
+ mdio_write(tp, 0x06, 0xe4e0); | |
+ mdio_write(tp, 0x06, 0x34e5); | |
+ mdio_write(tp, 0x06, 0xe035); | |
+ mdio_write(tp, 0x06, 0xae0e); | |
+ mdio_write(tp, 0x06, 0xe0e2); | |
+ mdio_write(tp, 0x06, 0xd6e1); | |
+ mdio_write(tp, 0x06, 0xe2d7); | |
+ mdio_write(tp, 0x06, 0xf728); | |
+ mdio_write(tp, 0x06, 0xe4e2); | |
+ mdio_write(tp, 0x06, 0xd6e5); | |
+ mdio_write(tp, 0x06, 0xe2d7); | |
+ mdio_write(tp, 0x06, 0xe0e2); | |
+ mdio_write(tp, 0x06, 0x34e1); | |
+ mdio_write(tp, 0x06, 0xe235); | |
+ mdio_write(tp, 0x06, 0xf72b); | |
+ mdio_write(tp, 0x06, 0xe4e2); | |
+ mdio_write(tp, 0x06, 0x34e5); | |
+ mdio_write(tp, 0x06, 0xe235); | |
+ mdio_write(tp, 0x06, 0xd07d); | |
+ mdio_write(tp, 0x06, 0xb0fe); | |
+ mdio_write(tp, 0x06, 0xe0e2); | |
+ mdio_write(tp, 0x06, 0x34e1); | |
+ mdio_write(tp, 0x06, 0xe235); | |
+ mdio_write(tp, 0x06, 0xf62b); | |
+ mdio_write(tp, 0x06, 0xe4e2); | |
+ mdio_write(tp, 0x06, 0x34e5); | |
+ mdio_write(tp, 0x06, 0xe235); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0x34e1); | |
+ mdio_write(tp, 0x06, 0xe035); | |
+ mdio_write(tp, 0x06, 0xf626); | |
+ mdio_write(tp, 0x06, 0xe4e0); | |
+ mdio_write(tp, 0x06, 0x34e5); | |
+ mdio_write(tp, 0x06, 0xe035); | |
+ mdio_write(tp, 0x06, 0xe0e2); | |
+ mdio_write(tp, 0x06, 0xd6e1); | |
+ mdio_write(tp, 0x06, 0xe2d7); | |
+ mdio_write(tp, 0x06, 0xf628); | |
+ mdio_write(tp, 0x06, 0xe4e2); | |
+ mdio_write(tp, 0x06, 0xd6e5); | |
+ mdio_write(tp, 0x06, 0xe2d7); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xae20); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0xa725); | |
+ mdio_write(tp, 0x06, 0xe50a); | |
+ mdio_write(tp, 0x06, 0x1de5); | |
+ mdio_write(tp, 0x06, 0x0a2c); | |
+ mdio_write(tp, 0x06, 0xe50a); | |
+ mdio_write(tp, 0x06, 0x6de5); | |
+ mdio_write(tp, 0x06, 0x0a1d); | |
+ mdio_write(tp, 0x06, 0xe50a); | |
+ mdio_write(tp, 0x06, 0x1ce5); | |
+ mdio_write(tp, 0x06, 0x0a2d); | |
+ mdio_write(tp, 0x06, 0xa755); | |
+ mdio_write(tp, 0x06, 0x00e2); | |
+ mdio_write(tp, 0x06, 0x3488); | |
+ mdio_write(tp, 0x06, 0xe200); | |
+ mdio_write(tp, 0x06, 0xcce2); | |
+ mdio_write(tp, 0x06, 0x0055); | |
+ mdio_write(tp, 0x06, 0xe020); | |
+ mdio_write(tp, 0x06, 0x55e2); | |
+ mdio_write(tp, 0x06, 0xd600); | |
+ mdio_write(tp, 0x06, 0xe24a); | |
+ gphy_val = mdio_read(tp, 0x01); | |
+ gphy_val |= BIT_0; | |
+ mdio_write(tp, 0x01, gphy_val); | |
+ gphy_val = mdio_read(tp, 0x00); | |
+ gphy_val |= BIT_0; | |
+ mdio_write(tp, 0x00, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ for (i = 0; i < 200; i++) { | |
+ udelay(100); | |
+ gphy_val = mdio_read(tp, 0x00); | |
+ if (gphy_val & BIT_7) | |
+ break; | |
+ } | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x0023); | |
+ gphy_val = mdio_read(tp, 0x17); | |
+ gphy_val &= ~(BIT_0); | |
+ if (tp->RequiredSecLanDonglePatch) | |
+ gphy_val &= ~(BIT_2); | |
+ mdio_write(tp, 0x17, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ } | |
+} | |
+ | |
+static void | |
+rtl8168_set_phy_mcu_8168evl_1(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ unsigned int gphy_val,i; | |
+ | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x00, 0x1800); | |
+ gphy_val = mdio_read(tp, 0x15); | |
+ gphy_val &= ~(BIT_12); | |
+ mdio_write(tp, 0x15, gphy_val); | |
+ mdelay(20); | |
+ mdio_write(tp, 0x1f, 0x0004); | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x0023); | |
+ gphy_val = mdio_read(tp, 0x17); | |
+ if ((gphy_val & BIT_11) == 0x0000) { | |
+ gphy_val |= BIT_0; | |
+ mdio_write(tp, 0x17, gphy_val); | |
+ for (i = 0; i < 200; i++) { | |
+ udelay(100); | |
+ gphy_val = mdio_read(tp, 0x17); | |
+ if (gphy_val & BIT_11) | |
+ break; | |
+ } | |
+ } | |
+ gphy_val = mdio_read(tp, 0x17); | |
+ gphy_val |= BIT_0; | |
+ mdio_write(tp, 0x17, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0004); | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1E, 0x002C); | |
+ mdio_write(tp, 0x1B, 0x5000); | |
+ mdio_write(tp, 0x1E, 0x002d); | |
+ mdio_write(tp, 0x19, 0x0004); | |
+ mdio_write(tp, 0x1f, 0x0002); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ for (i = 0; i < 200; i++) { | |
+ udelay(100); | |
+ gphy_val = mdio_read(tp, 0x1E); | |
+ if ((gphy_val & 0x03FF) == 0x0014) | |
+ break; | |
+ } | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ for (i = 0; i < 200; i++) { | |
+ udelay(100); | |
+ gphy_val = mdio_read(tp, 0x07); | |
+ if ((gphy_val & BIT_5) == 0) | |
+ break; | |
+ } | |
+ gphy_val = mdio_read(tp, 0x07); | |
+ if (gphy_val & BIT_5) { | |
+ mdio_write(tp, 0x1f, 0x0004); | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x00a1); | |
+ mdio_write(tp, 0x17, 0x1000); | |
+ mdio_write(tp, 0x17, 0x0000); | |
+ mdio_write(tp, 0x17, 0x2000); | |
+ mdio_write(tp, 0x1e, 0x002f); | |
+ mdio_write(tp, 0x18, 0x9bfb); | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ mdio_write(tp, 0x07, 0x0000); | |
+ mdio_write(tp, 0x1f, 0x0002); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ } | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ mdio_write(tp, 0x05, 0xfff6); | |
+ mdio_write(tp, 0x06, 0x0080); | |
+ gphy_val = mdio_read(tp, 0x00); | |
+ gphy_val &= ~(BIT_7); | |
+ mdio_write(tp, 0x00, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0004); | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x0023); | |
+ mdio_write(tp, 0x16, 0x0306); | |
+ mdio_write(tp, 0x16, 0x0307); | |
+ mdio_write(tp, 0x15, 0x0000); | |
+ mdio_write(tp, 0x19, 0x407d); | |
+ mdio_write(tp, 0x15, 0x0001); | |
+ mdio_write(tp, 0x19, 0x440f); | |
+ mdio_write(tp, 0x15, 0x0002); | |
+ mdio_write(tp, 0x19, 0x7c03); | |
+ mdio_write(tp, 0x15, 0x0003); | |
+ mdio_write(tp, 0x19, 0x6c03); | |
+ mdio_write(tp, 0x15, 0x0004); | |
+ mdio_write(tp, 0x19, 0xc4d5); | |
+ mdio_write(tp, 0x15, 0x0005); | |
+ mdio_write(tp, 0x19, 0x00ff); | |
+ mdio_write(tp, 0x15, 0x0006); | |
+ mdio_write(tp, 0x19, 0x74f0); | |
+ mdio_write(tp, 0x15, 0x0007); | |
+ mdio_write(tp, 0x19, 0x4880); | |
+ mdio_write(tp, 0x15, 0x0008); | |
+ mdio_write(tp, 0x19, 0x4c00); | |
+ mdio_write(tp, 0x15, 0x0009); | |
+ mdio_write(tp, 0x19, 0x4800); | |
+ mdio_write(tp, 0x15, 0x000a); | |
+ mdio_write(tp, 0x19, 0x5000); | |
+ mdio_write(tp, 0x15, 0x000b); | |
+ mdio_write(tp, 0x19, 0x4400); | |
+ mdio_write(tp, 0x15, 0x000c); | |
+ mdio_write(tp, 0x19, 0x7801); | |
+ mdio_write(tp, 0x15, 0x000d); | |
+ mdio_write(tp, 0x19, 0x4000); | |
+ mdio_write(tp, 0x15, 0x000e); | |
+ mdio_write(tp, 0x19, 0x7800); | |
+ mdio_write(tp, 0x15, 0x000f); | |
+ mdio_write(tp, 0x19, 0x7010); | |
+ mdio_write(tp, 0x15, 0x0010); | |
+ mdio_write(tp, 0x19, 0x6804); | |
+ mdio_write(tp, 0x15, 0x0011); | |
+ mdio_write(tp, 0x19, 0x64a0); | |
+ mdio_write(tp, 0x15, 0x0012); | |
+ mdio_write(tp, 0x19, 0x63da); | |
+ mdio_write(tp, 0x15, 0x0013); | |
+ mdio_write(tp, 0x19, 0x63d8); | |
+ mdio_write(tp, 0x15, 0x0014); | |
+ mdio_write(tp, 0x19, 0x6f05); | |
+ mdio_write(tp, 0x15, 0x0015); | |
+ mdio_write(tp, 0x19, 0x5420); | |
+ mdio_write(tp, 0x15, 0x0016); | |
+ mdio_write(tp, 0x19, 0x58ce); | |
+ mdio_write(tp, 0x15, 0x0017); | |
+ mdio_write(tp, 0x19, 0x5cf3); | |
+ mdio_write(tp, 0x15, 0x0018); | |
+ mdio_write(tp, 0x19, 0xb600); | |
+ mdio_write(tp, 0x15, 0x0019); | |
+ mdio_write(tp, 0x19, 0xc659); | |
+ mdio_write(tp, 0x15, 0x001a); | |
+ mdio_write(tp, 0x19, 0x0018); | |
+ mdio_write(tp, 0x15, 0x001b); | |
+ mdio_write(tp, 0x19, 0xc403); | |
+ mdio_write(tp, 0x15, 0x001c); | |
+ mdio_write(tp, 0x19, 0x0016); | |
+ mdio_write(tp, 0x15, 0x001d); | |
+ mdio_write(tp, 0x19, 0xaa05); | |
+ mdio_write(tp, 0x15, 0x001e); | |
+ mdio_write(tp, 0x19, 0xc503); | |
+ mdio_write(tp, 0x15, 0x001f); | |
+ mdio_write(tp, 0x19, 0x0003); | |
+ mdio_write(tp, 0x15, 0x0020); | |
+ mdio_write(tp, 0x19, 0x89f8); | |
+ mdio_write(tp, 0x15, 0x0021); | |
+ mdio_write(tp, 0x19, 0x32ae); | |
+ mdio_write(tp, 0x15, 0x0022); | |
+ mdio_write(tp, 0x19, 0x7c03); | |
+ mdio_write(tp, 0x15, 0x0023); | |
+ mdio_write(tp, 0x19, 0x6c03); | |
+ mdio_write(tp, 0x15, 0x0024); | |
+ mdio_write(tp, 0x19, 0x7c03); | |
+ mdio_write(tp, 0x15, 0x0025); | |
+ mdio_write(tp, 0x19, 0x6801); | |
+ mdio_write(tp, 0x15, 0x0026); | |
+ mdio_write(tp, 0x19, 0x66a0); | |
+ mdio_write(tp, 0x15, 0x0027); | |
+ mdio_write(tp, 0x19, 0xa300); | |
+ mdio_write(tp, 0x15, 0x0028); | |
+ mdio_write(tp, 0x19, 0x64a0); | |
+ mdio_write(tp, 0x15, 0x0029); | |
+ mdio_write(tp, 0x19, 0x76f0); | |
+ mdio_write(tp, 0x15, 0x002a); | |
+ mdio_write(tp, 0x19, 0x7670); | |
+ mdio_write(tp, 0x15, 0x002b); | |
+ mdio_write(tp, 0x19, 0x7630); | |
+ mdio_write(tp, 0x15, 0x002c); | |
+ mdio_write(tp, 0x19, 0x31a6); | |
+ mdio_write(tp, 0x15, 0x002d); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x002e); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x002f); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0030); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0031); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0032); | |
+ mdio_write(tp, 0x19, 0x4801); | |
+ mdio_write(tp, 0x15, 0x0033); | |
+ mdio_write(tp, 0x19, 0x6803); | |
+ mdio_write(tp, 0x15, 0x0034); | |
+ mdio_write(tp, 0x19, 0x66a1); | |
+ mdio_write(tp, 0x15, 0x0035); | |
+ mdio_write(tp, 0x19, 0x7c03); | |
+ mdio_write(tp, 0x15, 0x0036); | |
+ mdio_write(tp, 0x19, 0x6c03); | |
+ mdio_write(tp, 0x15, 0x0037); | |
+ mdio_write(tp, 0x19, 0xa300); | |
+ mdio_write(tp, 0x15, 0x0038); | |
+ mdio_write(tp, 0x19, 0x64a1); | |
+ mdio_write(tp, 0x15, 0x0039); | |
+ mdio_write(tp, 0x19, 0x7c08); | |
+ mdio_write(tp, 0x15, 0x003a); | |
+ mdio_write(tp, 0x19, 0x74f8); | |
+ mdio_write(tp, 0x15, 0x003b); | |
+ mdio_write(tp, 0x19, 0x63d0); | |
+ mdio_write(tp, 0x15, 0x003c); | |
+ mdio_write(tp, 0x19, 0x7ff0); | |
+ mdio_write(tp, 0x15, 0x003d); | |
+ mdio_write(tp, 0x19, 0x77f0); | |
+ mdio_write(tp, 0x15, 0x003e); | |
+ mdio_write(tp, 0x19, 0x7ff0); | |
+ mdio_write(tp, 0x15, 0x003f); | |
+ mdio_write(tp, 0x19, 0x7750); | |
+ mdio_write(tp, 0x15, 0x0040); | |
+ mdio_write(tp, 0x19, 0x63d8); | |
+ mdio_write(tp, 0x15, 0x0041); | |
+ mdio_write(tp, 0x19, 0x7cf0); | |
+ mdio_write(tp, 0x15, 0x0042); | |
+ mdio_write(tp, 0x19, 0x7708); | |
+ mdio_write(tp, 0x15, 0x0043); | |
+ mdio_write(tp, 0x19, 0xa654); | |
+ mdio_write(tp, 0x15, 0x0044); | |
+ mdio_write(tp, 0x19, 0x304a); | |
+ mdio_write(tp, 0x15, 0x0045); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0046); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0047); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0048); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0049); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x004a); | |
+ mdio_write(tp, 0x19, 0x4802); | |
+ mdio_write(tp, 0x15, 0x004b); | |
+ mdio_write(tp, 0x19, 0x4003); | |
+ mdio_write(tp, 0x15, 0x004c); | |
+ mdio_write(tp, 0x19, 0x4440); | |
+ mdio_write(tp, 0x15, 0x004d); | |
+ mdio_write(tp, 0x19, 0x63c8); | |
+ mdio_write(tp, 0x15, 0x004e); | |
+ mdio_write(tp, 0x19, 0x6481); | |
+ mdio_write(tp, 0x15, 0x004f); | |
+ mdio_write(tp, 0x19, 0x9d00); | |
+ mdio_write(tp, 0x15, 0x0050); | |
+ mdio_write(tp, 0x19, 0x63e8); | |
+ mdio_write(tp, 0x15, 0x0051); | |
+ mdio_write(tp, 0x19, 0x7d00); | |
+ mdio_write(tp, 0x15, 0x0052); | |
+ mdio_write(tp, 0x19, 0x5900); | |
+ mdio_write(tp, 0x15, 0x0053); | |
+ mdio_write(tp, 0x19, 0x63f8); | |
+ mdio_write(tp, 0x15, 0x0054); | |
+ mdio_write(tp, 0x19, 0x64a1); | |
+ mdio_write(tp, 0x15, 0x0055); | |
+ mdio_write(tp, 0x19, 0x3116); | |
+ mdio_write(tp, 0x15, 0x0056); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0057); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0058); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0059); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x005a); | |
+ mdio_write(tp, 0x19, 0x7c03); | |
+ mdio_write(tp, 0x15, 0x005b); | |
+ mdio_write(tp, 0x19, 0x6c03); | |
+ mdio_write(tp, 0x15, 0x005c); | |
+ mdio_write(tp, 0x19, 0x7c08); | |
+ mdio_write(tp, 0x15, 0x005d); | |
+ mdio_write(tp, 0x19, 0x6000); | |
+ mdio_write(tp, 0x15, 0x005e); | |
+ mdio_write(tp, 0x19, 0x59ce); | |
+ mdio_write(tp, 0x15, 0x005f); | |
+ mdio_write(tp, 0x19, 0x4400); | |
+ mdio_write(tp, 0x15, 0x0060); | |
+ mdio_write(tp, 0x19, 0x7d00); | |
+ mdio_write(tp, 0x15, 0x0061); | |
+ mdio_write(tp, 0x19, 0x72b0); | |
+ mdio_write(tp, 0x15, 0x0062); | |
+ mdio_write(tp, 0x19, 0x400e); | |
+ mdio_write(tp, 0x15, 0x0063); | |
+ mdio_write(tp, 0x19, 0x4440); | |
+ mdio_write(tp, 0x15, 0x0064); | |
+ mdio_write(tp, 0x19, 0x9d00); | |
+ mdio_write(tp, 0x15, 0x0065); | |
+ mdio_write(tp, 0x19, 0x7f00); | |
+ mdio_write(tp, 0x15, 0x0066); | |
+ mdio_write(tp, 0x19, 0x70b0); | |
+ mdio_write(tp, 0x15, 0x0067); | |
+ mdio_write(tp, 0x19, 0x7c08); | |
+ mdio_write(tp, 0x15, 0x0068); | |
+ mdio_write(tp, 0x19, 0x6008); | |
+ mdio_write(tp, 0x15, 0x0069); | |
+ mdio_write(tp, 0x19, 0x7cf0); | |
+ mdio_write(tp, 0x15, 0x006a); | |
+ mdio_write(tp, 0x19, 0x7750); | |
+ mdio_write(tp, 0x15, 0x006b); | |
+ mdio_write(tp, 0x19, 0x4007); | |
+ mdio_write(tp, 0x15, 0x006c); | |
+ mdio_write(tp, 0x19, 0x4500); | |
+ mdio_write(tp, 0x15, 0x006d); | |
+ mdio_write(tp, 0x19, 0x4023); | |
+ mdio_write(tp, 0x15, 0x006e); | |
+ mdio_write(tp, 0x19, 0x4580); | |
+ mdio_write(tp, 0x15, 0x006f); | |
+ mdio_write(tp, 0x19, 0x9f00); | |
+ mdio_write(tp, 0x15, 0x0070); | |
+ mdio_write(tp, 0x19, 0xcd78); | |
+ mdio_write(tp, 0x15, 0x0071); | |
+ mdio_write(tp, 0x19, 0x0003); | |
+ mdio_write(tp, 0x15, 0x0072); | |
+ mdio_write(tp, 0x19, 0xbe02); | |
+ mdio_write(tp, 0x15, 0x0073); | |
+ mdio_write(tp, 0x19, 0x3070); | |
+ mdio_write(tp, 0x15, 0x0074); | |
+ mdio_write(tp, 0x19, 0x7cf0); | |
+ mdio_write(tp, 0x15, 0x0075); | |
+ mdio_write(tp, 0x19, 0x77f0); | |
+ mdio_write(tp, 0x15, 0x0076); | |
+ mdio_write(tp, 0x19, 0x4400); | |
+ mdio_write(tp, 0x15, 0x0077); | |
+ mdio_write(tp, 0x19, 0x4007); | |
+ mdio_write(tp, 0x15, 0x0078); | |
+ mdio_write(tp, 0x19, 0x4500); | |
+ mdio_write(tp, 0x15, 0x0079); | |
+ mdio_write(tp, 0x19, 0x4023); | |
+ mdio_write(tp, 0x15, 0x007a); | |
+ mdio_write(tp, 0x19, 0x4580); | |
+ mdio_write(tp, 0x15, 0x007b); | |
+ mdio_write(tp, 0x19, 0x9f00); | |
+ mdio_write(tp, 0x15, 0x007c); | |
+ mdio_write(tp, 0x19, 0xce80); | |
+ mdio_write(tp, 0x15, 0x007d); | |
+ mdio_write(tp, 0x19, 0x0004); | |
+ mdio_write(tp, 0x15, 0x007e); | |
+ mdio_write(tp, 0x19, 0xce80); | |
+ mdio_write(tp, 0x15, 0x007f); | |
+ mdio_write(tp, 0x19, 0x0002); | |
+ mdio_write(tp, 0x15, 0x0080); | |
+ mdio_write(tp, 0x19, 0x307c); | |
+ mdio_write(tp, 0x15, 0x0081); | |
+ mdio_write(tp, 0x19, 0x4400); | |
+ mdio_write(tp, 0x15, 0x0082); | |
+ mdio_write(tp, 0x19, 0x480f); | |
+ mdio_write(tp, 0x15, 0x0083); | |
+ mdio_write(tp, 0x19, 0x6802); | |
+ mdio_write(tp, 0x15, 0x0084); | |
+ mdio_write(tp, 0x19, 0x6680); | |
+ mdio_write(tp, 0x15, 0x0085); | |
+ mdio_write(tp, 0x19, 0x7c10); | |
+ mdio_write(tp, 0x15, 0x0086); | |
+ mdio_write(tp, 0x19, 0x6010); | |
+ mdio_write(tp, 0x15, 0x0087); | |
+ mdio_write(tp, 0x19, 0x400a); | |
+ mdio_write(tp, 0x15, 0x0088); | |
+ mdio_write(tp, 0x19, 0x4580); | |
+ mdio_write(tp, 0x15, 0x0089); | |
+ mdio_write(tp, 0x19, 0x9e00); | |
+ mdio_write(tp, 0x15, 0x008a); | |
+ mdio_write(tp, 0x19, 0x7d00); | |
+ mdio_write(tp, 0x15, 0x008b); | |
+ mdio_write(tp, 0x19, 0x5800); | |
+ mdio_write(tp, 0x15, 0x008c); | |
+ mdio_write(tp, 0x19, 0x63c8); | |
+ mdio_write(tp, 0x15, 0x008d); | |
+ mdio_write(tp, 0x19, 0x63d8); | |
+ mdio_write(tp, 0x15, 0x008e); | |
+ mdio_write(tp, 0x19, 0x66a0); | |
+ mdio_write(tp, 0x15, 0x008f); | |
+ mdio_write(tp, 0x19, 0x8300); | |
+ mdio_write(tp, 0x15, 0x0090); | |
+ mdio_write(tp, 0x19, 0x7ff0); | |
+ mdio_write(tp, 0x15, 0x0091); | |
+ mdio_write(tp, 0x19, 0x74f0); | |
+ mdio_write(tp, 0x15, 0x0092); | |
+ mdio_write(tp, 0x19, 0x3006); | |
+ mdio_write(tp, 0x15, 0x0093); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0094); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0095); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0096); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0097); | |
+ mdio_write(tp, 0x19, 0x4803); | |
+ mdio_write(tp, 0x15, 0x0098); | |
+ mdio_write(tp, 0x19, 0x7c03); | |
+ mdio_write(tp, 0x15, 0x0099); | |
+ mdio_write(tp, 0x19, 0x6c03); | |
+ mdio_write(tp, 0x15, 0x009a); | |
+ mdio_write(tp, 0x19, 0xa203); | |
+ mdio_write(tp, 0x15, 0x009b); | |
+ mdio_write(tp, 0x19, 0x64b1); | |
+ mdio_write(tp, 0x15, 0x009c); | |
+ mdio_write(tp, 0x19, 0x309e); | |
+ mdio_write(tp, 0x15, 0x009d); | |
+ mdio_write(tp, 0x19, 0x64b3); | |
+ mdio_write(tp, 0x15, 0x009e); | |
+ mdio_write(tp, 0x19, 0x4030); | |
+ mdio_write(tp, 0x15, 0x009f); | |
+ mdio_write(tp, 0x19, 0x440e); | |
+ mdio_write(tp, 0x15, 0x00a0); | |
+ mdio_write(tp, 0x19, 0x4020); | |
+ mdio_write(tp, 0x15, 0x00a1); | |
+ mdio_write(tp, 0x19, 0x4419); | |
+ mdio_write(tp, 0x15, 0x00a2); | |
+ mdio_write(tp, 0x19, 0x7801); | |
+ mdio_write(tp, 0x15, 0x00a3); | |
+ mdio_write(tp, 0x19, 0xc520); | |
+ mdio_write(tp, 0x15, 0x00a4); | |
+ mdio_write(tp, 0x19, 0x000b); | |
+ mdio_write(tp, 0x15, 0x00a5); | |
+ mdio_write(tp, 0x19, 0x4020); | |
+ mdio_write(tp, 0x15, 0x00a6); | |
+ mdio_write(tp, 0x19, 0x7800); | |
+ mdio_write(tp, 0x15, 0x00a7); | |
+ mdio_write(tp, 0x19, 0x58a4); | |
+ mdio_write(tp, 0x15, 0x00a8); | |
+ mdio_write(tp, 0x19, 0x63da); | |
+ mdio_write(tp, 0x15, 0x00a9); | |
+ mdio_write(tp, 0x19, 0x5cb0); | |
+ mdio_write(tp, 0x15, 0x00aa); | |
+ mdio_write(tp, 0x19, 0x7d00); | |
+ mdio_write(tp, 0x15, 0x00ab); | |
+ mdio_write(tp, 0x19, 0x72b0); | |
+ mdio_write(tp, 0x15, 0x00ac); | |
+ mdio_write(tp, 0x19, 0x7f00); | |
+ mdio_write(tp, 0x15, 0x00ad); | |
+ mdio_write(tp, 0x19, 0x70b0); | |
+ mdio_write(tp, 0x15, 0x00ae); | |
+ mdio_write(tp, 0x19, 0x30b8); | |
+ mdio_write(tp, 0x15, 0x00AF); | |
+ mdio_write(tp, 0x19, 0x4060); | |
+ mdio_write(tp, 0x15, 0x00B0); | |
+ mdio_write(tp, 0x19, 0x7800); | |
+ mdio_write(tp, 0x15, 0x00B1); | |
+ mdio_write(tp, 0x19, 0x7e00); | |
+ mdio_write(tp, 0x15, 0x00B2); | |
+ mdio_write(tp, 0x19, 0x72B0); | |
+ mdio_write(tp, 0x15, 0x00B3); | |
+ mdio_write(tp, 0x19, 0x7F00); | |
+ mdio_write(tp, 0x15, 0x00B4); | |
+ mdio_write(tp, 0x19, 0x73B0); | |
+ mdio_write(tp, 0x15, 0x00b5); | |
+ mdio_write(tp, 0x19, 0x58a0); | |
+ mdio_write(tp, 0x15, 0x00b6); | |
+ mdio_write(tp, 0x19, 0x63d2); | |
+ mdio_write(tp, 0x15, 0x00b7); | |
+ mdio_write(tp, 0x19, 0x5c00); | |
+ mdio_write(tp, 0x15, 0x00b8); | |
+ mdio_write(tp, 0x19, 0x5780); | |
+ mdio_write(tp, 0x15, 0x00b9); | |
+ mdio_write(tp, 0x19, 0xb60d); | |
+ mdio_write(tp, 0x15, 0x00ba); | |
+ mdio_write(tp, 0x19, 0x9bff); | |
+ mdio_write(tp, 0x15, 0x00bb); | |
+ mdio_write(tp, 0x19, 0x7c03); | |
+ mdio_write(tp, 0x15, 0x00bc); | |
+ mdio_write(tp, 0x19, 0x6001); | |
+ mdio_write(tp, 0x15, 0x00bd); | |
+ mdio_write(tp, 0x19, 0xc020); | |
+ mdio_write(tp, 0x15, 0x00be); | |
+ mdio_write(tp, 0x19, 0x002b); | |
+ mdio_write(tp, 0x15, 0x00bf); | |
+ mdio_write(tp, 0x19, 0xc137); | |
+ mdio_write(tp, 0x15, 0x00c0); | |
+ mdio_write(tp, 0x19, 0x0006); | |
+ mdio_write(tp, 0x15, 0x00c1); | |
+ mdio_write(tp, 0x19, 0x9af8); | |
+ mdio_write(tp, 0x15, 0x00c2); | |
+ mdio_write(tp, 0x19, 0x30c6); | |
+ mdio_write(tp, 0x15, 0x00c3); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x00c4); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x00c5); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x00c6); | |
+ mdio_write(tp, 0x19, 0x7d00); | |
+ mdio_write(tp, 0x15, 0x00c7); | |
+ mdio_write(tp, 0x19, 0x70b0); | |
+ mdio_write(tp, 0x15, 0x00c8); | |
+ mdio_write(tp, 0x19, 0x4400); | |
+ mdio_write(tp, 0x15, 0x00c9); | |
+ mdio_write(tp, 0x19, 0x4804); | |
+ mdio_write(tp, 0x15, 0x00ca); | |
+ mdio_write(tp, 0x19, 0x7c80); | |
+ mdio_write(tp, 0x15, 0x00cb); | |
+ mdio_write(tp, 0x19, 0x5c80); | |
+ mdio_write(tp, 0x15, 0x00cc); | |
+ mdio_write(tp, 0x19, 0x4010); | |
+ mdio_write(tp, 0x15, 0x00cd); | |
+ mdio_write(tp, 0x19, 0x4415); | |
+ mdio_write(tp, 0x15, 0x00ce); | |
+ mdio_write(tp, 0x19, 0x9b00); | |
+ mdio_write(tp, 0x15, 0x00cf); | |
+ mdio_write(tp, 0x19, 0x7f00); | |
+ mdio_write(tp, 0x15, 0x00d0); | |
+ mdio_write(tp, 0x19, 0x70b0); | |
+ mdio_write(tp, 0x15, 0x00d1); | |
+ mdio_write(tp, 0x19, 0x3177); | |
+ mdio_write(tp, 0x15, 0x00d2); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x00d3); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x00d4); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x00d5); | |
+ mdio_write(tp, 0x19, 0x4808); | |
+ mdio_write(tp, 0x15, 0x00d6); | |
+ mdio_write(tp, 0x19, 0x4007); | |
+ mdio_write(tp, 0x15, 0x00d7); | |
+ mdio_write(tp, 0x19, 0x4420); | |
+ mdio_write(tp, 0x15, 0x00d8); | |
+ mdio_write(tp, 0x19, 0x63d8); | |
+ mdio_write(tp, 0x15, 0x00d9); | |
+ mdio_write(tp, 0x19, 0xb608); | |
+ mdio_write(tp, 0x15, 0x00da); | |
+ mdio_write(tp, 0x19, 0xbcbd); | |
+ mdio_write(tp, 0x15, 0x00db); | |
+ mdio_write(tp, 0x19, 0xc60b); | |
+ mdio_write(tp, 0x15, 0x00dc); | |
+ mdio_write(tp, 0x19, 0x00fd); | |
+ mdio_write(tp, 0x15, 0x00dd); | |
+ mdio_write(tp, 0x19, 0x30e1); | |
+ mdio_write(tp, 0x15, 0x00de); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x00df); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x00e0); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x00e1); | |
+ mdio_write(tp, 0x19, 0x4809); | |
+ mdio_write(tp, 0x15, 0x00e2); | |
+ mdio_write(tp, 0x19, 0x7e40); | |
+ mdio_write(tp, 0x15, 0x00e3); | |
+ mdio_write(tp, 0x19, 0x5a40); | |
+ mdio_write(tp, 0x15, 0x00e4); | |
+ mdio_write(tp, 0x19, 0x305a); | |
+ mdio_write(tp, 0x15, 0x00e5); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x00e6); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x00e7); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x00e8); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x00e9); | |
+ mdio_write(tp, 0x19, 0x480a); | |
+ mdio_write(tp, 0x15, 0x00ea); | |
+ mdio_write(tp, 0x19, 0x5820); | |
+ mdio_write(tp, 0x15, 0x00eb); | |
+ mdio_write(tp, 0x19, 0x6c03); | |
+ mdio_write(tp, 0x15, 0x00ec); | |
+ mdio_write(tp, 0x19, 0xb60a); | |
+ mdio_write(tp, 0x15, 0x00ed); | |
+ mdio_write(tp, 0x19, 0xda07); | |
+ mdio_write(tp, 0x15, 0x00ee); | |
+ mdio_write(tp, 0x19, 0x0008); | |
+ mdio_write(tp, 0x15, 0x00ef); | |
+ mdio_write(tp, 0x19, 0xc60b); | |
+ mdio_write(tp, 0x15, 0x00f0); | |
+ mdio_write(tp, 0x19, 0x00fc); | |
+ mdio_write(tp, 0x15, 0x00f1); | |
+ mdio_write(tp, 0x19, 0x30f6); | |
+ mdio_write(tp, 0x15, 0x00f2); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x00f3); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x00f4); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x00f5); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x00f6); | |
+ mdio_write(tp, 0x19, 0x4408); | |
+ mdio_write(tp, 0x15, 0x00f7); | |
+ mdio_write(tp, 0x19, 0x480b); | |
+ mdio_write(tp, 0x15, 0x00f8); | |
+ mdio_write(tp, 0x19, 0x6f03); | |
+ mdio_write(tp, 0x15, 0x00f9); | |
+ mdio_write(tp, 0x19, 0x405f); | |
+ mdio_write(tp, 0x15, 0x00fa); | |
+ mdio_write(tp, 0x19, 0x4448); | |
+ mdio_write(tp, 0x15, 0x00fb); | |
+ mdio_write(tp, 0x19, 0x4020); | |
+ mdio_write(tp, 0x15, 0x00fc); | |
+ mdio_write(tp, 0x19, 0x4468); | |
+ mdio_write(tp, 0x15, 0x00fd); | |
+ mdio_write(tp, 0x19, 0x9c03); | |
+ mdio_write(tp, 0x15, 0x00fe); | |
+ mdio_write(tp, 0x19, 0x6f07); | |
+ mdio_write(tp, 0x15, 0x00ff); | |
+ mdio_write(tp, 0x19, 0x58a0); | |
+ mdio_write(tp, 0x15, 0x0100); | |
+ mdio_write(tp, 0x19, 0xd6d1); | |
+ mdio_write(tp, 0x15, 0x0101); | |
+ mdio_write(tp, 0x19, 0x0004); | |
+ mdio_write(tp, 0x15, 0x0102); | |
+ mdio_write(tp, 0x19, 0xc137); | |
+ mdio_write(tp, 0x15, 0x0103); | |
+ mdio_write(tp, 0x19, 0x0002); | |
+ mdio_write(tp, 0x15, 0x0104); | |
+ mdio_write(tp, 0x19, 0xa0e5); | |
+ mdio_write(tp, 0x15, 0x0105); | |
+ mdio_write(tp, 0x19, 0x9df8); | |
+ mdio_write(tp, 0x15, 0x0106); | |
+ mdio_write(tp, 0x19, 0x30c6); | |
+ mdio_write(tp, 0x15, 0x0107); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0108); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0109); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x010a); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x010b); | |
+ mdio_write(tp, 0x19, 0x4808); | |
+ mdio_write(tp, 0x15, 0x010c); | |
+ mdio_write(tp, 0x19, 0xc32d); | |
+ mdio_write(tp, 0x15, 0x010d); | |
+ mdio_write(tp, 0x19, 0x0003); | |
+ mdio_write(tp, 0x15, 0x010e); | |
+ mdio_write(tp, 0x19, 0xc8b3); | |
+ mdio_write(tp, 0x15, 0x010f); | |
+ mdio_write(tp, 0x19, 0x00fc); | |
+ mdio_write(tp, 0x15, 0x0110); | |
+ mdio_write(tp, 0x19, 0x4400); | |
+ mdio_write(tp, 0x15, 0x0111); | |
+ mdio_write(tp, 0x19, 0x3116); | |
+ mdio_write(tp, 0x15, 0x0112); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0113); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0114); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0115); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0116); | |
+ mdio_write(tp, 0x19, 0x4803); | |
+ mdio_write(tp, 0x15, 0x0117); | |
+ mdio_write(tp, 0x19, 0x7c03); | |
+ mdio_write(tp, 0x15, 0x0118); | |
+ mdio_write(tp, 0x19, 0x6c02); | |
+ mdio_write(tp, 0x15, 0x0119); | |
+ mdio_write(tp, 0x19, 0x7c04); | |
+ mdio_write(tp, 0x15, 0x011a); | |
+ mdio_write(tp, 0x19, 0x6000); | |
+ mdio_write(tp, 0x15, 0x011b); | |
+ mdio_write(tp, 0x19, 0x5cf7); | |
+ mdio_write(tp, 0x15, 0x011c); | |
+ mdio_write(tp, 0x19, 0x7c2a); | |
+ mdio_write(tp, 0x15, 0x011d); | |
+ mdio_write(tp, 0x19, 0x5800); | |
+ mdio_write(tp, 0x15, 0x011e); | |
+ mdio_write(tp, 0x19, 0x5400); | |
+ mdio_write(tp, 0x15, 0x011f); | |
+ mdio_write(tp, 0x19, 0x7c08); | |
+ mdio_write(tp, 0x15, 0x0120); | |
+ mdio_write(tp, 0x19, 0x74f0); | |
+ mdio_write(tp, 0x15, 0x0121); | |
+ mdio_write(tp, 0x19, 0x4019); | |
+ mdio_write(tp, 0x15, 0x0122); | |
+ mdio_write(tp, 0x19, 0x440d); | |
+ mdio_write(tp, 0x15, 0x0123); | |
+ mdio_write(tp, 0x19, 0xb6c1); | |
+ mdio_write(tp, 0x15, 0x0124); | |
+ mdio_write(tp, 0x19, 0xc05b); | |
+ mdio_write(tp, 0x15, 0x0125); | |
+ mdio_write(tp, 0x19, 0x00bf); | |
+ mdio_write(tp, 0x15, 0x0126); | |
+ mdio_write(tp, 0x19, 0xc025); | |
+ mdio_write(tp, 0x15, 0x0127); | |
+ mdio_write(tp, 0x19, 0x00bd); | |
+ mdio_write(tp, 0x15, 0x0128); | |
+ mdio_write(tp, 0x19, 0xc603); | |
+ mdio_write(tp, 0x15, 0x0129); | |
+ mdio_write(tp, 0x19, 0x00bb); | |
+ mdio_write(tp, 0x15, 0x012a); | |
+ mdio_write(tp, 0x19, 0x8805); | |
+ mdio_write(tp, 0x15, 0x012b); | |
+ mdio_write(tp, 0x19, 0x7801); | |
+ mdio_write(tp, 0x15, 0x012c); | |
+ mdio_write(tp, 0x19, 0x4001); | |
+ mdio_write(tp, 0x15, 0x012d); | |
+ mdio_write(tp, 0x19, 0x7800); | |
+ mdio_write(tp, 0x15, 0x012e); | |
+ mdio_write(tp, 0x19, 0xa3dd); | |
+ mdio_write(tp, 0x15, 0x012f); | |
+ mdio_write(tp, 0x19, 0x7c03); | |
+ mdio_write(tp, 0x15, 0x0130); | |
+ mdio_write(tp, 0x19, 0x6c03); | |
+ mdio_write(tp, 0x15, 0x0131); | |
+ mdio_write(tp, 0x19, 0x8407); | |
+ mdio_write(tp, 0x15, 0x0132); | |
+ mdio_write(tp, 0x19, 0x7c03); | |
+ mdio_write(tp, 0x15, 0x0133); | |
+ mdio_write(tp, 0x19, 0x6c02); | |
+ mdio_write(tp, 0x15, 0x0134); | |
+ mdio_write(tp, 0x19, 0xd9b8); | |
+ mdio_write(tp, 0x15, 0x0135); | |
+ mdio_write(tp, 0x19, 0x0003); | |
+ mdio_write(tp, 0x15, 0x0136); | |
+ mdio_write(tp, 0x19, 0xc240); | |
+ mdio_write(tp, 0x15, 0x0137); | |
+ mdio_write(tp, 0x19, 0x0015); | |
+ mdio_write(tp, 0x15, 0x0138); | |
+ mdio_write(tp, 0x19, 0x7c03); | |
+ mdio_write(tp, 0x15, 0x0139); | |
+ mdio_write(tp, 0x19, 0x6c02); | |
+ mdio_write(tp, 0x15, 0x013a); | |
+ mdio_write(tp, 0x19, 0x9ae9); | |
+ mdio_write(tp, 0x15, 0x013b); | |
+ mdio_write(tp, 0x19, 0x3140); | |
+ mdio_write(tp, 0x15, 0x013c); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x013d); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x013e); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x013f); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0140); | |
+ mdio_write(tp, 0x19, 0x4807); | |
+ mdio_write(tp, 0x15, 0x0141); | |
+ mdio_write(tp, 0x19, 0x4004); | |
+ mdio_write(tp, 0x15, 0x0142); | |
+ mdio_write(tp, 0x19, 0x4410); | |
+ mdio_write(tp, 0x15, 0x0143); | |
+ mdio_write(tp, 0x19, 0x7c0c); | |
+ mdio_write(tp, 0x15, 0x0144); | |
+ mdio_write(tp, 0x19, 0x600c); | |
+ mdio_write(tp, 0x15, 0x0145); | |
+ mdio_write(tp, 0x19, 0x9b00); | |
+ mdio_write(tp, 0x15, 0x0146); | |
+ mdio_write(tp, 0x19, 0xa68f); | |
+ mdio_write(tp, 0x15, 0x0147); | |
+ mdio_write(tp, 0x19, 0x3116); | |
+ mdio_write(tp, 0x15, 0x0148); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0149); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x014a); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x014b); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x014c); | |
+ mdio_write(tp, 0x19, 0x4804); | |
+ mdio_write(tp, 0x15, 0x014d); | |
+ mdio_write(tp, 0x19, 0x54c0); | |
+ mdio_write(tp, 0x15, 0x014e); | |
+ mdio_write(tp, 0x19, 0xb703); | |
+ mdio_write(tp, 0x15, 0x014f); | |
+ mdio_write(tp, 0x19, 0x5cff); | |
+ mdio_write(tp, 0x15, 0x0150); | |
+ mdio_write(tp, 0x19, 0x315f); | |
+ mdio_write(tp, 0x15, 0x0151); | |
+ mdio_write(tp, 0x19, 0x7c08); | |
+ mdio_write(tp, 0x15, 0x0152); | |
+ mdio_write(tp, 0x19, 0x74f8); | |
+ mdio_write(tp, 0x15, 0x0153); | |
+ mdio_write(tp, 0x19, 0x6421); | |
+ mdio_write(tp, 0x15, 0x0154); | |
+ mdio_write(tp, 0x19, 0x7c08); | |
+ mdio_write(tp, 0x15, 0x0155); | |
+ mdio_write(tp, 0x19, 0x6000); | |
+ mdio_write(tp, 0x15, 0x0156); | |
+ mdio_write(tp, 0x19, 0x4003); | |
+ mdio_write(tp, 0x15, 0x0157); | |
+ mdio_write(tp, 0x19, 0x4418); | |
+ mdio_write(tp, 0x15, 0x0158); | |
+ mdio_write(tp, 0x19, 0x9b00); | |
+ mdio_write(tp, 0x15, 0x0159); | |
+ mdio_write(tp, 0x19, 0x6461); | |
+ mdio_write(tp, 0x15, 0x015a); | |
+ mdio_write(tp, 0x19, 0x64e1); | |
+ mdio_write(tp, 0x15, 0x015b); | |
+ mdio_write(tp, 0x19, 0x7c20); | |
+ mdio_write(tp, 0x15, 0x015c); | |
+ mdio_write(tp, 0x19, 0x5820); | |
+ mdio_write(tp, 0x15, 0x015d); | |
+ mdio_write(tp, 0x19, 0x5ccf); | |
+ mdio_write(tp, 0x15, 0x015e); | |
+ mdio_write(tp, 0x19, 0x7050); | |
+ mdio_write(tp, 0x15, 0x015f); | |
+ mdio_write(tp, 0x19, 0xd9b8); | |
+ mdio_write(tp, 0x15, 0x0160); | |
+ mdio_write(tp, 0x19, 0x0008); | |
+ mdio_write(tp, 0x15, 0x0161); | |
+ mdio_write(tp, 0x19, 0xdab1); | |
+ mdio_write(tp, 0x15, 0x0162); | |
+ mdio_write(tp, 0x19, 0x0015); | |
+ mdio_write(tp, 0x15, 0x0163); | |
+ mdio_write(tp, 0x19, 0xc244); | |
+ mdio_write(tp, 0x15, 0x0164); | |
+ mdio_write(tp, 0x19, 0x0013); | |
+ mdio_write(tp, 0x15, 0x0165); | |
+ mdio_write(tp, 0x19, 0xc021); | |
+ mdio_write(tp, 0x15, 0x0166); | |
+ mdio_write(tp, 0x19, 0x00f9); | |
+ mdio_write(tp, 0x15, 0x0167); | |
+ mdio_write(tp, 0x19, 0x3177); | |
+ mdio_write(tp, 0x15, 0x0168); | |
+ mdio_write(tp, 0x19, 0x5cf7); | |
+ mdio_write(tp, 0x15, 0x0169); | |
+ mdio_write(tp, 0x19, 0x4010); | |
+ mdio_write(tp, 0x15, 0x016a); | |
+ mdio_write(tp, 0x19, 0x4428); | |
+ mdio_write(tp, 0x15, 0x016b); | |
+ mdio_write(tp, 0x19, 0x9c00); | |
+ mdio_write(tp, 0x15, 0x016c); | |
+ mdio_write(tp, 0x19, 0x7c08); | |
+ mdio_write(tp, 0x15, 0x016d); | |
+ mdio_write(tp, 0x19, 0x6008); | |
+ mdio_write(tp, 0x15, 0x016e); | |
+ mdio_write(tp, 0x19, 0x7c08); | |
+ mdio_write(tp, 0x15, 0x016f); | |
+ mdio_write(tp, 0x19, 0x74f0); | |
+ mdio_write(tp, 0x15, 0x0170); | |
+ mdio_write(tp, 0x19, 0x6461); | |
+ mdio_write(tp, 0x15, 0x0171); | |
+ mdio_write(tp, 0x19, 0x6421); | |
+ mdio_write(tp, 0x15, 0x0172); | |
+ mdio_write(tp, 0x19, 0x64a1); | |
+ mdio_write(tp, 0x15, 0x0173); | |
+ mdio_write(tp, 0x19, 0x3116); | |
+ mdio_write(tp, 0x15, 0x0174); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0175); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0176); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0177); | |
+ mdio_write(tp, 0x19, 0x4805); | |
+ mdio_write(tp, 0x15, 0x0178); | |
+ mdio_write(tp, 0x19, 0xa103); | |
+ mdio_write(tp, 0x15, 0x0179); | |
+ mdio_write(tp, 0x19, 0x7c02); | |
+ mdio_write(tp, 0x15, 0x017a); | |
+ mdio_write(tp, 0x19, 0x6002); | |
+ mdio_write(tp, 0x15, 0x017b); | |
+ mdio_write(tp, 0x19, 0x7e00); | |
+ mdio_write(tp, 0x15, 0x017c); | |
+ mdio_write(tp, 0x19, 0x5400); | |
+ mdio_write(tp, 0x15, 0x017d); | |
+ mdio_write(tp, 0x19, 0x7c6b); | |
+ mdio_write(tp, 0x15, 0x017e); | |
+ mdio_write(tp, 0x19, 0x5c63); | |
+ mdio_write(tp, 0x15, 0x017f); | |
+ mdio_write(tp, 0x19, 0x407d); | |
+ mdio_write(tp, 0x15, 0x0180); | |
+ mdio_write(tp, 0x19, 0xa602); | |
+ mdio_write(tp, 0x15, 0x0181); | |
+ mdio_write(tp, 0x19, 0x4001); | |
+ mdio_write(tp, 0x15, 0x0182); | |
+ mdio_write(tp, 0x19, 0x4420); | |
+ mdio_write(tp, 0x15, 0x0183); | |
+ mdio_write(tp, 0x19, 0x4020); | |
+ mdio_write(tp, 0x15, 0x0184); | |
+ mdio_write(tp, 0x19, 0x44a1); | |
+ mdio_write(tp, 0x15, 0x0185); | |
+ mdio_write(tp, 0x19, 0xd6e0); | |
+ mdio_write(tp, 0x15, 0x0186); | |
+ mdio_write(tp, 0x19, 0x0009); | |
+ mdio_write(tp, 0x15, 0x0187); | |
+ mdio_write(tp, 0x19, 0x9efe); | |
+ mdio_write(tp, 0x15, 0x0188); | |
+ mdio_write(tp, 0x19, 0x7c02); | |
+ mdio_write(tp, 0x15, 0x0189); | |
+ mdio_write(tp, 0x19, 0x6000); | |
+ mdio_write(tp, 0x15, 0x018a); | |
+ mdio_write(tp, 0x19, 0x9c00); | |
+ mdio_write(tp, 0x15, 0x018b); | |
+ mdio_write(tp, 0x19, 0x318f); | |
+ mdio_write(tp, 0x15, 0x018c); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x018d); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x018e); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x018f); | |
+ mdio_write(tp, 0x19, 0x4806); | |
+ mdio_write(tp, 0x15, 0x0190); | |
+ mdio_write(tp, 0x19, 0x7c10); | |
+ mdio_write(tp, 0x15, 0x0191); | |
+ mdio_write(tp, 0x19, 0x5c10); | |
+ mdio_write(tp, 0x15, 0x0192); | |
+ mdio_write(tp, 0x19, 0x40fa); | |
+ mdio_write(tp, 0x15, 0x0193); | |
+ mdio_write(tp, 0x19, 0xa602); | |
+ mdio_write(tp, 0x15, 0x0194); | |
+ mdio_write(tp, 0x19, 0x4010); | |
+ mdio_write(tp, 0x15, 0x0195); | |
+ mdio_write(tp, 0x19, 0x4440); | |
+ mdio_write(tp, 0x15, 0x0196); | |
+ mdio_write(tp, 0x19, 0x9d00); | |
+ mdio_write(tp, 0x15, 0x0197); | |
+ mdio_write(tp, 0x19, 0x7c80); | |
+ mdio_write(tp, 0x15, 0x0198); | |
+ mdio_write(tp, 0x19, 0x6400); | |
+ mdio_write(tp, 0x15, 0x0199); | |
+ mdio_write(tp, 0x19, 0x4003); | |
+ mdio_write(tp, 0x15, 0x019a); | |
+ mdio_write(tp, 0x19, 0x4540); | |
+ mdio_write(tp, 0x15, 0x019b); | |
+ mdio_write(tp, 0x19, 0x7c08); | |
+ mdio_write(tp, 0x15, 0x019c); | |
+ mdio_write(tp, 0x19, 0x6008); | |
+ mdio_write(tp, 0x15, 0x019d); | |
+ mdio_write(tp, 0x19, 0x9f00); | |
+ mdio_write(tp, 0x15, 0x019e); | |
+ mdio_write(tp, 0x19, 0x7c40); | |
+ mdio_write(tp, 0x15, 0x019f); | |
+ mdio_write(tp, 0x19, 0x6400); | |
+ mdio_write(tp, 0x15, 0x01a0); | |
+ mdio_write(tp, 0x19, 0x7c80); | |
+ mdio_write(tp, 0x15, 0x01a1); | |
+ mdio_write(tp, 0x19, 0x6480); | |
+ mdio_write(tp, 0x15, 0x01a2); | |
+ mdio_write(tp, 0x19, 0x3140); | |
+ mdio_write(tp, 0x15, 0x01a3); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x01a4); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x01a5); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x01a6); | |
+ mdio_write(tp, 0x19, 0x4400); | |
+ mdio_write(tp, 0x15, 0x01a7); | |
+ mdio_write(tp, 0x19, 0x7c0b); | |
+ mdio_write(tp, 0x15, 0x01a8); | |
+ mdio_write(tp, 0x19, 0x6c01); | |
+ mdio_write(tp, 0x15, 0x01a9); | |
+ mdio_write(tp, 0x19, 0x64a8); | |
+ mdio_write(tp, 0x15, 0x01aa); | |
+ mdio_write(tp, 0x19, 0x6800); | |
+ mdio_write(tp, 0x15, 0x01ab); | |
+ mdio_write(tp, 0x19, 0x5cf0); | |
+ mdio_write(tp, 0x15, 0x01ac); | |
+ mdio_write(tp, 0x19, 0x588f); | |
+ mdio_write(tp, 0x15, 0x01ad); | |
+ mdio_write(tp, 0x19, 0xb628); | |
+ mdio_write(tp, 0x15, 0x01ae); | |
+ mdio_write(tp, 0x19, 0xc053); | |
+ mdio_write(tp, 0x15, 0x01af); | |
+ mdio_write(tp, 0x19, 0x0026); | |
+ mdio_write(tp, 0x15, 0x01b0); | |
+ mdio_write(tp, 0x19, 0xc02d); | |
+ mdio_write(tp, 0x15, 0x01b1); | |
+ mdio_write(tp, 0x19, 0x0024); | |
+ mdio_write(tp, 0x15, 0x01b2); | |
+ mdio_write(tp, 0x19, 0xc603); | |
+ mdio_write(tp, 0x15, 0x01b3); | |
+ mdio_write(tp, 0x19, 0x0022); | |
+ mdio_write(tp, 0x15, 0x01b4); | |
+ mdio_write(tp, 0x19, 0x8cf9); | |
+ mdio_write(tp, 0x15, 0x01b5); | |
+ mdio_write(tp, 0x19, 0x31ba); | |
+ mdio_write(tp, 0x15, 0x01b6); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x01b7); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x01b8); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x01b9); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x01ba); | |
+ mdio_write(tp, 0x19, 0x4400); | |
+ mdio_write(tp, 0x15, 0x01bb); | |
+ mdio_write(tp, 0x19, 0x5420); | |
+ mdio_write(tp, 0x15, 0x01bc); | |
+ mdio_write(tp, 0x19, 0x4811); | |
+ mdio_write(tp, 0x15, 0x01bd); | |
+ mdio_write(tp, 0x19, 0x5000); | |
+ mdio_write(tp, 0x15, 0x01be); | |
+ mdio_write(tp, 0x19, 0x4801); | |
+ mdio_write(tp, 0x15, 0x01bf); | |
+ mdio_write(tp, 0x19, 0x6800); | |
+ mdio_write(tp, 0x15, 0x01c0); | |
+ mdio_write(tp, 0x19, 0x31f5); | |
+ mdio_write(tp, 0x15, 0x01c1); | |
+ mdio_write(tp, 0x19, 0xb614); | |
+ mdio_write(tp, 0x15, 0x01c2); | |
+ mdio_write(tp, 0x19, 0x8ce4); | |
+ mdio_write(tp, 0x15, 0x01c3); | |
+ mdio_write(tp, 0x19, 0xb30c); | |
+ mdio_write(tp, 0x15, 0x01c4); | |
+ mdio_write(tp, 0x19, 0x7c03); | |
+ mdio_write(tp, 0x15, 0x01c5); | |
+ mdio_write(tp, 0x19, 0x6c02); | |
+ mdio_write(tp, 0x15, 0x01c6); | |
+ mdio_write(tp, 0x19, 0x8206); | |
+ mdio_write(tp, 0x15, 0x01c7); | |
+ mdio_write(tp, 0x19, 0x7c03); | |
+ mdio_write(tp, 0x15, 0x01c8); | |
+ mdio_write(tp, 0x19, 0x6c00); | |
+ mdio_write(tp, 0x15, 0x01c9); | |
+ mdio_write(tp, 0x19, 0x7c04); | |
+ mdio_write(tp, 0x15, 0x01ca); | |
+ mdio_write(tp, 0x19, 0x7404); | |
+ mdio_write(tp, 0x15, 0x01cb); | |
+ mdio_write(tp, 0x19, 0x31c0); | |
+ mdio_write(tp, 0x15, 0x01cc); | |
+ mdio_write(tp, 0x19, 0x7c04); | |
+ mdio_write(tp, 0x15, 0x01cd); | |
+ mdio_write(tp, 0x19, 0x7400); | |
+ mdio_write(tp, 0x15, 0x01ce); | |
+ mdio_write(tp, 0x19, 0x31c0); | |
+ mdio_write(tp, 0x15, 0x01cf); | |
+ mdio_write(tp, 0x19, 0x8df1); | |
+ mdio_write(tp, 0x15, 0x01d0); | |
+ mdio_write(tp, 0x19, 0x3248); | |
+ mdio_write(tp, 0x15, 0x01d1); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x01d2); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x01d3); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x01d4); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x01d5); | |
+ mdio_write(tp, 0x19, 0x4400); | |
+ mdio_write(tp, 0x15, 0x01d6); | |
+ mdio_write(tp, 0x19, 0x7c03); | |
+ mdio_write(tp, 0x15, 0x01d7); | |
+ mdio_write(tp, 0x19, 0x6c03); | |
+ mdio_write(tp, 0x15, 0x01d8); | |
+ mdio_write(tp, 0x19, 0x7670); | |
+ mdio_write(tp, 0x15, 0x01d9); | |
+ mdio_write(tp, 0x19, 0x4023); | |
+ mdio_write(tp, 0x15, 0x01da); | |
+ mdio_write(tp, 0x19, 0x4500); | |
+ mdio_write(tp, 0x15, 0x01db); | |
+ mdio_write(tp, 0x19, 0x4069); | |
+ mdio_write(tp, 0x15, 0x01dc); | |
+ mdio_write(tp, 0x19, 0x4580); | |
+ mdio_write(tp, 0x15, 0x01dd); | |
+ mdio_write(tp, 0x19, 0x9f00); | |
+ mdio_write(tp, 0x15, 0x01de); | |
+ mdio_write(tp, 0x19, 0xcff5); | |
+ mdio_write(tp, 0x15, 0x01df); | |
+ mdio_write(tp, 0x19, 0x00ff); | |
+ mdio_write(tp, 0x15, 0x01e0); | |
+ mdio_write(tp, 0x19, 0x76f0); | |
+ mdio_write(tp, 0x15, 0x01e1); | |
+ mdio_write(tp, 0x19, 0x4400); | |
+ mdio_write(tp, 0x15, 0x01e2); | |
+ mdio_write(tp, 0x19, 0x4023); | |
+ mdio_write(tp, 0x15, 0x01e3); | |
+ mdio_write(tp, 0x19, 0x4500); | |
+ mdio_write(tp, 0x15, 0x01e4); | |
+ mdio_write(tp, 0x19, 0x4069); | |
+ mdio_write(tp, 0x15, 0x01e5); | |
+ mdio_write(tp, 0x19, 0x4580); | |
+ mdio_write(tp, 0x15, 0x01e6); | |
+ mdio_write(tp, 0x19, 0x9f00); | |
+ mdio_write(tp, 0x15, 0x01e7); | |
+ mdio_write(tp, 0x19, 0xd0f5); | |
+ mdio_write(tp, 0x15, 0x01e8); | |
+ mdio_write(tp, 0x19, 0x00ff); | |
+ mdio_write(tp, 0x15, 0x01e9); | |
+ mdio_write(tp, 0x19, 0x4400); | |
+ mdio_write(tp, 0x15, 0x01ea); | |
+ mdio_write(tp, 0x19, 0x7c03); | |
+ mdio_write(tp, 0x15, 0x01eb); | |
+ mdio_write(tp, 0x19, 0x6800); | |
+ mdio_write(tp, 0x15, 0x01ec); | |
+ mdio_write(tp, 0x19, 0x66a0); | |
+ mdio_write(tp, 0x15, 0x01ed); | |
+ mdio_write(tp, 0x19, 0x8300); | |
+ mdio_write(tp, 0x15, 0x01ee); | |
+ mdio_write(tp, 0x19, 0x74f0); | |
+ mdio_write(tp, 0x15, 0x01ef); | |
+ mdio_write(tp, 0x19, 0x3006); | |
+ mdio_write(tp, 0x15, 0x01f0); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x01f1); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x01f2); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x01f3); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x01f4); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x01f5); | |
+ mdio_write(tp, 0x19, 0x7c03); | |
+ mdio_write(tp, 0x15, 0x01f6); | |
+ mdio_write(tp, 0x19, 0x6c02); | |
+ mdio_write(tp, 0x15, 0x01f7); | |
+ mdio_write(tp, 0x19, 0x409d); | |
+ mdio_write(tp, 0x15, 0x01f8); | |
+ mdio_write(tp, 0x19, 0x7c87); | |
+ mdio_write(tp, 0x15, 0x01f9); | |
+ mdio_write(tp, 0x19, 0xae14); | |
+ mdio_write(tp, 0x15, 0x01fa); | |
+ mdio_write(tp, 0x19, 0x4400); | |
+ mdio_write(tp, 0x15, 0x01fb); | |
+ mdio_write(tp, 0x19, 0x7c40); | |
+ mdio_write(tp, 0x15, 0x01fc); | |
+ mdio_write(tp, 0x19, 0x6800); | |
+ mdio_write(tp, 0x15, 0x01fd); | |
+ mdio_write(tp, 0x19, 0x7801); | |
+ mdio_write(tp, 0x15, 0x01fe); | |
+ mdio_write(tp, 0x19, 0x980e); | |
+ mdio_write(tp, 0x15, 0x01ff); | |
+ mdio_write(tp, 0x19, 0x930c); | |
+ mdio_write(tp, 0x15, 0x0200); | |
+ mdio_write(tp, 0x19, 0x9206); | |
+ mdio_write(tp, 0x15, 0x0201); | |
+ mdio_write(tp, 0x19, 0x4002); | |
+ mdio_write(tp, 0x15, 0x0202); | |
+ mdio_write(tp, 0x19, 0x7800); | |
+ mdio_write(tp, 0x15, 0x0203); | |
+ mdio_write(tp, 0x19, 0x588f); | |
+ mdio_write(tp, 0x15, 0x0204); | |
+ mdio_write(tp, 0x19, 0x5520); | |
+ mdio_write(tp, 0x15, 0x0205); | |
+ mdio_write(tp, 0x19, 0x320c); | |
+ mdio_write(tp, 0x15, 0x0206); | |
+ mdio_write(tp, 0x19, 0x4000); | |
+ mdio_write(tp, 0x15, 0x0207); | |
+ mdio_write(tp, 0x19, 0x7800); | |
+ mdio_write(tp, 0x15, 0x0208); | |
+ mdio_write(tp, 0x19, 0x588d); | |
+ mdio_write(tp, 0x15, 0x0209); | |
+ mdio_write(tp, 0x19, 0x5500); | |
+ mdio_write(tp, 0x15, 0x020a); | |
+ mdio_write(tp, 0x19, 0x320c); | |
+ mdio_write(tp, 0x15, 0x020b); | |
+ mdio_write(tp, 0x19, 0x4002); | |
+ mdio_write(tp, 0x15, 0x020c); | |
+ mdio_write(tp, 0x19, 0x3220); | |
+ mdio_write(tp, 0x15, 0x020d); | |
+ mdio_write(tp, 0x19, 0x4480); | |
+ mdio_write(tp, 0x15, 0x020e); | |
+ mdio_write(tp, 0x19, 0x9e03); | |
+ mdio_write(tp, 0x15, 0x020f); | |
+ mdio_write(tp, 0x19, 0x7c40); | |
+ mdio_write(tp, 0x15, 0x0210); | |
+ mdio_write(tp, 0x19, 0x6840); | |
+ mdio_write(tp, 0x15, 0x0211); | |
+ mdio_write(tp, 0x19, 0x7801); | |
+ mdio_write(tp, 0x15, 0x0212); | |
+ mdio_write(tp, 0x19, 0x980e); | |
+ mdio_write(tp, 0x15, 0x0213); | |
+ mdio_write(tp, 0x19, 0x930c); | |
+ mdio_write(tp, 0x15, 0x0214); | |
+ mdio_write(tp, 0x19, 0x9206); | |
+ mdio_write(tp, 0x15, 0x0215); | |
+ mdio_write(tp, 0x19, 0x4000); | |
+ mdio_write(tp, 0x15, 0x0216); | |
+ mdio_write(tp, 0x19, 0x7800); | |
+ mdio_write(tp, 0x15, 0x0217); | |
+ mdio_write(tp, 0x19, 0x588f); | |
+ mdio_write(tp, 0x15, 0x0218); | |
+ mdio_write(tp, 0x19, 0x5520); | |
+ mdio_write(tp, 0x15, 0x0219); | |
+ mdio_write(tp, 0x19, 0x3220); | |
+ mdio_write(tp, 0x15, 0x021a); | |
+ mdio_write(tp, 0x19, 0x4002); | |
+ mdio_write(tp, 0x15, 0x021b); | |
+ mdio_write(tp, 0x19, 0x7800); | |
+ mdio_write(tp, 0x15, 0x021c); | |
+ mdio_write(tp, 0x19, 0x588d); | |
+ mdio_write(tp, 0x15, 0x021d); | |
+ mdio_write(tp, 0x19, 0x5540); | |
+ mdio_write(tp, 0x15, 0x021e); | |
+ mdio_write(tp, 0x19, 0x3220); | |
+ mdio_write(tp, 0x15, 0x021f); | |
+ mdio_write(tp, 0x19, 0x4000); | |
+ mdio_write(tp, 0x15, 0x0220); | |
+ mdio_write(tp, 0x19, 0x7800); | |
+ mdio_write(tp, 0x15, 0x0221); | |
+ mdio_write(tp, 0x19, 0x7c03); | |
+ mdio_write(tp, 0x15, 0x0222); | |
+ mdio_write(tp, 0x19, 0x6c00); | |
+ mdio_write(tp, 0x15, 0x0223); | |
+ mdio_write(tp, 0x19, 0x3231); | |
+ mdio_write(tp, 0x15, 0x0224); | |
+ mdio_write(tp, 0x19, 0xab06); | |
+ mdio_write(tp, 0x15, 0x0225); | |
+ mdio_write(tp, 0x19, 0xbf08); | |
+ mdio_write(tp, 0x15, 0x0226); | |
+ mdio_write(tp, 0x19, 0x4076); | |
+ mdio_write(tp, 0x15, 0x0227); | |
+ mdio_write(tp, 0x19, 0x7d07); | |
+ mdio_write(tp, 0x15, 0x0228); | |
+ mdio_write(tp, 0x19, 0x4502); | |
+ mdio_write(tp, 0x15, 0x0229); | |
+ mdio_write(tp, 0x19, 0x3231); | |
+ mdio_write(tp, 0x15, 0x022a); | |
+ mdio_write(tp, 0x19, 0x7d80); | |
+ mdio_write(tp, 0x15, 0x022b); | |
+ mdio_write(tp, 0x19, 0x5180); | |
+ mdio_write(tp, 0x15, 0x022c); | |
+ mdio_write(tp, 0x19, 0x322f); | |
+ mdio_write(tp, 0x15, 0x022d); | |
+ mdio_write(tp, 0x19, 0x7d80); | |
+ mdio_write(tp, 0x15, 0x022e); | |
+ mdio_write(tp, 0x19, 0x5000); | |
+ mdio_write(tp, 0x15, 0x022f); | |
+ mdio_write(tp, 0x19, 0x7d07); | |
+ mdio_write(tp, 0x15, 0x0230); | |
+ mdio_write(tp, 0x19, 0x4402); | |
+ mdio_write(tp, 0x15, 0x0231); | |
+ mdio_write(tp, 0x19, 0x7c03); | |
+ mdio_write(tp, 0x15, 0x0232); | |
+ mdio_write(tp, 0x19, 0x6c02); | |
+ mdio_write(tp, 0x15, 0x0233); | |
+ mdio_write(tp, 0x19, 0x7c03); | |
+ mdio_write(tp, 0x15, 0x0234); | |
+ mdio_write(tp, 0x19, 0xb309); | |
+ mdio_write(tp, 0x15, 0x0235); | |
+ mdio_write(tp, 0x19, 0xb204); | |
+ mdio_write(tp, 0x15, 0x0236); | |
+ mdio_write(tp, 0x19, 0xb105); | |
+ mdio_write(tp, 0x15, 0x0237); | |
+ mdio_write(tp, 0x19, 0x6c00); | |
+ mdio_write(tp, 0x15, 0x0238); | |
+ mdio_write(tp, 0x19, 0x31c1); | |
+ mdio_write(tp, 0x15, 0x0239); | |
+ mdio_write(tp, 0x19, 0x6c00); | |
+ mdio_write(tp, 0x15, 0x023a); | |
+ mdio_write(tp, 0x19, 0x3261); | |
+ mdio_write(tp, 0x15, 0x023b); | |
+ mdio_write(tp, 0x19, 0x6c00); | |
+ mdio_write(tp, 0x15, 0x023c); | |
+ mdio_write(tp, 0x19, 0x3250); | |
+ mdio_write(tp, 0x15, 0x023d); | |
+ mdio_write(tp, 0x19, 0xb203); | |
+ mdio_write(tp, 0x15, 0x023e); | |
+ mdio_write(tp, 0x19, 0x6c00); | |
+ mdio_write(tp, 0x15, 0x023f); | |
+ mdio_write(tp, 0x19, 0x327a); | |
+ mdio_write(tp, 0x15, 0x0240); | |
+ mdio_write(tp, 0x19, 0x6c00); | |
+ mdio_write(tp, 0x15, 0x0241); | |
+ mdio_write(tp, 0x19, 0x3293); | |
+ mdio_write(tp, 0x15, 0x0242); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0243); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0244); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0245); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0246); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0247); | |
+ mdio_write(tp, 0x19, 0x32a3); | |
+ mdio_write(tp, 0x15, 0x0248); | |
+ mdio_write(tp, 0x19, 0x5520); | |
+ mdio_write(tp, 0x15, 0x0249); | |
+ mdio_write(tp, 0x19, 0x403d); | |
+ mdio_write(tp, 0x15, 0x024a); | |
+ mdio_write(tp, 0x19, 0x440c); | |
+ mdio_write(tp, 0x15, 0x024b); | |
+ mdio_write(tp, 0x19, 0x4812); | |
+ mdio_write(tp, 0x15, 0x024c); | |
+ mdio_write(tp, 0x19, 0x5001); | |
+ mdio_write(tp, 0x15, 0x024d); | |
+ mdio_write(tp, 0x19, 0x4802); | |
+ mdio_write(tp, 0x15, 0x024e); | |
+ mdio_write(tp, 0x19, 0x6880); | |
+ mdio_write(tp, 0x15, 0x024f); | |
+ mdio_write(tp, 0x19, 0x31f5); | |
+ mdio_write(tp, 0x15, 0x0250); | |
+ mdio_write(tp, 0x19, 0xb685); | |
+ mdio_write(tp, 0x15, 0x0251); | |
+ mdio_write(tp, 0x19, 0x801c); | |
+ mdio_write(tp, 0x15, 0x0252); | |
+ mdio_write(tp, 0x19, 0xbaf5); | |
+ mdio_write(tp, 0x15, 0x0253); | |
+ mdio_write(tp, 0x19, 0xc07c); | |
+ mdio_write(tp, 0x15, 0x0254); | |
+ mdio_write(tp, 0x19, 0x00fb); | |
+ mdio_write(tp, 0x15, 0x0255); | |
+ mdio_write(tp, 0x19, 0x325a); | |
+ mdio_write(tp, 0x15, 0x0256); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0257); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0258); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0259); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x025a); | |
+ mdio_write(tp, 0x19, 0x481a); | |
+ mdio_write(tp, 0x15, 0x025b); | |
+ mdio_write(tp, 0x19, 0x5001); | |
+ mdio_write(tp, 0x15, 0x025c); | |
+ mdio_write(tp, 0x19, 0x401b); | |
+ mdio_write(tp, 0x15, 0x025d); | |
+ mdio_write(tp, 0x19, 0x480a); | |
+ mdio_write(tp, 0x15, 0x025e); | |
+ mdio_write(tp, 0x19, 0x4418); | |
+ mdio_write(tp, 0x15, 0x025f); | |
+ mdio_write(tp, 0x19, 0x6900); | |
+ mdio_write(tp, 0x15, 0x0260); | |
+ mdio_write(tp, 0x19, 0x31f5); | |
+ mdio_write(tp, 0x15, 0x0261); | |
+ mdio_write(tp, 0x19, 0xb64b); | |
+ mdio_write(tp, 0x15, 0x0262); | |
+ mdio_write(tp, 0x19, 0xdb00); | |
+ mdio_write(tp, 0x15, 0x0263); | |
+ mdio_write(tp, 0x19, 0x0048); | |
+ mdio_write(tp, 0x15, 0x0264); | |
+ mdio_write(tp, 0x19, 0xdb7d); | |
+ mdio_write(tp, 0x15, 0x0265); | |
+ mdio_write(tp, 0x19, 0x0002); | |
+ mdio_write(tp, 0x15, 0x0266); | |
+ mdio_write(tp, 0x19, 0xa0fa); | |
+ mdio_write(tp, 0x15, 0x0267); | |
+ mdio_write(tp, 0x19, 0x4408); | |
+ mdio_write(tp, 0x15, 0x0268); | |
+ mdio_write(tp, 0x19, 0x3248); | |
+ mdio_write(tp, 0x15, 0x0269); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x026a); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x026b); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x026c); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x026d); | |
+ mdio_write(tp, 0x19, 0xb806); | |
+ mdio_write(tp, 0x15, 0x026e); | |
+ mdio_write(tp, 0x19, 0x588d); | |
+ mdio_write(tp, 0x15, 0x026f); | |
+ mdio_write(tp, 0x19, 0x5500); | |
+ mdio_write(tp, 0x15, 0x0270); | |
+ mdio_write(tp, 0x19, 0x7801); | |
+ mdio_write(tp, 0x15, 0x0271); | |
+ mdio_write(tp, 0x19, 0x4002); | |
+ mdio_write(tp, 0x15, 0x0272); | |
+ mdio_write(tp, 0x19, 0x7800); | |
+ mdio_write(tp, 0x15, 0x0273); | |
+ mdio_write(tp, 0x19, 0x4814); | |
+ mdio_write(tp, 0x15, 0x0274); | |
+ mdio_write(tp, 0x19, 0x500b); | |
+ mdio_write(tp, 0x15, 0x0275); | |
+ mdio_write(tp, 0x19, 0x4804); | |
+ mdio_write(tp, 0x15, 0x0276); | |
+ mdio_write(tp, 0x19, 0x40c4); | |
+ mdio_write(tp, 0x15, 0x0277); | |
+ mdio_write(tp, 0x19, 0x4425); | |
+ mdio_write(tp, 0x15, 0x0278); | |
+ mdio_write(tp, 0x19, 0x6a00); | |
+ mdio_write(tp, 0x15, 0x0279); | |
+ mdio_write(tp, 0x19, 0x31f5); | |
+ mdio_write(tp, 0x15, 0x027a); | |
+ mdio_write(tp, 0x19, 0xb632); | |
+ mdio_write(tp, 0x15, 0x027b); | |
+ mdio_write(tp, 0x19, 0xdc03); | |
+ mdio_write(tp, 0x15, 0x027c); | |
+ mdio_write(tp, 0x19, 0x0027); | |
+ mdio_write(tp, 0x15, 0x027d); | |
+ mdio_write(tp, 0x19, 0x80fc); | |
+ mdio_write(tp, 0x15, 0x027e); | |
+ mdio_write(tp, 0x19, 0x3283); | |
+ mdio_write(tp, 0x15, 0x027f); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0280); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0281); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0282); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0283); | |
+ mdio_write(tp, 0x19, 0xb806); | |
+ mdio_write(tp, 0x15, 0x0284); | |
+ mdio_write(tp, 0x19, 0x588f); | |
+ mdio_write(tp, 0x15, 0x0285); | |
+ mdio_write(tp, 0x19, 0x5520); | |
+ mdio_write(tp, 0x15, 0x0286); | |
+ mdio_write(tp, 0x19, 0x7801); | |
+ mdio_write(tp, 0x15, 0x0287); | |
+ mdio_write(tp, 0x19, 0x4000); | |
+ mdio_write(tp, 0x15, 0x0288); | |
+ mdio_write(tp, 0x19, 0x7800); | |
+ mdio_write(tp, 0x15, 0x0289); | |
+ mdio_write(tp, 0x19, 0x4818); | |
+ mdio_write(tp, 0x15, 0x028a); | |
+ mdio_write(tp, 0x19, 0x5051); | |
+ mdio_write(tp, 0x15, 0x028b); | |
+ mdio_write(tp, 0x19, 0x4808); | |
+ mdio_write(tp, 0x15, 0x028c); | |
+ mdio_write(tp, 0x19, 0x4050); | |
+ mdio_write(tp, 0x15, 0x028d); | |
+ mdio_write(tp, 0x19, 0x4462); | |
+ mdio_write(tp, 0x15, 0x028e); | |
+ mdio_write(tp, 0x19, 0x40c4); | |
+ mdio_write(tp, 0x15, 0x028f); | |
+ mdio_write(tp, 0x19, 0x4473); | |
+ mdio_write(tp, 0x15, 0x0290); | |
+ mdio_write(tp, 0x19, 0x5041); | |
+ mdio_write(tp, 0x15, 0x0291); | |
+ mdio_write(tp, 0x19, 0x6b00); | |
+ mdio_write(tp, 0x15, 0x0292); | |
+ mdio_write(tp, 0x19, 0x31f5); | |
+ mdio_write(tp, 0x15, 0x0293); | |
+ mdio_write(tp, 0x19, 0xb619); | |
+ mdio_write(tp, 0x15, 0x0294); | |
+ mdio_write(tp, 0x19, 0x80d9); | |
+ mdio_write(tp, 0x15, 0x0295); | |
+ mdio_write(tp, 0x19, 0xbd06); | |
+ mdio_write(tp, 0x15, 0x0296); | |
+ mdio_write(tp, 0x19, 0xbb0d); | |
+ mdio_write(tp, 0x15, 0x0297); | |
+ mdio_write(tp, 0x19, 0xaf14); | |
+ mdio_write(tp, 0x15, 0x0298); | |
+ mdio_write(tp, 0x19, 0x8efa); | |
+ mdio_write(tp, 0x15, 0x0299); | |
+ mdio_write(tp, 0x19, 0x5049); | |
+ mdio_write(tp, 0x15, 0x029a); | |
+ mdio_write(tp, 0x19, 0x3248); | |
+ mdio_write(tp, 0x15, 0x029b); | |
+ mdio_write(tp, 0x19, 0x4c10); | |
+ mdio_write(tp, 0x15, 0x029c); | |
+ mdio_write(tp, 0x19, 0x44b0); | |
+ mdio_write(tp, 0x15, 0x029d); | |
+ mdio_write(tp, 0x19, 0x4c00); | |
+ mdio_write(tp, 0x15, 0x029e); | |
+ mdio_write(tp, 0x19, 0x3292); | |
+ mdio_write(tp, 0x15, 0x029f); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x02a0); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x02a1); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x02a2); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x02a3); | |
+ mdio_write(tp, 0x19, 0x481f); | |
+ mdio_write(tp, 0x15, 0x02a4); | |
+ mdio_write(tp, 0x19, 0x5005); | |
+ mdio_write(tp, 0x15, 0x02a5); | |
+ mdio_write(tp, 0x19, 0x480f); | |
+ mdio_write(tp, 0x15, 0x02a6); | |
+ mdio_write(tp, 0x19, 0xac00); | |
+ mdio_write(tp, 0x15, 0x02a7); | |
+ mdio_write(tp, 0x19, 0x31a6); | |
+ mdio_write(tp, 0x15, 0x02a8); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x02a9); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x02aa); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x02ab); | |
+ mdio_write(tp, 0x19, 0x31ba); | |
+ mdio_write(tp, 0x15, 0x02ac); | |
+ mdio_write(tp, 0x19, 0x31d5); | |
+ mdio_write(tp, 0x15, 0x02ad); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x02ae); | |
+ mdio_write(tp, 0x19, 0x5cf0); | |
+ mdio_write(tp, 0x15, 0x02af); | |
+ mdio_write(tp, 0x19, 0x588c); | |
+ mdio_write(tp, 0x15, 0x02b0); | |
+ mdio_write(tp, 0x19, 0x542f); | |
+ mdio_write(tp, 0x15, 0x02b1); | |
+ mdio_write(tp, 0x19, 0x7ffb); | |
+ mdio_write(tp, 0x15, 0x02b2); | |
+ mdio_write(tp, 0x19, 0x6ff8); | |
+ mdio_write(tp, 0x15, 0x02b3); | |
+ mdio_write(tp, 0x19, 0x64a4); | |
+ mdio_write(tp, 0x15, 0x02b4); | |
+ mdio_write(tp, 0x19, 0x64a0); | |
+ mdio_write(tp, 0x15, 0x02b5); | |
+ mdio_write(tp, 0x19, 0x6800); | |
+ mdio_write(tp, 0x15, 0x02b6); | |
+ mdio_write(tp, 0x19, 0x4400); | |
+ mdio_write(tp, 0x15, 0x02b7); | |
+ mdio_write(tp, 0x19, 0x4020); | |
+ mdio_write(tp, 0x15, 0x02b8); | |
+ mdio_write(tp, 0x19, 0x4480); | |
+ mdio_write(tp, 0x15, 0x02b9); | |
+ mdio_write(tp, 0x19, 0x9e00); | |
+ mdio_write(tp, 0x15, 0x02ba); | |
+ mdio_write(tp, 0x19, 0x4891); | |
+ mdio_write(tp, 0x15, 0x02bb); | |
+ mdio_write(tp, 0x19, 0x4cc0); | |
+ mdio_write(tp, 0x15, 0x02bc); | |
+ mdio_write(tp, 0x19, 0x4801); | |
+ mdio_write(tp, 0x15, 0x02bd); | |
+ mdio_write(tp, 0x19, 0xa609); | |
+ mdio_write(tp, 0x15, 0x02be); | |
+ mdio_write(tp, 0x19, 0xd64f); | |
+ mdio_write(tp, 0x15, 0x02bf); | |
+ mdio_write(tp, 0x19, 0x004e); | |
+ mdio_write(tp, 0x15, 0x02c0); | |
+ mdio_write(tp, 0x19, 0x87fe); | |
+ mdio_write(tp, 0x15, 0x02c1); | |
+ mdio_write(tp, 0x19, 0x32c6); | |
+ mdio_write(tp, 0x15, 0x02c2); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x02c3); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x02c4); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x02c5); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x02c6); | |
+ mdio_write(tp, 0x19, 0x48b2); | |
+ mdio_write(tp, 0x15, 0x02c7); | |
+ mdio_write(tp, 0x19, 0x4020); | |
+ mdio_write(tp, 0x15, 0x02c8); | |
+ mdio_write(tp, 0x19, 0x4822); | |
+ mdio_write(tp, 0x15, 0x02c9); | |
+ mdio_write(tp, 0x19, 0x4488); | |
+ mdio_write(tp, 0x15, 0x02ca); | |
+ mdio_write(tp, 0x19, 0xd64f); | |
+ mdio_write(tp, 0x15, 0x02cb); | |
+ mdio_write(tp, 0x19, 0x0042); | |
+ mdio_write(tp, 0x15, 0x02cc); | |
+ mdio_write(tp, 0x19, 0x8203); | |
+ mdio_write(tp, 0x15, 0x02cd); | |
+ mdio_write(tp, 0x19, 0x4cc8); | |
+ mdio_write(tp, 0x15, 0x02ce); | |
+ mdio_write(tp, 0x19, 0x32d0); | |
+ mdio_write(tp, 0x15, 0x02cf); | |
+ mdio_write(tp, 0x19, 0x4cc0); | |
+ mdio_write(tp, 0x15, 0x02d0); | |
+ mdio_write(tp, 0x19, 0xc4d4); | |
+ mdio_write(tp, 0x15, 0x02d1); | |
+ mdio_write(tp, 0x19, 0x00f9); | |
+ mdio_write(tp, 0x15, 0x02d2); | |
+ mdio_write(tp, 0x19, 0xa51a); | |
+ mdio_write(tp, 0x15, 0x02d3); | |
+ mdio_write(tp, 0x19, 0x32d9); | |
+ mdio_write(tp, 0x15, 0x02d4); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x02d5); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x02d6); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x02d7); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x02d8); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x02d9); | |
+ mdio_write(tp, 0x19, 0x48b3); | |
+ mdio_write(tp, 0x15, 0x02da); | |
+ mdio_write(tp, 0x19, 0x4020); | |
+ mdio_write(tp, 0x15, 0x02db); | |
+ mdio_write(tp, 0x19, 0x4823); | |
+ mdio_write(tp, 0x15, 0x02dc); | |
+ mdio_write(tp, 0x19, 0x4410); | |
+ mdio_write(tp, 0x15, 0x02dd); | |
+ mdio_write(tp, 0x19, 0xb630); | |
+ mdio_write(tp, 0x15, 0x02de); | |
+ mdio_write(tp, 0x19, 0x7dc8); | |
+ mdio_write(tp, 0x15, 0x02df); | |
+ mdio_write(tp, 0x19, 0x8203); | |
+ mdio_write(tp, 0x15, 0x02e0); | |
+ mdio_write(tp, 0x19, 0x4c48); | |
+ mdio_write(tp, 0x15, 0x02e1); | |
+ mdio_write(tp, 0x19, 0x32e3); | |
+ mdio_write(tp, 0x15, 0x02e2); | |
+ mdio_write(tp, 0x19, 0x4c40); | |
+ mdio_write(tp, 0x15, 0x02e3); | |
+ mdio_write(tp, 0x19, 0x9bfa); | |
+ mdio_write(tp, 0x15, 0x02e4); | |
+ mdio_write(tp, 0x19, 0x84ca); | |
+ mdio_write(tp, 0x15, 0x02e5); | |
+ mdio_write(tp, 0x19, 0x85f8); | |
+ mdio_write(tp, 0x15, 0x02e6); | |
+ mdio_write(tp, 0x19, 0x32ec); | |
+ mdio_write(tp, 0x15, 0x02e7); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x02e8); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x02e9); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x02ea); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x02eb); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x02ec); | |
+ mdio_write(tp, 0x19, 0x48d4); | |
+ mdio_write(tp, 0x15, 0x02ed); | |
+ mdio_write(tp, 0x19, 0x4020); | |
+ mdio_write(tp, 0x15, 0x02ee); | |
+ mdio_write(tp, 0x19, 0x4844); | |
+ mdio_write(tp, 0x15, 0x02ef); | |
+ mdio_write(tp, 0x19, 0x4420); | |
+ mdio_write(tp, 0x15, 0x02f0); | |
+ mdio_write(tp, 0x19, 0x6800); | |
+ mdio_write(tp, 0x15, 0x02f1); | |
+ mdio_write(tp, 0x19, 0x7dc0); | |
+ mdio_write(tp, 0x15, 0x02f2); | |
+ mdio_write(tp, 0x19, 0x4c40); | |
+ mdio_write(tp, 0x15, 0x02f3); | |
+ mdio_write(tp, 0x19, 0x7c0b); | |
+ mdio_write(tp, 0x15, 0x02f4); | |
+ mdio_write(tp, 0x19, 0x6c08); | |
+ mdio_write(tp, 0x15, 0x02f5); | |
+ mdio_write(tp, 0x19, 0x3311); | |
+ mdio_write(tp, 0x15, 0x02f6); | |
+ mdio_write(tp, 0x19, 0x9cfd); | |
+ mdio_write(tp, 0x15, 0x02f7); | |
+ mdio_write(tp, 0x19, 0xb616); | |
+ mdio_write(tp, 0x15, 0x02f8); | |
+ mdio_write(tp, 0x19, 0xc42b); | |
+ mdio_write(tp, 0x15, 0x02f9); | |
+ mdio_write(tp, 0x19, 0x00e0); | |
+ mdio_write(tp, 0x15, 0x02fa); | |
+ mdio_write(tp, 0x19, 0xc455); | |
+ mdio_write(tp, 0x15, 0x02fb); | |
+ mdio_write(tp, 0x19, 0x00b3); | |
+ mdio_write(tp, 0x15, 0x02fc); | |
+ mdio_write(tp, 0x19, 0xb20a); | |
+ mdio_write(tp, 0x15, 0x02fd); | |
+ mdio_write(tp, 0x19, 0x7c03); | |
+ mdio_write(tp, 0x15, 0x02fe); | |
+ mdio_write(tp, 0x19, 0x6c02); | |
+ mdio_write(tp, 0x15, 0x02ff); | |
+ mdio_write(tp, 0x19, 0x8204); | |
+ mdio_write(tp, 0x15, 0x0300); | |
+ mdio_write(tp, 0x19, 0x7c04); | |
+ mdio_write(tp, 0x15, 0x0301); | |
+ mdio_write(tp, 0x19, 0x7404); | |
+ mdio_write(tp, 0x15, 0x0302); | |
+ mdio_write(tp, 0x19, 0x32f3); | |
+ mdio_write(tp, 0x15, 0x0303); | |
+ mdio_write(tp, 0x19, 0x7c04); | |
+ mdio_write(tp, 0x15, 0x0304); | |
+ mdio_write(tp, 0x19, 0x7400); | |
+ mdio_write(tp, 0x15, 0x0305); | |
+ mdio_write(tp, 0x19, 0x32f3); | |
+ mdio_write(tp, 0x15, 0x0306); | |
+ mdio_write(tp, 0x19, 0xefed); | |
+ mdio_write(tp, 0x15, 0x0307); | |
+ mdio_write(tp, 0x19, 0x3342); | |
+ mdio_write(tp, 0x15, 0x0308); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0309); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x030a); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x030b); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x030c); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x030d); | |
+ mdio_write(tp, 0x19, 0x3006); | |
+ mdio_write(tp, 0x15, 0x030e); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x030f); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0310); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0311); | |
+ mdio_write(tp, 0x19, 0x7c08); | |
+ mdio_write(tp, 0x15, 0x0312); | |
+ mdio_write(tp, 0x19, 0xa207); | |
+ mdio_write(tp, 0x15, 0x0313); | |
+ mdio_write(tp, 0x19, 0x4c00); | |
+ mdio_write(tp, 0x15, 0x0314); | |
+ mdio_write(tp, 0x19, 0x3322); | |
+ mdio_write(tp, 0x15, 0x0315); | |
+ mdio_write(tp, 0x19, 0x4041); | |
+ mdio_write(tp, 0x15, 0x0316); | |
+ mdio_write(tp, 0x19, 0x7d07); | |
+ mdio_write(tp, 0x15, 0x0317); | |
+ mdio_write(tp, 0x19, 0x4502); | |
+ mdio_write(tp, 0x15, 0x0318); | |
+ mdio_write(tp, 0x19, 0x3322); | |
+ mdio_write(tp, 0x15, 0x0319); | |
+ mdio_write(tp, 0x19, 0x4c08); | |
+ mdio_write(tp, 0x15, 0x031a); | |
+ mdio_write(tp, 0x19, 0x3322); | |
+ mdio_write(tp, 0x15, 0x031b); | |
+ mdio_write(tp, 0x19, 0x7d80); | |
+ mdio_write(tp, 0x15, 0x031c); | |
+ mdio_write(tp, 0x19, 0x5180); | |
+ mdio_write(tp, 0x15, 0x031d); | |
+ mdio_write(tp, 0x19, 0x3320); | |
+ mdio_write(tp, 0x15, 0x031e); | |
+ mdio_write(tp, 0x19, 0x7d80); | |
+ mdio_write(tp, 0x15, 0x031f); | |
+ mdio_write(tp, 0x19, 0x5000); | |
+ mdio_write(tp, 0x15, 0x0320); | |
+ mdio_write(tp, 0x19, 0x7d07); | |
+ mdio_write(tp, 0x15, 0x0321); | |
+ mdio_write(tp, 0x19, 0x4402); | |
+ mdio_write(tp, 0x15, 0x0322); | |
+ mdio_write(tp, 0x19, 0x7c03); | |
+ mdio_write(tp, 0x15, 0x0323); | |
+ mdio_write(tp, 0x19, 0x6c02); | |
+ mdio_write(tp, 0x15, 0x0324); | |
+ mdio_write(tp, 0x19, 0x7c03); | |
+ mdio_write(tp, 0x15, 0x0325); | |
+ mdio_write(tp, 0x19, 0xb30c); | |
+ mdio_write(tp, 0x15, 0x0326); | |
+ mdio_write(tp, 0x19, 0xb206); | |
+ mdio_write(tp, 0x15, 0x0327); | |
+ mdio_write(tp, 0x19, 0xb103); | |
+ mdio_write(tp, 0x15, 0x0328); | |
+ mdio_write(tp, 0x19, 0x6c00); | |
+ mdio_write(tp, 0x15, 0x0329); | |
+ mdio_write(tp, 0x19, 0x32f6); | |
+ mdio_write(tp, 0x15, 0x032a); | |
+ mdio_write(tp, 0x19, 0x6c00); | |
+ mdio_write(tp, 0x15, 0x032b); | |
+ mdio_write(tp, 0x19, 0x3352); | |
+ mdio_write(tp, 0x15, 0x032c); | |
+ mdio_write(tp, 0x19, 0xb103); | |
+ mdio_write(tp, 0x15, 0x032d); | |
+ mdio_write(tp, 0x19, 0x6c00); | |
+ mdio_write(tp, 0x15, 0x032e); | |
+ mdio_write(tp, 0x19, 0x336a); | |
+ mdio_write(tp, 0x15, 0x032f); | |
+ mdio_write(tp, 0x19, 0x6c00); | |
+ mdio_write(tp, 0x15, 0x0330); | |
+ mdio_write(tp, 0x19, 0x3382); | |
+ mdio_write(tp, 0x15, 0x0331); | |
+ mdio_write(tp, 0x19, 0xb206); | |
+ mdio_write(tp, 0x15, 0x0332); | |
+ mdio_write(tp, 0x19, 0xb103); | |
+ mdio_write(tp, 0x15, 0x0333); | |
+ mdio_write(tp, 0x19, 0x6c00); | |
+ mdio_write(tp, 0x15, 0x0334); | |
+ mdio_write(tp, 0x19, 0x3395); | |
+ mdio_write(tp, 0x15, 0x0335); | |
+ mdio_write(tp, 0x19, 0x6c00); | |
+ mdio_write(tp, 0x15, 0x0336); | |
+ mdio_write(tp, 0x19, 0x33c6); | |
+ mdio_write(tp, 0x15, 0x0337); | |
+ mdio_write(tp, 0x19, 0xb103); | |
+ mdio_write(tp, 0x15, 0x0338); | |
+ mdio_write(tp, 0x19, 0x6c00); | |
+ mdio_write(tp, 0x15, 0x0339); | |
+ mdio_write(tp, 0x19, 0x33d7); | |
+ mdio_write(tp, 0x15, 0x033a); | |
+ mdio_write(tp, 0x19, 0x6c00); | |
+ mdio_write(tp, 0x15, 0x033b); | |
+ mdio_write(tp, 0x19, 0x33f2); | |
+ mdio_write(tp, 0x15, 0x033c); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x033d); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x033e); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x033f); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0340); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0341); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0342); | |
+ mdio_write(tp, 0x19, 0x49b5); | |
+ mdio_write(tp, 0x15, 0x0343); | |
+ mdio_write(tp, 0x19, 0x7d00); | |
+ mdio_write(tp, 0x15, 0x0344); | |
+ mdio_write(tp, 0x19, 0x4d00); | |
+ mdio_write(tp, 0x15, 0x0345); | |
+ mdio_write(tp, 0x19, 0x6880); | |
+ mdio_write(tp, 0x15, 0x0346); | |
+ mdio_write(tp, 0x19, 0x7c08); | |
+ mdio_write(tp, 0x15, 0x0347); | |
+ mdio_write(tp, 0x19, 0x6c08); | |
+ mdio_write(tp, 0x15, 0x0348); | |
+ mdio_write(tp, 0x19, 0x4925); | |
+ mdio_write(tp, 0x15, 0x0349); | |
+ mdio_write(tp, 0x19, 0x403b); | |
+ mdio_write(tp, 0x15, 0x034a); | |
+ mdio_write(tp, 0x19, 0xa602); | |
+ mdio_write(tp, 0x15, 0x034b); | |
+ mdio_write(tp, 0x19, 0x402f); | |
+ mdio_write(tp, 0x15, 0x034c); | |
+ mdio_write(tp, 0x19, 0x4484); | |
+ mdio_write(tp, 0x15, 0x034d); | |
+ mdio_write(tp, 0x19, 0x40c8); | |
+ mdio_write(tp, 0x15, 0x034e); | |
+ mdio_write(tp, 0x19, 0x44c4); | |
+ mdio_write(tp, 0x15, 0x034f); | |
+ mdio_write(tp, 0x19, 0xd64f); | |
+ mdio_write(tp, 0x15, 0x0350); | |
+ mdio_write(tp, 0x19, 0x00bd); | |
+ mdio_write(tp, 0x15, 0x0351); | |
+ mdio_write(tp, 0x19, 0x3311); | |
+ mdio_write(tp, 0x15, 0x0352); | |
+ mdio_write(tp, 0x19, 0xc8ed); | |
+ mdio_write(tp, 0x15, 0x0353); | |
+ mdio_write(tp, 0x19, 0x00fc); | |
+ mdio_write(tp, 0x15, 0x0354); | |
+ mdio_write(tp, 0x19, 0x8221); | |
+ mdio_write(tp, 0x15, 0x0355); | |
+ mdio_write(tp, 0x19, 0xd11d); | |
+ mdio_write(tp, 0x15, 0x0356); | |
+ mdio_write(tp, 0x19, 0x001f); | |
+ mdio_write(tp, 0x15, 0x0357); | |
+ mdio_write(tp, 0x19, 0xde18); | |
+ mdio_write(tp, 0x15, 0x0358); | |
+ mdio_write(tp, 0x19, 0x0008); | |
+ mdio_write(tp, 0x15, 0x0359); | |
+ mdio_write(tp, 0x19, 0x91f6); | |
+ mdio_write(tp, 0x15, 0x035a); | |
+ mdio_write(tp, 0x19, 0x3360); | |
+ mdio_write(tp, 0x15, 0x035b); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x035c); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x035d); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x035e); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x035f); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0360); | |
+ mdio_write(tp, 0x19, 0x4bb6); | |
+ mdio_write(tp, 0x15, 0x0361); | |
+ mdio_write(tp, 0x19, 0x4064); | |
+ mdio_write(tp, 0x15, 0x0362); | |
+ mdio_write(tp, 0x19, 0x4b26); | |
+ mdio_write(tp, 0x15, 0x0363); | |
+ mdio_write(tp, 0x19, 0x4410); | |
+ mdio_write(tp, 0x15, 0x0364); | |
+ mdio_write(tp, 0x19, 0x4006); | |
+ mdio_write(tp, 0x15, 0x0365); | |
+ mdio_write(tp, 0x19, 0x4490); | |
+ mdio_write(tp, 0x15, 0x0366); | |
+ mdio_write(tp, 0x19, 0x6900); | |
+ mdio_write(tp, 0x15, 0x0367); | |
+ mdio_write(tp, 0x19, 0xb6a6); | |
+ mdio_write(tp, 0x15, 0x0368); | |
+ mdio_write(tp, 0x19, 0x9e02); | |
+ mdio_write(tp, 0x15, 0x0369); | |
+ mdio_write(tp, 0x19, 0x3311); | |
+ mdio_write(tp, 0x15, 0x036a); | |
+ mdio_write(tp, 0x19, 0xd11d); | |
+ mdio_write(tp, 0x15, 0x036b); | |
+ mdio_write(tp, 0x19, 0x000a); | |
+ mdio_write(tp, 0x15, 0x036c); | |
+ mdio_write(tp, 0x19, 0xbb0f); | |
+ mdio_write(tp, 0x15, 0x036d); | |
+ mdio_write(tp, 0x19, 0x8102); | |
+ mdio_write(tp, 0x15, 0x036e); | |
+ mdio_write(tp, 0x19, 0x3371); | |
+ mdio_write(tp, 0x15, 0x036f); | |
+ mdio_write(tp, 0x19, 0xa21e); | |
+ mdio_write(tp, 0x15, 0x0370); | |
+ mdio_write(tp, 0x19, 0x33b6); | |
+ mdio_write(tp, 0x15, 0x0371); | |
+ mdio_write(tp, 0x19, 0x91f6); | |
+ mdio_write(tp, 0x15, 0x0372); | |
+ mdio_write(tp, 0x19, 0xc218); | |
+ mdio_write(tp, 0x15, 0x0373); | |
+ mdio_write(tp, 0x19, 0x00f4); | |
+ mdio_write(tp, 0x15, 0x0374); | |
+ mdio_write(tp, 0x19, 0x33b6); | |
+ mdio_write(tp, 0x15, 0x0375); | |
+ mdio_write(tp, 0x19, 0x32ec); | |
+ mdio_write(tp, 0x15, 0x0376); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0377); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0378); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x0379); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x037a); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x037b); | |
+ mdio_write(tp, 0x19, 0x4b97); | |
+ mdio_write(tp, 0x15, 0x037c); | |
+ mdio_write(tp, 0x19, 0x402b); | |
+ mdio_write(tp, 0x15, 0x037d); | |
+ mdio_write(tp, 0x19, 0x4b07); | |
+ mdio_write(tp, 0x15, 0x037e); | |
+ mdio_write(tp, 0x19, 0x4422); | |
+ mdio_write(tp, 0x15, 0x037f); | |
+ mdio_write(tp, 0x19, 0x6980); | |
+ mdio_write(tp, 0x15, 0x0380); | |
+ mdio_write(tp, 0x19, 0xb608); | |
+ mdio_write(tp, 0x15, 0x0381); | |
+ mdio_write(tp, 0x19, 0x3311); | |
+ mdio_write(tp, 0x15, 0x0382); | |
+ mdio_write(tp, 0x19, 0xbc05); | |
+ mdio_write(tp, 0x15, 0x0383); | |
+ mdio_write(tp, 0x19, 0xc21c); | |
+ mdio_write(tp, 0x15, 0x0384); | |
+ mdio_write(tp, 0x19, 0x0032); | |
+ mdio_write(tp, 0x15, 0x0385); | |
+ mdio_write(tp, 0x19, 0xa1fb); | |
+ mdio_write(tp, 0x15, 0x0386); | |
+ mdio_write(tp, 0x19, 0x338d); | |
+ mdio_write(tp, 0x15, 0x0387); | |
+ mdio_write(tp, 0x19, 0x32ae); | |
+ mdio_write(tp, 0x15, 0x0388); | |
+ mdio_write(tp, 0x19, 0x330d); | |
+ mdio_write(tp, 0x15, 0x0389); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x038a); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x038b); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x038c); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x038d); | |
+ mdio_write(tp, 0x19, 0x4b97); | |
+ mdio_write(tp, 0x15, 0x038e); | |
+ mdio_write(tp, 0x19, 0x6a08); | |
+ mdio_write(tp, 0x15, 0x038f); | |
+ mdio_write(tp, 0x19, 0x4b07); | |
+ mdio_write(tp, 0x15, 0x0390); | |
+ mdio_write(tp, 0x19, 0x40ac); | |
+ mdio_write(tp, 0x15, 0x0391); | |
+ mdio_write(tp, 0x19, 0x4445); | |
+ mdio_write(tp, 0x15, 0x0392); | |
+ mdio_write(tp, 0x19, 0x404e); | |
+ mdio_write(tp, 0x15, 0x0393); | |
+ mdio_write(tp, 0x19, 0x4461); | |
+ mdio_write(tp, 0x15, 0x0394); | |
+ mdio_write(tp, 0x19, 0x3311); | |
+ mdio_write(tp, 0x15, 0x0395); | |
+ mdio_write(tp, 0x19, 0x9c0a); | |
+ mdio_write(tp, 0x15, 0x0396); | |
+ mdio_write(tp, 0x19, 0x63da); | |
+ mdio_write(tp, 0x15, 0x0397); | |
+ mdio_write(tp, 0x19, 0x6f0c); | |
+ mdio_write(tp, 0x15, 0x0398); | |
+ mdio_write(tp, 0x19, 0x5440); | |
+ mdio_write(tp, 0x15, 0x0399); | |
+ mdio_write(tp, 0x19, 0x4b98); | |
+ mdio_write(tp, 0x15, 0x039a); | |
+ mdio_write(tp, 0x19, 0x7c40); | |
+ mdio_write(tp, 0x15, 0x039b); | |
+ mdio_write(tp, 0x19, 0x4c00); | |
+ mdio_write(tp, 0x15, 0x039c); | |
+ mdio_write(tp, 0x19, 0x4b08); | |
+ mdio_write(tp, 0x15, 0x039d); | |
+ mdio_write(tp, 0x19, 0x63d8); | |
+ mdio_write(tp, 0x15, 0x039e); | |
+ mdio_write(tp, 0x19, 0x33a5); | |
+ mdio_write(tp, 0x15, 0x039f); | |
+ mdio_write(tp, 0x19, 0xd64f); | |
+ mdio_write(tp, 0x15, 0x03a0); | |
+ mdio_write(tp, 0x19, 0x00e8); | |
+ mdio_write(tp, 0x15, 0x03a1); | |
+ mdio_write(tp, 0x19, 0x820e); | |
+ mdio_write(tp, 0x15, 0x03a2); | |
+ mdio_write(tp, 0x19, 0xa10d); | |
+ mdio_write(tp, 0x15, 0x03a3); | |
+ mdio_write(tp, 0x19, 0x9df1); | |
+ mdio_write(tp, 0x15, 0x03a4); | |
+ mdio_write(tp, 0x19, 0x33af); | |
+ mdio_write(tp, 0x15, 0x03a5); | |
+ mdio_write(tp, 0x19, 0xd64f); | |
+ mdio_write(tp, 0x15, 0x03a6); | |
+ mdio_write(tp, 0x19, 0x00f9); | |
+ mdio_write(tp, 0x15, 0x03a7); | |
+ mdio_write(tp, 0x19, 0xc017); | |
+ mdio_write(tp, 0x15, 0x03a8); | |
+ mdio_write(tp, 0x19, 0x0007); | |
+ mdio_write(tp, 0x15, 0x03a9); | |
+ mdio_write(tp, 0x19, 0x7c03); | |
+ mdio_write(tp, 0x15, 0x03aa); | |
+ mdio_write(tp, 0x19, 0x6c03); | |
+ mdio_write(tp, 0x15, 0x03ab); | |
+ mdio_write(tp, 0x19, 0xa104); | |
+ mdio_write(tp, 0x15, 0x03ac); | |
+ mdio_write(tp, 0x19, 0x7c03); | |
+ mdio_write(tp, 0x15, 0x03ad); | |
+ mdio_write(tp, 0x19, 0x6c00); | |
+ mdio_write(tp, 0x15, 0x03ae); | |
+ mdio_write(tp, 0x19, 0x9df7); | |
+ mdio_write(tp, 0x15, 0x03af); | |
+ mdio_write(tp, 0x19, 0x7c03); | |
+ mdio_write(tp, 0x15, 0x03b0); | |
+ mdio_write(tp, 0x19, 0x6c08); | |
+ mdio_write(tp, 0x15, 0x03b1); | |
+ mdio_write(tp, 0x19, 0x33b6); | |
+ mdio_write(tp, 0x15, 0x03b2); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03b3); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03b4); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03b5); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03b6); | |
+ mdio_write(tp, 0x19, 0x55af); | |
+ mdio_write(tp, 0x15, 0x03b7); | |
+ mdio_write(tp, 0x19, 0x7ff0); | |
+ mdio_write(tp, 0x15, 0x03b8); | |
+ mdio_write(tp, 0x19, 0x6ff0); | |
+ mdio_write(tp, 0x15, 0x03b9); | |
+ mdio_write(tp, 0x19, 0x4bb9); | |
+ mdio_write(tp, 0x15, 0x03ba); | |
+ mdio_write(tp, 0x19, 0x6a80); | |
+ mdio_write(tp, 0x15, 0x03bb); | |
+ mdio_write(tp, 0x19, 0x4b29); | |
+ mdio_write(tp, 0x15, 0x03bc); | |
+ mdio_write(tp, 0x19, 0x4041); | |
+ mdio_write(tp, 0x15, 0x03bd); | |
+ mdio_write(tp, 0x19, 0x440a); | |
+ mdio_write(tp, 0x15, 0x03be); | |
+ mdio_write(tp, 0x19, 0x4029); | |
+ mdio_write(tp, 0x15, 0x03bf); | |
+ mdio_write(tp, 0x19, 0x4418); | |
+ mdio_write(tp, 0x15, 0x03c0); | |
+ mdio_write(tp, 0x19, 0x4090); | |
+ mdio_write(tp, 0x15, 0x03c1); | |
+ mdio_write(tp, 0x19, 0x4438); | |
+ mdio_write(tp, 0x15, 0x03c2); | |
+ mdio_write(tp, 0x19, 0x40c4); | |
+ mdio_write(tp, 0x15, 0x03c3); | |
+ mdio_write(tp, 0x19, 0x447b); | |
+ mdio_write(tp, 0x15, 0x03c4); | |
+ mdio_write(tp, 0x19, 0xb6c4); | |
+ mdio_write(tp, 0x15, 0x03c5); | |
+ mdio_write(tp, 0x19, 0x3311); | |
+ mdio_write(tp, 0x15, 0x03c6); | |
+ mdio_write(tp, 0x19, 0x9bfe); | |
+ mdio_write(tp, 0x15, 0x03c7); | |
+ mdio_write(tp, 0x19, 0x33cc); | |
+ mdio_write(tp, 0x15, 0x03c8); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03c9); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03ca); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03cb); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03cc); | |
+ mdio_write(tp, 0x19, 0x542f); | |
+ mdio_write(tp, 0x15, 0x03cd); | |
+ mdio_write(tp, 0x19, 0x499a); | |
+ mdio_write(tp, 0x15, 0x03ce); | |
+ mdio_write(tp, 0x19, 0x7c40); | |
+ mdio_write(tp, 0x15, 0x03cf); | |
+ mdio_write(tp, 0x19, 0x4c40); | |
+ mdio_write(tp, 0x15, 0x03d0); | |
+ mdio_write(tp, 0x19, 0x490a); | |
+ mdio_write(tp, 0x15, 0x03d1); | |
+ mdio_write(tp, 0x19, 0x405e); | |
+ mdio_write(tp, 0x15, 0x03d2); | |
+ mdio_write(tp, 0x19, 0x44f8); | |
+ mdio_write(tp, 0x15, 0x03d3); | |
+ mdio_write(tp, 0x19, 0x6b00); | |
+ mdio_write(tp, 0x15, 0x03d4); | |
+ mdio_write(tp, 0x19, 0xd64f); | |
+ mdio_write(tp, 0x15, 0x03d5); | |
+ mdio_write(tp, 0x19, 0x0028); | |
+ mdio_write(tp, 0x15, 0x03d6); | |
+ mdio_write(tp, 0x19, 0x3311); | |
+ mdio_write(tp, 0x15, 0x03d7); | |
+ mdio_write(tp, 0x19, 0xbd27); | |
+ mdio_write(tp, 0x15, 0x03d8); | |
+ mdio_write(tp, 0x19, 0x9cfc); | |
+ mdio_write(tp, 0x15, 0x03d9); | |
+ mdio_write(tp, 0x19, 0xc639); | |
+ mdio_write(tp, 0x15, 0x03da); | |
+ mdio_write(tp, 0x19, 0x000f); | |
+ mdio_write(tp, 0x15, 0x03db); | |
+ mdio_write(tp, 0x19, 0x9e03); | |
+ mdio_write(tp, 0x15, 0x03dc); | |
+ mdio_write(tp, 0x19, 0x7c01); | |
+ mdio_write(tp, 0x15, 0x03dd); | |
+ mdio_write(tp, 0x19, 0x4c01); | |
+ mdio_write(tp, 0x15, 0x03de); | |
+ mdio_write(tp, 0x19, 0x9af6); | |
+ mdio_write(tp, 0x15, 0x03df); | |
+ mdio_write(tp, 0x19, 0x7c12); | |
+ mdio_write(tp, 0x15, 0x03e0); | |
+ mdio_write(tp, 0x19, 0x4c52); | |
+ mdio_write(tp, 0x15, 0x03e1); | |
+ mdio_write(tp, 0x19, 0x4470); | |
+ mdio_write(tp, 0x15, 0x03e2); | |
+ mdio_write(tp, 0x19, 0x7c12); | |
+ mdio_write(tp, 0x15, 0x03e3); | |
+ mdio_write(tp, 0x19, 0x4c40); | |
+ mdio_write(tp, 0x15, 0x03e4); | |
+ mdio_write(tp, 0x19, 0x33d4); | |
+ mdio_write(tp, 0x15, 0x03e5); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03e6); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03e7); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03e8); | |
+ mdio_write(tp, 0x19, 0x0000); | |
+ mdio_write(tp, 0x15, 0x03e9); | |
+ mdio_write(tp, 0x19, 0x49bb); | |
+ mdio_write(tp, 0x15, 0x03ea); | |
+ mdio_write(tp, 0x19, 0x4478); | |
+ mdio_write(tp, 0x15, 0x03eb); | |
+ mdio_write(tp, 0x19, 0x492b); | |
+ mdio_write(tp, 0x15, 0x03ec); | |
+ mdio_write(tp, 0x19, 0x6b80); | |
+ mdio_write(tp, 0x15, 0x03ed); | |
+ mdio_write(tp, 0x19, 0x7c01); | |
+ mdio_write(tp, 0x15, 0x03ee); | |
+ mdio_write(tp, 0x19, 0x4c00); | |
+ mdio_write(tp, 0x15, 0x03ef); | |
+ mdio_write(tp, 0x19, 0xd64f); | |
+ mdio_write(tp, 0x15, 0x03f0); | |
+ mdio_write(tp, 0x19, 0x000d); | |
+ mdio_write(tp, 0x15, 0x03f1); | |
+ mdio_write(tp, 0x19, 0x3311); | |
+ mdio_write(tp, 0x15, 0x03f2); | |
+ mdio_write(tp, 0x19, 0xbd0c); | |
+ mdio_write(tp, 0x15, 0x03f3); | |
+ mdio_write(tp, 0x19, 0xc428); | |
+ mdio_write(tp, 0x15, 0x03f4); | |
+ mdio_write(tp, 0x19, 0x0008); | |
+ mdio_write(tp, 0x15, 0x03f5); | |
+ mdio_write(tp, 0x19, 0x9afa); | |
+ mdio_write(tp, 0x15, 0x03f6); | |
+ mdio_write(tp, 0x19, 0x7c12); | |
+ mdio_write(tp, 0x15, 0x03f7); | |
+ mdio_write(tp, 0x19, 0x4c52); | |
+ mdio_write(tp, 0x15, 0x03f8); | |
+ mdio_write(tp, 0x19, 0x4470); | |
+ mdio_write(tp, 0x15, 0x03f9); | |
+ mdio_write(tp, 0x19, 0x7c12); | |
+ mdio_write(tp, 0x15, 0x03fa); | |
+ mdio_write(tp, 0x19, 0x4c40); | |
+ mdio_write(tp, 0x15, 0x03fb); | |
+ mdio_write(tp, 0x19, 0x33ef); | |
+ mdio_write(tp, 0x15, 0x03fc); | |
+ mdio_write(tp, 0x19, 0x3342); | |
+ mdio_write(tp, 0x15, 0x03fd); | |
+ mdio_write(tp, 0x19, 0x330d); | |
+ mdio_write(tp, 0x15, 0x03fe); | |
+ mdio_write(tp, 0x19, 0x32ae); | |
+ mdio_write(tp, 0x15, 0x0000); | |
+ mdio_write(tp, 0x16, 0x0306); | |
+ mdio_write(tp, 0x16, 0x0300); | |
+ mdio_write(tp, 0x1f, 0x0002); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ mdio_write(tp, 0x05, 0xfff6); | |
+ mdio_write(tp, 0x06, 0x0080); | |
+ mdio_write(tp, 0x05, 0x8000); | |
+ mdio_write(tp, 0x06, 0x0280); | |
+ mdio_write(tp, 0x06, 0x48f7); | |
+ mdio_write(tp, 0x06, 0x00e0); | |
+ mdio_write(tp, 0x06, 0xfff7); | |
+ mdio_write(tp, 0x06, 0xa080); | |
+ mdio_write(tp, 0x06, 0x02ae); | |
+ mdio_write(tp, 0x06, 0xf602); | |
+ mdio_write(tp, 0x06, 0x0112); | |
+ mdio_write(tp, 0x06, 0x0201); | |
+ mdio_write(tp, 0x06, 0x1f02); | |
+ mdio_write(tp, 0x06, 0x012c); | |
+ mdio_write(tp, 0x06, 0x0201); | |
+ mdio_write(tp, 0x06, 0x3c02); | |
+ mdio_write(tp, 0x06, 0x0156); | |
+ mdio_write(tp, 0x06, 0x0201); | |
+ mdio_write(tp, 0x06, 0x6d02); | |
+ mdio_write(tp, 0x06, 0x809d); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x88e1); | |
+ mdio_write(tp, 0x06, 0x8b89); | |
+ mdio_write(tp, 0x06, 0x1e01); | |
+ mdio_write(tp, 0x06, 0xe18b); | |
+ mdio_write(tp, 0x06, 0x8a1e); | |
+ mdio_write(tp, 0x06, 0x01e1); | |
+ mdio_write(tp, 0x06, 0x8b8b); | |
+ mdio_write(tp, 0x06, 0x1e01); | |
+ mdio_write(tp, 0x06, 0xe18b); | |
+ mdio_write(tp, 0x06, 0x8c1e); | |
+ mdio_write(tp, 0x06, 0x01e1); | |
+ mdio_write(tp, 0x06, 0x8b8d); | |
+ mdio_write(tp, 0x06, 0x1e01); | |
+ mdio_write(tp, 0x06, 0xe18b); | |
+ mdio_write(tp, 0x06, 0x8e1e); | |
+ mdio_write(tp, 0x06, 0x01a0); | |
+ mdio_write(tp, 0x06, 0x00c7); | |
+ mdio_write(tp, 0x06, 0xaebb); | |
+ mdio_write(tp, 0x06, 0xd100); | |
+ mdio_write(tp, 0x06, 0xbf82); | |
+ mdio_write(tp, 0x06, 0xc702); | |
+ mdio_write(tp, 0x06, 0x320a); | |
+ mdio_write(tp, 0x06, 0xd105); | |
+ mdio_write(tp, 0x06, 0xbf82); | |
+ mdio_write(tp, 0x06, 0xcd02); | |
+ mdio_write(tp, 0x06, 0x320a); | |
+ mdio_write(tp, 0x06, 0xd100); | |
+ mdio_write(tp, 0x06, 0xbf82); | |
+ mdio_write(tp, 0x06, 0xca02); | |
+ mdio_write(tp, 0x06, 0x320a); | |
+ mdio_write(tp, 0x06, 0xd105); | |
+ mdio_write(tp, 0x06, 0xbf82); | |
+ mdio_write(tp, 0x06, 0xd002); | |
+ mdio_write(tp, 0x06, 0x320a); | |
+ mdio_write(tp, 0x06, 0xd481); | |
+ mdio_write(tp, 0x06, 0xc9e4); | |
+ mdio_write(tp, 0x06, 0x8b90); | |
+ mdio_write(tp, 0x06, 0xe58b); | |
+ mdio_write(tp, 0x06, 0x91d4); | |
+ mdio_write(tp, 0x06, 0x81b8); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x92e5); | |
+ mdio_write(tp, 0x06, 0x8b93); | |
+ mdio_write(tp, 0x06, 0xbf8b); | |
+ mdio_write(tp, 0x06, 0x88ec); | |
+ mdio_write(tp, 0x06, 0x0019); | |
+ mdio_write(tp, 0x06, 0xa98b); | |
+ mdio_write(tp, 0x06, 0x90f9); | |
+ mdio_write(tp, 0x06, 0xeeff); | |
+ mdio_write(tp, 0x06, 0xf600); | |
+ mdio_write(tp, 0x06, 0xeeff); | |
+ mdio_write(tp, 0x06, 0xf7fc); | |
+ mdio_write(tp, 0x06, 0xd100); | |
+ mdio_write(tp, 0x06, 0xbf82); | |
+ mdio_write(tp, 0x06, 0xc102); | |
+ mdio_write(tp, 0x06, 0x320a); | |
+ mdio_write(tp, 0x06, 0xd101); | |
+ mdio_write(tp, 0x06, 0xbf82); | |
+ mdio_write(tp, 0x06, 0xc402); | |
+ mdio_write(tp, 0x06, 0x320a); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x8ead); | |
+ mdio_write(tp, 0x06, 0x201a); | |
+ mdio_write(tp, 0x06, 0xf620); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x8e02); | |
+ mdio_write(tp, 0x06, 0x824b); | |
+ mdio_write(tp, 0x06, 0x0281); | |
+ mdio_write(tp, 0x06, 0x1902); | |
+ mdio_write(tp, 0x06, 0x2c9d); | |
+ mdio_write(tp, 0x06, 0x0203); | |
+ mdio_write(tp, 0x06, 0x9602); | |
+ mdio_write(tp, 0x06, 0x0473); | |
+ mdio_write(tp, 0x06, 0x022e); | |
+ mdio_write(tp, 0x06, 0x3902); | |
+ mdio_write(tp, 0x06, 0x044d); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x8ead); | |
+ mdio_write(tp, 0x06, 0x210b); | |
+ mdio_write(tp, 0x06, 0xf621); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x8e02); | |
+ mdio_write(tp, 0x06, 0x0416); | |
+ mdio_write(tp, 0x06, 0x021b); | |
+ mdio_write(tp, 0x06, 0xa4e0); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0xad22); | |
+ mdio_write(tp, 0x06, 0x05f6); | |
+ mdio_write(tp, 0x06, 0x22e4); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x8ead); | |
+ mdio_write(tp, 0x06, 0x2305); | |
+ mdio_write(tp, 0x06, 0xf623); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x8ee0); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0xad24); | |
+ mdio_write(tp, 0x06, 0x05f6); | |
+ mdio_write(tp, 0x06, 0x24e4); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x8ead); | |
+ mdio_write(tp, 0x06, 0x2505); | |
+ mdio_write(tp, 0x06, 0xf625); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x8ee0); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0xad26); | |
+ mdio_write(tp, 0x06, 0x08f6); | |
+ mdio_write(tp, 0x06, 0x26e4); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0x0281); | |
+ mdio_write(tp, 0x06, 0xdae0); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0xad27); | |
+ mdio_write(tp, 0x06, 0x05f6); | |
+ mdio_write(tp, 0x06, 0x27e4); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0x0203); | |
+ mdio_write(tp, 0x06, 0x5cfc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xfaef); | |
+ mdio_write(tp, 0x06, 0x69e0); | |
+ mdio_write(tp, 0x06, 0x8b85); | |
+ mdio_write(tp, 0x06, 0xad21); | |
+ mdio_write(tp, 0x06, 0x57e0); | |
+ mdio_write(tp, 0x06, 0xe022); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0x2358); | |
+ mdio_write(tp, 0x06, 0xc059); | |
+ mdio_write(tp, 0x06, 0x021e); | |
+ mdio_write(tp, 0x06, 0x01e1); | |
+ mdio_write(tp, 0x06, 0x8b3c); | |
+ mdio_write(tp, 0x06, 0x1f10); | |
+ mdio_write(tp, 0x06, 0x9e44); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x3cad); | |
+ mdio_write(tp, 0x06, 0x211d); | |
+ mdio_write(tp, 0x06, 0xe18b); | |
+ mdio_write(tp, 0x06, 0x84f7); | |
+ mdio_write(tp, 0x06, 0x29e5); | |
+ mdio_write(tp, 0x06, 0x8b84); | |
+ mdio_write(tp, 0x06, 0xac27); | |
+ mdio_write(tp, 0x06, 0x0dac); | |
+ mdio_write(tp, 0x06, 0x2605); | |
+ mdio_write(tp, 0x06, 0x0281); | |
+ mdio_write(tp, 0x06, 0x7fae); | |
+ mdio_write(tp, 0x06, 0x2b02); | |
+ mdio_write(tp, 0x06, 0x2c23); | |
+ mdio_write(tp, 0x06, 0xae26); | |
+ mdio_write(tp, 0x06, 0x022c); | |
+ mdio_write(tp, 0x06, 0x41ae); | |
+ mdio_write(tp, 0x06, 0x21e0); | |
+ mdio_write(tp, 0x06, 0x8b87); | |
+ mdio_write(tp, 0x06, 0xad22); | |
+ mdio_write(tp, 0x06, 0x18e0); | |
+ mdio_write(tp, 0x06, 0xfff7); | |
+ mdio_write(tp, 0x06, 0x58fc); | |
+ mdio_write(tp, 0x06, 0xe4ff); | |
+ mdio_write(tp, 0x06, 0xf7d1); | |
+ mdio_write(tp, 0x06, 0x00bf); | |
+ mdio_write(tp, 0x06, 0x2eee); | |
+ mdio_write(tp, 0x06, 0x0232); | |
+ mdio_write(tp, 0x06, 0x0ad1); | |
+ mdio_write(tp, 0x06, 0x00bf); | |
+ mdio_write(tp, 0x06, 0x82e8); | |
+ mdio_write(tp, 0x06, 0x0232); | |
+ mdio_write(tp, 0x06, 0x0a02); | |
+ mdio_write(tp, 0x06, 0x2bdf); | |
+ mdio_write(tp, 0x06, 0xef96); | |
+ mdio_write(tp, 0x06, 0xfefc); | |
+ mdio_write(tp, 0x06, 0x04d0); | |
+ mdio_write(tp, 0x06, 0x0202); | |
+ mdio_write(tp, 0x06, 0x1e97); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x87ad); | |
+ mdio_write(tp, 0x06, 0x2228); | |
+ mdio_write(tp, 0x06, 0xd100); | |
+ mdio_write(tp, 0x06, 0xbf82); | |
+ mdio_write(tp, 0x06, 0xd302); | |
+ mdio_write(tp, 0x06, 0x320a); | |
+ mdio_write(tp, 0x06, 0xd10c); | |
+ mdio_write(tp, 0x06, 0xbf82); | |
+ mdio_write(tp, 0x06, 0xd602); | |
+ mdio_write(tp, 0x06, 0x320a); | |
+ mdio_write(tp, 0x06, 0xd104); | |
+ mdio_write(tp, 0x06, 0xbf82); | |
+ mdio_write(tp, 0x06, 0xd902); | |
+ mdio_write(tp, 0x06, 0x320a); | |
+ mdio_write(tp, 0x06, 0xd101); | |
+ mdio_write(tp, 0x06, 0xbf82); | |
+ mdio_write(tp, 0x06, 0xe802); | |
+ mdio_write(tp, 0x06, 0x320a); | |
+ mdio_write(tp, 0x06, 0xe0ff); | |
+ mdio_write(tp, 0x06, 0xf768); | |
+ mdio_write(tp, 0x06, 0x03e4); | |
+ mdio_write(tp, 0x06, 0xfff7); | |
+ mdio_write(tp, 0x06, 0xd004); | |
+ mdio_write(tp, 0x06, 0x0228); | |
+ mdio_write(tp, 0x06, 0x7a04); | |
+ mdio_write(tp, 0x06, 0xf8e0); | |
+ mdio_write(tp, 0x06, 0xe234); | |
+ mdio_write(tp, 0x06, 0xe1e2); | |
+ mdio_write(tp, 0x06, 0x35f6); | |
+ mdio_write(tp, 0x06, 0x2be4); | |
+ mdio_write(tp, 0x06, 0xe234); | |
+ mdio_write(tp, 0x06, 0xe5e2); | |
+ mdio_write(tp, 0x06, 0x35fc); | |
+ mdio_write(tp, 0x06, 0x05f8); | |
+ mdio_write(tp, 0x06, 0xe0e2); | |
+ mdio_write(tp, 0x06, 0x34e1); | |
+ mdio_write(tp, 0x06, 0xe235); | |
+ mdio_write(tp, 0x06, 0xf72b); | |
+ mdio_write(tp, 0x06, 0xe4e2); | |
+ mdio_write(tp, 0x06, 0x34e5); | |
+ mdio_write(tp, 0x06, 0xe235); | |
+ mdio_write(tp, 0x06, 0xfc05); | |
+ mdio_write(tp, 0x06, 0xf8f9); | |
+ mdio_write(tp, 0x06, 0xfaef); | |
+ mdio_write(tp, 0x06, 0x69ac); | |
+ mdio_write(tp, 0x06, 0x1b4c); | |
+ mdio_write(tp, 0x06, 0xbf2e); | |
+ mdio_write(tp, 0x06, 0x3002); | |
+ mdio_write(tp, 0x06, 0x31dd); | |
+ mdio_write(tp, 0x06, 0xef01); | |
+ mdio_write(tp, 0x06, 0xe28a); | |
+ mdio_write(tp, 0x06, 0x76e4); | |
+ mdio_write(tp, 0x06, 0x8a76); | |
+ mdio_write(tp, 0x06, 0x1f12); | |
+ mdio_write(tp, 0x06, 0x9e3a); | |
+ mdio_write(tp, 0x06, 0xef12); | |
+ mdio_write(tp, 0x06, 0x5907); | |
+ mdio_write(tp, 0x06, 0x9f12); | |
+ mdio_write(tp, 0x06, 0xf8e0); | |
+ mdio_write(tp, 0x06, 0x8b40); | |
+ mdio_write(tp, 0x06, 0xf721); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x40d0); | |
+ mdio_write(tp, 0x06, 0x0302); | |
+ mdio_write(tp, 0x06, 0x287a); | |
+ mdio_write(tp, 0x06, 0x0282); | |
+ mdio_write(tp, 0x06, 0x34fc); | |
+ mdio_write(tp, 0x06, 0xa000); | |
+ mdio_write(tp, 0x06, 0x1002); | |
+ mdio_write(tp, 0x06, 0x2dc3); | |
+ mdio_write(tp, 0x06, 0x022e); | |
+ mdio_write(tp, 0x06, 0x21e0); | |
+ mdio_write(tp, 0x06, 0x8b40); | |
+ mdio_write(tp, 0x06, 0xf621); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x40ae); | |
+ mdio_write(tp, 0x06, 0x0fbf); | |
+ mdio_write(tp, 0x06, 0x3fa5); | |
+ mdio_write(tp, 0x06, 0x0231); | |
+ mdio_write(tp, 0x06, 0x6cbf); | |
+ mdio_write(tp, 0x06, 0x3fa2); | |
+ mdio_write(tp, 0x06, 0x0231); | |
+ mdio_write(tp, 0x06, 0x6c02); | |
+ mdio_write(tp, 0x06, 0x2dc3); | |
+ mdio_write(tp, 0x06, 0xef96); | |
+ mdio_write(tp, 0x06, 0xfefd); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8e0); | |
+ mdio_write(tp, 0x06, 0xe2f4); | |
+ mdio_write(tp, 0x06, 0xe1e2); | |
+ mdio_write(tp, 0x06, 0xf5e4); | |
+ mdio_write(tp, 0x06, 0x8a78); | |
+ mdio_write(tp, 0x06, 0xe58a); | |
+ mdio_write(tp, 0x06, 0x79ee); | |
+ mdio_write(tp, 0x06, 0xe2f4); | |
+ mdio_write(tp, 0x06, 0xd8ee); | |
+ mdio_write(tp, 0x06, 0xe2f5); | |
+ mdio_write(tp, 0x06, 0x20fc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xf9fa); | |
+ mdio_write(tp, 0x06, 0xef69); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x87ad); | |
+ mdio_write(tp, 0x06, 0x2065); | |
+ mdio_write(tp, 0x06, 0xd200); | |
+ mdio_write(tp, 0x06, 0xbf2e); | |
+ mdio_write(tp, 0x06, 0xe802); | |
+ mdio_write(tp, 0x06, 0x31dd); | |
+ mdio_write(tp, 0x06, 0x1e21); | |
+ mdio_write(tp, 0x06, 0xbf82); | |
+ mdio_write(tp, 0x06, 0xdf02); | |
+ mdio_write(tp, 0x06, 0x31dd); | |
+ mdio_write(tp, 0x06, 0x0c11); | |
+ mdio_write(tp, 0x06, 0x1e21); | |
+ mdio_write(tp, 0x06, 0xbf82); | |
+ mdio_write(tp, 0x06, 0xe202); | |
+ mdio_write(tp, 0x06, 0x31dd); | |
+ mdio_write(tp, 0x06, 0x0c12); | |
+ mdio_write(tp, 0x06, 0x1e21); | |
+ mdio_write(tp, 0x06, 0xbf82); | |
+ mdio_write(tp, 0x06, 0xe502); | |
+ mdio_write(tp, 0x06, 0x31dd); | |
+ mdio_write(tp, 0x06, 0x0c13); | |
+ mdio_write(tp, 0x06, 0x1e21); | |
+ mdio_write(tp, 0x06, 0xbf1f); | |
+ mdio_write(tp, 0x06, 0x5302); | |
+ mdio_write(tp, 0x06, 0x31dd); | |
+ mdio_write(tp, 0x06, 0x0c14); | |
+ mdio_write(tp, 0x06, 0x1e21); | |
+ mdio_write(tp, 0x06, 0xbf82); | |
+ mdio_write(tp, 0x06, 0xeb02); | |
+ mdio_write(tp, 0x06, 0x31dd); | |
+ mdio_write(tp, 0x06, 0x0c16); | |
+ mdio_write(tp, 0x06, 0x1e21); | |
+ mdio_write(tp, 0x06, 0xe083); | |
+ mdio_write(tp, 0x06, 0xe01f); | |
+ mdio_write(tp, 0x06, 0x029e); | |
+ mdio_write(tp, 0x06, 0x22e6); | |
+ mdio_write(tp, 0x06, 0x83e0); | |
+ mdio_write(tp, 0x06, 0xad31); | |
+ mdio_write(tp, 0x06, 0x14ad); | |
+ mdio_write(tp, 0x06, 0x3011); | |
+ mdio_write(tp, 0x06, 0xef02); | |
+ mdio_write(tp, 0x06, 0x580c); | |
+ mdio_write(tp, 0x06, 0x9e07); | |
+ mdio_write(tp, 0x06, 0xad36); | |
+ mdio_write(tp, 0x06, 0x085a); | |
+ mdio_write(tp, 0x06, 0x309f); | |
+ mdio_write(tp, 0x06, 0x04d1); | |
+ mdio_write(tp, 0x06, 0x01ae); | |
+ mdio_write(tp, 0x06, 0x02d1); | |
+ mdio_write(tp, 0x06, 0x00bf); | |
+ mdio_write(tp, 0x06, 0x82dc); | |
+ mdio_write(tp, 0x06, 0x0232); | |
+ mdio_write(tp, 0x06, 0x0aef); | |
+ mdio_write(tp, 0x06, 0x96fe); | |
+ mdio_write(tp, 0x06, 0xfdfc); | |
+ mdio_write(tp, 0x06, 0x0400); | |
+ mdio_write(tp, 0x06, 0xe140); | |
+ mdio_write(tp, 0x06, 0x77e1); | |
+ mdio_write(tp, 0x06, 0x4010); | |
+ mdio_write(tp, 0x06, 0xe150); | |
+ mdio_write(tp, 0x06, 0x32e1); | |
+ mdio_write(tp, 0x06, 0x5030); | |
+ mdio_write(tp, 0x06, 0xe144); | |
+ mdio_write(tp, 0x06, 0x74e1); | |
+ mdio_write(tp, 0x06, 0x44bb); | |
+ mdio_write(tp, 0x06, 0xe2d2); | |
+ mdio_write(tp, 0x06, 0x40e0); | |
+ mdio_write(tp, 0x06, 0x2cfc); | |
+ mdio_write(tp, 0x06, 0xe2cc); | |
+ mdio_write(tp, 0x06, 0xcce2); | |
+ mdio_write(tp, 0x06, 0x00cc); | |
+ mdio_write(tp, 0x06, 0xe000); | |
+ mdio_write(tp, 0x06, 0x99e0); | |
+ mdio_write(tp, 0x06, 0x3688); | |
+ mdio_write(tp, 0x06, 0xe036); | |
+ mdio_write(tp, 0x06, 0x99e1); | |
+ mdio_write(tp, 0x06, 0x40dd); | |
+ mdio_write(tp, 0x06, 0xe022); | |
+ mdio_write(tp, 0x05, 0xe142); | |
+ gphy_val = mdio_read(tp, 0x06); | |
+ gphy_val |= BIT_0; | |
+ mdio_write(tp, 0x06, gphy_val); | |
+ mdio_write(tp, 0x05, 0xe140); | |
+ gphy_val = mdio_read(tp, 0x06); | |
+ gphy_val |= BIT_0; | |
+ mdio_write(tp, 0x06, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ for (i = 0; i < 200; i++) { | |
+ udelay(100); | |
+ gphy_val = mdio_read(tp, 0x00); | |
+ if (gphy_val & BIT_7) | |
+ break; | |
+ } | |
+ mdio_write(tp, 0x1f, 0x0004); | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x0023); | |
+ gphy_val = mdio_read(tp, 0x17); | |
+ gphy_val &= ~(BIT_0); | |
+ gphy_val |= BIT_2; | |
+ mdio_write(tp, 0x17, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0002); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+} | |
+ | |
+static void | |
+rtl8168_set_phy_mcu_8168evl_2(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ struct pci_dev *pdev = tp->pci_dev; | |
+ unsigned int gphy_val,i; | |
+ | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x00, 0x1800); | |
+ gphy_val = mdio_read(tp, 0x15); | |
+ gphy_val &= ~(BIT_12); | |
+ mdio_write(tp, 0x15, gphy_val); | |
+ mdio_write(tp, 0x00, 0x4800); | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x002f); | |
+ for (i = 0; i < 1000; i++) { | |
+ udelay(100); | |
+ gphy_val = mdio_read(tp, 0x1c); | |
+ if ((gphy_val & 0x0080) == 0x0080) | |
+ break; | |
+ } | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x00, 0x1800); | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x0023); | |
+ for (i = 0; i < 200; i++) { | |
+ udelay(100); | |
+ gphy_val = mdio_read(tp, 0x17); | |
+ if (!(gphy_val & 0x0001)) | |
+ break; | |
+ } | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ mdio_write(tp, 0x05, 0xfff6); | |
+ mdio_write(tp, 0x06, 0x0080); | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x0023); | |
+ mdio_write(tp, 0x16, 0x0306); | |
+ mdio_write(tp, 0x16, 0x0307); | |
+ mdio_write(tp, 0x15, 0x00AF); | |
+ mdio_write(tp, 0x19, 0x4060); | |
+ mdio_write(tp, 0x15, 0x00B0); | |
+ mdio_write(tp, 0x19, 0x7800); | |
+ mdio_write(tp, 0x15, 0x00B1); | |
+ mdio_write(tp, 0x19, 0x7e00); | |
+ mdio_write(tp, 0x15, 0x00B2); | |
+ mdio_write(tp, 0x19, 0x72B0); | |
+ mdio_write(tp, 0x15, 0x00B3); | |
+ mdio_write(tp, 0x19, 0x7F00); | |
+ mdio_write(tp, 0x15, 0x00B4); | |
+ mdio_write(tp, 0x19, 0x73B0); | |
+ mdio_write(tp, 0x15, 0x0101); | |
+ mdio_write(tp, 0x19, 0x0005); | |
+ mdio_write(tp, 0x15, 0x0103); | |
+ mdio_write(tp, 0x19, 0x0003); | |
+ mdio_write(tp, 0x15, 0x0105); | |
+ mdio_write(tp, 0x19, 0x30FD); | |
+ mdio_write(tp, 0x15, 0x0106); | |
+ mdio_write(tp, 0x19, 0x9DF7); | |
+ mdio_write(tp, 0x15, 0x0107); | |
+ mdio_write(tp, 0x19, 0x30C6); | |
+ mdio_write(tp, 0x15, 0x0098); | |
+ mdio_write(tp, 0x19, 0x7c0b); | |
+ mdio_write(tp, 0x15, 0x0099); | |
+ mdio_write(tp, 0x19, 0x6c0b); | |
+ mdio_write(tp, 0x15, 0x00eb); | |
+ mdio_write(tp, 0x19, 0x6c0b); | |
+ mdio_write(tp, 0x15, 0x00f8); | |
+ mdio_write(tp, 0x19, 0x6f0b); | |
+ mdio_write(tp, 0x15, 0x00fe); | |
+ mdio_write(tp, 0x19, 0x6f0f); | |
+ mdio_write(tp, 0x15, 0x00db); | |
+ mdio_write(tp, 0x19, 0x6f09); | |
+ mdio_write(tp, 0x15, 0x00dc); | |
+ mdio_write(tp, 0x19, 0xaefd); | |
+ mdio_write(tp, 0x15, 0x00dd); | |
+ mdio_write(tp, 0x19, 0x6f0b); | |
+ mdio_write(tp, 0x15, 0x00de); | |
+ mdio_write(tp, 0x19, 0xc60b); | |
+ mdio_write(tp, 0x15, 0x00df); | |
+ mdio_write(tp, 0x19, 0x00fa); | |
+ mdio_write(tp, 0x15, 0x00e0); | |
+ mdio_write(tp, 0x19, 0x30e1); | |
+ mdio_write(tp, 0x15, 0x020c); | |
+ mdio_write(tp, 0x19, 0x3224); | |
+ mdio_write(tp, 0x15, 0x020e); | |
+ mdio_write(tp, 0x19, 0x9813); | |
+ mdio_write(tp, 0x15, 0x020f); | |
+ mdio_write(tp, 0x19, 0x7801); | |
+ mdio_write(tp, 0x15, 0x0210); | |
+ mdio_write(tp, 0x19, 0x930f); | |
+ mdio_write(tp, 0x15, 0x0211); | |
+ mdio_write(tp, 0x19, 0x9206); | |
+ mdio_write(tp, 0x15, 0x0212); | |
+ mdio_write(tp, 0x19, 0x4002); | |
+ mdio_write(tp, 0x15, 0x0213); | |
+ mdio_write(tp, 0x19, 0x7800); | |
+ mdio_write(tp, 0x15, 0x0214); | |
+ mdio_write(tp, 0x19, 0x588f); | |
+ mdio_write(tp, 0x15, 0x0215); | |
+ mdio_write(tp, 0x19, 0x5520); | |
+ mdio_write(tp, 0x15, 0x0216); | |
+ mdio_write(tp, 0x19, 0x3224); | |
+ mdio_write(tp, 0x15, 0x0217); | |
+ mdio_write(tp, 0x19, 0x4002); | |
+ mdio_write(tp, 0x15, 0x0218); | |
+ mdio_write(tp, 0x19, 0x7800); | |
+ mdio_write(tp, 0x15, 0x0219); | |
+ mdio_write(tp, 0x19, 0x588d); | |
+ mdio_write(tp, 0x15, 0x021a); | |
+ mdio_write(tp, 0x19, 0x5540); | |
+ mdio_write(tp, 0x15, 0x021b); | |
+ mdio_write(tp, 0x19, 0x9e03); | |
+ mdio_write(tp, 0x15, 0x021c); | |
+ mdio_write(tp, 0x19, 0x7c40); | |
+ mdio_write(tp, 0x15, 0x021d); | |
+ mdio_write(tp, 0x19, 0x6840); | |
+ mdio_write(tp, 0x15, 0x021e); | |
+ mdio_write(tp, 0x19, 0x3224); | |
+ mdio_write(tp, 0x15, 0x021f); | |
+ mdio_write(tp, 0x19, 0x4002); | |
+ mdio_write(tp, 0x15, 0x0220); | |
+ mdio_write(tp, 0x19, 0x3224); | |
+ mdio_write(tp, 0x15, 0x0221); | |
+ mdio_write(tp, 0x19, 0x9e03); | |
+ mdio_write(tp, 0x15, 0x0222); | |
+ mdio_write(tp, 0x19, 0x7c40); | |
+ mdio_write(tp, 0x15, 0x0223); | |
+ mdio_write(tp, 0x19, 0x6840); | |
+ mdio_write(tp, 0x15, 0x0224); | |
+ mdio_write(tp, 0x19, 0x7800); | |
+ mdio_write(tp, 0x15, 0x0225); | |
+ mdio_write(tp, 0x19, 0x3231); | |
+ mdio_write(tp, 0x15, 0x0000); | |
+ mdio_write(tp, 0x16, 0x0306); | |
+ mdio_write(tp, 0x16, 0x0300); | |
+ mdio_write(tp, 0x1f, 0x0002); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x17, 0x2160); | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x0040); | |
+ mdio_write(tp, 0x18, 0x0004); | |
+ if (pdev->subsystem_vendor == 0x144d && | |
+ pdev->subsystem_device == 0xc0a6) { | |
+ mdio_write(tp, 0x18, 0x0724); | |
+ mdio_write(tp, 0x19, 0xfe00); | |
+ mdio_write(tp, 0x18, 0x0734); | |
+ mdio_write(tp, 0x19, 0xfd00); | |
+ mdio_write(tp, 0x18, 0x1824); | |
+ mdio_write(tp, 0x19, 0xfc00); | |
+ mdio_write(tp, 0x18, 0x1834); | |
+ mdio_write(tp, 0x19, 0xfd00); | |
+ } | |
+ mdio_write(tp, 0x18, 0x09d4); | |
+ mdio_write(tp, 0x19, 0x4000); | |
+ mdio_write(tp, 0x18, 0x09e4); | |
+ mdio_write(tp, 0x19, 0x0800); | |
+ mdio_write(tp, 0x18, 0x09f4); | |
+ mdio_write(tp, 0x19, 0xff00); | |
+ mdio_write(tp, 0x18, 0x0a04); | |
+ mdio_write(tp, 0x19, 0x4000); | |
+ mdio_write(tp, 0x18, 0x0a14); | |
+ mdio_write(tp, 0x19, 0x0c00); | |
+ mdio_write(tp, 0x18, 0x0a24); | |
+ mdio_write(tp, 0x19, 0xff00); | |
+ mdio_write(tp, 0x18, 0x0a74); | |
+ mdio_write(tp, 0x19, 0xf600); | |
+ mdio_write(tp, 0x18, 0x1a24); | |
+ mdio_write(tp, 0x19, 0x7d00); | |
+ mdio_write(tp, 0x18, 0x1a64); | |
+ mdio_write(tp, 0x19, 0x0500); | |
+ mdio_write(tp, 0x18, 0x1a74); | |
+ mdio_write(tp, 0x19, 0x9500); | |
+ mdio_write(tp, 0x18, 0x1a84); | |
+ mdio_write(tp, 0x19, 0x8000); | |
+ mdio_write(tp, 0x18, 0x1a94); | |
+ mdio_write(tp, 0x19, 0x7d00); | |
+ mdio_write(tp, 0x18, 0x1aa4); | |
+ mdio_write(tp, 0x19, 0x9600); | |
+ mdio_write(tp, 0x18, 0x1ac4); | |
+ mdio_write(tp, 0x19, 0x4000); | |
+ mdio_write(tp, 0x18, 0x1ad4); | |
+ mdio_write(tp, 0x19, 0x0800); | |
+ mdio_write(tp, 0x18, 0x1af4); | |
+ mdio_write(tp, 0x19, 0xc400); | |
+ mdio_write(tp, 0x18, 0x1b04); | |
+ mdio_write(tp, 0x19, 0x4000); | |
+ mdio_write(tp, 0x18, 0x1b14); | |
+ mdio_write(tp, 0x19, 0x0800); | |
+ mdio_write(tp, 0x18, 0x1b24); | |
+ mdio_write(tp, 0x19, 0xfd00); | |
+ mdio_write(tp, 0x18, 0x1b34); | |
+ mdio_write(tp, 0x19, 0x4000); | |
+ mdio_write(tp, 0x18, 0x1b44); | |
+ mdio_write(tp, 0x19, 0x0400); | |
+ mdio_write(tp, 0x18, 0x1b94); | |
+ mdio_write(tp, 0x19, 0xf100); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x17, 0x2100); | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x0040); | |
+ mdio_write(tp, 0x18, 0x0000); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ mdio_write(tp, 0x05, 0xfff6); | |
+ mdio_write(tp, 0x06, 0x0080); | |
+ mdio_write(tp, 0x05, 0x8000); | |
+ mdio_write(tp, 0x06, 0x0280); | |
+ mdio_write(tp, 0x06, 0x48f7); | |
+ mdio_write(tp, 0x06, 0x00e0); | |
+ mdio_write(tp, 0x06, 0xfff7); | |
+ mdio_write(tp, 0x06, 0xa080); | |
+ mdio_write(tp, 0x06, 0x02ae); | |
+ mdio_write(tp, 0x06, 0xf602); | |
+ mdio_write(tp, 0x06, 0x0115); | |
+ mdio_write(tp, 0x06, 0x0201); | |
+ mdio_write(tp, 0x06, 0x2202); | |
+ mdio_write(tp, 0x06, 0x80a0); | |
+ mdio_write(tp, 0x06, 0x0201); | |
+ mdio_write(tp, 0x06, 0x3f02); | |
+ mdio_write(tp, 0x06, 0x0159); | |
+ mdio_write(tp, 0x06, 0x0280); | |
+ mdio_write(tp, 0x06, 0xbd02); | |
+ mdio_write(tp, 0x06, 0x80da); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x88e1); | |
+ mdio_write(tp, 0x06, 0x8b89); | |
+ mdio_write(tp, 0x06, 0x1e01); | |
+ mdio_write(tp, 0x06, 0xe18b); | |
+ mdio_write(tp, 0x06, 0x8a1e); | |
+ mdio_write(tp, 0x06, 0x01e1); | |
+ mdio_write(tp, 0x06, 0x8b8b); | |
+ mdio_write(tp, 0x06, 0x1e01); | |
+ mdio_write(tp, 0x06, 0xe18b); | |
+ mdio_write(tp, 0x06, 0x8c1e); | |
+ mdio_write(tp, 0x06, 0x01e1); | |
+ mdio_write(tp, 0x06, 0x8b8d); | |
+ mdio_write(tp, 0x06, 0x1e01); | |
+ mdio_write(tp, 0x06, 0xe18b); | |
+ mdio_write(tp, 0x06, 0x8e1e); | |
+ mdio_write(tp, 0x06, 0x01a0); | |
+ mdio_write(tp, 0x06, 0x00c7); | |
+ mdio_write(tp, 0x06, 0xaebb); | |
+ mdio_write(tp, 0x06, 0xd481); | |
+ mdio_write(tp, 0x06, 0xd2e4); | |
+ mdio_write(tp, 0x06, 0x8b92); | |
+ mdio_write(tp, 0x06, 0xe58b); | |
+ mdio_write(tp, 0x06, 0x93d1); | |
+ mdio_write(tp, 0x06, 0x03bf); | |
+ mdio_write(tp, 0x06, 0x859e); | |
+ mdio_write(tp, 0x06, 0x0237); | |
+ mdio_write(tp, 0x06, 0x23d1); | |
+ mdio_write(tp, 0x06, 0x02bf); | |
+ mdio_write(tp, 0x06, 0x85a1); | |
+ mdio_write(tp, 0x06, 0x0237); | |
+ mdio_write(tp, 0x06, 0x23ee); | |
+ mdio_write(tp, 0x06, 0x8608); | |
+ mdio_write(tp, 0x06, 0x03ee); | |
+ mdio_write(tp, 0x06, 0x860a); | |
+ mdio_write(tp, 0x06, 0x60ee); | |
+ mdio_write(tp, 0x06, 0x8610); | |
+ mdio_write(tp, 0x06, 0x00ee); | |
+ mdio_write(tp, 0x06, 0x8611); | |
+ mdio_write(tp, 0x06, 0x00ee); | |
+ mdio_write(tp, 0x06, 0x8abe); | |
+ mdio_write(tp, 0x06, 0x07ee); | |
+ mdio_write(tp, 0x06, 0x8abf); | |
+ mdio_write(tp, 0x06, 0x73ee); | |
+ mdio_write(tp, 0x06, 0x8a95); | |
+ mdio_write(tp, 0x06, 0x02bf); | |
+ mdio_write(tp, 0x06, 0x8b88); | |
+ mdio_write(tp, 0x06, 0xec00); | |
+ mdio_write(tp, 0x06, 0x19a9); | |
+ mdio_write(tp, 0x06, 0x8b90); | |
+ mdio_write(tp, 0x06, 0xf9ee); | |
+ mdio_write(tp, 0x06, 0xfff6); | |
+ mdio_write(tp, 0x06, 0x00ee); | |
+ mdio_write(tp, 0x06, 0xfff7); | |
+ mdio_write(tp, 0x06, 0xfed1); | |
+ mdio_write(tp, 0x06, 0x00bf); | |
+ mdio_write(tp, 0x06, 0x8595); | |
+ mdio_write(tp, 0x06, 0x0237); | |
+ mdio_write(tp, 0x06, 0x23d1); | |
+ mdio_write(tp, 0x06, 0x01bf); | |
+ mdio_write(tp, 0x06, 0x8598); | |
+ mdio_write(tp, 0x06, 0x0237); | |
+ mdio_write(tp, 0x06, 0x2304); | |
+ mdio_write(tp, 0x06, 0xf8e0); | |
+ mdio_write(tp, 0x06, 0x8b8a); | |
+ mdio_write(tp, 0x06, 0xad20); | |
+ mdio_write(tp, 0x06, 0x14ee); | |
+ mdio_write(tp, 0x06, 0x8b8a); | |
+ mdio_write(tp, 0x06, 0x0002); | |
+ mdio_write(tp, 0x06, 0x1f9a); | |
+ mdio_write(tp, 0x06, 0xe0e4); | |
+ mdio_write(tp, 0x06, 0x26e1); | |
+ mdio_write(tp, 0x06, 0xe427); | |
+ mdio_write(tp, 0x06, 0xeee4); | |
+ mdio_write(tp, 0x06, 0x2623); | |
+ mdio_write(tp, 0x06, 0xe5e4); | |
+ mdio_write(tp, 0x06, 0x27fc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x8dad); | |
+ mdio_write(tp, 0x06, 0x2014); | |
+ mdio_write(tp, 0x06, 0xee8b); | |
+ mdio_write(tp, 0x06, 0x8d00); | |
+ mdio_write(tp, 0x06, 0xe08a); | |
+ mdio_write(tp, 0x06, 0x5a78); | |
+ mdio_write(tp, 0x06, 0x039e); | |
+ mdio_write(tp, 0x06, 0x0902); | |
+ mdio_write(tp, 0x06, 0x05db); | |
+ mdio_write(tp, 0x06, 0x0282); | |
+ mdio_write(tp, 0x06, 0x7b02); | |
+ mdio_write(tp, 0x06, 0x3231); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8e0); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0xad20); | |
+ mdio_write(tp, 0x06, 0x1df6); | |
+ mdio_write(tp, 0x06, 0x20e4); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0x0281); | |
+ mdio_write(tp, 0x06, 0x5c02); | |
+ mdio_write(tp, 0x06, 0x2bcb); | |
+ mdio_write(tp, 0x06, 0x022d); | |
+ mdio_write(tp, 0x06, 0x2902); | |
+ mdio_write(tp, 0x06, 0x03b4); | |
+ mdio_write(tp, 0x06, 0x0285); | |
+ mdio_write(tp, 0x06, 0x6402); | |
+ mdio_write(tp, 0x06, 0x2eca); | |
+ mdio_write(tp, 0x06, 0x0284); | |
+ mdio_write(tp, 0x06, 0xcd02); | |
+ mdio_write(tp, 0x06, 0x046f); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x8ead); | |
+ mdio_write(tp, 0x06, 0x210b); | |
+ mdio_write(tp, 0x06, 0xf621); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x8e02); | |
+ mdio_write(tp, 0x06, 0x8520); | |
+ mdio_write(tp, 0x06, 0x021b); | |
+ mdio_write(tp, 0x06, 0xe8e0); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0xad22); | |
+ mdio_write(tp, 0x06, 0x05f6); | |
+ mdio_write(tp, 0x06, 0x22e4); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x8ead); | |
+ mdio_write(tp, 0x06, 0x2308); | |
+ mdio_write(tp, 0x06, 0xf623); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x8e02); | |
+ mdio_write(tp, 0x06, 0x311c); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x8ead); | |
+ mdio_write(tp, 0x06, 0x2405); | |
+ mdio_write(tp, 0x06, 0xf624); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x8ee0); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0xad25); | |
+ mdio_write(tp, 0x06, 0x05f6); | |
+ mdio_write(tp, 0x06, 0x25e4); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x8ead); | |
+ mdio_write(tp, 0x06, 0x2608); | |
+ mdio_write(tp, 0x06, 0xf626); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x8e02); | |
+ mdio_write(tp, 0x06, 0x2df5); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x8ead); | |
+ mdio_write(tp, 0x06, 0x2705); | |
+ mdio_write(tp, 0x06, 0xf627); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x8e02); | |
+ mdio_write(tp, 0x06, 0x037a); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8f9); | |
+ mdio_write(tp, 0x06, 0xfaef); | |
+ mdio_write(tp, 0x06, 0x69e0); | |
+ mdio_write(tp, 0x06, 0x8b87); | |
+ mdio_write(tp, 0x06, 0xad20); | |
+ mdio_write(tp, 0x06, 0x65d2); | |
+ mdio_write(tp, 0x06, 0x00bf); | |
+ mdio_write(tp, 0x06, 0x2fe9); | |
+ mdio_write(tp, 0x06, 0x0236); | |
+ mdio_write(tp, 0x06, 0xf61e); | |
+ mdio_write(tp, 0x06, 0x21bf); | |
+ mdio_write(tp, 0x06, 0x2ff5); | |
+ mdio_write(tp, 0x06, 0x0236); | |
+ mdio_write(tp, 0x06, 0xf60c); | |
+ mdio_write(tp, 0x06, 0x111e); | |
+ mdio_write(tp, 0x06, 0x21bf); | |
+ mdio_write(tp, 0x06, 0x2ff8); | |
+ mdio_write(tp, 0x06, 0x0236); | |
+ mdio_write(tp, 0x06, 0xf60c); | |
+ mdio_write(tp, 0x06, 0x121e); | |
+ mdio_write(tp, 0x06, 0x21bf); | |
+ mdio_write(tp, 0x06, 0x2ffb); | |
+ mdio_write(tp, 0x06, 0x0236); | |
+ mdio_write(tp, 0x06, 0xf60c); | |
+ mdio_write(tp, 0x06, 0x131e); | |
+ mdio_write(tp, 0x06, 0x21bf); | |
+ mdio_write(tp, 0x06, 0x1f97); | |
+ mdio_write(tp, 0x06, 0x0236); | |
+ mdio_write(tp, 0x06, 0xf60c); | |
+ mdio_write(tp, 0x06, 0x141e); | |
+ mdio_write(tp, 0x06, 0x21bf); | |
+ mdio_write(tp, 0x06, 0x859b); | |
+ mdio_write(tp, 0x06, 0x0236); | |
+ mdio_write(tp, 0x06, 0xf60c); | |
+ mdio_write(tp, 0x06, 0x161e); | |
+ mdio_write(tp, 0x06, 0x21e0); | |
+ mdio_write(tp, 0x06, 0x8a8c); | |
+ mdio_write(tp, 0x06, 0x1f02); | |
+ mdio_write(tp, 0x06, 0x9e22); | |
+ mdio_write(tp, 0x06, 0xe68a); | |
+ mdio_write(tp, 0x06, 0x8cad); | |
+ mdio_write(tp, 0x06, 0x3114); | |
+ mdio_write(tp, 0x06, 0xad30); | |
+ mdio_write(tp, 0x06, 0x11ef); | |
+ mdio_write(tp, 0x06, 0x0258); | |
+ mdio_write(tp, 0x06, 0x0c9e); | |
+ mdio_write(tp, 0x06, 0x07ad); | |
+ mdio_write(tp, 0x06, 0x3608); | |
+ mdio_write(tp, 0x06, 0x5a30); | |
+ mdio_write(tp, 0x06, 0x9f04); | |
+ mdio_write(tp, 0x06, 0xd101); | |
+ mdio_write(tp, 0x06, 0xae02); | |
+ mdio_write(tp, 0x06, 0xd100); | |
+ mdio_write(tp, 0x06, 0xbf2f); | |
+ mdio_write(tp, 0x06, 0xf202); | |
+ mdio_write(tp, 0x06, 0x3723); | |
+ mdio_write(tp, 0x06, 0xef96); | |
+ mdio_write(tp, 0x06, 0xfefd); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8f9); | |
+ mdio_write(tp, 0x06, 0xface); | |
+ mdio_write(tp, 0x06, 0xfaef); | |
+ mdio_write(tp, 0x06, 0x69fa); | |
+ mdio_write(tp, 0x06, 0xd401); | |
+ mdio_write(tp, 0x06, 0x55b4); | |
+ mdio_write(tp, 0x06, 0xfebf); | |
+ mdio_write(tp, 0x06, 0x85a7); | |
+ mdio_write(tp, 0x06, 0x0236); | |
+ mdio_write(tp, 0x06, 0xf6ac); | |
+ mdio_write(tp, 0x06, 0x280b); | |
+ mdio_write(tp, 0x06, 0xbf85); | |
+ mdio_write(tp, 0x06, 0xa402); | |
+ mdio_write(tp, 0x06, 0x36f6); | |
+ mdio_write(tp, 0x06, 0xac28); | |
+ mdio_write(tp, 0x06, 0x49ae); | |
+ mdio_write(tp, 0x06, 0x64bf); | |
+ mdio_write(tp, 0x06, 0x85a4); | |
+ mdio_write(tp, 0x06, 0x0236); | |
+ mdio_write(tp, 0x06, 0xf6ac); | |
+ mdio_write(tp, 0x06, 0x285b); | |
+ mdio_write(tp, 0x06, 0xd000); | |
+ mdio_write(tp, 0x06, 0x0282); | |
+ mdio_write(tp, 0x06, 0x60ac); | |
+ mdio_write(tp, 0x06, 0x2105); | |
+ mdio_write(tp, 0x06, 0xac22); | |
+ mdio_write(tp, 0x06, 0x02ae); | |
+ mdio_write(tp, 0x06, 0x4ebf); | |
+ mdio_write(tp, 0x06, 0xe0c4); | |
+ mdio_write(tp, 0x06, 0xbe86); | |
+ mdio_write(tp, 0x06, 0x14d2); | |
+ mdio_write(tp, 0x06, 0x04d8); | |
+ mdio_write(tp, 0x06, 0x19d9); | |
+ mdio_write(tp, 0x06, 0x1907); | |
+ mdio_write(tp, 0x06, 0xdc19); | |
+ mdio_write(tp, 0x06, 0xdd19); | |
+ mdio_write(tp, 0x06, 0x0789); | |
+ mdio_write(tp, 0x06, 0x89ef); | |
+ mdio_write(tp, 0x06, 0x645e); | |
+ mdio_write(tp, 0x06, 0x07ff); | |
+ mdio_write(tp, 0x06, 0x0d65); | |
+ mdio_write(tp, 0x06, 0x5cf8); | |
+ mdio_write(tp, 0x06, 0x001e); | |
+ mdio_write(tp, 0x06, 0x46dc); | |
+ mdio_write(tp, 0x06, 0x19dd); | |
+ mdio_write(tp, 0x06, 0x19b2); | |
+ mdio_write(tp, 0x06, 0xe2d4); | |
+ mdio_write(tp, 0x06, 0x0001); | |
+ mdio_write(tp, 0x06, 0xbf85); | |
+ mdio_write(tp, 0x06, 0xa402); | |
+ mdio_write(tp, 0x06, 0x3723); | |
+ mdio_write(tp, 0x06, 0xae1d); | |
+ mdio_write(tp, 0x06, 0xbee0); | |
+ mdio_write(tp, 0x06, 0xc4bf); | |
+ mdio_write(tp, 0x06, 0x8614); | |
+ mdio_write(tp, 0x06, 0xd204); | |
+ mdio_write(tp, 0x06, 0xd819); | |
+ mdio_write(tp, 0x06, 0xd919); | |
+ mdio_write(tp, 0x06, 0x07dc); | |
+ mdio_write(tp, 0x06, 0x19dd); | |
+ mdio_write(tp, 0x06, 0x1907); | |
+ mdio_write(tp, 0x06, 0xb2f4); | |
+ mdio_write(tp, 0x06, 0xd400); | |
+ mdio_write(tp, 0x06, 0x00bf); | |
+ mdio_write(tp, 0x06, 0x85a4); | |
+ mdio_write(tp, 0x06, 0x0237); | |
+ mdio_write(tp, 0x06, 0x23fe); | |
+ mdio_write(tp, 0x06, 0xef96); | |
+ mdio_write(tp, 0x06, 0xfec6); | |
+ mdio_write(tp, 0x06, 0xfefd); | |
+ mdio_write(tp, 0x06, 0xfc05); | |
+ mdio_write(tp, 0x06, 0xf9e2); | |
+ mdio_write(tp, 0x06, 0xe0ea); | |
+ mdio_write(tp, 0x06, 0xe3e0); | |
+ mdio_write(tp, 0x06, 0xeb5a); | |
+ mdio_write(tp, 0x06, 0x070c); | |
+ mdio_write(tp, 0x06, 0x031e); | |
+ mdio_write(tp, 0x06, 0x20e6); | |
+ mdio_write(tp, 0x06, 0xe0ea); | |
+ mdio_write(tp, 0x06, 0xe7e0); | |
+ mdio_write(tp, 0x06, 0xebe0); | |
+ mdio_write(tp, 0x06, 0xe0fc); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0xfdfd); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xf9e0); | |
+ mdio_write(tp, 0x06, 0x8b81); | |
+ mdio_write(tp, 0x06, 0xac26); | |
+ mdio_write(tp, 0x06, 0x1ae0); | |
+ mdio_write(tp, 0x06, 0x8b81); | |
+ mdio_write(tp, 0x06, 0xac21); | |
+ mdio_write(tp, 0x06, 0x14e0); | |
+ mdio_write(tp, 0x06, 0x8b85); | |
+ mdio_write(tp, 0x06, 0xac20); | |
+ mdio_write(tp, 0x06, 0x0ee0); | |
+ mdio_write(tp, 0x06, 0x8b85); | |
+ mdio_write(tp, 0x06, 0xac23); | |
+ mdio_write(tp, 0x06, 0x08e0); | |
+ mdio_write(tp, 0x06, 0x8b87); | |
+ mdio_write(tp, 0x06, 0xac24); | |
+ mdio_write(tp, 0x06, 0x02ae); | |
+ mdio_write(tp, 0x06, 0x3802); | |
+ mdio_write(tp, 0x06, 0x1ab5); | |
+ mdio_write(tp, 0x06, 0xeee4); | |
+ mdio_write(tp, 0x06, 0x1c04); | |
+ mdio_write(tp, 0x06, 0xeee4); | |
+ mdio_write(tp, 0x06, 0x1d04); | |
+ mdio_write(tp, 0x06, 0xe2e0); | |
+ mdio_write(tp, 0x06, 0x7ce3); | |
+ mdio_write(tp, 0x06, 0xe07d); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0x38e1); | |
+ mdio_write(tp, 0x06, 0xe039); | |
+ mdio_write(tp, 0x06, 0xad2e); | |
+ mdio_write(tp, 0x06, 0x1bad); | |
+ mdio_write(tp, 0x06, 0x390d); | |
+ mdio_write(tp, 0x06, 0xd101); | |
+ mdio_write(tp, 0x06, 0xbf21); | |
+ mdio_write(tp, 0x06, 0xd502); | |
+ mdio_write(tp, 0x06, 0x3723); | |
+ mdio_write(tp, 0x06, 0x0282); | |
+ mdio_write(tp, 0x06, 0xd8ae); | |
+ mdio_write(tp, 0x06, 0x0bac); | |
+ mdio_write(tp, 0x06, 0x3802); | |
+ mdio_write(tp, 0x06, 0xae06); | |
+ mdio_write(tp, 0x06, 0x0283); | |
+ mdio_write(tp, 0x06, 0x1802); | |
+ mdio_write(tp, 0x06, 0x8360); | |
+ mdio_write(tp, 0x06, 0x021a); | |
+ mdio_write(tp, 0x06, 0xc6fd); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8e1); | |
+ mdio_write(tp, 0x06, 0x8af4); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x81ad); | |
+ mdio_write(tp, 0x06, 0x2605); | |
+ mdio_write(tp, 0x06, 0x0222); | |
+ mdio_write(tp, 0x06, 0xa4f7); | |
+ mdio_write(tp, 0x06, 0x28e0); | |
+ mdio_write(tp, 0x06, 0x8b81); | |
+ mdio_write(tp, 0x06, 0xad21); | |
+ mdio_write(tp, 0x06, 0x0502); | |
+ mdio_write(tp, 0x06, 0x23a9); | |
+ mdio_write(tp, 0x06, 0xf729); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x85ad); | |
+ mdio_write(tp, 0x06, 0x2005); | |
+ mdio_write(tp, 0x06, 0x0214); | |
+ mdio_write(tp, 0x06, 0xabf7); | |
+ mdio_write(tp, 0x06, 0x2ae0); | |
+ mdio_write(tp, 0x06, 0x8b85); | |
+ mdio_write(tp, 0x06, 0xad23); | |
+ mdio_write(tp, 0x06, 0x0502); | |
+ mdio_write(tp, 0x06, 0x12e7); | |
+ mdio_write(tp, 0x06, 0xf72b); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x87ad); | |
+ mdio_write(tp, 0x06, 0x2405); | |
+ mdio_write(tp, 0x06, 0x0283); | |
+ mdio_write(tp, 0x06, 0xbcf7); | |
+ mdio_write(tp, 0x06, 0x2ce5); | |
+ mdio_write(tp, 0x06, 0x8af4); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8e0); | |
+ mdio_write(tp, 0x06, 0x8b81); | |
+ mdio_write(tp, 0x06, 0xad26); | |
+ mdio_write(tp, 0x06, 0x0302); | |
+ mdio_write(tp, 0x06, 0x21e5); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x81ad); | |
+ mdio_write(tp, 0x06, 0x2109); | |
+ mdio_write(tp, 0x06, 0xe08a); | |
+ mdio_write(tp, 0x06, 0xf4ac); | |
+ mdio_write(tp, 0x06, 0x2003); | |
+ mdio_write(tp, 0x06, 0x0223); | |
+ mdio_write(tp, 0x06, 0x98e0); | |
+ mdio_write(tp, 0x06, 0x8b85); | |
+ mdio_write(tp, 0x06, 0xad20); | |
+ mdio_write(tp, 0x06, 0x09e0); | |
+ mdio_write(tp, 0x06, 0x8af4); | |
+ mdio_write(tp, 0x06, 0xac21); | |
+ mdio_write(tp, 0x06, 0x0302); | |
+ mdio_write(tp, 0x06, 0x13fb); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x85ad); | |
+ mdio_write(tp, 0x06, 0x2309); | |
+ mdio_write(tp, 0x06, 0xe08a); | |
+ mdio_write(tp, 0x06, 0xf4ac); | |
+ mdio_write(tp, 0x06, 0x2203); | |
+ mdio_write(tp, 0x06, 0x0212); | |
+ mdio_write(tp, 0x06, 0xfae0); | |
+ mdio_write(tp, 0x06, 0x8b87); | |
+ mdio_write(tp, 0x06, 0xad24); | |
+ mdio_write(tp, 0x06, 0x09e0); | |
+ mdio_write(tp, 0x06, 0x8af4); | |
+ mdio_write(tp, 0x06, 0xac23); | |
+ mdio_write(tp, 0x06, 0x0302); | |
+ mdio_write(tp, 0x06, 0x83c1); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8e1); | |
+ mdio_write(tp, 0x06, 0x8af4); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x81ad); | |
+ mdio_write(tp, 0x06, 0x2608); | |
+ mdio_write(tp, 0x06, 0xe083); | |
+ mdio_write(tp, 0x06, 0xd2ad); | |
+ mdio_write(tp, 0x06, 0x2502); | |
+ mdio_write(tp, 0x06, 0xf628); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x81ad); | |
+ mdio_write(tp, 0x06, 0x210a); | |
+ mdio_write(tp, 0x06, 0xe084); | |
+ mdio_write(tp, 0x06, 0x0af6); | |
+ mdio_write(tp, 0x06, 0x27a0); | |
+ mdio_write(tp, 0x06, 0x0502); | |
+ mdio_write(tp, 0x06, 0xf629); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x85ad); | |
+ mdio_write(tp, 0x06, 0x2008); | |
+ mdio_write(tp, 0x06, 0xe08a); | |
+ mdio_write(tp, 0x06, 0xe8ad); | |
+ mdio_write(tp, 0x06, 0x2102); | |
+ mdio_write(tp, 0x06, 0xf62a); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x85ad); | |
+ mdio_write(tp, 0x06, 0x2308); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x20a0); | |
+ mdio_write(tp, 0x06, 0x0302); | |
+ mdio_write(tp, 0x06, 0xf62b); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x87ad); | |
+ mdio_write(tp, 0x06, 0x2408); | |
+ mdio_write(tp, 0x06, 0xe086); | |
+ mdio_write(tp, 0x06, 0x02a0); | |
+ mdio_write(tp, 0x06, 0x0302); | |
+ mdio_write(tp, 0x06, 0xf62c); | |
+ mdio_write(tp, 0x06, 0xe58a); | |
+ mdio_write(tp, 0x06, 0xf4a1); | |
+ mdio_write(tp, 0x06, 0x0008); | |
+ mdio_write(tp, 0x06, 0xd100); | |
+ mdio_write(tp, 0x06, 0xbf21); | |
+ mdio_write(tp, 0x06, 0xd502); | |
+ mdio_write(tp, 0x06, 0x3723); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xee86); | |
+ mdio_write(tp, 0x06, 0x0200); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x87ad); | |
+ mdio_write(tp, 0x06, 0x241e); | |
+ mdio_write(tp, 0x06, 0xe086); | |
+ mdio_write(tp, 0x06, 0x02a0); | |
+ mdio_write(tp, 0x06, 0x0005); | |
+ mdio_write(tp, 0x06, 0x0283); | |
+ mdio_write(tp, 0x06, 0xe8ae); | |
+ mdio_write(tp, 0x06, 0xf5a0); | |
+ mdio_write(tp, 0x06, 0x0105); | |
+ mdio_write(tp, 0x06, 0x0283); | |
+ mdio_write(tp, 0x06, 0xf8ae); | |
+ mdio_write(tp, 0x06, 0x0ba0); | |
+ mdio_write(tp, 0x06, 0x0205); | |
+ mdio_write(tp, 0x06, 0x0284); | |
+ mdio_write(tp, 0x06, 0x14ae); | |
+ mdio_write(tp, 0x06, 0x03a0); | |
+ mdio_write(tp, 0x06, 0x0300); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8fa); | |
+ mdio_write(tp, 0x06, 0xef69); | |
+ mdio_write(tp, 0x06, 0x0284); | |
+ mdio_write(tp, 0x06, 0x2bee); | |
+ mdio_write(tp, 0x06, 0x8602); | |
+ mdio_write(tp, 0x06, 0x01ef); | |
+ mdio_write(tp, 0x06, 0x96fe); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8ee); | |
+ mdio_write(tp, 0x06, 0x8609); | |
+ mdio_write(tp, 0x06, 0x0002); | |
+ mdio_write(tp, 0x06, 0x8461); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xae10); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0xf8e0); | |
+ mdio_write(tp, 0x06, 0x8608); | |
+ mdio_write(tp, 0x06, 0xe186); | |
+ mdio_write(tp, 0x06, 0x091f); | |
+ mdio_write(tp, 0x06, 0x019e); | |
+ mdio_write(tp, 0x06, 0x0611); | |
+ mdio_write(tp, 0x06, 0xe586); | |
+ mdio_write(tp, 0x06, 0x09ae); | |
+ mdio_write(tp, 0x06, 0x04ee); | |
+ mdio_write(tp, 0x06, 0x8602); | |
+ mdio_write(tp, 0x06, 0x01fc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xf9fa); | |
+ mdio_write(tp, 0x06, 0xef69); | |
+ mdio_write(tp, 0x06, 0xfbbf); | |
+ mdio_write(tp, 0x06, 0x8604); | |
+ mdio_write(tp, 0x06, 0xef79); | |
+ mdio_write(tp, 0x06, 0xd200); | |
+ mdio_write(tp, 0x06, 0xd400); | |
+ mdio_write(tp, 0x06, 0x221e); | |
+ mdio_write(tp, 0x06, 0x02bf); | |
+ mdio_write(tp, 0x06, 0x2fec); | |
+ mdio_write(tp, 0x06, 0x0237); | |
+ mdio_write(tp, 0x06, 0x23bf); | |
+ mdio_write(tp, 0x06, 0x13f2); | |
+ mdio_write(tp, 0x06, 0x0236); | |
+ mdio_write(tp, 0x06, 0xf60d); | |
+ mdio_write(tp, 0x06, 0x4559); | |
+ mdio_write(tp, 0x06, 0x1fef); | |
+ mdio_write(tp, 0x06, 0x97dd); | |
+ mdio_write(tp, 0x06, 0xd308); | |
+ mdio_write(tp, 0x06, 0x1a93); | |
+ mdio_write(tp, 0x06, 0xdd12); | |
+ mdio_write(tp, 0x06, 0x17a2); | |
+ mdio_write(tp, 0x06, 0x04de); | |
+ mdio_write(tp, 0x06, 0xffef); | |
+ mdio_write(tp, 0x06, 0x96fe); | |
+ mdio_write(tp, 0x06, 0xfdfc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xf9fa); | |
+ mdio_write(tp, 0x06, 0xef69); | |
+ mdio_write(tp, 0x06, 0xfbee); | |
+ mdio_write(tp, 0x06, 0x8602); | |
+ mdio_write(tp, 0x06, 0x03d5); | |
+ mdio_write(tp, 0x06, 0x0080); | |
+ mdio_write(tp, 0x06, 0xbf86); | |
+ mdio_write(tp, 0x06, 0x04ef); | |
+ mdio_write(tp, 0x06, 0x79ef); | |
+ mdio_write(tp, 0x06, 0x45bf); | |
+ mdio_write(tp, 0x06, 0x2fec); | |
+ mdio_write(tp, 0x06, 0x0237); | |
+ mdio_write(tp, 0x06, 0x23bf); | |
+ mdio_write(tp, 0x06, 0x13f2); | |
+ mdio_write(tp, 0x06, 0x0236); | |
+ mdio_write(tp, 0x06, 0xf6ad); | |
+ mdio_write(tp, 0x06, 0x2702); | |
+ mdio_write(tp, 0x06, 0x78ff); | |
+ mdio_write(tp, 0x06, 0xe186); | |
+ mdio_write(tp, 0x06, 0x0a1b); | |
+ mdio_write(tp, 0x06, 0x01aa); | |
+ mdio_write(tp, 0x06, 0x2eef); | |
+ mdio_write(tp, 0x06, 0x97d9); | |
+ mdio_write(tp, 0x06, 0x7900); | |
+ mdio_write(tp, 0x06, 0x9e2b); | |
+ mdio_write(tp, 0x06, 0x81dd); | |
+ mdio_write(tp, 0x06, 0xbf85); | |
+ mdio_write(tp, 0x06, 0xad02); | |
+ mdio_write(tp, 0x06, 0x3723); | |
+ mdio_write(tp, 0x06, 0xd101); | |
+ mdio_write(tp, 0x06, 0xef02); | |
+ mdio_write(tp, 0x06, 0x100c); | |
+ mdio_write(tp, 0x06, 0x11b0); | |
+ mdio_write(tp, 0x06, 0xfc0d); | |
+ mdio_write(tp, 0x06, 0x11bf); | |
+ mdio_write(tp, 0x06, 0x85aa); | |
+ mdio_write(tp, 0x06, 0x0237); | |
+ mdio_write(tp, 0x06, 0x23d1); | |
+ mdio_write(tp, 0x06, 0x00bf); | |
+ mdio_write(tp, 0x06, 0x85aa); | |
+ mdio_write(tp, 0x06, 0x0237); | |
+ mdio_write(tp, 0x06, 0x23ee); | |
+ mdio_write(tp, 0x06, 0x8602); | |
+ mdio_write(tp, 0x06, 0x02ae); | |
+ mdio_write(tp, 0x06, 0x0413); | |
+ mdio_write(tp, 0x06, 0xa38b); | |
+ mdio_write(tp, 0x06, 0xb4d3); | |
+ mdio_write(tp, 0x06, 0x8012); | |
+ mdio_write(tp, 0x06, 0x17a2); | |
+ mdio_write(tp, 0x06, 0x04ad); | |
+ mdio_write(tp, 0x06, 0xffef); | |
+ mdio_write(tp, 0x06, 0x96fe); | |
+ mdio_write(tp, 0x06, 0xfdfc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xf9e0); | |
+ mdio_write(tp, 0x06, 0x8b85); | |
+ mdio_write(tp, 0x06, 0xad25); | |
+ mdio_write(tp, 0x06, 0x48e0); | |
+ mdio_write(tp, 0x06, 0x8a96); | |
+ mdio_write(tp, 0x06, 0xe18a); | |
+ mdio_write(tp, 0x06, 0x977c); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x9e35); | |
+ mdio_write(tp, 0x06, 0xee8a); | |
+ mdio_write(tp, 0x06, 0x9600); | |
+ mdio_write(tp, 0x06, 0xee8a); | |
+ mdio_write(tp, 0x06, 0x9700); | |
+ mdio_write(tp, 0x06, 0xe08a); | |
+ mdio_write(tp, 0x06, 0xbee1); | |
+ mdio_write(tp, 0x06, 0x8abf); | |
+ mdio_write(tp, 0x06, 0xe286); | |
+ mdio_write(tp, 0x06, 0x10e3); | |
+ mdio_write(tp, 0x06, 0x8611); | |
+ mdio_write(tp, 0x06, 0x0236); | |
+ mdio_write(tp, 0x06, 0x1aad); | |
+ mdio_write(tp, 0x06, 0x2012); | |
+ mdio_write(tp, 0x06, 0xee8a); | |
+ mdio_write(tp, 0x06, 0x9603); | |
+ mdio_write(tp, 0x06, 0xee8a); | |
+ mdio_write(tp, 0x06, 0x97b7); | |
+ mdio_write(tp, 0x06, 0xee86); | |
+ mdio_write(tp, 0x06, 0x1000); | |
+ mdio_write(tp, 0x06, 0xee86); | |
+ mdio_write(tp, 0x06, 0x1100); | |
+ mdio_write(tp, 0x06, 0xae11); | |
+ mdio_write(tp, 0x06, 0x15e6); | |
+ mdio_write(tp, 0x06, 0x8610); | |
+ mdio_write(tp, 0x06, 0xe786); | |
+ mdio_write(tp, 0x06, 0x11ae); | |
+ mdio_write(tp, 0x06, 0x08ee); | |
+ mdio_write(tp, 0x06, 0x8610); | |
+ mdio_write(tp, 0x06, 0x00ee); | |
+ mdio_write(tp, 0x06, 0x8611); | |
+ mdio_write(tp, 0x06, 0x00fd); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8fa); | |
+ mdio_write(tp, 0x06, 0xef69); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0x00e1); | |
+ mdio_write(tp, 0x06, 0xe001); | |
+ mdio_write(tp, 0x06, 0xad27); | |
+ mdio_write(tp, 0x06, 0x32e0); | |
+ mdio_write(tp, 0x06, 0x8b40); | |
+ mdio_write(tp, 0x06, 0xf720); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x40bf); | |
+ mdio_write(tp, 0x06, 0x31f5); | |
+ mdio_write(tp, 0x06, 0x0236); | |
+ mdio_write(tp, 0x06, 0xf6ad); | |
+ mdio_write(tp, 0x06, 0x2821); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0x20e1); | |
+ mdio_write(tp, 0x06, 0xe021); | |
+ mdio_write(tp, 0x06, 0xad20); | |
+ mdio_write(tp, 0x06, 0x18e0); | |
+ mdio_write(tp, 0x06, 0x8b40); | |
+ mdio_write(tp, 0x06, 0xf620); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x40ee); | |
+ mdio_write(tp, 0x06, 0x8b3b); | |
+ mdio_write(tp, 0x06, 0xffe0); | |
+ mdio_write(tp, 0x06, 0x8a8a); | |
+ mdio_write(tp, 0x06, 0xe18a); | |
+ mdio_write(tp, 0x06, 0x8be4); | |
+ mdio_write(tp, 0x06, 0xe000); | |
+ mdio_write(tp, 0x06, 0xe5e0); | |
+ mdio_write(tp, 0x06, 0x01ef); | |
+ mdio_write(tp, 0x06, 0x96fe); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8fa); | |
+ mdio_write(tp, 0x06, 0xef69); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x80ad); | |
+ mdio_write(tp, 0x06, 0x2722); | |
+ mdio_write(tp, 0x06, 0xbf44); | |
+ mdio_write(tp, 0x06, 0xfc02); | |
+ mdio_write(tp, 0x06, 0x36f6); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x441f); | |
+ mdio_write(tp, 0x06, 0x019e); | |
+ mdio_write(tp, 0x06, 0x15e5); | |
+ mdio_write(tp, 0x06, 0x8b44); | |
+ mdio_write(tp, 0x06, 0xad29); | |
+ mdio_write(tp, 0x06, 0x07ac); | |
+ mdio_write(tp, 0x06, 0x2804); | |
+ mdio_write(tp, 0x06, 0xd101); | |
+ mdio_write(tp, 0x06, 0xae02); | |
+ mdio_write(tp, 0x06, 0xd100); | |
+ mdio_write(tp, 0x06, 0xbf85); | |
+ mdio_write(tp, 0x06, 0xb002); | |
+ mdio_write(tp, 0x06, 0x3723); | |
+ mdio_write(tp, 0x06, 0xef96); | |
+ mdio_write(tp, 0x06, 0xfefc); | |
+ mdio_write(tp, 0x06, 0x0400); | |
+ mdio_write(tp, 0x06, 0xe140); | |
+ mdio_write(tp, 0x06, 0x77e1); | |
+ mdio_write(tp, 0x06, 0x40dd); | |
+ mdio_write(tp, 0x06, 0xe022); | |
+ mdio_write(tp, 0x06, 0x32e1); | |
+ mdio_write(tp, 0x06, 0x5074); | |
+ mdio_write(tp, 0x06, 0xe144); | |
+ mdio_write(tp, 0x06, 0xffe0); | |
+ mdio_write(tp, 0x06, 0xdaff); | |
+ mdio_write(tp, 0x06, 0xe0c0); | |
+ mdio_write(tp, 0x06, 0x52e0); | |
+ mdio_write(tp, 0x06, 0xeed9); | |
+ mdio_write(tp, 0x06, 0xe04c); | |
+ mdio_write(tp, 0x06, 0xbbe0); | |
+ mdio_write(tp, 0x06, 0x2a00); | |
+ mdio_write(tp, 0x05, 0xe142); | |
+ gphy_val = mdio_read(tp, 0x06); | |
+ gphy_val |= BIT_0; | |
+ mdio_write(tp, 0x06, gphy_val); | |
+ mdio_write(tp, 0x05, 0xe140); | |
+ gphy_val = mdio_read(tp, 0x06); | |
+ gphy_val |= BIT_0; | |
+ mdio_write(tp, 0x06, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ for (i = 0; i < 200; i++) { | |
+ udelay(100); | |
+ gphy_val = mdio_read(tp, 0x00); | |
+ if (gphy_val & BIT_7) | |
+ break; | |
+ } | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x0042); | |
+ mdio_write(tp, 0x18, 0x2300); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x0023); | |
+ if (tp->RequiredSecLanDonglePatch) { | |
+ gphy_val = mdio_read(tp, 0x17); | |
+ gphy_val &= ~BIT_2; | |
+ mdio_write(tp, 0x17, gphy_val); | |
+ } | |
+ | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x00, 0x9200); | |
+} | |
+ | |
+static void | |
+rtl8168_set_phy_mcu_8168f_1(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ unsigned int gphy_val,i; | |
+ | |
+ mdio_write(tp,0x1f, 0x0000); | |
+ mdio_write(tp,0x00, 0x1800); | |
+ gphy_val = mdio_read(tp, 0x15); | |
+ gphy_val &= ~(BIT_12); | |
+ mdio_write(tp,0x15, gphy_val); | |
+ mdio_write(tp,0x00, 0x4800); | |
+ mdio_write(tp,0x1f, 0x0007); | |
+ mdio_write(tp,0x1e, 0x002f); | |
+ for (i = 0; i < 1000; i++) { | |
+ udelay(100); | |
+ gphy_val = mdio_read(tp, 0x1c); | |
+ if (gphy_val & 0x0080) | |
+ break; | |
+ } | |
+ mdio_write(tp,0x1f, 0x0000); | |
+ mdio_write(tp,0x00, 0x1800); | |
+ mdio_write(tp,0x1f, 0x0007); | |
+ mdio_write(tp,0x1e, 0x0023); | |
+ for (i = 0; i < 200; i++) { | |
+ udelay(100); | |
+ gphy_val = mdio_read(tp, 0x18); | |
+ if (!(gphy_val & 0x0001)) | |
+ break; | |
+ } | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ mdio_write(tp, 0x05, 0xfff6); | |
+ mdio_write(tp, 0x06, 0x0080); | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x0023); | |
+ mdio_write(tp, 0x16, 0x0306); | |
+ mdio_write(tp, 0x16, 0x0307); | |
+ mdio_write(tp, 0x15, 0x0194); | |
+ mdio_write(tp, 0x19, 0x407D); | |
+ mdio_write(tp, 0x15, 0x0098); | |
+ mdio_write(tp, 0x19, 0x7c0b); | |
+ mdio_write(tp, 0x15, 0x0099); | |
+ mdio_write(tp, 0x19, 0x6c0b); | |
+ mdio_write(tp, 0x15, 0x00eb); | |
+ mdio_write(tp, 0x19, 0x6c0b); | |
+ mdio_write(tp, 0x15, 0x00f8); | |
+ mdio_write(tp, 0x19, 0x6f0b); | |
+ mdio_write(tp, 0x15, 0x00fe); | |
+ mdio_write(tp, 0x19, 0x6f0f); | |
+ mdio_write(tp, 0x15, 0x00db); | |
+ mdio_write(tp, 0x19, 0x6f09); | |
+ mdio_write(tp, 0x15, 0x00dc); | |
+ mdio_write(tp, 0x19, 0xaefd); | |
+ mdio_write(tp, 0x15, 0x00dd); | |
+ mdio_write(tp, 0x19, 0x6f0b); | |
+ mdio_write(tp, 0x15, 0x00de); | |
+ mdio_write(tp, 0x19, 0xc60b); | |
+ mdio_write(tp, 0x15, 0x00df); | |
+ mdio_write(tp, 0x19, 0x00fa); | |
+ mdio_write(tp, 0x15, 0x00e0); | |
+ mdio_write(tp, 0x19, 0x30e1); | |
+ mdio_write(tp, 0x15, 0x020c); | |
+ mdio_write(tp, 0x19, 0x3224); | |
+ mdio_write(tp, 0x15, 0x020e); | |
+ mdio_write(tp, 0x19, 0x9813); | |
+ mdio_write(tp, 0x15, 0x020f); | |
+ mdio_write(tp, 0x19, 0x7801); | |
+ mdio_write(tp, 0x15, 0x0210); | |
+ mdio_write(tp, 0x19, 0x930f); | |
+ mdio_write(tp, 0x15, 0x0211); | |
+ mdio_write(tp, 0x19, 0x9206); | |
+ mdio_write(tp, 0x15, 0x0212); | |
+ mdio_write(tp, 0x19, 0x4002); | |
+ mdio_write(tp, 0x15, 0x0213); | |
+ mdio_write(tp, 0x19, 0x7800); | |
+ mdio_write(tp, 0x15, 0x0214); | |
+ mdio_write(tp, 0x19, 0x588f); | |
+ mdio_write(tp, 0x15, 0x0215); | |
+ mdio_write(tp, 0x19, 0x5520); | |
+ mdio_write(tp, 0x15, 0x0216); | |
+ mdio_write(tp, 0x19, 0x3224); | |
+ mdio_write(tp, 0x15, 0x0217); | |
+ mdio_write(tp, 0x19, 0x4002); | |
+ mdio_write(tp, 0x15, 0x0218); | |
+ mdio_write(tp, 0x19, 0x7800); | |
+ mdio_write(tp, 0x15, 0x0219); | |
+ mdio_write(tp, 0x19, 0x588d); | |
+ mdio_write(tp, 0x15, 0x021a); | |
+ mdio_write(tp, 0x19, 0x5540); | |
+ mdio_write(tp, 0x15, 0x021b); | |
+ mdio_write(tp, 0x19, 0x9e03); | |
+ mdio_write(tp, 0x15, 0x021c); | |
+ mdio_write(tp, 0x19, 0x7c40); | |
+ mdio_write(tp, 0x15, 0x021d); | |
+ mdio_write(tp, 0x19, 0x6840); | |
+ mdio_write(tp, 0x15, 0x021e); | |
+ mdio_write(tp, 0x19, 0x3224); | |
+ mdio_write(tp, 0x15, 0x021f); | |
+ mdio_write(tp, 0x19, 0x4002); | |
+ mdio_write(tp, 0x15, 0x0220); | |
+ mdio_write(tp, 0x19, 0x3224); | |
+ mdio_write(tp, 0x15, 0x0221); | |
+ mdio_write(tp, 0x19, 0x9e03); | |
+ mdio_write(tp, 0x15, 0x0222); | |
+ mdio_write(tp, 0x19, 0x7c40); | |
+ mdio_write(tp, 0x15, 0x0223); | |
+ mdio_write(tp, 0x19, 0x6840); | |
+ mdio_write(tp, 0x15, 0x0224); | |
+ mdio_write(tp, 0x19, 0x7800); | |
+ mdio_write(tp, 0x15, 0x0225); | |
+ mdio_write(tp, 0x19, 0x3231); | |
+ mdio_write(tp, 0x15, 0x0000); | |
+ mdio_write(tp, 0x16, 0x0306); | |
+ mdio_write(tp, 0x16, 0x0300); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ mdio_write(tp, 0x05, 0xfff6); | |
+ mdio_write(tp, 0x06, 0x0080); | |
+ mdio_write(tp, 0x05, 0x8000); | |
+ mdio_write(tp, 0x06, 0x0280); | |
+ mdio_write(tp, 0x06, 0x48f7); | |
+ mdio_write(tp, 0x06, 0x00e0); | |
+ mdio_write(tp, 0x06, 0xfff7); | |
+ mdio_write(tp, 0x06, 0xa080); | |
+ mdio_write(tp, 0x06, 0x02ae); | |
+ mdio_write(tp, 0x06, 0xf602); | |
+ mdio_write(tp, 0x06, 0x0118); | |
+ mdio_write(tp, 0x06, 0x0201); | |
+ mdio_write(tp, 0x06, 0x2502); | |
+ mdio_write(tp, 0x06, 0x8090); | |
+ mdio_write(tp, 0x06, 0x0201); | |
+ mdio_write(tp, 0x06, 0x4202); | |
+ mdio_write(tp, 0x06, 0x015c); | |
+ mdio_write(tp, 0x06, 0x0280); | |
+ mdio_write(tp, 0x06, 0xad02); | |
+ mdio_write(tp, 0x06, 0x80ca); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x88e1); | |
+ mdio_write(tp, 0x06, 0x8b89); | |
+ mdio_write(tp, 0x06, 0x1e01); | |
+ mdio_write(tp, 0x06, 0xe18b); | |
+ mdio_write(tp, 0x06, 0x8a1e); | |
+ mdio_write(tp, 0x06, 0x01e1); | |
+ mdio_write(tp, 0x06, 0x8b8b); | |
+ mdio_write(tp, 0x06, 0x1e01); | |
+ mdio_write(tp, 0x06, 0xe18b); | |
+ mdio_write(tp, 0x06, 0x8c1e); | |
+ mdio_write(tp, 0x06, 0x01e1); | |
+ mdio_write(tp, 0x06, 0x8b8d); | |
+ mdio_write(tp, 0x06, 0x1e01); | |
+ mdio_write(tp, 0x06, 0xe18b); | |
+ mdio_write(tp, 0x06, 0x8e1e); | |
+ mdio_write(tp, 0x06, 0x01a0); | |
+ mdio_write(tp, 0x06, 0x00c7); | |
+ mdio_write(tp, 0x06, 0xaebb); | |
+ mdio_write(tp, 0x06, 0xd484); | |
+ mdio_write(tp, 0x06, 0x3ce4); | |
+ mdio_write(tp, 0x06, 0x8b92); | |
+ mdio_write(tp, 0x06, 0xe58b); | |
+ mdio_write(tp, 0x06, 0x93ee); | |
+ mdio_write(tp, 0x06, 0x8ac8); | |
+ mdio_write(tp, 0x06, 0x03ee); | |
+ mdio_write(tp, 0x06, 0x8aca); | |
+ mdio_write(tp, 0x06, 0x60ee); | |
+ mdio_write(tp, 0x06, 0x8ac0); | |
+ mdio_write(tp, 0x06, 0x00ee); | |
+ mdio_write(tp, 0x06, 0x8ac1); | |
+ mdio_write(tp, 0x06, 0x00ee); | |
+ mdio_write(tp, 0x06, 0x8abe); | |
+ mdio_write(tp, 0x06, 0x07ee); | |
+ mdio_write(tp, 0x06, 0x8abf); | |
+ mdio_write(tp, 0x06, 0x73ee); | |
+ mdio_write(tp, 0x06, 0x8a95); | |
+ mdio_write(tp, 0x06, 0x02bf); | |
+ mdio_write(tp, 0x06, 0x8b88); | |
+ mdio_write(tp, 0x06, 0xec00); | |
+ mdio_write(tp, 0x06, 0x19a9); | |
+ mdio_write(tp, 0x06, 0x8b90); | |
+ mdio_write(tp, 0x06, 0xf9ee); | |
+ mdio_write(tp, 0x06, 0xfff6); | |
+ mdio_write(tp, 0x06, 0x00ee); | |
+ mdio_write(tp, 0x06, 0xfff7); | |
+ mdio_write(tp, 0x06, 0xfed1); | |
+ mdio_write(tp, 0x06, 0x00bf); | |
+ mdio_write(tp, 0x06, 0x85a4); | |
+ mdio_write(tp, 0x06, 0x0238); | |
+ mdio_write(tp, 0x06, 0x7dd1); | |
+ mdio_write(tp, 0x06, 0x01bf); | |
+ mdio_write(tp, 0x06, 0x85a7); | |
+ mdio_write(tp, 0x06, 0x0238); | |
+ mdio_write(tp, 0x06, 0x7d04); | |
+ mdio_write(tp, 0x06, 0xf8e0); | |
+ mdio_write(tp, 0x06, 0x8b8a); | |
+ mdio_write(tp, 0x06, 0xad20); | |
+ mdio_write(tp, 0x06, 0x14ee); | |
+ mdio_write(tp, 0x06, 0x8b8a); | |
+ mdio_write(tp, 0x06, 0x0002); | |
+ mdio_write(tp, 0x06, 0x204b); | |
+ mdio_write(tp, 0x06, 0xe0e4); | |
+ mdio_write(tp, 0x06, 0x26e1); | |
+ mdio_write(tp, 0x06, 0xe427); | |
+ mdio_write(tp, 0x06, 0xeee4); | |
+ mdio_write(tp, 0x06, 0x2623); | |
+ mdio_write(tp, 0x06, 0xe5e4); | |
+ mdio_write(tp, 0x06, 0x27fc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x8dad); | |
+ mdio_write(tp, 0x06, 0x2014); | |
+ mdio_write(tp, 0x06, 0xee8b); | |
+ mdio_write(tp, 0x06, 0x8d00); | |
+ mdio_write(tp, 0x06, 0xe08a); | |
+ mdio_write(tp, 0x06, 0x5a78); | |
+ mdio_write(tp, 0x06, 0x039e); | |
+ mdio_write(tp, 0x06, 0x0902); | |
+ mdio_write(tp, 0x06, 0x05e8); | |
+ mdio_write(tp, 0x06, 0x0281); | |
+ mdio_write(tp, 0x06, 0x4f02); | |
+ mdio_write(tp, 0x06, 0x326c); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8e0); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0xad20); | |
+ mdio_write(tp, 0x06, 0x1df6); | |
+ mdio_write(tp, 0x06, 0x20e4); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0x022f); | |
+ mdio_write(tp, 0x06, 0x0902); | |
+ mdio_write(tp, 0x06, 0x2ab0); | |
+ mdio_write(tp, 0x06, 0x0285); | |
+ mdio_write(tp, 0x06, 0x1602); | |
+ mdio_write(tp, 0x06, 0x03ba); | |
+ mdio_write(tp, 0x06, 0x0284); | |
+ mdio_write(tp, 0x06, 0xe502); | |
+ mdio_write(tp, 0x06, 0x2df1); | |
+ mdio_write(tp, 0x06, 0x0283); | |
+ mdio_write(tp, 0x06, 0x8302); | |
+ mdio_write(tp, 0x06, 0x0475); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x8ead); | |
+ mdio_write(tp, 0x06, 0x210b); | |
+ mdio_write(tp, 0x06, 0xf621); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x8e02); | |
+ mdio_write(tp, 0x06, 0x83f8); | |
+ mdio_write(tp, 0x06, 0x021c); | |
+ mdio_write(tp, 0x06, 0x99e0); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0xad22); | |
+ mdio_write(tp, 0x06, 0x08f6); | |
+ mdio_write(tp, 0x06, 0x22e4); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0x0235); | |
+ mdio_write(tp, 0x06, 0x63e0); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0xad23); | |
+ mdio_write(tp, 0x06, 0x08f6); | |
+ mdio_write(tp, 0x06, 0x23e4); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0x0231); | |
+ mdio_write(tp, 0x06, 0x57e0); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0xad24); | |
+ mdio_write(tp, 0x06, 0x05f6); | |
+ mdio_write(tp, 0x06, 0x24e4); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x8ead); | |
+ mdio_write(tp, 0x06, 0x2505); | |
+ mdio_write(tp, 0x06, 0xf625); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x8ee0); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0xad26); | |
+ mdio_write(tp, 0x06, 0x08f6); | |
+ mdio_write(tp, 0x06, 0x26e4); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0x022d); | |
+ mdio_write(tp, 0x06, 0x1ce0); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0xad27); | |
+ mdio_write(tp, 0x06, 0x05f6); | |
+ mdio_write(tp, 0x06, 0x27e4); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0x0203); | |
+ mdio_write(tp, 0x06, 0x80fc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xf9e0); | |
+ mdio_write(tp, 0x06, 0x8b81); | |
+ mdio_write(tp, 0x06, 0xac26); | |
+ mdio_write(tp, 0x06, 0x1ae0); | |
+ mdio_write(tp, 0x06, 0x8b81); | |
+ mdio_write(tp, 0x06, 0xac21); | |
+ mdio_write(tp, 0x06, 0x14e0); | |
+ mdio_write(tp, 0x06, 0x8b85); | |
+ mdio_write(tp, 0x06, 0xac20); | |
+ mdio_write(tp, 0x06, 0x0ee0); | |
+ mdio_write(tp, 0x06, 0x8b85); | |
+ mdio_write(tp, 0x06, 0xac23); | |
+ mdio_write(tp, 0x06, 0x08e0); | |
+ mdio_write(tp, 0x06, 0x8b87); | |
+ mdio_write(tp, 0x06, 0xac24); | |
+ mdio_write(tp, 0x06, 0x02ae); | |
+ mdio_write(tp, 0x06, 0x3802); | |
+ mdio_write(tp, 0x06, 0x1ac2); | |
+ mdio_write(tp, 0x06, 0xeee4); | |
+ mdio_write(tp, 0x06, 0x1c04); | |
+ mdio_write(tp, 0x06, 0xeee4); | |
+ mdio_write(tp, 0x06, 0x1d04); | |
+ mdio_write(tp, 0x06, 0xe2e0); | |
+ mdio_write(tp, 0x06, 0x7ce3); | |
+ mdio_write(tp, 0x06, 0xe07d); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0x38e1); | |
+ mdio_write(tp, 0x06, 0xe039); | |
+ mdio_write(tp, 0x06, 0xad2e); | |
+ mdio_write(tp, 0x06, 0x1bad); | |
+ mdio_write(tp, 0x06, 0x390d); | |
+ mdio_write(tp, 0x06, 0xd101); | |
+ mdio_write(tp, 0x06, 0xbf22); | |
+ mdio_write(tp, 0x06, 0x7a02); | |
+ mdio_write(tp, 0x06, 0x387d); | |
+ mdio_write(tp, 0x06, 0x0281); | |
+ mdio_write(tp, 0x06, 0xacae); | |
+ mdio_write(tp, 0x06, 0x0bac); | |
+ mdio_write(tp, 0x06, 0x3802); | |
+ mdio_write(tp, 0x06, 0xae06); | |
+ mdio_write(tp, 0x06, 0x0281); | |
+ mdio_write(tp, 0x06, 0xe902); | |
+ mdio_write(tp, 0x06, 0x822e); | |
+ mdio_write(tp, 0x06, 0x021a); | |
+ mdio_write(tp, 0x06, 0xd3fd); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8e1); | |
+ mdio_write(tp, 0x06, 0x8af4); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x81ad); | |
+ mdio_write(tp, 0x06, 0x2602); | |
+ mdio_write(tp, 0x06, 0xf728); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x81ad); | |
+ mdio_write(tp, 0x06, 0x2105); | |
+ mdio_write(tp, 0x06, 0x0222); | |
+ mdio_write(tp, 0x06, 0x8ef7); | |
+ mdio_write(tp, 0x06, 0x29e0); | |
+ mdio_write(tp, 0x06, 0x8b85); | |
+ mdio_write(tp, 0x06, 0xad20); | |
+ mdio_write(tp, 0x06, 0x0502); | |
+ mdio_write(tp, 0x06, 0x14b8); | |
+ mdio_write(tp, 0x06, 0xf72a); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x85ad); | |
+ mdio_write(tp, 0x06, 0x2305); | |
+ mdio_write(tp, 0x06, 0x0212); | |
+ mdio_write(tp, 0x06, 0xf4f7); | |
+ mdio_write(tp, 0x06, 0x2be0); | |
+ mdio_write(tp, 0x06, 0x8b87); | |
+ mdio_write(tp, 0x06, 0xad24); | |
+ mdio_write(tp, 0x06, 0x0502); | |
+ mdio_write(tp, 0x06, 0x8284); | |
+ mdio_write(tp, 0x06, 0xf72c); | |
+ mdio_write(tp, 0x06, 0xe58a); | |
+ mdio_write(tp, 0x06, 0xf4fc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x81ad); | |
+ mdio_write(tp, 0x06, 0x2600); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x81ad); | |
+ mdio_write(tp, 0x06, 0x2109); | |
+ mdio_write(tp, 0x06, 0xe08a); | |
+ mdio_write(tp, 0x06, 0xf4ac); | |
+ mdio_write(tp, 0x06, 0x2003); | |
+ mdio_write(tp, 0x06, 0x0222); | |
+ mdio_write(tp, 0x06, 0x7de0); | |
+ mdio_write(tp, 0x06, 0x8b85); | |
+ mdio_write(tp, 0x06, 0xad20); | |
+ mdio_write(tp, 0x06, 0x09e0); | |
+ mdio_write(tp, 0x06, 0x8af4); | |
+ mdio_write(tp, 0x06, 0xac21); | |
+ mdio_write(tp, 0x06, 0x0302); | |
+ mdio_write(tp, 0x06, 0x1408); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x85ad); | |
+ mdio_write(tp, 0x06, 0x2309); | |
+ mdio_write(tp, 0x06, 0xe08a); | |
+ mdio_write(tp, 0x06, 0xf4ac); | |
+ mdio_write(tp, 0x06, 0x2203); | |
+ mdio_write(tp, 0x06, 0x0213); | |
+ mdio_write(tp, 0x06, 0x07e0); | |
+ mdio_write(tp, 0x06, 0x8b87); | |
+ mdio_write(tp, 0x06, 0xad24); | |
+ mdio_write(tp, 0x06, 0x09e0); | |
+ mdio_write(tp, 0x06, 0x8af4); | |
+ mdio_write(tp, 0x06, 0xac23); | |
+ mdio_write(tp, 0x06, 0x0302); | |
+ mdio_write(tp, 0x06, 0x8289); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8e1); | |
+ mdio_write(tp, 0x06, 0x8af4); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x81ad); | |
+ mdio_write(tp, 0x06, 0x2602); | |
+ mdio_write(tp, 0x06, 0xf628); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x81ad); | |
+ mdio_write(tp, 0x06, 0x210a); | |
+ mdio_write(tp, 0x06, 0xe083); | |
+ mdio_write(tp, 0x06, 0xecf6); | |
+ mdio_write(tp, 0x06, 0x27a0); | |
+ mdio_write(tp, 0x06, 0x0502); | |
+ mdio_write(tp, 0x06, 0xf629); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x85ad); | |
+ mdio_write(tp, 0x06, 0x2008); | |
+ mdio_write(tp, 0x06, 0xe08a); | |
+ mdio_write(tp, 0x06, 0xe8ad); | |
+ mdio_write(tp, 0x06, 0x2102); | |
+ mdio_write(tp, 0x06, 0xf62a); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x85ad); | |
+ mdio_write(tp, 0x06, 0x2308); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x20a0); | |
+ mdio_write(tp, 0x06, 0x0302); | |
+ mdio_write(tp, 0x06, 0xf62b); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x87ad); | |
+ mdio_write(tp, 0x06, 0x2408); | |
+ mdio_write(tp, 0x06, 0xe08a); | |
+ mdio_write(tp, 0x06, 0xc2a0); | |
+ mdio_write(tp, 0x06, 0x0302); | |
+ mdio_write(tp, 0x06, 0xf62c); | |
+ mdio_write(tp, 0x06, 0xe58a); | |
+ mdio_write(tp, 0x06, 0xf4a1); | |
+ mdio_write(tp, 0x06, 0x0008); | |
+ mdio_write(tp, 0x06, 0xd100); | |
+ mdio_write(tp, 0x06, 0xbf22); | |
+ mdio_write(tp, 0x06, 0x7a02); | |
+ mdio_write(tp, 0x06, 0x387d); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xee8a); | |
+ mdio_write(tp, 0x06, 0xc200); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x87ad); | |
+ mdio_write(tp, 0x06, 0x241e); | |
+ mdio_write(tp, 0x06, 0xe08a); | |
+ mdio_write(tp, 0x06, 0xc2a0); | |
+ mdio_write(tp, 0x06, 0x0005); | |
+ mdio_write(tp, 0x06, 0x0282); | |
+ mdio_write(tp, 0x06, 0xb0ae); | |
+ mdio_write(tp, 0x06, 0xf5a0); | |
+ mdio_write(tp, 0x06, 0x0105); | |
+ mdio_write(tp, 0x06, 0x0282); | |
+ mdio_write(tp, 0x06, 0xc0ae); | |
+ mdio_write(tp, 0x06, 0x0ba0); | |
+ mdio_write(tp, 0x06, 0x0205); | |
+ mdio_write(tp, 0x06, 0x0282); | |
+ mdio_write(tp, 0x06, 0xcaae); | |
+ mdio_write(tp, 0x06, 0x03a0); | |
+ mdio_write(tp, 0x06, 0x0300); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8fa); | |
+ mdio_write(tp, 0x06, 0xef69); | |
+ mdio_write(tp, 0x06, 0x0282); | |
+ mdio_write(tp, 0x06, 0xe1ee); | |
+ mdio_write(tp, 0x06, 0x8ac2); | |
+ mdio_write(tp, 0x06, 0x01ef); | |
+ mdio_write(tp, 0x06, 0x96fe); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8ee); | |
+ mdio_write(tp, 0x06, 0x8ac9); | |
+ mdio_write(tp, 0x06, 0x0002); | |
+ mdio_write(tp, 0x06, 0x8317); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8e0); | |
+ mdio_write(tp, 0x06, 0x8ac8); | |
+ mdio_write(tp, 0x06, 0xe18a); | |
+ mdio_write(tp, 0x06, 0xc91f); | |
+ mdio_write(tp, 0x06, 0x019e); | |
+ mdio_write(tp, 0x06, 0x0611); | |
+ mdio_write(tp, 0x06, 0xe58a); | |
+ mdio_write(tp, 0x06, 0xc9ae); | |
+ mdio_write(tp, 0x06, 0x04ee); | |
+ mdio_write(tp, 0x06, 0x8ac2); | |
+ mdio_write(tp, 0x06, 0x01fc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xf9fa); | |
+ mdio_write(tp, 0x06, 0xef69); | |
+ mdio_write(tp, 0x06, 0xfbbf); | |
+ mdio_write(tp, 0x06, 0x8ac4); | |
+ mdio_write(tp, 0x06, 0xef79); | |
+ mdio_write(tp, 0x06, 0xd200); | |
+ mdio_write(tp, 0x06, 0xd400); | |
+ mdio_write(tp, 0x06, 0x221e); | |
+ mdio_write(tp, 0x06, 0x02bf); | |
+ mdio_write(tp, 0x06, 0x3024); | |
+ mdio_write(tp, 0x06, 0x0238); | |
+ mdio_write(tp, 0x06, 0x7dbf); | |
+ mdio_write(tp, 0x06, 0x13ff); | |
+ mdio_write(tp, 0x06, 0x0238); | |
+ mdio_write(tp, 0x06, 0x500d); | |
+ mdio_write(tp, 0x06, 0x4559); | |
+ mdio_write(tp, 0x06, 0x1fef); | |
+ mdio_write(tp, 0x06, 0x97dd); | |
+ mdio_write(tp, 0x06, 0xd308); | |
+ mdio_write(tp, 0x06, 0x1a93); | |
+ mdio_write(tp, 0x06, 0xdd12); | |
+ mdio_write(tp, 0x06, 0x17a2); | |
+ mdio_write(tp, 0x06, 0x04de); | |
+ mdio_write(tp, 0x06, 0xffef); | |
+ mdio_write(tp, 0x06, 0x96fe); | |
+ mdio_write(tp, 0x06, 0xfdfc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xf9fa); | |
+ mdio_write(tp, 0x06, 0xef69); | |
+ mdio_write(tp, 0x06, 0xfbee); | |
+ mdio_write(tp, 0x06, 0x8ac2); | |
+ mdio_write(tp, 0x06, 0x03d5); | |
+ mdio_write(tp, 0x06, 0x0080); | |
+ mdio_write(tp, 0x06, 0xbf8a); | |
+ mdio_write(tp, 0x06, 0xc4ef); | |
+ mdio_write(tp, 0x06, 0x79ef); | |
+ mdio_write(tp, 0x06, 0x45bf); | |
+ mdio_write(tp, 0x06, 0x3024); | |
+ mdio_write(tp, 0x06, 0x0238); | |
+ mdio_write(tp, 0x06, 0x7dbf); | |
+ mdio_write(tp, 0x06, 0x13ff); | |
+ mdio_write(tp, 0x06, 0x0238); | |
+ mdio_write(tp, 0x06, 0x50ad); | |
+ mdio_write(tp, 0x06, 0x2702); | |
+ mdio_write(tp, 0x06, 0x78ff); | |
+ mdio_write(tp, 0x06, 0xe18a); | |
+ mdio_write(tp, 0x06, 0xca1b); | |
+ mdio_write(tp, 0x06, 0x01aa); | |
+ mdio_write(tp, 0x06, 0x2eef); | |
+ mdio_write(tp, 0x06, 0x97d9); | |
+ mdio_write(tp, 0x06, 0x7900); | |
+ mdio_write(tp, 0x06, 0x9e2b); | |
+ mdio_write(tp, 0x06, 0x81dd); | |
+ mdio_write(tp, 0x06, 0xbf85); | |
+ mdio_write(tp, 0x06, 0xad02); | |
+ mdio_write(tp, 0x06, 0x387d); | |
+ mdio_write(tp, 0x06, 0xd101); | |
+ mdio_write(tp, 0x06, 0xef02); | |
+ mdio_write(tp, 0x06, 0x100c); | |
+ mdio_write(tp, 0x06, 0x11b0); | |
+ mdio_write(tp, 0x06, 0xfc0d); | |
+ mdio_write(tp, 0x06, 0x11bf); | |
+ mdio_write(tp, 0x06, 0x85aa); | |
+ mdio_write(tp, 0x06, 0x0238); | |
+ mdio_write(tp, 0x06, 0x7dd1); | |
+ mdio_write(tp, 0x06, 0x00bf); | |
+ mdio_write(tp, 0x06, 0x85aa); | |
+ mdio_write(tp, 0x06, 0x0238); | |
+ mdio_write(tp, 0x06, 0x7dee); | |
+ mdio_write(tp, 0x06, 0x8ac2); | |
+ mdio_write(tp, 0x06, 0x02ae); | |
+ mdio_write(tp, 0x06, 0x0413); | |
+ mdio_write(tp, 0x06, 0xa38b); | |
+ mdio_write(tp, 0x06, 0xb4d3); | |
+ mdio_write(tp, 0x06, 0x8012); | |
+ mdio_write(tp, 0x06, 0x17a2); | |
+ mdio_write(tp, 0x06, 0x04ad); | |
+ mdio_write(tp, 0x06, 0xffef); | |
+ mdio_write(tp, 0x06, 0x96fe); | |
+ mdio_write(tp, 0x06, 0xfdfc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xf9e0); | |
+ mdio_write(tp, 0x06, 0x8b85); | |
+ mdio_write(tp, 0x06, 0xad25); | |
+ mdio_write(tp, 0x06, 0x48e0); | |
+ mdio_write(tp, 0x06, 0x8a96); | |
+ mdio_write(tp, 0x06, 0xe18a); | |
+ mdio_write(tp, 0x06, 0x977c); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x9e35); | |
+ mdio_write(tp, 0x06, 0xee8a); | |
+ mdio_write(tp, 0x06, 0x9600); | |
+ mdio_write(tp, 0x06, 0xee8a); | |
+ mdio_write(tp, 0x06, 0x9700); | |
+ mdio_write(tp, 0x06, 0xe08a); | |
+ mdio_write(tp, 0x06, 0xbee1); | |
+ mdio_write(tp, 0x06, 0x8abf); | |
+ mdio_write(tp, 0x06, 0xe28a); | |
+ mdio_write(tp, 0x06, 0xc0e3); | |
+ mdio_write(tp, 0x06, 0x8ac1); | |
+ mdio_write(tp, 0x06, 0x0237); | |
+ mdio_write(tp, 0x06, 0x74ad); | |
+ mdio_write(tp, 0x06, 0x2012); | |
+ mdio_write(tp, 0x06, 0xee8a); | |
+ mdio_write(tp, 0x06, 0x9603); | |
+ mdio_write(tp, 0x06, 0xee8a); | |
+ mdio_write(tp, 0x06, 0x97b7); | |
+ mdio_write(tp, 0x06, 0xee8a); | |
+ mdio_write(tp, 0x06, 0xc000); | |
+ mdio_write(tp, 0x06, 0xee8a); | |
+ mdio_write(tp, 0x06, 0xc100); | |
+ mdio_write(tp, 0x06, 0xae11); | |
+ mdio_write(tp, 0x06, 0x15e6); | |
+ mdio_write(tp, 0x06, 0x8ac0); | |
+ mdio_write(tp, 0x06, 0xe78a); | |
+ mdio_write(tp, 0x06, 0xc1ae); | |
+ mdio_write(tp, 0x06, 0x08ee); | |
+ mdio_write(tp, 0x06, 0x8ac0); | |
+ mdio_write(tp, 0x06, 0x00ee); | |
+ mdio_write(tp, 0x06, 0x8ac1); | |
+ mdio_write(tp, 0x06, 0x00fd); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xae20); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0x0000); | |
+ mdio_write(tp, 0x06, 0xf8fa); | |
+ mdio_write(tp, 0x06, 0xef69); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0x00e1); | |
+ mdio_write(tp, 0x06, 0xe001); | |
+ mdio_write(tp, 0x06, 0xad27); | |
+ mdio_write(tp, 0x06, 0x32e0); | |
+ mdio_write(tp, 0x06, 0x8b40); | |
+ mdio_write(tp, 0x06, 0xf720); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x40bf); | |
+ mdio_write(tp, 0x06, 0x3230); | |
+ mdio_write(tp, 0x06, 0x0238); | |
+ mdio_write(tp, 0x06, 0x50ad); | |
+ mdio_write(tp, 0x06, 0x2821); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0x20e1); | |
+ mdio_write(tp, 0x06, 0xe021); | |
+ mdio_write(tp, 0x06, 0xad20); | |
+ mdio_write(tp, 0x06, 0x18e0); | |
+ mdio_write(tp, 0x06, 0x8b40); | |
+ mdio_write(tp, 0x06, 0xf620); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x40ee); | |
+ mdio_write(tp, 0x06, 0x8b3b); | |
+ mdio_write(tp, 0x06, 0xffe0); | |
+ mdio_write(tp, 0x06, 0x8a8a); | |
+ mdio_write(tp, 0x06, 0xe18a); | |
+ mdio_write(tp, 0x06, 0x8be4); | |
+ mdio_write(tp, 0x06, 0xe000); | |
+ mdio_write(tp, 0x06, 0xe5e0); | |
+ mdio_write(tp, 0x06, 0x01ef); | |
+ mdio_write(tp, 0x06, 0x96fe); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8f9); | |
+ mdio_write(tp, 0x06, 0xface); | |
+ mdio_write(tp, 0x06, 0xfaef); | |
+ mdio_write(tp, 0x06, 0x69fa); | |
+ mdio_write(tp, 0x06, 0xd401); | |
+ mdio_write(tp, 0x06, 0x55b4); | |
+ mdio_write(tp, 0x06, 0xfebf); | |
+ mdio_write(tp, 0x06, 0x1c1e); | |
+ mdio_write(tp, 0x06, 0x0238); | |
+ mdio_write(tp, 0x06, 0x50ac); | |
+ mdio_write(tp, 0x06, 0x280b); | |
+ mdio_write(tp, 0x06, 0xbf1c); | |
+ mdio_write(tp, 0x06, 0x1b02); | |
+ mdio_write(tp, 0x06, 0x3850); | |
+ mdio_write(tp, 0x06, 0xac28); | |
+ mdio_write(tp, 0x06, 0x49ae); | |
+ mdio_write(tp, 0x06, 0x64bf); | |
+ mdio_write(tp, 0x06, 0x1c1b); | |
+ mdio_write(tp, 0x06, 0x0238); | |
+ mdio_write(tp, 0x06, 0x50ac); | |
+ mdio_write(tp, 0x06, 0x285b); | |
+ mdio_write(tp, 0x06, 0xd000); | |
+ mdio_write(tp, 0x06, 0x0284); | |
+ mdio_write(tp, 0x06, 0xcaac); | |
+ mdio_write(tp, 0x06, 0x2105); | |
+ mdio_write(tp, 0x06, 0xac22); | |
+ mdio_write(tp, 0x06, 0x02ae); | |
+ mdio_write(tp, 0x06, 0x4ebf); | |
+ mdio_write(tp, 0x06, 0xe0c4); | |
+ mdio_write(tp, 0x06, 0xbe85); | |
+ mdio_write(tp, 0x06, 0xf6d2); | |
+ mdio_write(tp, 0x06, 0x04d8); | |
+ mdio_write(tp, 0x06, 0x19d9); | |
+ mdio_write(tp, 0x06, 0x1907); | |
+ mdio_write(tp, 0x06, 0xdc19); | |
+ mdio_write(tp, 0x06, 0xdd19); | |
+ mdio_write(tp, 0x06, 0x0789); | |
+ mdio_write(tp, 0x06, 0x89ef); | |
+ mdio_write(tp, 0x06, 0x645e); | |
+ mdio_write(tp, 0x06, 0x07ff); | |
+ mdio_write(tp, 0x06, 0x0d65); | |
+ mdio_write(tp, 0x06, 0x5cf8); | |
+ mdio_write(tp, 0x06, 0x001e); | |
+ mdio_write(tp, 0x06, 0x46dc); | |
+ mdio_write(tp, 0x06, 0x19dd); | |
+ mdio_write(tp, 0x06, 0x19b2); | |
+ mdio_write(tp, 0x06, 0xe2d4); | |
+ mdio_write(tp, 0x06, 0x0001); | |
+ mdio_write(tp, 0x06, 0xbf1c); | |
+ mdio_write(tp, 0x06, 0x1b02); | |
+ mdio_write(tp, 0x06, 0x387d); | |
+ mdio_write(tp, 0x06, 0xae1d); | |
+ mdio_write(tp, 0x06, 0xbee0); | |
+ mdio_write(tp, 0x06, 0xc4bf); | |
+ mdio_write(tp, 0x06, 0x85f6); | |
+ mdio_write(tp, 0x06, 0xd204); | |
+ mdio_write(tp, 0x06, 0xd819); | |
+ mdio_write(tp, 0x06, 0xd919); | |
+ mdio_write(tp, 0x06, 0x07dc); | |
+ mdio_write(tp, 0x06, 0x19dd); | |
+ mdio_write(tp, 0x06, 0x1907); | |
+ mdio_write(tp, 0x06, 0xb2f4); | |
+ mdio_write(tp, 0x06, 0xd400); | |
+ mdio_write(tp, 0x06, 0x00bf); | |
+ mdio_write(tp, 0x06, 0x1c1b); | |
+ mdio_write(tp, 0x06, 0x0238); | |
+ mdio_write(tp, 0x06, 0x7dfe); | |
+ mdio_write(tp, 0x06, 0xef96); | |
+ mdio_write(tp, 0x06, 0xfec6); | |
+ mdio_write(tp, 0x06, 0xfefd); | |
+ mdio_write(tp, 0x06, 0xfc05); | |
+ mdio_write(tp, 0x06, 0xf9e2); | |
+ mdio_write(tp, 0x06, 0xe0ea); | |
+ mdio_write(tp, 0x06, 0xe3e0); | |
+ mdio_write(tp, 0x06, 0xeb5a); | |
+ mdio_write(tp, 0x06, 0x070c); | |
+ mdio_write(tp, 0x06, 0x031e); | |
+ mdio_write(tp, 0x06, 0x20e6); | |
+ mdio_write(tp, 0x06, 0xe0ea); | |
+ mdio_write(tp, 0x06, 0xe7e0); | |
+ mdio_write(tp, 0x06, 0xebe0); | |
+ mdio_write(tp, 0x06, 0xe0fc); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0xfdfd); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xfaef); | |
+ mdio_write(tp, 0x06, 0x69e0); | |
+ mdio_write(tp, 0x06, 0x8b80); | |
+ mdio_write(tp, 0x06, 0xad27); | |
+ mdio_write(tp, 0x06, 0x22bf); | |
+ mdio_write(tp, 0x06, 0x4616); | |
+ mdio_write(tp, 0x06, 0x0238); | |
+ mdio_write(tp, 0x06, 0x50e0); | |
+ mdio_write(tp, 0x06, 0x8b44); | |
+ mdio_write(tp, 0x06, 0x1f01); | |
+ mdio_write(tp, 0x06, 0x9e15); | |
+ mdio_write(tp, 0x06, 0xe58b); | |
+ mdio_write(tp, 0x06, 0x44ad); | |
+ mdio_write(tp, 0x06, 0x2907); | |
+ mdio_write(tp, 0x06, 0xac28); | |
+ mdio_write(tp, 0x06, 0x04d1); | |
+ mdio_write(tp, 0x06, 0x01ae); | |
+ mdio_write(tp, 0x06, 0x02d1); | |
+ mdio_write(tp, 0x06, 0x00bf); | |
+ mdio_write(tp, 0x06, 0x85b0); | |
+ mdio_write(tp, 0x06, 0x0238); | |
+ mdio_write(tp, 0x06, 0x7def); | |
+ mdio_write(tp, 0x06, 0x96fe); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8e0); | |
+ mdio_write(tp, 0x06, 0x8b85); | |
+ mdio_write(tp, 0x06, 0xad26); | |
+ mdio_write(tp, 0x06, 0x30e0); | |
+ mdio_write(tp, 0x06, 0xe036); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0x37e1); | |
+ mdio_write(tp, 0x06, 0x8b3f); | |
+ mdio_write(tp, 0x06, 0x1f10); | |
+ mdio_write(tp, 0x06, 0x9e23); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x3fac); | |
+ mdio_write(tp, 0x06, 0x200b); | |
+ mdio_write(tp, 0x06, 0xac21); | |
+ mdio_write(tp, 0x06, 0x0dac); | |
+ mdio_write(tp, 0x06, 0x250f); | |
+ mdio_write(tp, 0x06, 0xac27); | |
+ mdio_write(tp, 0x06, 0x11ae); | |
+ mdio_write(tp, 0x06, 0x1202); | |
+ mdio_write(tp, 0x06, 0x2c47); | |
+ mdio_write(tp, 0x06, 0xae0d); | |
+ mdio_write(tp, 0x06, 0x0285); | |
+ mdio_write(tp, 0x06, 0x4fae); | |
+ mdio_write(tp, 0x06, 0x0802); | |
+ mdio_write(tp, 0x06, 0x2c69); | |
+ mdio_write(tp, 0x06, 0xae03); | |
+ mdio_write(tp, 0x06, 0x022c); | |
+ mdio_write(tp, 0x06, 0x7cfc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xfaef); | |
+ mdio_write(tp, 0x06, 0x6902); | |
+ mdio_write(tp, 0x06, 0x856c); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0x14e1); | |
+ mdio_write(tp, 0x06, 0xe015); | |
+ mdio_write(tp, 0x06, 0xad26); | |
+ mdio_write(tp, 0x06, 0x08d1); | |
+ mdio_write(tp, 0x06, 0x1ebf); | |
+ mdio_write(tp, 0x06, 0x2cd9); | |
+ mdio_write(tp, 0x06, 0x0238); | |
+ mdio_write(tp, 0x06, 0x7def); | |
+ mdio_write(tp, 0x06, 0x96fe); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8e0); | |
+ mdio_write(tp, 0x06, 0x8b85); | |
+ mdio_write(tp, 0x06, 0xad27); | |
+ mdio_write(tp, 0x06, 0x2fd0); | |
+ mdio_write(tp, 0x06, 0x0b02); | |
+ mdio_write(tp, 0x06, 0x3682); | |
+ mdio_write(tp, 0x06, 0x5882); | |
+ mdio_write(tp, 0x06, 0x7882); | |
+ mdio_write(tp, 0x06, 0x9f24); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x32e1); | |
+ mdio_write(tp, 0x06, 0x8b33); | |
+ mdio_write(tp, 0x06, 0x1f10); | |
+ mdio_write(tp, 0x06, 0x9e1a); | |
+ mdio_write(tp, 0x06, 0x10e4); | |
+ mdio_write(tp, 0x06, 0x8b32); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0x28e1); | |
+ mdio_write(tp, 0x06, 0xe029); | |
+ mdio_write(tp, 0x06, 0xf72c); | |
+ mdio_write(tp, 0x06, 0xe4e0); | |
+ mdio_write(tp, 0x06, 0x28e5); | |
+ mdio_write(tp, 0x06, 0xe029); | |
+ mdio_write(tp, 0x06, 0xf62c); | |
+ mdio_write(tp, 0x06, 0xe4e0); | |
+ mdio_write(tp, 0x06, 0x28e5); | |
+ mdio_write(tp, 0x06, 0xe029); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0x00e1); | |
+ mdio_write(tp, 0x06, 0x4077); | |
+ mdio_write(tp, 0x06, 0xe140); | |
+ mdio_write(tp, 0x06, 0x52e0); | |
+ mdio_write(tp, 0x06, 0xeed9); | |
+ mdio_write(tp, 0x06, 0xe04c); | |
+ mdio_write(tp, 0x06, 0xbbe0); | |
+ mdio_write(tp, 0x06, 0x2a00); | |
+ mdio_write(tp, 0x05, 0xe142); | |
+ gphy_val = mdio_read(tp, 0x06); | |
+ gphy_val |= BIT_0; | |
+ mdio_write(tp,0x06, gphy_val); | |
+ mdio_write(tp, 0x05, 0xe140); | |
+ gphy_val = mdio_read(tp, 0x06); | |
+ gphy_val |= BIT_0; | |
+ mdio_write(tp,0x06, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp,0x1f, 0x0005); | |
+ for (i = 0; i < 200; i++) { | |
+ udelay(100); | |
+ gphy_val = mdio_read(tp, 0x00); | |
+ if (gphy_val & BIT_7) | |
+ break; | |
+ } | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x0023); | |
+ gphy_val = mdio_read(tp, 0x17); | |
+ gphy_val |= BIT_1; | |
+ if (tp->RequiredSecLanDonglePatch) | |
+ gphy_val &= ~BIT_2; | |
+ mdio_write(tp, 0x17, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0003); | |
+ mdio_write(tp, 0x09, 0xA20F); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ mdio_write(tp, 0x1f, 0x0003); | |
+ mdio_write(tp, 0x01, 0x328A); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x00, 0x9200); | |
+} | |
+ | |
+static void | |
+rtl8168_set_phy_mcu_8168f_2(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ unsigned int gphy_val,i; | |
+ | |
+ mdio_write(tp,0x1f, 0x0000); | |
+ mdio_write(tp,0x00, 0x1800); | |
+ gphy_val = mdio_read(tp, 0x15); | |
+ gphy_val &= ~(BIT_12); | |
+ mdio_write(tp,0x15, gphy_val); | |
+ mdio_write(tp,0x00, 0x9800); | |
+ mdio_write(tp,0x1f, 0x0007); | |
+ mdio_write(tp,0x1e, 0x002f); | |
+ for (i = 0; i < 1000; i++) { | |
+ udelay(100); | |
+ gphy_val = mdio_read(tp, 0x1c); | |
+ if (gphy_val & 0x0080) | |
+ break; | |
+ } | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x0023); | |
+ mdio_write(tp, 0x16, 0x0306); | |
+ mdio_write(tp, 0x16, 0x0307); | |
+ mdio_write(tp, 0x15, 0x0098); | |
+ mdio_write(tp, 0x19, 0x7c0b); | |
+ mdio_write(tp, 0x15, 0x0099); | |
+ mdio_write(tp, 0x19, 0x6c0b); | |
+ mdio_write(tp, 0x15, 0x00eb); | |
+ mdio_write(tp, 0x19, 0x6c0b); | |
+ mdio_write(tp, 0x15, 0x00f8); | |
+ mdio_write(tp, 0x19, 0x6f0b); | |
+ mdio_write(tp, 0x15, 0x00fe); | |
+ mdio_write(tp, 0x19, 0x6f0f); | |
+ mdio_write(tp, 0x15, 0x00db); | |
+ mdio_write(tp, 0x19, 0x6f09); | |
+ mdio_write(tp, 0x15, 0x00dc); | |
+ mdio_write(tp, 0x19, 0xaefd); | |
+ mdio_write(tp, 0x15, 0x00dd); | |
+ mdio_write(tp, 0x19, 0x6f0b); | |
+ mdio_write(tp, 0x15, 0x00de); | |
+ mdio_write(tp, 0x19, 0xc60b); | |
+ mdio_write(tp, 0x15, 0x00df); | |
+ mdio_write(tp, 0x19, 0x00fa); | |
+ mdio_write(tp, 0x15, 0x00e0); | |
+ mdio_write(tp, 0x19, 0x30e1); | |
+ mdio_write(tp, 0x15, 0x020c); | |
+ mdio_write(tp, 0x19, 0x3224); | |
+ mdio_write(tp, 0x15, 0x020e); | |
+ mdio_write(tp, 0x19, 0x9813); | |
+ mdio_write(tp, 0x15, 0x020f); | |
+ mdio_write(tp, 0x19, 0x7801); | |
+ mdio_write(tp, 0x15, 0x0210); | |
+ mdio_write(tp, 0x19, 0x930f); | |
+ mdio_write(tp, 0x15, 0x0211); | |
+ mdio_write(tp, 0x19, 0x9206); | |
+ mdio_write(tp, 0x15, 0x0212); | |
+ mdio_write(tp, 0x19, 0x4002); | |
+ mdio_write(tp, 0x15, 0x0213); | |
+ mdio_write(tp, 0x19, 0x7800); | |
+ mdio_write(tp, 0x15, 0x0214); | |
+ mdio_write(tp, 0x19, 0x588f); | |
+ mdio_write(tp, 0x15, 0x0215); | |
+ mdio_write(tp, 0x19, 0x5520); | |
+ mdio_write(tp, 0x15, 0x0216); | |
+ mdio_write(tp, 0x19, 0x3224); | |
+ mdio_write(tp, 0x15, 0x0217); | |
+ mdio_write(tp, 0x19, 0x4002); | |
+ mdio_write(tp, 0x15, 0x0218); | |
+ mdio_write(tp, 0x19, 0x7800); | |
+ mdio_write(tp, 0x15, 0x0219); | |
+ mdio_write(tp, 0x19, 0x588d); | |
+ mdio_write(tp, 0x15, 0x021a); | |
+ mdio_write(tp, 0x19, 0x5540); | |
+ mdio_write(tp, 0x15, 0x021b); | |
+ mdio_write(tp, 0x19, 0x9e03); | |
+ mdio_write(tp, 0x15, 0x021c); | |
+ mdio_write(tp, 0x19, 0x7c40); | |
+ mdio_write(tp, 0x15, 0x021d); | |
+ mdio_write(tp, 0x19, 0x6840); | |
+ mdio_write(tp, 0x15, 0x021e); | |
+ mdio_write(tp, 0x19, 0x3224); | |
+ mdio_write(tp, 0x15, 0x021f); | |
+ mdio_write(tp, 0x19, 0x4002); | |
+ mdio_write(tp, 0x15, 0x0220); | |
+ mdio_write(tp, 0x19, 0x3224); | |
+ mdio_write(tp, 0x15, 0x0221); | |
+ mdio_write(tp, 0x19, 0x9e03); | |
+ mdio_write(tp, 0x15, 0x0222); | |
+ mdio_write(tp, 0x19, 0x7c40); | |
+ mdio_write(tp, 0x15, 0x0223); | |
+ mdio_write(tp, 0x19, 0x6840); | |
+ mdio_write(tp, 0x15, 0x0224); | |
+ mdio_write(tp, 0x19, 0x7800); | |
+ mdio_write(tp, 0x15, 0x0225); | |
+ mdio_write(tp, 0x19, 0x3231); | |
+ mdio_write(tp, 0x15, 0x0000); | |
+ mdio_write(tp, 0x16, 0x0306); | |
+ mdio_write(tp, 0x16, 0x0300); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ mdio_write(tp, 0x05, 0xfff6); | |
+ mdio_write(tp, 0x06, 0x0080); | |
+ mdio_write(tp, 0x05, 0x8000); | |
+ mdio_write(tp, 0x06, 0x0280); | |
+ mdio_write(tp, 0x06, 0x48f7); | |
+ mdio_write(tp, 0x06, 0x00e0); | |
+ mdio_write(tp, 0x06, 0xfff7); | |
+ mdio_write(tp, 0x06, 0xa080); | |
+ mdio_write(tp, 0x06, 0x02ae); | |
+ mdio_write(tp, 0x06, 0xf602); | |
+ mdio_write(tp, 0x06, 0x011b); | |
+ mdio_write(tp, 0x06, 0x0201); | |
+ mdio_write(tp, 0x06, 0x2802); | |
+ mdio_write(tp, 0x06, 0x0135); | |
+ mdio_write(tp, 0x06, 0x0201); | |
+ mdio_write(tp, 0x06, 0x4502); | |
+ mdio_write(tp, 0x06, 0x015f); | |
+ mdio_write(tp, 0x06, 0x0280); | |
+ mdio_write(tp, 0x06, 0x6b02); | |
+ mdio_write(tp, 0x06, 0x80e5); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x88e1); | |
+ mdio_write(tp, 0x06, 0x8b89); | |
+ mdio_write(tp, 0x06, 0x1e01); | |
+ mdio_write(tp, 0x06, 0xe18b); | |
+ mdio_write(tp, 0x06, 0x8a1e); | |
+ mdio_write(tp, 0x06, 0x01e1); | |
+ mdio_write(tp, 0x06, 0x8b8b); | |
+ mdio_write(tp, 0x06, 0x1e01); | |
+ mdio_write(tp, 0x06, 0xe18b); | |
+ mdio_write(tp, 0x06, 0x8c1e); | |
+ mdio_write(tp, 0x06, 0x01e1); | |
+ mdio_write(tp, 0x06, 0x8b8d); | |
+ mdio_write(tp, 0x06, 0x1e01); | |
+ mdio_write(tp, 0x06, 0xe18b); | |
+ mdio_write(tp, 0x06, 0x8e1e); | |
+ mdio_write(tp, 0x06, 0x01a0); | |
+ mdio_write(tp, 0x06, 0x00c7); | |
+ mdio_write(tp, 0x06, 0xaebb); | |
+ mdio_write(tp, 0x06, 0xbf8b); | |
+ mdio_write(tp, 0x06, 0x88ec); | |
+ mdio_write(tp, 0x06, 0x0019); | |
+ mdio_write(tp, 0x06, 0xa98b); | |
+ mdio_write(tp, 0x06, 0x90f9); | |
+ mdio_write(tp, 0x06, 0xeeff); | |
+ mdio_write(tp, 0x06, 0xf600); | |
+ mdio_write(tp, 0x06, 0xeeff); | |
+ mdio_write(tp, 0x06, 0xf7fe); | |
+ mdio_write(tp, 0x06, 0xd100); | |
+ mdio_write(tp, 0x06, 0xbf81); | |
+ mdio_write(tp, 0x06, 0x9802); | |
+ mdio_write(tp, 0x06, 0x39f3); | |
+ mdio_write(tp, 0x06, 0xd101); | |
+ mdio_write(tp, 0x06, 0xbf81); | |
+ mdio_write(tp, 0x06, 0x9b02); | |
+ mdio_write(tp, 0x06, 0x39f3); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x8dad); | |
+ mdio_write(tp, 0x06, 0x2014); | |
+ mdio_write(tp, 0x06, 0xee8b); | |
+ mdio_write(tp, 0x06, 0x8d00); | |
+ mdio_write(tp, 0x06, 0xe08a); | |
+ mdio_write(tp, 0x06, 0x5a78); | |
+ mdio_write(tp, 0x06, 0x039e); | |
+ mdio_write(tp, 0x06, 0x0902); | |
+ mdio_write(tp, 0x06, 0x05fc); | |
+ mdio_write(tp, 0x06, 0x0280); | |
+ mdio_write(tp, 0x06, 0x8802); | |
+ mdio_write(tp, 0x06, 0x32dd); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8f9); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x81ac); | |
+ mdio_write(tp, 0x06, 0x261a); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x81ac); | |
+ mdio_write(tp, 0x06, 0x2114); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x85ac); | |
+ mdio_write(tp, 0x06, 0x200e); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x85ac); | |
+ mdio_write(tp, 0x06, 0x2308); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x87ac); | |
+ mdio_write(tp, 0x06, 0x2402); | |
+ mdio_write(tp, 0x06, 0xae38); | |
+ mdio_write(tp, 0x06, 0x021a); | |
+ mdio_write(tp, 0x06, 0xd6ee); | |
+ mdio_write(tp, 0x06, 0xe41c); | |
+ mdio_write(tp, 0x06, 0x04ee); | |
+ mdio_write(tp, 0x06, 0xe41d); | |
+ mdio_write(tp, 0x06, 0x04e2); | |
+ mdio_write(tp, 0x06, 0xe07c); | |
+ mdio_write(tp, 0x06, 0xe3e0); | |
+ mdio_write(tp, 0x06, 0x7de0); | |
+ mdio_write(tp, 0x06, 0xe038); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0x39ad); | |
+ mdio_write(tp, 0x06, 0x2e1b); | |
+ mdio_write(tp, 0x06, 0xad39); | |
+ mdio_write(tp, 0x06, 0x0dd1); | |
+ mdio_write(tp, 0x06, 0x01bf); | |
+ mdio_write(tp, 0x06, 0x22c8); | |
+ mdio_write(tp, 0x06, 0x0239); | |
+ mdio_write(tp, 0x06, 0xf302); | |
+ mdio_write(tp, 0x06, 0x21f0); | |
+ mdio_write(tp, 0x06, 0xae0b); | |
+ mdio_write(tp, 0x06, 0xac38); | |
+ mdio_write(tp, 0x06, 0x02ae); | |
+ mdio_write(tp, 0x06, 0x0602); | |
+ mdio_write(tp, 0x06, 0x222d); | |
+ mdio_write(tp, 0x06, 0x0222); | |
+ mdio_write(tp, 0x06, 0x7202); | |
+ mdio_write(tp, 0x06, 0x1ae7); | |
+ mdio_write(tp, 0x06, 0xfdfc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x8ead); | |
+ mdio_write(tp, 0x06, 0x201a); | |
+ mdio_write(tp, 0x06, 0xf620); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x8e02); | |
+ mdio_write(tp, 0x06, 0x2afe); | |
+ mdio_write(tp, 0x06, 0x022c); | |
+ mdio_write(tp, 0x06, 0x5c02); | |
+ mdio_write(tp, 0x06, 0x03c5); | |
+ mdio_write(tp, 0x06, 0x0281); | |
+ mdio_write(tp, 0x06, 0x6702); | |
+ mdio_write(tp, 0x06, 0x2e4f); | |
+ mdio_write(tp, 0x06, 0x0204); | |
+ mdio_write(tp, 0x06, 0x8902); | |
+ mdio_write(tp, 0x06, 0x2f7a); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x8ead); | |
+ mdio_write(tp, 0x06, 0x210b); | |
+ mdio_write(tp, 0x06, 0xf621); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x8e02); | |
+ mdio_write(tp, 0x06, 0x0445); | |
+ mdio_write(tp, 0x06, 0x021c); | |
+ mdio_write(tp, 0x06, 0xb8e0); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0xad22); | |
+ mdio_write(tp, 0x06, 0x08f6); | |
+ mdio_write(tp, 0x06, 0x22e4); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0x0235); | |
+ mdio_write(tp, 0x06, 0xd4e0); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0xad23); | |
+ mdio_write(tp, 0x06, 0x08f6); | |
+ mdio_write(tp, 0x06, 0x23e4); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0x0231); | |
+ mdio_write(tp, 0x06, 0xc8e0); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0xad24); | |
+ mdio_write(tp, 0x06, 0x05f6); | |
+ mdio_write(tp, 0x06, 0x24e4); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x8ead); | |
+ mdio_write(tp, 0x06, 0x2505); | |
+ mdio_write(tp, 0x06, 0xf625); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x8ee0); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0xad26); | |
+ mdio_write(tp, 0x06, 0x08f6); | |
+ mdio_write(tp, 0x06, 0x26e4); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0x022d); | |
+ mdio_write(tp, 0x06, 0x6ae0); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0xad27); | |
+ mdio_write(tp, 0x06, 0x05f6); | |
+ mdio_write(tp, 0x06, 0x27e4); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0x0203); | |
+ mdio_write(tp, 0x06, 0x8bfc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xfaef); | |
+ mdio_write(tp, 0x06, 0x69e0); | |
+ mdio_write(tp, 0x06, 0x8b80); | |
+ mdio_write(tp, 0x06, 0xad27); | |
+ mdio_write(tp, 0x06, 0x22bf); | |
+ mdio_write(tp, 0x06, 0x479a); | |
+ mdio_write(tp, 0x06, 0x0239); | |
+ mdio_write(tp, 0x06, 0xc6e0); | |
+ mdio_write(tp, 0x06, 0x8b44); | |
+ mdio_write(tp, 0x06, 0x1f01); | |
+ mdio_write(tp, 0x06, 0x9e15); | |
+ mdio_write(tp, 0x06, 0xe58b); | |
+ mdio_write(tp, 0x06, 0x44ad); | |
+ mdio_write(tp, 0x06, 0x2907); | |
+ mdio_write(tp, 0x06, 0xac28); | |
+ mdio_write(tp, 0x06, 0x04d1); | |
+ mdio_write(tp, 0x06, 0x01ae); | |
+ mdio_write(tp, 0x06, 0x02d1); | |
+ mdio_write(tp, 0x06, 0x00bf); | |
+ mdio_write(tp, 0x06, 0x819e); | |
+ mdio_write(tp, 0x06, 0x0239); | |
+ mdio_write(tp, 0x06, 0xf3ef); | |
+ mdio_write(tp, 0x06, 0x96fe); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0x00e1); | |
+ mdio_write(tp, 0x06, 0x4077); | |
+ mdio_write(tp, 0x06, 0xe140); | |
+ mdio_write(tp, 0x06, 0xbbe0); | |
+ mdio_write(tp, 0x06, 0x2a00); | |
+ mdio_write(tp, 0x05, 0xe142); | |
+ gphy_val = mdio_read(tp, 0x06); | |
+ gphy_val |= BIT_0; | |
+ mdio_write(tp, 0x06, gphy_val); | |
+ mdio_write(tp, 0x05, 0xe140); | |
+ gphy_val = mdio_read(tp, 0x06); | |
+ gphy_val |= BIT_0; | |
+ mdio_write(tp, 0x06, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x0023); | |
+ gphy_val = mdio_read(tp, 0x17); | |
+ gphy_val |= BIT_1; | |
+ if (tp->RequiredSecLanDonglePatch) | |
+ gphy_val &= ~BIT_2; | |
+ mdio_write(tp, 0x17, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x00, 0x9200); | |
+} | |
+ | |
+static void | |
+rtl8168_set_phy_mcu_8411_1(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ unsigned int gphy_val,i; | |
+ | |
+ mdio_write(tp,0x1f, 0x0000); | |
+ mdio_write(tp,0x00, 0x1800); | |
+ gphy_val = mdio_read(tp, 0x15); | |
+ gphy_val &= ~(BIT_12); | |
+ mdio_write(tp,0x15, gphy_val); | |
+ mdio_write(tp,0x00, 0x4800); | |
+ mdio_write(tp,0x1f, 0x0007); | |
+ mdio_write(tp,0x1e, 0x002f); | |
+ for (i = 0; i < 1000; i++) { | |
+ udelay(100); | |
+ gphy_val = mdio_read(tp, 0x1c); | |
+ if (gphy_val & 0x0080) | |
+ break; | |
+ } | |
+ mdio_write(tp,0x1f, 0x0000); | |
+ mdio_write(tp,0x00, 0x1800); | |
+ mdio_write(tp,0x1f, 0x0007); | |
+ mdio_write(tp,0x1e, 0x0023); | |
+ for (i = 0; i < 200; i++) { | |
+ udelay(100); | |
+ gphy_val = mdio_read(tp, 0x18); | |
+ if (!(gphy_val & 0x0001)) | |
+ break; | |
+ } | |
+ mdio_write(tp,0x1f, 0x0005); | |
+ mdio_write(tp,0x05, 0xfff6); | |
+ mdio_write(tp,0x06, 0x0080); | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x0023); | |
+ mdio_write(tp, 0x16, 0x0306); | |
+ mdio_write(tp, 0x16, 0x0307); | |
+ mdio_write(tp, 0x15, 0x0098); | |
+ mdio_write(tp, 0x19, 0x7c0b); | |
+ mdio_write(tp, 0x15, 0x0099); | |
+ mdio_write(tp, 0x19, 0x6c0b); | |
+ mdio_write(tp, 0x15, 0x00eb); | |
+ mdio_write(tp, 0x19, 0x6c0b); | |
+ mdio_write(tp, 0x15, 0x00f8); | |
+ mdio_write(tp, 0x19, 0x6f0b); | |
+ mdio_write(tp, 0x15, 0x00fe); | |
+ mdio_write(tp, 0x19, 0x6f0f); | |
+ mdio_write(tp, 0x15, 0x00db); | |
+ mdio_write(tp, 0x19, 0x6f09); | |
+ mdio_write(tp, 0x15, 0x00dc); | |
+ mdio_write(tp, 0x19, 0xaefd); | |
+ mdio_write(tp, 0x15, 0x00dd); | |
+ mdio_write(tp, 0x19, 0x6f0b); | |
+ mdio_write(tp, 0x15, 0x00de); | |
+ mdio_write(tp, 0x19, 0xc60b); | |
+ mdio_write(tp, 0x15, 0x00df); | |
+ mdio_write(tp, 0x19, 0x00fa); | |
+ mdio_write(tp, 0x15, 0x00e0); | |
+ mdio_write(tp, 0x19, 0x30e1); | |
+ mdio_write(tp, 0x15, 0x020c); | |
+ mdio_write(tp, 0x19, 0x3224); | |
+ mdio_write(tp, 0x15, 0x020e); | |
+ mdio_write(tp, 0x19, 0x9813); | |
+ mdio_write(tp, 0x15, 0x020f); | |
+ mdio_write(tp, 0x19, 0x7801); | |
+ mdio_write(tp, 0x15, 0x0210); | |
+ mdio_write(tp, 0x19, 0x930f); | |
+ mdio_write(tp, 0x15, 0x0211); | |
+ mdio_write(tp, 0x19, 0x9206); | |
+ mdio_write(tp, 0x15, 0x0212); | |
+ mdio_write(tp, 0x19, 0x4002); | |
+ mdio_write(tp, 0x15, 0x0213); | |
+ mdio_write(tp, 0x19, 0x7800); | |
+ mdio_write(tp, 0x15, 0x0214); | |
+ mdio_write(tp, 0x19, 0x588f); | |
+ mdio_write(tp, 0x15, 0x0215); | |
+ mdio_write(tp, 0x19, 0x5520); | |
+ mdio_write(tp, 0x15, 0x0216); | |
+ mdio_write(tp, 0x19, 0x3224); | |
+ mdio_write(tp, 0x15, 0x0217); | |
+ mdio_write(tp, 0x19, 0x4002); | |
+ mdio_write(tp, 0x15, 0x0218); | |
+ mdio_write(tp, 0x19, 0x7800); | |
+ mdio_write(tp, 0x15, 0x0219); | |
+ mdio_write(tp, 0x19, 0x588d); | |
+ mdio_write(tp, 0x15, 0x021a); | |
+ mdio_write(tp, 0x19, 0x5540); | |
+ mdio_write(tp, 0x15, 0x021b); | |
+ mdio_write(tp, 0x19, 0x9e03); | |
+ mdio_write(tp, 0x15, 0x021c); | |
+ mdio_write(tp, 0x19, 0x7c40); | |
+ mdio_write(tp, 0x15, 0x021d); | |
+ mdio_write(tp, 0x19, 0x6840); | |
+ mdio_write(tp, 0x15, 0x021e); | |
+ mdio_write(tp, 0x19, 0x3224); | |
+ mdio_write(tp, 0x15, 0x021f); | |
+ mdio_write(tp, 0x19, 0x4002); | |
+ mdio_write(tp, 0x15, 0x0220); | |
+ mdio_write(tp, 0x19, 0x3224); | |
+ mdio_write(tp, 0x15, 0x0221); | |
+ mdio_write(tp, 0x19, 0x9e03); | |
+ mdio_write(tp, 0x15, 0x0222); | |
+ mdio_write(tp, 0x19, 0x7c40); | |
+ mdio_write(tp, 0x15, 0x0223); | |
+ mdio_write(tp, 0x19, 0x6840); | |
+ mdio_write(tp, 0x15, 0x0224); | |
+ mdio_write(tp, 0x19, 0x7800); | |
+ mdio_write(tp, 0x15, 0x0225); | |
+ mdio_write(tp, 0x19, 0x3231); | |
+ mdio_write(tp, 0x15, 0x0000); | |
+ mdio_write(tp, 0x16, 0x0306); | |
+ mdio_write(tp, 0x16, 0x0300); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ mdio_write(tp, 0x05, 0xfff6); | |
+ mdio_write(tp, 0x06, 0x0080); | |
+ mdio_write(tp, 0x05, 0x8000); | |
+ mdio_write(tp, 0x06, 0x0280); | |
+ mdio_write(tp, 0x06, 0x48f7); | |
+ mdio_write(tp, 0x06, 0x00e0); | |
+ mdio_write(tp, 0x06, 0xfff7); | |
+ mdio_write(tp, 0x06, 0xa080); | |
+ mdio_write(tp, 0x06, 0x02ae); | |
+ mdio_write(tp, 0x06, 0xf602); | |
+ mdio_write(tp, 0x06, 0x011e); | |
+ mdio_write(tp, 0x06, 0x0201); | |
+ mdio_write(tp, 0x06, 0x2b02); | |
+ mdio_write(tp, 0x06, 0x8077); | |
+ mdio_write(tp, 0x06, 0x0201); | |
+ mdio_write(tp, 0x06, 0x4802); | |
+ mdio_write(tp, 0x06, 0x0162); | |
+ mdio_write(tp, 0x06, 0x0280); | |
+ mdio_write(tp, 0x06, 0x9402); | |
+ mdio_write(tp, 0x06, 0x810e); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x88e1); | |
+ mdio_write(tp, 0x06, 0x8b89); | |
+ mdio_write(tp, 0x06, 0x1e01); | |
+ mdio_write(tp, 0x06, 0xe18b); | |
+ mdio_write(tp, 0x06, 0x8a1e); | |
+ mdio_write(tp, 0x06, 0x01e1); | |
+ mdio_write(tp, 0x06, 0x8b8b); | |
+ mdio_write(tp, 0x06, 0x1e01); | |
+ mdio_write(tp, 0x06, 0xe18b); | |
+ mdio_write(tp, 0x06, 0x8c1e); | |
+ mdio_write(tp, 0x06, 0x01e1); | |
+ mdio_write(tp, 0x06, 0x8b8d); | |
+ mdio_write(tp, 0x06, 0x1e01); | |
+ mdio_write(tp, 0x06, 0xe18b); | |
+ mdio_write(tp, 0x06, 0x8e1e); | |
+ mdio_write(tp, 0x06, 0x01a0); | |
+ mdio_write(tp, 0x06, 0x00c7); | |
+ mdio_write(tp, 0x06, 0xaebb); | |
+ mdio_write(tp, 0x06, 0xd481); | |
+ mdio_write(tp, 0x06, 0xd4e4); | |
+ mdio_write(tp, 0x06, 0x8b92); | |
+ mdio_write(tp, 0x06, 0xe58b); | |
+ mdio_write(tp, 0x06, 0x9302); | |
+ mdio_write(tp, 0x06, 0x2e5a); | |
+ mdio_write(tp, 0x06, 0xbf8b); | |
+ mdio_write(tp, 0x06, 0x88ec); | |
+ mdio_write(tp, 0x06, 0x0019); | |
+ mdio_write(tp, 0x06, 0xa98b); | |
+ mdio_write(tp, 0x06, 0x90f9); | |
+ mdio_write(tp, 0x06, 0xeeff); | |
+ mdio_write(tp, 0x06, 0xf600); | |
+ mdio_write(tp, 0x06, 0xeeff); | |
+ mdio_write(tp, 0x06, 0xf7fc); | |
+ mdio_write(tp, 0x06, 0xd100); | |
+ mdio_write(tp, 0x06, 0xbf83); | |
+ mdio_write(tp, 0x06, 0x3c02); | |
+ mdio_write(tp, 0x06, 0x3a21); | |
+ mdio_write(tp, 0x06, 0xd101); | |
+ mdio_write(tp, 0x06, 0xbf83); | |
+ mdio_write(tp, 0x06, 0x3f02); | |
+ mdio_write(tp, 0x06, 0x3a21); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x8aad); | |
+ mdio_write(tp, 0x06, 0x2014); | |
+ mdio_write(tp, 0x06, 0xee8b); | |
+ mdio_write(tp, 0x06, 0x8a00); | |
+ mdio_write(tp, 0x06, 0x0220); | |
+ mdio_write(tp, 0x06, 0x8be0); | |
+ mdio_write(tp, 0x06, 0xe426); | |
+ mdio_write(tp, 0x06, 0xe1e4); | |
+ mdio_write(tp, 0x06, 0x27ee); | |
+ mdio_write(tp, 0x06, 0xe426); | |
+ mdio_write(tp, 0x06, 0x23e5); | |
+ mdio_write(tp, 0x06, 0xe427); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8e0); | |
+ mdio_write(tp, 0x06, 0x8b8d); | |
+ mdio_write(tp, 0x06, 0xad20); | |
+ mdio_write(tp, 0x06, 0x14ee); | |
+ mdio_write(tp, 0x06, 0x8b8d); | |
+ mdio_write(tp, 0x06, 0x00e0); | |
+ mdio_write(tp, 0x06, 0x8a5a); | |
+ mdio_write(tp, 0x06, 0x7803); | |
+ mdio_write(tp, 0x06, 0x9e09); | |
+ mdio_write(tp, 0x06, 0x0206); | |
+ mdio_write(tp, 0x06, 0x2802); | |
+ mdio_write(tp, 0x06, 0x80b1); | |
+ mdio_write(tp, 0x06, 0x0232); | |
+ mdio_write(tp, 0x06, 0xfdfc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xf9e0); | |
+ mdio_write(tp, 0x06, 0x8b81); | |
+ mdio_write(tp, 0x06, 0xac26); | |
+ mdio_write(tp, 0x06, 0x1ae0); | |
+ mdio_write(tp, 0x06, 0x8b81); | |
+ mdio_write(tp, 0x06, 0xac21); | |
+ mdio_write(tp, 0x06, 0x14e0); | |
+ mdio_write(tp, 0x06, 0x8b85); | |
+ mdio_write(tp, 0x06, 0xac20); | |
+ mdio_write(tp, 0x06, 0x0ee0); | |
+ mdio_write(tp, 0x06, 0x8b85); | |
+ mdio_write(tp, 0x06, 0xac23); | |
+ mdio_write(tp, 0x06, 0x08e0); | |
+ mdio_write(tp, 0x06, 0x8b87); | |
+ mdio_write(tp, 0x06, 0xac24); | |
+ mdio_write(tp, 0x06, 0x02ae); | |
+ mdio_write(tp, 0x06, 0x3802); | |
+ mdio_write(tp, 0x06, 0x1b02); | |
+ mdio_write(tp, 0x06, 0xeee4); | |
+ mdio_write(tp, 0x06, 0x1c04); | |
+ mdio_write(tp, 0x06, 0xeee4); | |
+ mdio_write(tp, 0x06, 0x1d04); | |
+ mdio_write(tp, 0x06, 0xe2e0); | |
+ mdio_write(tp, 0x06, 0x7ce3); | |
+ mdio_write(tp, 0x06, 0xe07d); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0x38e1); | |
+ mdio_write(tp, 0x06, 0xe039); | |
+ mdio_write(tp, 0x06, 0xad2e); | |
+ mdio_write(tp, 0x06, 0x1bad); | |
+ mdio_write(tp, 0x06, 0x390d); | |
+ mdio_write(tp, 0x06, 0xd101); | |
+ mdio_write(tp, 0x06, 0xbf22); | |
+ mdio_write(tp, 0x06, 0xe802); | |
+ mdio_write(tp, 0x06, 0x3a21); | |
+ mdio_write(tp, 0x06, 0x0222); | |
+ mdio_write(tp, 0x06, 0x10ae); | |
+ mdio_write(tp, 0x06, 0x0bac); | |
+ mdio_write(tp, 0x06, 0x3802); | |
+ mdio_write(tp, 0x06, 0xae06); | |
+ mdio_write(tp, 0x06, 0x0222); | |
+ mdio_write(tp, 0x06, 0x4d02); | |
+ mdio_write(tp, 0x06, 0x2292); | |
+ mdio_write(tp, 0x06, 0x021b); | |
+ mdio_write(tp, 0x06, 0x13fd); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8e0); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0xad20); | |
+ mdio_write(tp, 0x06, 0x1af6); | |
+ mdio_write(tp, 0x06, 0x20e4); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0x022b); | |
+ mdio_write(tp, 0x06, 0x1e02); | |
+ mdio_write(tp, 0x06, 0x82ae); | |
+ mdio_write(tp, 0x06, 0x0203); | |
+ mdio_write(tp, 0x06, 0xc002); | |
+ mdio_write(tp, 0x06, 0x827d); | |
+ mdio_write(tp, 0x06, 0x022e); | |
+ mdio_write(tp, 0x06, 0x6f02); | |
+ mdio_write(tp, 0x06, 0x047b); | |
+ mdio_write(tp, 0x06, 0x022f); | |
+ mdio_write(tp, 0x06, 0x9ae0); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0xad21); | |
+ mdio_write(tp, 0x06, 0x0bf6); | |
+ mdio_write(tp, 0x06, 0x21e4); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0x0281); | |
+ mdio_write(tp, 0x06, 0x9002); | |
+ mdio_write(tp, 0x06, 0x1cd9); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x8ead); | |
+ mdio_write(tp, 0x06, 0x2208); | |
+ mdio_write(tp, 0x06, 0xf622); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x8e02); | |
+ mdio_write(tp, 0x06, 0x35f4); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x8ead); | |
+ mdio_write(tp, 0x06, 0x2308); | |
+ mdio_write(tp, 0x06, 0xf623); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x8e02); | |
+ mdio_write(tp, 0x06, 0x31e8); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x8ead); | |
+ mdio_write(tp, 0x06, 0x2405); | |
+ mdio_write(tp, 0x06, 0xf624); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x8ee0); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0xad25); | |
+ mdio_write(tp, 0x06, 0x05f6); | |
+ mdio_write(tp, 0x06, 0x25e4); | |
+ mdio_write(tp, 0x06, 0x8b8e); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x8ead); | |
+ mdio_write(tp, 0x06, 0x2608); | |
+ mdio_write(tp, 0x06, 0xf626); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x8e02); | |
+ mdio_write(tp, 0x06, 0x2d8a); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x8ead); | |
+ mdio_write(tp, 0x06, 0x2705); | |
+ mdio_write(tp, 0x06, 0xf627); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x8e02); | |
+ mdio_write(tp, 0x06, 0x0386); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8fa); | |
+ mdio_write(tp, 0x06, 0xef69); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0x00e1); | |
+ mdio_write(tp, 0x06, 0xe001); | |
+ mdio_write(tp, 0x06, 0xad27); | |
+ mdio_write(tp, 0x06, 0x32e0); | |
+ mdio_write(tp, 0x06, 0x8b40); | |
+ mdio_write(tp, 0x06, 0xf720); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x40bf); | |
+ mdio_write(tp, 0x06, 0x32c1); | |
+ mdio_write(tp, 0x06, 0x0239); | |
+ mdio_write(tp, 0x06, 0xf4ad); | |
+ mdio_write(tp, 0x06, 0x2821); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0x20e1); | |
+ mdio_write(tp, 0x06, 0xe021); | |
+ mdio_write(tp, 0x06, 0xad20); | |
+ mdio_write(tp, 0x06, 0x18e0); | |
+ mdio_write(tp, 0x06, 0x8b40); | |
+ mdio_write(tp, 0x06, 0xf620); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x40ee); | |
+ mdio_write(tp, 0x06, 0x8b3b); | |
+ mdio_write(tp, 0x06, 0xffe0); | |
+ mdio_write(tp, 0x06, 0x8a8a); | |
+ mdio_write(tp, 0x06, 0xe18a); | |
+ mdio_write(tp, 0x06, 0x8be4); | |
+ mdio_write(tp, 0x06, 0xe000); | |
+ mdio_write(tp, 0x06, 0xe5e0); | |
+ mdio_write(tp, 0x06, 0x01ef); | |
+ mdio_write(tp, 0x06, 0x96fe); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8f9); | |
+ mdio_write(tp, 0x06, 0xface); | |
+ mdio_write(tp, 0x06, 0xfaef); | |
+ mdio_write(tp, 0x06, 0x69fa); | |
+ mdio_write(tp, 0x06, 0xd401); | |
+ mdio_write(tp, 0x06, 0x55b4); | |
+ mdio_write(tp, 0x06, 0xfebf); | |
+ mdio_write(tp, 0x06, 0x1c5e); | |
+ mdio_write(tp, 0x06, 0x0239); | |
+ mdio_write(tp, 0x06, 0xf4ac); | |
+ mdio_write(tp, 0x06, 0x280b); | |
+ mdio_write(tp, 0x06, 0xbf1c); | |
+ mdio_write(tp, 0x06, 0x5b02); | |
+ mdio_write(tp, 0x06, 0x39f4); | |
+ mdio_write(tp, 0x06, 0xac28); | |
+ mdio_write(tp, 0x06, 0x49ae); | |
+ mdio_write(tp, 0x06, 0x64bf); | |
+ mdio_write(tp, 0x06, 0x1c5b); | |
+ mdio_write(tp, 0x06, 0x0239); | |
+ mdio_write(tp, 0x06, 0xf4ac); | |
+ mdio_write(tp, 0x06, 0x285b); | |
+ mdio_write(tp, 0x06, 0xd000); | |
+ mdio_write(tp, 0x06, 0x0282); | |
+ mdio_write(tp, 0x06, 0x62ac); | |
+ mdio_write(tp, 0x06, 0x2105); | |
+ mdio_write(tp, 0x06, 0xac22); | |
+ mdio_write(tp, 0x06, 0x02ae); | |
+ mdio_write(tp, 0x06, 0x4ebf); | |
+ mdio_write(tp, 0x06, 0xe0c4); | |
+ mdio_write(tp, 0x06, 0xbe85); | |
+ mdio_write(tp, 0x06, 0xecd2); | |
+ mdio_write(tp, 0x06, 0x04d8); | |
+ mdio_write(tp, 0x06, 0x19d9); | |
+ mdio_write(tp, 0x06, 0x1907); | |
+ mdio_write(tp, 0x06, 0xdc19); | |
+ mdio_write(tp, 0x06, 0xdd19); | |
+ mdio_write(tp, 0x06, 0x0789); | |
+ mdio_write(tp, 0x06, 0x89ef); | |
+ mdio_write(tp, 0x06, 0x645e); | |
+ mdio_write(tp, 0x06, 0x07ff); | |
+ mdio_write(tp, 0x06, 0x0d65); | |
+ mdio_write(tp, 0x06, 0x5cf8); | |
+ mdio_write(tp, 0x06, 0x001e); | |
+ mdio_write(tp, 0x06, 0x46dc); | |
+ mdio_write(tp, 0x06, 0x19dd); | |
+ mdio_write(tp, 0x06, 0x19b2); | |
+ mdio_write(tp, 0x06, 0xe2d4); | |
+ mdio_write(tp, 0x06, 0x0001); | |
+ mdio_write(tp, 0x06, 0xbf1c); | |
+ mdio_write(tp, 0x06, 0x5b02); | |
+ mdio_write(tp, 0x06, 0x3a21); | |
+ mdio_write(tp, 0x06, 0xae1d); | |
+ mdio_write(tp, 0x06, 0xbee0); | |
+ mdio_write(tp, 0x06, 0xc4bf); | |
+ mdio_write(tp, 0x06, 0x85ec); | |
+ mdio_write(tp, 0x06, 0xd204); | |
+ mdio_write(tp, 0x06, 0xd819); | |
+ mdio_write(tp, 0x06, 0xd919); | |
+ mdio_write(tp, 0x06, 0x07dc); | |
+ mdio_write(tp, 0x06, 0x19dd); | |
+ mdio_write(tp, 0x06, 0x1907); | |
+ mdio_write(tp, 0x06, 0xb2f4); | |
+ mdio_write(tp, 0x06, 0xd400); | |
+ mdio_write(tp, 0x06, 0x00bf); | |
+ mdio_write(tp, 0x06, 0x1c5b); | |
+ mdio_write(tp, 0x06, 0x023a); | |
+ mdio_write(tp, 0x06, 0x21fe); | |
+ mdio_write(tp, 0x06, 0xef96); | |
+ mdio_write(tp, 0x06, 0xfec6); | |
+ mdio_write(tp, 0x06, 0xfefd); | |
+ mdio_write(tp, 0x06, 0xfc05); | |
+ mdio_write(tp, 0x06, 0xf9e2); | |
+ mdio_write(tp, 0x06, 0xe0ea); | |
+ mdio_write(tp, 0x06, 0xe3e0); | |
+ mdio_write(tp, 0x06, 0xeb5a); | |
+ mdio_write(tp, 0x06, 0x070c); | |
+ mdio_write(tp, 0x06, 0x031e); | |
+ mdio_write(tp, 0x06, 0x20e6); | |
+ mdio_write(tp, 0x06, 0xe0ea); | |
+ mdio_write(tp, 0x06, 0xe7e0); | |
+ mdio_write(tp, 0x06, 0xebe0); | |
+ mdio_write(tp, 0x06, 0xe0fc); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0xfdfd); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xfaef); | |
+ mdio_write(tp, 0x06, 0x69e0); | |
+ mdio_write(tp, 0x06, 0x8b80); | |
+ mdio_write(tp, 0x06, 0xad27); | |
+ mdio_write(tp, 0x06, 0x22bf); | |
+ mdio_write(tp, 0x06, 0x47ba); | |
+ mdio_write(tp, 0x06, 0x0239); | |
+ mdio_write(tp, 0x06, 0xf4e0); | |
+ mdio_write(tp, 0x06, 0x8b44); | |
+ mdio_write(tp, 0x06, 0x1f01); | |
+ mdio_write(tp, 0x06, 0x9e15); | |
+ mdio_write(tp, 0x06, 0xe58b); | |
+ mdio_write(tp, 0x06, 0x44ad); | |
+ mdio_write(tp, 0x06, 0x2907); | |
+ mdio_write(tp, 0x06, 0xac28); | |
+ mdio_write(tp, 0x06, 0x04d1); | |
+ mdio_write(tp, 0x06, 0x01ae); | |
+ mdio_write(tp, 0x06, 0x02d1); | |
+ mdio_write(tp, 0x06, 0x00bf); | |
+ mdio_write(tp, 0x06, 0x8342); | |
+ mdio_write(tp, 0x06, 0x023a); | |
+ mdio_write(tp, 0x06, 0x21ef); | |
+ mdio_write(tp, 0x06, 0x96fe); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8e0); | |
+ mdio_write(tp, 0x06, 0x8b85); | |
+ mdio_write(tp, 0x06, 0xad26); | |
+ mdio_write(tp, 0x06, 0x30e0); | |
+ mdio_write(tp, 0x06, 0xe036); | |
+ mdio_write(tp, 0x06, 0xe1e0); | |
+ mdio_write(tp, 0x06, 0x37e1); | |
+ mdio_write(tp, 0x06, 0x8b3f); | |
+ mdio_write(tp, 0x06, 0x1f10); | |
+ mdio_write(tp, 0x06, 0x9e23); | |
+ mdio_write(tp, 0x06, 0xe48b); | |
+ mdio_write(tp, 0x06, 0x3fac); | |
+ mdio_write(tp, 0x06, 0x200b); | |
+ mdio_write(tp, 0x06, 0xac21); | |
+ mdio_write(tp, 0x06, 0x0dac); | |
+ mdio_write(tp, 0x06, 0x250f); | |
+ mdio_write(tp, 0x06, 0xac27); | |
+ mdio_write(tp, 0x06, 0x11ae); | |
+ mdio_write(tp, 0x06, 0x1202); | |
+ mdio_write(tp, 0x06, 0x2cb5); | |
+ mdio_write(tp, 0x06, 0xae0d); | |
+ mdio_write(tp, 0x06, 0x0282); | |
+ mdio_write(tp, 0x06, 0xe7ae); | |
+ mdio_write(tp, 0x06, 0x0802); | |
+ mdio_write(tp, 0x06, 0x2cd7); | |
+ mdio_write(tp, 0x06, 0xae03); | |
+ mdio_write(tp, 0x06, 0x022c); | |
+ mdio_write(tp, 0x06, 0xeafc); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xfaef); | |
+ mdio_write(tp, 0x06, 0x6902); | |
+ mdio_write(tp, 0x06, 0x8304); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0x14e1); | |
+ mdio_write(tp, 0x06, 0xe015); | |
+ mdio_write(tp, 0x06, 0xad26); | |
+ mdio_write(tp, 0x06, 0x08d1); | |
+ mdio_write(tp, 0x06, 0x1ebf); | |
+ mdio_write(tp, 0x06, 0x2d47); | |
+ mdio_write(tp, 0x06, 0x023a); | |
+ mdio_write(tp, 0x06, 0x21ef); | |
+ mdio_write(tp, 0x06, 0x96fe); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf8e0); | |
+ mdio_write(tp, 0x06, 0x8b85); | |
+ mdio_write(tp, 0x06, 0xad27); | |
+ mdio_write(tp, 0x06, 0x2fd0); | |
+ mdio_write(tp, 0x06, 0x0b02); | |
+ mdio_write(tp, 0x06, 0x3826); | |
+ mdio_write(tp, 0x06, 0x5882); | |
+ mdio_write(tp, 0x06, 0x7882); | |
+ mdio_write(tp, 0x06, 0x9f24); | |
+ mdio_write(tp, 0x06, 0xe08b); | |
+ mdio_write(tp, 0x06, 0x32e1); | |
+ mdio_write(tp, 0x06, 0x8b33); | |
+ mdio_write(tp, 0x06, 0x1f10); | |
+ mdio_write(tp, 0x06, 0x9e1a); | |
+ mdio_write(tp, 0x06, 0x10e4); | |
+ mdio_write(tp, 0x06, 0x8b32); | |
+ mdio_write(tp, 0x06, 0xe0e0); | |
+ mdio_write(tp, 0x06, 0x28e1); | |
+ mdio_write(tp, 0x06, 0xe029); | |
+ mdio_write(tp, 0x06, 0xf72c); | |
+ mdio_write(tp, 0x06, 0xe4e0); | |
+ mdio_write(tp, 0x06, 0x28e5); | |
+ mdio_write(tp, 0x06, 0xe029); | |
+ mdio_write(tp, 0x06, 0xf62c); | |
+ mdio_write(tp, 0x06, 0xe4e0); | |
+ mdio_write(tp, 0x06, 0x28e5); | |
+ mdio_write(tp, 0x06, 0xe029); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0x00e1); | |
+ mdio_write(tp, 0x06, 0x4077); | |
+ mdio_write(tp, 0x06, 0xe140); | |
+ mdio_write(tp, 0x06, 0xbbe0); | |
+ mdio_write(tp, 0x06, 0x2a00); | |
+ mdio_write(tp, 0x05, 0xe142); | |
+ gphy_val = mdio_read(tp, 0x06); | |
+ gphy_val |= BIT_0; | |
+ mdio_write(tp,0x06, gphy_val); | |
+ mdio_write(tp, 0x05, 0xe140); | |
+ gphy_val = mdio_read(tp, 0x06); | |
+ gphy_val |= BIT_0; | |
+ mdio_write(tp,0x06, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp,0x1f, 0x0005); | |
+ for (i = 0; i < 200; i++) { | |
+ udelay(100); | |
+ gphy_val = mdio_read(tp, 0x00); | |
+ if (gphy_val & BIT_7) | |
+ break; | |
+ } | |
+ mdio_write(tp,0x1f, 0x0007); | |
+ mdio_write(tp,0x1e, 0x0023); | |
+ gphy_val = mdio_read(tp, 0x17); | |
+ gphy_val |= BIT_1; | |
+ if (tp->RequiredSecLanDonglePatch) | |
+ gphy_val &= ~BIT_2; | |
+ mdio_write(tp,0x17, gphy_val); | |
+ mdio_write(tp,0x1f, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0003); | |
+ mdio_write(tp, 0x09, 0xA20F); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ mdio_write(tp, 0x1f, 0x0003); | |
+ mdio_write(tp, 0x01, 0x328A); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ | |
+ mdio_write(tp,0x1f, 0x0000); | |
+ mdio_write(tp,0x00, 0x9200); | |
+} | |
+ | |
+static void | |
+rtl8168_set_phy_mcu_8168g_1(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ unsigned int gphy_val,i; | |
+ | |
+ mdio_write(tp, 0x1f, 0x0B82); | |
+ gphy_val = mdio_read(tp, 0x10); | |
+ gphy_val |= BIT_4; | |
+ mdio_write(tp, 0x10, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0B80); | |
+ for (i = 0; i < 10; i++) { | |
+ if (mdio_read(tp, 0x10) & 0x0040) | |
+ break; | |
+ mdelay(10); | |
+ } | |
+ mdio_write(tp, 0x1f, 0x0A43); | |
+ mdio_write(tp, 0x13, 0x8146); | |
+ mdio_write(tp, 0x14, 0x2300); | |
+ mdio_write(tp, 0x13, 0xB820); | |
+ mdio_write(tp, 0x14, 0x0210); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0A43); | |
+ mdio_write(tp, 0x13, 0xB820); | |
+ mdio_write(tp, 0x14, 0x0290); | |
+ mdio_write(tp, 0x13, 0xA012); | |
+ mdio_write(tp, 0x14, 0x0000); | |
+ mdio_write(tp, 0x13, 0xA014); | |
+ mdio_write(tp, 0x14, 0x2c04); | |
+ mdio_write(tp, 0x14, 0x2c0c); | |
+ mdio_write(tp, 0x14, 0x2c6c); | |
+ mdio_write(tp, 0x14, 0x2d0d); | |
+ mdio_write(tp, 0x14, 0x31ce); | |
+ mdio_write(tp, 0x14, 0x506d); | |
+ mdio_write(tp, 0x14, 0xd708); | |
+ mdio_write(tp, 0x14, 0x3108); | |
+ mdio_write(tp, 0x14, 0x106d); | |
+ mdio_write(tp, 0x14, 0x1560); | |
+ mdio_write(tp, 0x14, 0x15a9); | |
+ mdio_write(tp, 0x14, 0x206e); | |
+ mdio_write(tp, 0x14, 0x175b); | |
+ mdio_write(tp, 0x14, 0x6062); | |
+ mdio_write(tp, 0x14, 0xd700); | |
+ mdio_write(tp, 0x14, 0x5fae); | |
+ mdio_write(tp, 0x14, 0xd708); | |
+ mdio_write(tp, 0x14, 0x3107); | |
+ mdio_write(tp, 0x14, 0x4c1e); | |
+ mdio_write(tp, 0x14, 0x4169); | |
+ mdio_write(tp, 0x14, 0x316a); | |
+ mdio_write(tp, 0x14, 0x0c19); | |
+ mdio_write(tp, 0x14, 0x31aa); | |
+ mdio_write(tp, 0x14, 0x0c19); | |
+ mdio_write(tp, 0x14, 0x2c1b); | |
+ mdio_write(tp, 0x14, 0x5e62); | |
+ mdio_write(tp, 0x14, 0x26b5); | |
+ mdio_write(tp, 0x14, 0x31ab); | |
+ mdio_write(tp, 0x14, 0x5c1e); | |
+ mdio_write(tp, 0x14, 0x2c0c); | |
+ mdio_write(tp, 0x14, 0xc040); | |
+ mdio_write(tp, 0x14, 0x8808); | |
+ mdio_write(tp, 0x14, 0xc520); | |
+ mdio_write(tp, 0x14, 0xc421); | |
+ mdio_write(tp, 0x14, 0xd05a); | |
+ mdio_write(tp, 0x14, 0xd19a); | |
+ mdio_write(tp, 0x14, 0xd709); | |
+ mdio_write(tp, 0x14, 0x608f); | |
+ mdio_write(tp, 0x14, 0xd06b); | |
+ mdio_write(tp, 0x14, 0xd18a); | |
+ mdio_write(tp, 0x14, 0x2c2c); | |
+ mdio_write(tp, 0x14, 0xd0be); | |
+ mdio_write(tp, 0x14, 0xd188); | |
+ mdio_write(tp, 0x14, 0x2c2c); | |
+ mdio_write(tp, 0x14, 0xd708); | |
+ mdio_write(tp, 0x14, 0x4072); | |
+ mdio_write(tp, 0x14, 0xc104); | |
+ mdio_write(tp, 0x14, 0x2c3e); | |
+ mdio_write(tp, 0x14, 0x4076); | |
+ mdio_write(tp, 0x14, 0xc110); | |
+ mdio_write(tp, 0x14, 0x2c3e); | |
+ mdio_write(tp, 0x14, 0x4071); | |
+ mdio_write(tp, 0x14, 0xc102); | |
+ mdio_write(tp, 0x14, 0x2c3e); | |
+ mdio_write(tp, 0x14, 0x4070); | |
+ mdio_write(tp, 0x14, 0xc101); | |
+ mdio_write(tp, 0x14, 0x2c3e); | |
+ mdio_write(tp, 0x14, 0x175b); | |
+ mdio_write(tp, 0x14, 0xd709); | |
+ mdio_write(tp, 0x14, 0x3390); | |
+ mdio_write(tp, 0x14, 0x5c39); | |
+ mdio_write(tp, 0x14, 0x2c4e); | |
+ mdio_write(tp, 0x14, 0x175b); | |
+ mdio_write(tp, 0x14, 0xd708); | |
+ mdio_write(tp, 0x14, 0x6193); | |
+ mdio_write(tp, 0x14, 0xd709); | |
+ mdio_write(tp, 0x14, 0x5f9d); | |
+ mdio_write(tp, 0x14, 0x408b); | |
+ mdio_write(tp, 0x14, 0xd71e); | |
+ mdio_write(tp, 0x14, 0x6042); | |
+ mdio_write(tp, 0x14, 0xb401); | |
+ mdio_write(tp, 0x14, 0x175b); | |
+ mdio_write(tp, 0x14, 0xd708); | |
+ mdio_write(tp, 0x14, 0x6073); | |
+ mdio_write(tp, 0x14, 0x5fbc); | |
+ mdio_write(tp, 0x14, 0x2c4d); | |
+ mdio_write(tp, 0x14, 0x26ed); | |
+ mdio_write(tp, 0x14, 0xb280); | |
+ mdio_write(tp, 0x14, 0xa841); | |
+ mdio_write(tp, 0x14, 0x9420); | |
+ mdio_write(tp, 0x14, 0x8710); | |
+ mdio_write(tp, 0x14, 0xd709); | |
+ mdio_write(tp, 0x14, 0x42ec); | |
+ mdio_write(tp, 0x14, 0x606d); | |
+ mdio_write(tp, 0x14, 0xd207); | |
+ mdio_write(tp, 0x14, 0x2c57); | |
+ mdio_write(tp, 0x14, 0xd203); | |
+ mdio_write(tp, 0x14, 0x33ff); | |
+ mdio_write(tp, 0x14, 0x563b); | |
+ mdio_write(tp, 0x14, 0x3275); | |
+ mdio_write(tp, 0x14, 0x7c5e); | |
+ mdio_write(tp, 0x14, 0xb240); | |
+ mdio_write(tp, 0x14, 0xb402); | |
+ mdio_write(tp, 0x14, 0x263b); | |
+ mdio_write(tp, 0x14, 0x6096); | |
+ mdio_write(tp, 0x14, 0xb240); | |
+ mdio_write(tp, 0x14, 0xb406); | |
+ mdio_write(tp, 0x14, 0x263b); | |
+ mdio_write(tp, 0x14, 0x31d7); | |
+ mdio_write(tp, 0x14, 0x7c67); | |
+ mdio_write(tp, 0x14, 0xb240); | |
+ mdio_write(tp, 0x14, 0xb40e); | |
+ mdio_write(tp, 0x14, 0x263b); | |
+ mdio_write(tp, 0x14, 0xb410); | |
+ mdio_write(tp, 0x14, 0x8802); | |
+ mdio_write(tp, 0x14, 0xb240); | |
+ mdio_write(tp, 0x14, 0x940e); | |
+ mdio_write(tp, 0x14, 0x263b); | |
+ mdio_write(tp, 0x14, 0xba04); | |
+ mdio_write(tp, 0x14, 0x1cd6); | |
+ mdio_write(tp, 0x14, 0xa902); | |
+ mdio_write(tp, 0x14, 0xd711); | |
+ mdio_write(tp, 0x14, 0x4045); | |
+ mdio_write(tp, 0x14, 0xa980); | |
+ mdio_write(tp, 0x14, 0x3003); | |
+ mdio_write(tp, 0x14, 0x59b1); | |
+ mdio_write(tp, 0x14, 0xa540); | |
+ mdio_write(tp, 0x14, 0xa601); | |
+ mdio_write(tp, 0x14, 0xd710); | |
+ mdio_write(tp, 0x14, 0x4043); | |
+ mdio_write(tp, 0x14, 0xa910); | |
+ mdio_write(tp, 0x14, 0xd711); | |
+ mdio_write(tp, 0x14, 0x60a0); | |
+ mdio_write(tp, 0x14, 0xca33); | |
+ mdio_write(tp, 0x14, 0xcb33); | |
+ mdio_write(tp, 0x14, 0xa941); | |
+ mdio_write(tp, 0x14, 0x2c82); | |
+ mdio_write(tp, 0x14, 0xcaff); | |
+ mdio_write(tp, 0x14, 0xcbff); | |
+ mdio_write(tp, 0x14, 0xa921); | |
+ mdio_write(tp, 0x14, 0xce02); | |
+ mdio_write(tp, 0x14, 0xe070); | |
+ mdio_write(tp, 0x14, 0x0f10); | |
+ mdio_write(tp, 0x14, 0xaf01); | |
+ mdio_write(tp, 0x14, 0x8f01); | |
+ mdio_write(tp, 0x14, 0x1766); | |
+ mdio_write(tp, 0x14, 0x8e02); | |
+ mdio_write(tp, 0x14, 0x1787); | |
+ mdio_write(tp, 0x14, 0xd710); | |
+ mdio_write(tp, 0x14, 0x609c); | |
+ mdio_write(tp, 0x14, 0xd71e); | |
+ mdio_write(tp, 0x14, 0x7fa4); | |
+ mdio_write(tp, 0x14, 0x2cd4); | |
+ mdio_write(tp, 0x14, 0x1ce9); | |
+ mdio_write(tp, 0x14, 0xce04); | |
+ mdio_write(tp, 0x14, 0xe070); | |
+ mdio_write(tp, 0x14, 0x0f20); | |
+ mdio_write(tp, 0x14, 0xaf01); | |
+ mdio_write(tp, 0x14, 0x8f01); | |
+ mdio_write(tp, 0x14, 0x1766); | |
+ mdio_write(tp, 0x14, 0x8e04); | |
+ mdio_write(tp, 0x14, 0x6044); | |
+ mdio_write(tp, 0x14, 0x2cd4); | |
+ mdio_write(tp, 0x14, 0xa520); | |
+ mdio_write(tp, 0x14, 0xd710); | |
+ mdio_write(tp, 0x14, 0x4043); | |
+ mdio_write(tp, 0x14, 0x2cc1); | |
+ mdio_write(tp, 0x14, 0xe00f); | |
+ mdio_write(tp, 0x14, 0x0501); | |
+ mdio_write(tp, 0x14, 0x1cef); | |
+ mdio_write(tp, 0x14, 0xb801); | |
+ mdio_write(tp, 0x14, 0xd71e); | |
+ mdio_write(tp, 0x14, 0x4060); | |
+ mdio_write(tp, 0x14, 0x7fc4); | |
+ mdio_write(tp, 0x14, 0x2cd4); | |
+ mdio_write(tp, 0x14, 0x1cf5); | |
+ mdio_write(tp, 0x14, 0xe00f); | |
+ mdio_write(tp, 0x14, 0x0502); | |
+ mdio_write(tp, 0x14, 0x1cef); | |
+ mdio_write(tp, 0x14, 0xb802); | |
+ mdio_write(tp, 0x14, 0xd71e); | |
+ mdio_write(tp, 0x14, 0x4061); | |
+ mdio_write(tp, 0x14, 0x7fc4); | |
+ mdio_write(tp, 0x14, 0x2cd4); | |
+ mdio_write(tp, 0x14, 0x1cf5); | |
+ mdio_write(tp, 0x14, 0xe00f); | |
+ mdio_write(tp, 0x14, 0x0504); | |
+ mdio_write(tp, 0x14, 0xd710); | |
+ mdio_write(tp, 0x14, 0x6099); | |
+ mdio_write(tp, 0x14, 0xd71e); | |
+ mdio_write(tp, 0x14, 0x7fa4); | |
+ mdio_write(tp, 0x14, 0x2cd4); | |
+ mdio_write(tp, 0x14, 0xc17f); | |
+ mdio_write(tp, 0x14, 0xc200); | |
+ mdio_write(tp, 0x14, 0xc43f); | |
+ mdio_write(tp, 0x14, 0xcc03); | |
+ mdio_write(tp, 0x14, 0xa701); | |
+ mdio_write(tp, 0x14, 0xa510); | |
+ mdio_write(tp, 0x14, 0xd710); | |
+ mdio_write(tp, 0x14, 0x4018); | |
+ mdio_write(tp, 0x14, 0x9910); | |
+ mdio_write(tp, 0x14, 0x8510); | |
+ mdio_write(tp, 0x14, 0x2860); | |
+ mdio_write(tp, 0x14, 0xe00f); | |
+ mdio_write(tp, 0x14, 0x0504); | |
+ mdio_write(tp, 0x14, 0xd710); | |
+ mdio_write(tp, 0x14, 0x6099); | |
+ mdio_write(tp, 0x14, 0xd71e); | |
+ mdio_write(tp, 0x14, 0x7fa4); | |
+ mdio_write(tp, 0x14, 0x2cd4); | |
+ mdio_write(tp, 0x14, 0xa608); | |
+ mdio_write(tp, 0x14, 0xc17d); | |
+ mdio_write(tp, 0x14, 0xc200); | |
+ mdio_write(tp, 0x14, 0xc43f); | |
+ mdio_write(tp, 0x14, 0xcc03); | |
+ mdio_write(tp, 0x14, 0xa701); | |
+ mdio_write(tp, 0x14, 0xa510); | |
+ mdio_write(tp, 0x14, 0xd710); | |
+ mdio_write(tp, 0x14, 0x4018); | |
+ mdio_write(tp, 0x14, 0x9910); | |
+ mdio_write(tp, 0x14, 0x8510); | |
+ mdio_write(tp, 0x14, 0x2926); | |
+ mdio_write(tp, 0x14, 0x1792); | |
+ mdio_write(tp, 0x14, 0x27db); | |
+ mdio_write(tp, 0x14, 0xc000); | |
+ mdio_write(tp, 0x14, 0xc100); | |
+ mdio_write(tp, 0x14, 0xc200); | |
+ mdio_write(tp, 0x14, 0xc300); | |
+ mdio_write(tp, 0x14, 0xc400); | |
+ mdio_write(tp, 0x14, 0xc500); | |
+ mdio_write(tp, 0x14, 0xc600); | |
+ mdio_write(tp, 0x14, 0xc7c1); | |
+ mdio_write(tp, 0x14, 0xc800); | |
+ mdio_write(tp, 0x14, 0xcc00); | |
+ mdio_write(tp, 0x14, 0x0800); | |
+ mdio_write(tp, 0x14, 0xca0f); | |
+ mdio_write(tp, 0x14, 0xcbff); | |
+ mdio_write(tp, 0x14, 0xa901); | |
+ mdio_write(tp, 0x14, 0x8902); | |
+ mdio_write(tp, 0x14, 0xc900); | |
+ mdio_write(tp, 0x14, 0xca00); | |
+ mdio_write(tp, 0x14, 0xcb00); | |
+ mdio_write(tp, 0x14, 0x0800); | |
+ mdio_write(tp, 0x14, 0xb804); | |
+ mdio_write(tp, 0x14, 0x0800); | |
+ mdio_write(tp, 0x14, 0xd71e); | |
+ mdio_write(tp, 0x14, 0x6044); | |
+ mdio_write(tp, 0x14, 0x9804); | |
+ mdio_write(tp, 0x14, 0x0800); | |
+ mdio_write(tp, 0x14, 0xd710); | |
+ mdio_write(tp, 0x14, 0x6099); | |
+ mdio_write(tp, 0x14, 0xd71e); | |
+ mdio_write(tp, 0x14, 0x7fa4); | |
+ mdio_write(tp, 0x14, 0x2cd4); | |
+ mdio_write(tp, 0x14, 0x0800); | |
+ mdio_write(tp, 0x14, 0xa510); | |
+ mdio_write(tp, 0x14, 0xd710); | |
+ mdio_write(tp, 0x14, 0x6098); | |
+ mdio_write(tp, 0x14, 0xd71e); | |
+ mdio_write(tp, 0x14, 0x7fa4); | |
+ mdio_write(tp, 0x14, 0x2cd4); | |
+ mdio_write(tp, 0x14, 0x8510); | |
+ mdio_write(tp, 0x14, 0x0800); | |
+ mdio_write(tp, 0x14, 0xd711); | |
+ mdio_write(tp, 0x14, 0x3003); | |
+ mdio_write(tp, 0x14, 0x1d01); | |
+ mdio_write(tp, 0x14, 0x2d0b); | |
+ mdio_write(tp, 0x14, 0xd710); | |
+ mdio_write(tp, 0x14, 0x60be); | |
+ mdio_write(tp, 0x14, 0xe060); | |
+ mdio_write(tp, 0x14, 0x0920); | |
+ mdio_write(tp, 0x14, 0x1cd6); | |
+ mdio_write(tp, 0x14, 0x2c89); | |
+ mdio_write(tp, 0x14, 0xd71e); | |
+ mdio_write(tp, 0x14, 0x3063); | |
+ mdio_write(tp, 0x14, 0x1948); | |
+ mdio_write(tp, 0x14, 0x288a); | |
+ mdio_write(tp, 0x14, 0x1cd6); | |
+ mdio_write(tp, 0x14, 0x29bd); | |
+ mdio_write(tp, 0x14, 0xa802); | |
+ mdio_write(tp, 0x14, 0xa303); | |
+ mdio_write(tp, 0x14, 0x843f); | |
+ mdio_write(tp, 0x14, 0x81ff); | |
+ mdio_write(tp, 0x14, 0x8208); | |
+ mdio_write(tp, 0x14, 0xa201); | |
+ mdio_write(tp, 0x14, 0xc001); | |
+ mdio_write(tp, 0x14, 0xd710); | |
+ mdio_write(tp, 0x14, 0x30a0); | |
+ mdio_write(tp, 0x14, 0x0d1c); | |
+ mdio_write(tp, 0x14, 0x30a0); | |
+ mdio_write(tp, 0x14, 0x3d13); | |
+ mdio_write(tp, 0x14, 0xd71e); | |
+ mdio_write(tp, 0x14, 0x7f4c); | |
+ mdio_write(tp, 0x14, 0x2ab6); | |
+ mdio_write(tp, 0x14, 0xe003); | |
+ mdio_write(tp, 0x14, 0x0202); | |
+ mdio_write(tp, 0x14, 0xd710); | |
+ mdio_write(tp, 0x14, 0x6090); | |
+ mdio_write(tp, 0x14, 0xd71e); | |
+ mdio_write(tp, 0x14, 0x7fac); | |
+ mdio_write(tp, 0x14, 0x2ab6); | |
+ mdio_write(tp, 0x14, 0xa20c); | |
+ mdio_write(tp, 0x14, 0xd710); | |
+ mdio_write(tp, 0x14, 0x6091); | |
+ mdio_write(tp, 0x14, 0xd71e); | |
+ mdio_write(tp, 0x14, 0x7fac); | |
+ mdio_write(tp, 0x14, 0x2ab6); | |
+ mdio_write(tp, 0x14, 0x820e); | |
+ mdio_write(tp, 0x14, 0xa3e0); | |
+ mdio_write(tp, 0x14, 0xa520); | |
+ mdio_write(tp, 0x14, 0xd710); | |
+ mdio_write(tp, 0x14, 0x609d); | |
+ mdio_write(tp, 0x14, 0xd71e); | |
+ mdio_write(tp, 0x14, 0x7fac); | |
+ mdio_write(tp, 0x14, 0x2ab6); | |
+ mdio_write(tp, 0x14, 0x8520); | |
+ mdio_write(tp, 0x14, 0x6703); | |
+ mdio_write(tp, 0x14, 0x2d34); | |
+ mdio_write(tp, 0x14, 0xa13e); | |
+ mdio_write(tp, 0x14, 0xc001); | |
+ mdio_write(tp, 0x14, 0xd710); | |
+ mdio_write(tp, 0x14, 0x4000); | |
+ mdio_write(tp, 0x14, 0x6046); | |
+ mdio_write(tp, 0x14, 0x2d0d); | |
+ mdio_write(tp, 0x14, 0xa43f); | |
+ mdio_write(tp, 0x14, 0xa101); | |
+ mdio_write(tp, 0x14, 0xc020); | |
+ mdio_write(tp, 0x14, 0xd710); | |
+ mdio_write(tp, 0x14, 0x3121); | |
+ mdio_write(tp, 0x14, 0x0d45); | |
+ mdio_write(tp, 0x14, 0x30c0); | |
+ mdio_write(tp, 0x14, 0x3d0d); | |
+ mdio_write(tp, 0x14, 0xd71e); | |
+ mdio_write(tp, 0x14, 0x7f4c); | |
+ mdio_write(tp, 0x14, 0x2ab6); | |
+ mdio_write(tp, 0x14, 0xa540); | |
+ mdio_write(tp, 0x14, 0xc001); | |
+ mdio_write(tp, 0x14, 0xd710); | |
+ mdio_write(tp, 0x14, 0x4001); | |
+ mdio_write(tp, 0x14, 0xe00f); | |
+ mdio_write(tp, 0x14, 0x0501); | |
+ mdio_write(tp, 0x14, 0x1dac); | |
+ mdio_write(tp, 0x14, 0xc1c4); | |
+ mdio_write(tp, 0x14, 0xa268); | |
+ mdio_write(tp, 0x14, 0xa303); | |
+ mdio_write(tp, 0x14, 0x8420); | |
+ mdio_write(tp, 0x14, 0xe00f); | |
+ mdio_write(tp, 0x14, 0x0502); | |
+ mdio_write(tp, 0x14, 0x1dac); | |
+ mdio_write(tp, 0x14, 0xc002); | |
+ mdio_write(tp, 0x14, 0xd710); | |
+ mdio_write(tp, 0x14, 0x4000); | |
+ mdio_write(tp, 0x14, 0x8208); | |
+ mdio_write(tp, 0x14, 0x8410); | |
+ mdio_write(tp, 0x14, 0xa121); | |
+ mdio_write(tp, 0x14, 0xc002); | |
+ mdio_write(tp, 0x14, 0xd710); | |
+ mdio_write(tp, 0x14, 0x4000); | |
+ mdio_write(tp, 0x14, 0x8120); | |
+ mdio_write(tp, 0x14, 0x8180); | |
+ mdio_write(tp, 0x14, 0x1d97); | |
+ mdio_write(tp, 0x14, 0xa180); | |
+ mdio_write(tp, 0x14, 0xa13a); | |
+ mdio_write(tp, 0x14, 0x8240); | |
+ mdio_write(tp, 0x14, 0xa430); | |
+ mdio_write(tp, 0x14, 0xc010); | |
+ mdio_write(tp, 0x14, 0xd710); | |
+ mdio_write(tp, 0x14, 0x30e1); | |
+ mdio_write(tp, 0x14, 0x0abc); | |
+ mdio_write(tp, 0x14, 0xd71e); | |
+ mdio_write(tp, 0x14, 0x7f8c); | |
+ mdio_write(tp, 0x14, 0x2ab6); | |
+ mdio_write(tp, 0x14, 0xa480); | |
+ mdio_write(tp, 0x14, 0xa230); | |
+ mdio_write(tp, 0x14, 0xa303); | |
+ mdio_write(tp, 0x14, 0xc001); | |
+ mdio_write(tp, 0x14, 0xd70c); | |
+ mdio_write(tp, 0x14, 0x4124); | |
+ mdio_write(tp, 0x14, 0xd710); | |
+ mdio_write(tp, 0x14, 0x6120); | |
+ mdio_write(tp, 0x14, 0xd711); | |
+ mdio_write(tp, 0x14, 0x3128); | |
+ mdio_write(tp, 0x14, 0x3d76); | |
+ mdio_write(tp, 0x14, 0x2d70); | |
+ mdio_write(tp, 0x14, 0xa801); | |
+ mdio_write(tp, 0x14, 0x2d6c); | |
+ mdio_write(tp, 0x14, 0xd710); | |
+ mdio_write(tp, 0x14, 0x4000); | |
+ mdio_write(tp, 0x14, 0xe018); | |
+ mdio_write(tp, 0x14, 0x0208); | |
+ mdio_write(tp, 0x14, 0xa1f8); | |
+ mdio_write(tp, 0x14, 0x8480); | |
+ mdio_write(tp, 0x14, 0xc004); | |
+ mdio_write(tp, 0x14, 0xd710); | |
+ mdio_write(tp, 0x14, 0x4000); | |
+ mdio_write(tp, 0x14, 0x6046); | |
+ mdio_write(tp, 0x14, 0x2d0d); | |
+ mdio_write(tp, 0x14, 0xa43f); | |
+ mdio_write(tp, 0x14, 0xa105); | |
+ mdio_write(tp, 0x14, 0x8228); | |
+ mdio_write(tp, 0x14, 0xc004); | |
+ mdio_write(tp, 0x14, 0xd710); | |
+ mdio_write(tp, 0x14, 0x4000); | |
+ mdio_write(tp, 0x14, 0x81bc); | |
+ mdio_write(tp, 0x14, 0xa220); | |
+ mdio_write(tp, 0x14, 0x1d97); | |
+ mdio_write(tp, 0x14, 0x8220); | |
+ mdio_write(tp, 0x14, 0xa1bc); | |
+ mdio_write(tp, 0x14, 0xc040); | |
+ mdio_write(tp, 0x14, 0xd710); | |
+ mdio_write(tp, 0x14, 0x30e1); | |
+ mdio_write(tp, 0x14, 0x0abc); | |
+ mdio_write(tp, 0x14, 0x30e1); | |
+ mdio_write(tp, 0x14, 0x3d0d); | |
+ mdio_write(tp, 0x14, 0xd71e); | |
+ mdio_write(tp, 0x14, 0x7f4c); | |
+ mdio_write(tp, 0x14, 0x2ab6); | |
+ mdio_write(tp, 0x14, 0xa802); | |
+ mdio_write(tp, 0x14, 0xd70c); | |
+ mdio_write(tp, 0x14, 0x4244); | |
+ mdio_write(tp, 0x14, 0xa301); | |
+ mdio_write(tp, 0x14, 0xc004); | |
+ mdio_write(tp, 0x14, 0xd711); | |
+ mdio_write(tp, 0x14, 0x3128); | |
+ mdio_write(tp, 0x14, 0x3da5); | |
+ mdio_write(tp, 0x14, 0xd710); | |
+ mdio_write(tp, 0x14, 0x5f80); | |
+ mdio_write(tp, 0x14, 0xd711); | |
+ mdio_write(tp, 0x14, 0x3109); | |
+ mdio_write(tp, 0x14, 0x3da7); | |
+ mdio_write(tp, 0x14, 0x2dab); | |
+ mdio_write(tp, 0x14, 0xa801); | |
+ mdio_write(tp, 0x14, 0x2d9a); | |
+ mdio_write(tp, 0x14, 0xa802); | |
+ mdio_write(tp, 0x14, 0xc004); | |
+ mdio_write(tp, 0x14, 0xd710); | |
+ mdio_write(tp, 0x14, 0x4000); | |
+ mdio_write(tp, 0x14, 0x0800); | |
+ mdio_write(tp, 0x14, 0xa510); | |
+ mdio_write(tp, 0x14, 0xd710); | |
+ mdio_write(tp, 0x14, 0x609a); | |
+ mdio_write(tp, 0x14, 0xd71e); | |
+ mdio_write(tp, 0x14, 0x7fac); | |
+ mdio_write(tp, 0x14, 0x2ab6); | |
+ mdio_write(tp, 0x14, 0x8510); | |
+ mdio_write(tp, 0x14, 0x0800); | |
+ mdio_write(tp, 0x13, 0xA01A); | |
+ mdio_write(tp, 0x14, 0x0000); | |
+ mdio_write(tp, 0x13, 0xA006); | |
+ mdio_write(tp, 0x14, 0x0ad6); | |
+ mdio_write(tp, 0x13, 0xA004); | |
+ mdio_write(tp, 0x14, 0x07f5); | |
+ mdio_write(tp, 0x13, 0xA002); | |
+ mdio_write(tp, 0x14, 0x06a9); | |
+ mdio_write(tp, 0x13, 0xA000); | |
+ mdio_write(tp, 0x14, 0xf069); | |
+ mdio_write(tp, 0x13, 0xB820); | |
+ mdio_write(tp, 0x14, 0x0210); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0A43); | |
+ mdio_write(tp, 0x13, 0x83a0); | |
+ mdio_write(tp, 0x14, 0xaf83); | |
+ mdio_write(tp, 0x14, 0xacaf); | |
+ mdio_write(tp, 0x14, 0x83b8); | |
+ mdio_write(tp, 0x14, 0xaf83); | |
+ mdio_write(tp, 0x14, 0xcdaf); | |
+ mdio_write(tp, 0x14, 0x83d3); | |
+ mdio_write(tp, 0x14, 0x0204); | |
+ mdio_write(tp, 0x14, 0x9a02); | |
+ mdio_write(tp, 0x14, 0x09a9); | |
+ mdio_write(tp, 0x14, 0x0284); | |
+ mdio_write(tp, 0x14, 0x61af); | |
+ mdio_write(tp, 0x14, 0x02fc); | |
+ mdio_write(tp, 0x14, 0xad20); | |
+ mdio_write(tp, 0x14, 0x0302); | |
+ mdio_write(tp, 0x14, 0x867c); | |
+ mdio_write(tp, 0x14, 0xad21); | |
+ mdio_write(tp, 0x14, 0x0302); | |
+ mdio_write(tp, 0x14, 0x85c9); | |
+ mdio_write(tp, 0x14, 0xad22); | |
+ mdio_write(tp, 0x14, 0x0302); | |
+ mdio_write(tp, 0x14, 0x1bc0); | |
+ mdio_write(tp, 0x14, 0xaf17); | |
+ mdio_write(tp, 0x14, 0xe302); | |
+ mdio_write(tp, 0x14, 0x8703); | |
+ mdio_write(tp, 0x14, 0xaf18); | |
+ mdio_write(tp, 0x14, 0x6201); | |
+ mdio_write(tp, 0x14, 0x06e0); | |
+ mdio_write(tp, 0x14, 0x8148); | |
+ mdio_write(tp, 0x14, 0xaf3c); | |
+ mdio_write(tp, 0x14, 0x69f8); | |
+ mdio_write(tp, 0x14, 0xf9fa); | |
+ mdio_write(tp, 0x14, 0xef69); | |
+ mdio_write(tp, 0x14, 0xee80); | |
+ mdio_write(tp, 0x14, 0x10f7); | |
+ mdio_write(tp, 0x14, 0xee80); | |
+ mdio_write(tp, 0x14, 0x131f); | |
+ mdio_write(tp, 0x14, 0xd104); | |
+ mdio_write(tp, 0x14, 0xbf87); | |
+ mdio_write(tp, 0x14, 0xf302); | |
+ mdio_write(tp, 0x14, 0x4259); | |
+ mdio_write(tp, 0x14, 0x0287); | |
+ mdio_write(tp, 0x14, 0x88bf); | |
+ mdio_write(tp, 0x14, 0x87cf); | |
+ mdio_write(tp, 0x14, 0xd7b8); | |
+ mdio_write(tp, 0x14, 0x22d0); | |
+ mdio_write(tp, 0x14, 0x0c02); | |
+ mdio_write(tp, 0x14, 0x4252); | |
+ mdio_write(tp, 0x14, 0xee80); | |
+ mdio_write(tp, 0x14, 0xcda0); | |
+ mdio_write(tp, 0x14, 0xee80); | |
+ mdio_write(tp, 0x14, 0xce8b); | |
+ mdio_write(tp, 0x14, 0xee80); | |
+ mdio_write(tp, 0x14, 0xd1f5); | |
+ mdio_write(tp, 0x14, 0xee80); | |
+ mdio_write(tp, 0x14, 0xd2a9); | |
+ mdio_write(tp, 0x14, 0xee80); | |
+ mdio_write(tp, 0x14, 0xd30a); | |
+ mdio_write(tp, 0x14, 0xee80); | |
+ mdio_write(tp, 0x14, 0xf010); | |
+ mdio_write(tp, 0x14, 0xee80); | |
+ mdio_write(tp, 0x14, 0xf38f); | |
+ mdio_write(tp, 0x14, 0xee81); | |
+ mdio_write(tp, 0x14, 0x011e); | |
+ mdio_write(tp, 0x14, 0xee81); | |
+ mdio_write(tp, 0x14, 0x0b4a); | |
+ mdio_write(tp, 0x14, 0xee81); | |
+ mdio_write(tp, 0x14, 0x0c7c); | |
+ mdio_write(tp, 0x14, 0xee81); | |
+ mdio_write(tp, 0x14, 0x127f); | |
+ mdio_write(tp, 0x14, 0xd100); | |
+ mdio_write(tp, 0x14, 0x0210); | |
+ mdio_write(tp, 0x14, 0xb5ee); | |
+ mdio_write(tp, 0x14, 0x8088); | |
+ mdio_write(tp, 0x14, 0xa4ee); | |
+ mdio_write(tp, 0x14, 0x8089); | |
+ mdio_write(tp, 0x14, 0x44ee); | |
+ mdio_write(tp, 0x14, 0x809a); | |
+ mdio_write(tp, 0x14, 0xa4ee); | |
+ mdio_write(tp, 0x14, 0x809b); | |
+ mdio_write(tp, 0x14, 0x44ee); | |
+ mdio_write(tp, 0x14, 0x809c); | |
+ mdio_write(tp, 0x14, 0xa7ee); | |
+ mdio_write(tp, 0x14, 0x80a5); | |
+ mdio_write(tp, 0x14, 0xa7d2); | |
+ mdio_write(tp, 0x14, 0x0002); | |
+ mdio_write(tp, 0x14, 0x0e66); | |
+ mdio_write(tp, 0x14, 0x0285); | |
+ mdio_write(tp, 0x14, 0xc0ee); | |
+ mdio_write(tp, 0x14, 0x87fc); | |
+ mdio_write(tp, 0x14, 0x00e0); | |
+ mdio_write(tp, 0x14, 0x8245); | |
+ mdio_write(tp, 0x14, 0xf622); | |
+ mdio_write(tp, 0x14, 0xe482); | |
+ mdio_write(tp, 0x14, 0x45ef); | |
+ mdio_write(tp, 0x14, 0x96fe); | |
+ mdio_write(tp, 0x14, 0xfdfc); | |
+ mdio_write(tp, 0x14, 0x0402); | |
+ mdio_write(tp, 0x14, 0x847a); | |
+ mdio_write(tp, 0x14, 0x0284); | |
+ mdio_write(tp, 0x14, 0xb302); | |
+ mdio_write(tp, 0x14, 0x0cab); | |
+ mdio_write(tp, 0x14, 0x020c); | |
+ mdio_write(tp, 0x14, 0xc402); | |
+ mdio_write(tp, 0x14, 0x0cef); | |
+ mdio_write(tp, 0x14, 0x020d); | |
+ mdio_write(tp, 0x14, 0x0802); | |
+ mdio_write(tp, 0x14, 0x0d33); | |
+ mdio_write(tp, 0x14, 0x020c); | |
+ mdio_write(tp, 0x14, 0x3d04); | |
+ mdio_write(tp, 0x14, 0xf8fa); | |
+ mdio_write(tp, 0x14, 0xef69); | |
+ mdio_write(tp, 0x14, 0xe182); | |
+ mdio_write(tp, 0x14, 0x2fac); | |
+ mdio_write(tp, 0x14, 0x291a); | |
+ mdio_write(tp, 0x14, 0xe082); | |
+ mdio_write(tp, 0x14, 0x24ac); | |
+ mdio_write(tp, 0x14, 0x2102); | |
+ mdio_write(tp, 0x14, 0xae22); | |
+ mdio_write(tp, 0x14, 0x0210); | |
+ mdio_write(tp, 0x14, 0x57f6); | |
+ mdio_write(tp, 0x14, 0x21e4); | |
+ mdio_write(tp, 0x14, 0x8224); | |
+ mdio_write(tp, 0x14, 0xd101); | |
+ mdio_write(tp, 0x14, 0xbf44); | |
+ mdio_write(tp, 0x14, 0xd202); | |
+ mdio_write(tp, 0x14, 0x4259); | |
+ mdio_write(tp, 0x14, 0xae10); | |
+ mdio_write(tp, 0x14, 0x0212); | |
+ mdio_write(tp, 0x14, 0x4cf6); | |
+ mdio_write(tp, 0x14, 0x29e5); | |
+ mdio_write(tp, 0x14, 0x822f); | |
+ mdio_write(tp, 0x14, 0xe082); | |
+ mdio_write(tp, 0x14, 0x24f6); | |
+ mdio_write(tp, 0x14, 0x21e4); | |
+ mdio_write(tp, 0x14, 0x8224); | |
+ mdio_write(tp, 0x14, 0xef96); | |
+ mdio_write(tp, 0x14, 0xfefc); | |
+ mdio_write(tp, 0x14, 0x04f8); | |
+ mdio_write(tp, 0x14, 0xe182); | |
+ mdio_write(tp, 0x14, 0x2fac); | |
+ mdio_write(tp, 0x14, 0x2a18); | |
+ mdio_write(tp, 0x14, 0xe082); | |
+ mdio_write(tp, 0x14, 0x24ac); | |
+ mdio_write(tp, 0x14, 0x2202); | |
+ mdio_write(tp, 0x14, 0xae26); | |
+ mdio_write(tp, 0x14, 0x0284); | |
+ mdio_write(tp, 0x14, 0xf802); | |
+ mdio_write(tp, 0x14, 0x8565); | |
+ mdio_write(tp, 0x14, 0xd101); | |
+ mdio_write(tp, 0x14, 0xbf44); | |
+ mdio_write(tp, 0x14, 0xd502); | |
+ mdio_write(tp, 0x14, 0x4259); | |
+ mdio_write(tp, 0x14, 0xae0e); | |
+ mdio_write(tp, 0x14, 0x0284); | |
+ mdio_write(tp, 0x14, 0xea02); | |
+ mdio_write(tp, 0x14, 0x85a9); | |
+ mdio_write(tp, 0x14, 0xe182); | |
+ mdio_write(tp, 0x14, 0x2ff6); | |
+ mdio_write(tp, 0x14, 0x2ae5); | |
+ mdio_write(tp, 0x14, 0x822f); | |
+ mdio_write(tp, 0x14, 0xe082); | |
+ mdio_write(tp, 0x14, 0x24f6); | |
+ mdio_write(tp, 0x14, 0x22e4); | |
+ mdio_write(tp, 0x14, 0x8224); | |
+ mdio_write(tp, 0x14, 0xfc04); | |
+ mdio_write(tp, 0x14, 0xf9e2); | |
+ mdio_write(tp, 0x14, 0x8011); | |
+ mdio_write(tp, 0x14, 0xad31); | |
+ mdio_write(tp, 0x14, 0x05d2); | |
+ mdio_write(tp, 0x14, 0x0002); | |
+ mdio_write(tp, 0x14, 0x0e66); | |
+ mdio_write(tp, 0x14, 0xfd04); | |
+ mdio_write(tp, 0x14, 0xf8f9); | |
+ mdio_write(tp, 0x14, 0xfaef); | |
+ mdio_write(tp, 0x14, 0x69e0); | |
+ mdio_write(tp, 0x14, 0x8011); | |
+ mdio_write(tp, 0x14, 0xad21); | |
+ mdio_write(tp, 0x14, 0x5cbf); | |
+ mdio_write(tp, 0x14, 0x43be); | |
+ mdio_write(tp, 0x14, 0x0242); | |
+ mdio_write(tp, 0x14, 0x97ac); | |
+ mdio_write(tp, 0x14, 0x281b); | |
+ mdio_write(tp, 0x14, 0xbf43); | |
+ mdio_write(tp, 0x14, 0xc102); | |
+ mdio_write(tp, 0x14, 0x4297); | |
+ mdio_write(tp, 0x14, 0xac28); | |
+ mdio_write(tp, 0x14, 0x12bf); | |
+ mdio_write(tp, 0x14, 0x43c7); | |
+ mdio_write(tp, 0x14, 0x0242); | |
+ mdio_write(tp, 0x14, 0x97ac); | |
+ mdio_write(tp, 0x14, 0x2804); | |
+ mdio_write(tp, 0x14, 0xd300); | |
+ mdio_write(tp, 0x14, 0xae07); | |
+ mdio_write(tp, 0x14, 0xd306); | |
+ mdio_write(tp, 0x14, 0xaf85); | |
+ mdio_write(tp, 0x14, 0x56d3); | |
+ mdio_write(tp, 0x14, 0x03e0); | |
+ mdio_write(tp, 0x14, 0x8011); | |
+ mdio_write(tp, 0x14, 0xad26); | |
+ mdio_write(tp, 0x14, 0x25bf); | |
+ mdio_write(tp, 0x14, 0x4559); | |
+ mdio_write(tp, 0x14, 0x0242); | |
+ mdio_write(tp, 0x14, 0x97e2); | |
+ mdio_write(tp, 0x14, 0x8073); | |
+ mdio_write(tp, 0x14, 0x0d21); | |
+ mdio_write(tp, 0x14, 0xf637); | |
+ mdio_write(tp, 0x14, 0x0d11); | |
+ mdio_write(tp, 0x14, 0xf62f); | |
+ mdio_write(tp, 0x14, 0x1b21); | |
+ mdio_write(tp, 0x14, 0xaa02); | |
+ mdio_write(tp, 0x14, 0xae10); | |
+ mdio_write(tp, 0x14, 0xe280); | |
+ mdio_write(tp, 0x14, 0x740d); | |
+ mdio_write(tp, 0x14, 0x21f6); | |
+ mdio_write(tp, 0x14, 0x371b); | |
+ mdio_write(tp, 0x14, 0x21aa); | |
+ mdio_write(tp, 0x14, 0x0313); | |
+ mdio_write(tp, 0x14, 0xae02); | |
+ mdio_write(tp, 0x14, 0x2b02); | |
+ mdio_write(tp, 0x14, 0x020e); | |
+ mdio_write(tp, 0x14, 0x5102); | |
+ mdio_write(tp, 0x14, 0x0e66); | |
+ mdio_write(tp, 0x14, 0x020f); | |
+ mdio_write(tp, 0x14, 0xa3ef); | |
+ mdio_write(tp, 0x14, 0x96fe); | |
+ mdio_write(tp, 0x14, 0xfdfc); | |
+ mdio_write(tp, 0x14, 0x04f8); | |
+ mdio_write(tp, 0x14, 0xf9fa); | |
+ mdio_write(tp, 0x14, 0xef69); | |
+ mdio_write(tp, 0x14, 0xe080); | |
+ mdio_write(tp, 0x14, 0x12ad); | |
+ mdio_write(tp, 0x14, 0x2733); | |
+ mdio_write(tp, 0x14, 0xbf43); | |
+ mdio_write(tp, 0x14, 0xbe02); | |
+ mdio_write(tp, 0x14, 0x4297); | |
+ mdio_write(tp, 0x14, 0xac28); | |
+ mdio_write(tp, 0x14, 0x09bf); | |
+ mdio_write(tp, 0x14, 0x43c1); | |
+ mdio_write(tp, 0x14, 0x0242); | |
+ mdio_write(tp, 0x14, 0x97ad); | |
+ mdio_write(tp, 0x14, 0x2821); | |
+ mdio_write(tp, 0x14, 0xbf45); | |
+ mdio_write(tp, 0x14, 0x5902); | |
+ mdio_write(tp, 0x14, 0x4297); | |
+ mdio_write(tp, 0x14, 0xe387); | |
+ mdio_write(tp, 0x14, 0xffd2); | |
+ mdio_write(tp, 0x14, 0x001b); | |
+ mdio_write(tp, 0x14, 0x45ac); | |
+ mdio_write(tp, 0x14, 0x2711); | |
+ mdio_write(tp, 0x14, 0xe187); | |
+ mdio_write(tp, 0x14, 0xfebf); | |
+ mdio_write(tp, 0x14, 0x87e4); | |
+ mdio_write(tp, 0x14, 0x0242); | |
+ mdio_write(tp, 0x14, 0x590d); | |
+ mdio_write(tp, 0x14, 0x11bf); | |
+ mdio_write(tp, 0x14, 0x87e7); | |
+ mdio_write(tp, 0x14, 0x0242); | |
+ mdio_write(tp, 0x14, 0x59ef); | |
+ mdio_write(tp, 0x14, 0x96fe); | |
+ mdio_write(tp, 0x14, 0xfdfc); | |
+ mdio_write(tp, 0x14, 0x04f8); | |
+ mdio_write(tp, 0x14, 0xfaef); | |
+ mdio_write(tp, 0x14, 0x69d1); | |
+ mdio_write(tp, 0x14, 0x00bf); | |
+ mdio_write(tp, 0x14, 0x87e4); | |
+ mdio_write(tp, 0x14, 0x0242); | |
+ mdio_write(tp, 0x14, 0x59bf); | |
+ mdio_write(tp, 0x14, 0x87e7); | |
+ mdio_write(tp, 0x14, 0x0242); | |
+ mdio_write(tp, 0x14, 0x59ef); | |
+ mdio_write(tp, 0x14, 0x96fe); | |
+ mdio_write(tp, 0x14, 0xfc04); | |
+ mdio_write(tp, 0x14, 0xee87); | |
+ mdio_write(tp, 0x14, 0xff46); | |
+ mdio_write(tp, 0x14, 0xee87); | |
+ mdio_write(tp, 0x14, 0xfe01); | |
+ mdio_write(tp, 0x14, 0x04f8); | |
+ mdio_write(tp, 0x14, 0xfaef); | |
+ mdio_write(tp, 0x14, 0x69e0); | |
+ mdio_write(tp, 0x14, 0x8241); | |
+ mdio_write(tp, 0x14, 0xa000); | |
+ mdio_write(tp, 0x14, 0x0502); | |
+ mdio_write(tp, 0x14, 0x85eb); | |
+ mdio_write(tp, 0x14, 0xae0e); | |
+ mdio_write(tp, 0x14, 0xa001); | |
+ mdio_write(tp, 0x14, 0x0502); | |
+ mdio_write(tp, 0x14, 0x1a5a); | |
+ mdio_write(tp, 0x14, 0xae06); | |
+ mdio_write(tp, 0x14, 0xa002); | |
+ mdio_write(tp, 0x14, 0x0302); | |
+ mdio_write(tp, 0x14, 0x1ae6); | |
+ mdio_write(tp, 0x14, 0xef96); | |
+ mdio_write(tp, 0x14, 0xfefc); | |
+ mdio_write(tp, 0x14, 0x04f8); | |
+ mdio_write(tp, 0x14, 0xf9fa); | |
+ mdio_write(tp, 0x14, 0xef69); | |
+ mdio_write(tp, 0x14, 0xe082); | |
+ mdio_write(tp, 0x14, 0x29f6); | |
+ mdio_write(tp, 0x14, 0x21e4); | |
+ mdio_write(tp, 0x14, 0x8229); | |
+ mdio_write(tp, 0x14, 0xe080); | |
+ mdio_write(tp, 0x14, 0x10ac); | |
+ mdio_write(tp, 0x14, 0x2202); | |
+ mdio_write(tp, 0x14, 0xae76); | |
+ mdio_write(tp, 0x14, 0xe082); | |
+ mdio_write(tp, 0x14, 0x27f7); | |
+ mdio_write(tp, 0x14, 0x21e4); | |
+ mdio_write(tp, 0x14, 0x8227); | |
+ mdio_write(tp, 0x14, 0xbf43); | |
+ mdio_write(tp, 0x14, 0x1302); | |
+ mdio_write(tp, 0x14, 0x4297); | |
+ mdio_write(tp, 0x14, 0xef21); | |
+ mdio_write(tp, 0x14, 0xbf43); | |
+ mdio_write(tp, 0x14, 0x1602); | |
+ mdio_write(tp, 0x14, 0x4297); | |
+ mdio_write(tp, 0x14, 0x0c11); | |
+ mdio_write(tp, 0x14, 0x1e21); | |
+ mdio_write(tp, 0x14, 0xbf43); | |
+ mdio_write(tp, 0x14, 0x1902); | |
+ mdio_write(tp, 0x14, 0x4297); | |
+ mdio_write(tp, 0x14, 0x0c12); | |
+ mdio_write(tp, 0x14, 0x1e21); | |
+ mdio_write(tp, 0x14, 0xe682); | |
+ mdio_write(tp, 0x14, 0x43a2); | |
+ mdio_write(tp, 0x14, 0x000a); | |
+ mdio_write(tp, 0x14, 0xe182); | |
+ mdio_write(tp, 0x14, 0x27f6); | |
+ mdio_write(tp, 0x14, 0x29e5); | |
+ mdio_write(tp, 0x14, 0x8227); | |
+ mdio_write(tp, 0x14, 0xae42); | |
+ mdio_write(tp, 0x14, 0xe082); | |
+ mdio_write(tp, 0x14, 0x44f7); | |
+ mdio_write(tp, 0x14, 0x21e4); | |
+ mdio_write(tp, 0x14, 0x8244); | |
+ mdio_write(tp, 0x14, 0x0246); | |
+ mdio_write(tp, 0x14, 0xaebf); | |
+ mdio_write(tp, 0x14, 0x4325); | |
+ mdio_write(tp, 0x14, 0x0242); | |
+ mdio_write(tp, 0x14, 0x97ef); | |
+ mdio_write(tp, 0x14, 0x21bf); | |
+ mdio_write(tp, 0x14, 0x431c); | |
+ mdio_write(tp, 0x14, 0x0242); | |
+ mdio_write(tp, 0x14, 0x970c); | |
+ mdio_write(tp, 0x14, 0x121e); | |
+ mdio_write(tp, 0x14, 0x21bf); | |
+ mdio_write(tp, 0x14, 0x431f); | |
+ mdio_write(tp, 0x14, 0x0242); | |
+ mdio_write(tp, 0x14, 0x970c); | |
+ mdio_write(tp, 0x14, 0x131e); | |
+ mdio_write(tp, 0x14, 0x21bf); | |
+ mdio_write(tp, 0x14, 0x4328); | |
+ mdio_write(tp, 0x14, 0x0242); | |
+ mdio_write(tp, 0x14, 0x970c); | |
+ mdio_write(tp, 0x14, 0x141e); | |
+ mdio_write(tp, 0x14, 0x21bf); | |
+ mdio_write(tp, 0x14, 0x44b1); | |
+ mdio_write(tp, 0x14, 0x0242); | |
+ mdio_write(tp, 0x14, 0x970c); | |
+ mdio_write(tp, 0x14, 0x161e); | |
+ mdio_write(tp, 0x14, 0x21e6); | |
+ mdio_write(tp, 0x14, 0x8242); | |
+ mdio_write(tp, 0x14, 0xee82); | |
+ mdio_write(tp, 0x14, 0x4101); | |
+ mdio_write(tp, 0x14, 0xef96); | |
+ mdio_write(tp, 0x14, 0xfefd); | |
+ mdio_write(tp, 0x14, 0xfc04); | |
+ mdio_write(tp, 0x14, 0xf8fa); | |
+ mdio_write(tp, 0x14, 0xef69); | |
+ mdio_write(tp, 0x14, 0xe082); | |
+ mdio_write(tp, 0x14, 0x46a0); | |
+ mdio_write(tp, 0x14, 0x0005); | |
+ mdio_write(tp, 0x14, 0x0286); | |
+ mdio_write(tp, 0x14, 0x96ae); | |
+ mdio_write(tp, 0x14, 0x06a0); | |
+ mdio_write(tp, 0x14, 0x0103); | |
+ mdio_write(tp, 0x14, 0x0219); | |
+ mdio_write(tp, 0x14, 0x19ef); | |
+ mdio_write(tp, 0x14, 0x96fe); | |
+ mdio_write(tp, 0x14, 0xfc04); | |
+ mdio_write(tp, 0x14, 0xf8fa); | |
+ mdio_write(tp, 0x14, 0xef69); | |
+ mdio_write(tp, 0x14, 0xe082); | |
+ mdio_write(tp, 0x14, 0x29f6); | |
+ mdio_write(tp, 0x14, 0x20e4); | |
+ mdio_write(tp, 0x14, 0x8229); | |
+ mdio_write(tp, 0x14, 0xe080); | |
+ mdio_write(tp, 0x14, 0x10ac); | |
+ mdio_write(tp, 0x14, 0x2102); | |
+ mdio_write(tp, 0x14, 0xae54); | |
+ mdio_write(tp, 0x14, 0xe082); | |
+ mdio_write(tp, 0x14, 0x27f7); | |
+ mdio_write(tp, 0x14, 0x20e4); | |
+ mdio_write(tp, 0x14, 0x8227); | |
+ mdio_write(tp, 0x14, 0xbf42); | |
+ mdio_write(tp, 0x14, 0xe602); | |
+ mdio_write(tp, 0x14, 0x4297); | |
+ mdio_write(tp, 0x14, 0xac28); | |
+ mdio_write(tp, 0x14, 0x22bf); | |
+ mdio_write(tp, 0x14, 0x430d); | |
+ mdio_write(tp, 0x14, 0x0242); | |
+ mdio_write(tp, 0x14, 0x97e5); | |
+ mdio_write(tp, 0x14, 0x8247); | |
+ mdio_write(tp, 0x14, 0xac28); | |
+ mdio_write(tp, 0x14, 0x20d1); | |
+ mdio_write(tp, 0x14, 0x03bf); | |
+ mdio_write(tp, 0x14, 0x4307); | |
+ mdio_write(tp, 0x14, 0x0242); | |
+ mdio_write(tp, 0x14, 0x59ee); | |
+ mdio_write(tp, 0x14, 0x8246); | |
+ mdio_write(tp, 0x14, 0x00e1); | |
+ mdio_write(tp, 0x14, 0x8227); | |
+ mdio_write(tp, 0x14, 0xf628); | |
+ mdio_write(tp, 0x14, 0xe582); | |
+ mdio_write(tp, 0x14, 0x27ae); | |
+ mdio_write(tp, 0x14, 0x21d1); | |
+ mdio_write(tp, 0x14, 0x04bf); | |
+ mdio_write(tp, 0x14, 0x4307); | |
+ mdio_write(tp, 0x14, 0x0242); | |
+ mdio_write(tp, 0x14, 0x59ae); | |
+ mdio_write(tp, 0x14, 0x08d1); | |
+ mdio_write(tp, 0x14, 0x05bf); | |
+ mdio_write(tp, 0x14, 0x4307); | |
+ mdio_write(tp, 0x14, 0x0242); | |
+ mdio_write(tp, 0x14, 0x59e0); | |
+ mdio_write(tp, 0x14, 0x8244); | |
+ mdio_write(tp, 0x14, 0xf720); | |
+ mdio_write(tp, 0x14, 0xe482); | |
+ mdio_write(tp, 0x14, 0x4402); | |
+ mdio_write(tp, 0x14, 0x46ae); | |
+ mdio_write(tp, 0x14, 0xee82); | |
+ mdio_write(tp, 0x14, 0x4601); | |
+ mdio_write(tp, 0x14, 0xef96); | |
+ mdio_write(tp, 0x14, 0xfefc); | |
+ mdio_write(tp, 0x14, 0x04f8); | |
+ mdio_write(tp, 0x14, 0xfaef); | |
+ mdio_write(tp, 0x14, 0x69e0); | |
+ mdio_write(tp, 0x14, 0x8013); | |
+ mdio_write(tp, 0x14, 0xad24); | |
+ mdio_write(tp, 0x14, 0x1cbf); | |
+ mdio_write(tp, 0x14, 0x87f0); | |
+ mdio_write(tp, 0x14, 0x0242); | |
+ mdio_write(tp, 0x14, 0x97ad); | |
+ mdio_write(tp, 0x14, 0x2813); | |
+ mdio_write(tp, 0x14, 0xe087); | |
+ mdio_write(tp, 0x14, 0xfca0); | |
+ mdio_write(tp, 0x14, 0x0005); | |
+ mdio_write(tp, 0x14, 0x0287); | |
+ mdio_write(tp, 0x14, 0x36ae); | |
+ mdio_write(tp, 0x14, 0x10a0); | |
+ mdio_write(tp, 0x14, 0x0105); | |
+ mdio_write(tp, 0x14, 0x0287); | |
+ mdio_write(tp, 0x14, 0x48ae); | |
+ mdio_write(tp, 0x14, 0x08e0); | |
+ mdio_write(tp, 0x14, 0x8230); | |
+ mdio_write(tp, 0x14, 0xf626); | |
+ mdio_write(tp, 0x14, 0xe482); | |
+ mdio_write(tp, 0x14, 0x30ef); | |
+ mdio_write(tp, 0x14, 0x96fe); | |
+ mdio_write(tp, 0x14, 0xfc04); | |
+ mdio_write(tp, 0x14, 0xf8e0); | |
+ mdio_write(tp, 0x14, 0x8245); | |
+ mdio_write(tp, 0x14, 0xf722); | |
+ mdio_write(tp, 0x14, 0xe482); | |
+ mdio_write(tp, 0x14, 0x4502); | |
+ mdio_write(tp, 0x14, 0x46ae); | |
+ mdio_write(tp, 0x14, 0xee87); | |
+ mdio_write(tp, 0x14, 0xfc01); | |
+ mdio_write(tp, 0x14, 0xfc04); | |
+ mdio_write(tp, 0x14, 0xf8fa); | |
+ mdio_write(tp, 0x14, 0xef69); | |
+ mdio_write(tp, 0x14, 0xfb02); | |
+ mdio_write(tp, 0x14, 0x46d3); | |
+ mdio_write(tp, 0x14, 0xad50); | |
+ mdio_write(tp, 0x14, 0x2fbf); | |
+ mdio_write(tp, 0x14, 0x87ed); | |
+ mdio_write(tp, 0x14, 0xd101); | |
+ mdio_write(tp, 0x14, 0x0242); | |
+ mdio_write(tp, 0x14, 0x59bf); | |
+ mdio_write(tp, 0x14, 0x87ed); | |
+ mdio_write(tp, 0x14, 0xd100); | |
+ mdio_write(tp, 0x14, 0x0242); | |
+ mdio_write(tp, 0x14, 0x59e0); | |
+ mdio_write(tp, 0x14, 0x8245); | |
+ mdio_write(tp, 0x14, 0xf622); | |
+ mdio_write(tp, 0x14, 0xe482); | |
+ mdio_write(tp, 0x14, 0x4502); | |
+ mdio_write(tp, 0x14, 0x46ae); | |
+ mdio_write(tp, 0x14, 0xd100); | |
+ mdio_write(tp, 0x14, 0xbf87); | |
+ mdio_write(tp, 0x14, 0xf002); | |
+ mdio_write(tp, 0x14, 0x4259); | |
+ mdio_write(tp, 0x14, 0xee87); | |
+ mdio_write(tp, 0x14, 0xfc00); | |
+ mdio_write(tp, 0x14, 0xe082); | |
+ mdio_write(tp, 0x14, 0x30f6); | |
+ mdio_write(tp, 0x14, 0x26e4); | |
+ mdio_write(tp, 0x14, 0x8230); | |
+ mdio_write(tp, 0x14, 0xffef); | |
+ mdio_write(tp, 0x14, 0x96fe); | |
+ mdio_write(tp, 0x14, 0xfc04); | |
+ mdio_write(tp, 0x14, 0xf8f9); | |
+ mdio_write(tp, 0x14, 0xface); | |
+ mdio_write(tp, 0x14, 0xfaef); | |
+ mdio_write(tp, 0x14, 0x69fb); | |
+ mdio_write(tp, 0x14, 0xbf87); | |
+ mdio_write(tp, 0x14, 0xb3d7); | |
+ mdio_write(tp, 0x14, 0x001c); | |
+ mdio_write(tp, 0x14, 0xd819); | |
+ mdio_write(tp, 0x14, 0xd919); | |
+ mdio_write(tp, 0x14, 0xda19); | |
+ mdio_write(tp, 0x14, 0xdb19); | |
+ mdio_write(tp, 0x14, 0x07ef); | |
+ mdio_write(tp, 0x14, 0x9502); | |
+ mdio_write(tp, 0x14, 0x4259); | |
+ mdio_write(tp, 0x14, 0x073f); | |
+ mdio_write(tp, 0x14, 0x0004); | |
+ mdio_write(tp, 0x14, 0x9fec); | |
+ mdio_write(tp, 0x14, 0xffef); | |
+ mdio_write(tp, 0x14, 0x96fe); | |
+ mdio_write(tp, 0x14, 0xc6fe); | |
+ mdio_write(tp, 0x14, 0xfdfc); | |
+ mdio_write(tp, 0x14, 0x0400); | |
+ mdio_write(tp, 0x14, 0x0145); | |
+ mdio_write(tp, 0x14, 0x7d00); | |
+ mdio_write(tp, 0x14, 0x0345); | |
+ mdio_write(tp, 0x14, 0x5c00); | |
+ mdio_write(tp, 0x14, 0x0143); | |
+ mdio_write(tp, 0x14, 0x4f00); | |
+ mdio_write(tp, 0x14, 0x0387); | |
+ mdio_write(tp, 0x14, 0xdb00); | |
+ mdio_write(tp, 0x14, 0x0987); | |
+ mdio_write(tp, 0x14, 0xde00); | |
+ mdio_write(tp, 0x14, 0x0987); | |
+ mdio_write(tp, 0x14, 0xe100); | |
+ mdio_write(tp, 0x14, 0x0087); | |
+ mdio_write(tp, 0x14, 0xeaa4); | |
+ mdio_write(tp, 0x14, 0x00b8); | |
+ mdio_write(tp, 0x14, 0x20c4); | |
+ mdio_write(tp, 0x14, 0x1600); | |
+ mdio_write(tp, 0x14, 0x000f); | |
+ mdio_write(tp, 0x14, 0xf800); | |
+ mdio_write(tp, 0x14, 0x7098); | |
+ mdio_write(tp, 0x14, 0xa58a); | |
+ mdio_write(tp, 0x14, 0xb6a8); | |
+ mdio_write(tp, 0x14, 0x3e50); | |
+ mdio_write(tp, 0x14, 0xa83e); | |
+ mdio_write(tp, 0x14, 0x33bc); | |
+ mdio_write(tp, 0x14, 0xc622); | |
+ mdio_write(tp, 0x14, 0xbcc6); | |
+ mdio_write(tp, 0x14, 0xaaa4); | |
+ mdio_write(tp, 0x14, 0x42ff); | |
+ mdio_write(tp, 0x14, 0xc408); | |
+ mdio_write(tp, 0x14, 0x00c4); | |
+ mdio_write(tp, 0x14, 0x16a8); | |
+ mdio_write(tp, 0x14, 0xbcc0); | |
+ mdio_write(tp, 0x13, 0xb818); | |
+ mdio_write(tp, 0x14, 0x02f3); | |
+ mdio_write(tp, 0x13, 0xb81a); | |
+ mdio_write(tp, 0x14, 0x17d1); | |
+ mdio_write(tp, 0x13, 0xb81c); | |
+ mdio_write(tp, 0x14, 0x185a); | |
+ mdio_write(tp, 0x13, 0xb81e); | |
+ mdio_write(tp, 0x14, 0x3c66); | |
+ mdio_write(tp, 0x13, 0xb820); | |
+ mdio_write(tp, 0x14, 0x021f); | |
+ mdio_write(tp, 0x13, 0xc416); | |
+ mdio_write(tp, 0x14, 0x0500); | |
+ mdio_write(tp, 0x13, 0xb82e); | |
+ mdio_write(tp, 0x14, 0xfffc); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0A43); | |
+ mdio_write(tp, 0x13, 0x0000); | |
+ mdio_write(tp, 0x14, 0x0000); | |
+ mdio_write(tp, 0x1f, 0x0B82); | |
+ gphy_val = mdio_read(tp, 0x10); | |
+ gphy_val &= ~(BIT_9); | |
+ mdio_write(tp, 0x10, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0A43); | |
+ mdio_write(tp, 0x13, 0x8146); | |
+ mdio_write(tp, 0x14, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1f, 0x0B82); | |
+ gphy_val = mdio_read(tp, 0x10); | |
+ gphy_val &= ~(BIT_4); | |
+ mdio_write(tp, 0x10, gphy_val); | |
+} | |
+ | |
+static void | |
+rtl8168_set_phy_mcu_8168gu_2(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ unsigned int gphy_val,i; | |
+ | |
+ mdio_write(tp, 0x1f, 0x0B82); | |
+ gphy_val = mdio_read(tp, 0x10); | |
+ gphy_val |= BIT_4; | |
+ mdio_write(tp, 0x10, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0B80); | |
+ i = 0; | |
+ do { | |
+ gphy_val = mdio_read(tp, 0x10); | |
+ gphy_val &= 0x0040; | |
+ udelay(50); | |
+ udelay(50); | |
+ i++; | |
+ } while(gphy_val != 0x0040 && i <1000); | |
+ mdio_write(tp, 0x1f, 0x0A43); | |
+ mdio_write(tp, 0x13, 0x8146); | |
+ mdio_write(tp, 0x14, 0x0300); | |
+ mdio_write(tp, 0x13, 0xB82E); | |
+ mdio_write(tp, 0x14, 0x0001); | |
+ mdio_write(tp, 0x1F, 0x0A43); | |
+ mdio_write(tp, 0x13, 0xb820); | |
+ mdio_write(tp, 0x14, 0x0290); | |
+ mdio_write(tp, 0x13, 0xa012); | |
+ mdio_write(tp, 0x14, 0x0000); | |
+ mdio_write(tp, 0x13, 0xa014); | |
+ mdio_write(tp, 0x14, 0x2c04); | |
+ mdio_write(tp, 0x14, 0x2c07); | |
+ mdio_write(tp, 0x14, 0x2c07); | |
+ mdio_write(tp, 0x14, 0x2c07); | |
+ mdio_write(tp, 0x14, 0xa304); | |
+ mdio_write(tp, 0x14, 0xa301); | |
+ mdio_write(tp, 0x14, 0x207e); | |
+ mdio_write(tp, 0x13, 0xa01a); | |
+ mdio_write(tp, 0x14, 0x0000); | |
+ mdio_write(tp, 0x13, 0xa006); | |
+ mdio_write(tp, 0x14, 0x0fff); | |
+ mdio_write(tp, 0x13, 0xa004); | |
+ mdio_write(tp, 0x14, 0x0fff); | |
+ mdio_write(tp, 0x13, 0xa002); | |
+ mdio_write(tp, 0x14, 0x0fff); | |
+ mdio_write(tp, 0x13, 0xa000); | |
+ mdio_write(tp, 0x14, 0x107c); | |
+ mdio_write(tp, 0x13, 0xb820); | |
+ mdio_write(tp, 0x14, 0x0210); | |
+ mdio_write(tp, 0x1F, 0x0A43); | |
+ mdio_write(tp, 0x13, 0x0000); | |
+ mdio_write(tp, 0x14, 0x0000); | |
+ mdio_write(tp, 0x1f, 0x0B82); | |
+ gphy_val = mdio_read(tp, 0x17); | |
+ gphy_val &= ~(BIT_0); | |
+ mdio_write(tp, 0x17, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0A43); | |
+ mdio_write(tp, 0x13, 0x8146); | |
+ mdio_write(tp, 0x14, 0x0000); | |
+ mdio_write(tp, 0x1f, 0x0B82); | |
+ gphy_val = mdio_read(tp, 0x10); | |
+ gphy_val &= ~(BIT_4); | |
+ mdio_write(tp, 0x10, gphy_val); | |
+} | |
+ | |
+static void | |
+rtl8168_set_phy_mcu_8411b_1(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ unsigned int gphy_val,i; | |
+ | |
+ mdio_write(tp,0x1f, 0x0B82); | |
+ gphy_val = mdio_read(tp, 0x10); | |
+ gphy_val |= BIT_4; | |
+ mdio_write(tp,0x10, gphy_val); | |
+ | |
+ mdio_write(tp,0x1f, 0x0B80); | |
+ i = 0; | |
+ do { | |
+ gphy_val = mdio_read(tp, 0x10); | |
+ gphy_val &= 0x0040; | |
+ udelay(50); | |
+ udelay(50); | |
+ i++; | |
+ } while(gphy_val != 0x0040 && i <1000); | |
+ | |
+ mdio_write(tp,0x1f, 0x0A43); | |
+ mdio_write(tp,0x13, 0x8146); | |
+ mdio_write(tp,0x14, 0x0100); | |
+ mdio_write(tp,0x13, 0xB82E); | |
+ mdio_write(tp,0x14, 0x0001); | |
+ | |
+ | |
+ mdio_write(tp,0x1F, 0x0A43); | |
+ mdio_write(tp, 0x13, 0xb820); | |
+ mdio_write(tp, 0x14, 0x0290); | |
+ mdio_write(tp, 0x13, 0xa012); | |
+ mdio_write(tp, 0x14, 0x0000); | |
+ mdio_write(tp, 0x13, 0xa014); | |
+ mdio_write(tp, 0x14, 0x2c04); | |
+ mdio_write(tp, 0x14, 0x2c07); | |
+ mdio_write(tp, 0x14, 0x2c07); | |
+ mdio_write(tp, 0x14, 0x2c07); | |
+ mdio_write(tp, 0x14, 0xa304); | |
+ mdio_write(tp, 0x14, 0xa301); | |
+ mdio_write(tp, 0x14, 0x207e); | |
+ mdio_write(tp, 0x13, 0xa01a); | |
+ mdio_write(tp, 0x14, 0x0000); | |
+ mdio_write(tp, 0x13, 0xa006); | |
+ mdio_write(tp, 0x14, 0x0fff); | |
+ mdio_write(tp, 0x13, 0xa004); | |
+ mdio_write(tp, 0x14, 0x0fff); | |
+ mdio_write(tp, 0x13, 0xa002); | |
+ mdio_write(tp, 0x14, 0x0fff); | |
+ mdio_write(tp, 0x13, 0xa000); | |
+ mdio_write(tp, 0x14, 0x107c); | |
+ mdio_write(tp, 0x13, 0xb820); | |
+ mdio_write(tp, 0x14, 0x0210); | |
+ | |
+ | |
+ mdio_write(tp,0x1F, 0x0A43); | |
+ mdio_write(tp,0x13, 0x0000); | |
+ mdio_write(tp,0x14, 0x0000); | |
+ mdio_write(tp,0x1f, 0x0B82); | |
+ gphy_val = mdio_read(tp, 0x17); | |
+ gphy_val &= ~(BIT_0); | |
+ mdio_write(tp,0x17, gphy_val); | |
+ mdio_write(tp,0x1f, 0x0A43); | |
+ mdio_write(tp,0x13, 0x8146); | |
+ mdio_write(tp,0x14, 0x0000); | |
+ | |
+ | |
+ mdio_write(tp,0x1f, 0x0B82); | |
+ gphy_val = mdio_read(tp, 0x10); | |
+ gphy_val &= ~(BIT_4); | |
+ mdio_write(tp,0x10, gphy_val); | |
+} | |
+ | |
+static void | |
+rtl8168_set_phy_mcu_8168h_1(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ unsigned int gphy_val,i; | |
+ | |
+ mdio_write(tp, 0x1f, 0x0B82); | |
+ gphy_val = mdio_read(tp, 0x10); | |
+ gphy_val |= BIT_4; | |
+ mdio_write(tp, 0x10, gphy_val); | |
+ | |
+ mdio_write(tp, 0x1f, 0x0B80); | |
+ i = 0; | |
+ do { | |
+ gphy_val = mdio_read(tp, 0x10); | |
+ gphy_val &= 0x0040; | |
+ udelay(50); | |
+ udelay(50); | |
+ i++; | |
+ } while(gphy_val != 0x0040 && i <1000); | |
+ | |
+ mdio_write(tp, 0x1f, 0x0A43); | |
+ mdio_write(tp, 0x13, 0x8028); | |
+ mdio_write(tp, 0x14, 0x6200); | |
+ mdio_write(tp, 0x13, 0xB82E); | |
+ mdio_write(tp, 0x14, 0x0001); | |
+ | |
+ | |
+ mdio_write(tp, 0x1F, 0x0A43); | |
+ mdio_write(tp, 0x13, 0xB820); | |
+ mdio_write(tp, 0x14, 0x0290); | |
+ mdio_write(tp, 0x13, 0xA012); | |
+ mdio_write(tp, 0x14, 0x0000); | |
+ mdio_write(tp, 0x13, 0xA014); | |
+ mdio_write(tp, 0x14, 0x2c04); | |
+ mdio_write(tp, 0x14, 0x2c10); | |
+ mdio_write(tp, 0x14, 0x2c10); | |
+ mdio_write(tp, 0x14, 0x2c10); | |
+ mdio_write(tp, 0x14, 0xa210); | |
+ mdio_write(tp, 0x14, 0xa101); | |
+ mdio_write(tp, 0x14, 0xce10); | |
+ mdio_write(tp, 0x14, 0xe070); | |
+ mdio_write(tp, 0x14, 0x0f40); | |
+ mdio_write(tp, 0x14, 0xaf01); | |
+ mdio_write(tp, 0x14, 0x8f01); | |
+ mdio_write(tp, 0x14, 0x183e); | |
+ mdio_write(tp, 0x14, 0x8e10); | |
+ mdio_write(tp, 0x14, 0x8101); | |
+ mdio_write(tp, 0x14, 0x8210); | |
+ mdio_write(tp, 0x14, 0x28da); | |
+ mdio_write(tp, 0x13, 0xA01A); | |
+ mdio_write(tp, 0x14, 0x0000); | |
+ mdio_write(tp, 0x13, 0xA006); | |
+ mdio_write(tp, 0x14, 0x0017); | |
+ mdio_write(tp, 0x13, 0xA004); | |
+ mdio_write(tp, 0x14, 0x0015); | |
+ mdio_write(tp, 0x13, 0xA002); | |
+ mdio_write(tp, 0x14, 0x0013); | |
+ mdio_write(tp, 0x13, 0xA000); | |
+ mdio_write(tp, 0x14, 0x18d1); | |
+ mdio_write(tp, 0x13, 0xB820); | |
+ mdio_write(tp, 0x14, 0x0210); | |
+ | |
+ | |
+ mdio_write(tp, 0x1F, 0x0A43); | |
+ mdio_write(tp, 0x13, 0x0000); | |
+ mdio_write(tp, 0x14, 0x0000); | |
+ mdio_write(tp, 0x1f, 0x0B82); | |
+ gphy_val = mdio_read(tp, 0x17); | |
+ gphy_val &= ~(BIT_0); | |
+ mdio_write(tp, 0x17, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0A43); | |
+ mdio_write(tp, 0x13, 0x8028); | |
+ mdio_write(tp, 0x14, 0x0000); | |
+ | |
+ | |
+ mdio_write(tp, 0x1f, 0x0B82); | |
+ gphy_val = mdio_read(tp, 0x10); | |
+ gphy_val &= ~(BIT_4); | |
+ mdio_write(tp, 0x10, gphy_val); | |
+} | |
+ | |
+static void | |
+rtl8168_set_phy_mcu_8168h_2(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ unsigned int gphy_val,i; | |
+ | |
+ mdio_write(tp, 0x1f, 0x0B82); | |
+ gphy_val = mdio_read(tp, 0x10); | |
+ gphy_val |= BIT_4; | |
+ mdio_write(tp, 0x10, gphy_val); | |
+ | |
+ mdio_write(tp, 0x1f, 0x0B80); | |
+ i = 0; | |
+ do { | |
+ gphy_val = mdio_read(tp, 0x10); | |
+ gphy_val &= 0x0040; | |
+ udelay(50); | |
+ udelay(50); | |
+ i++; | |
+ } while(gphy_val != 0x0040 && i <1000); | |
+ | |
+ mdio_write(tp, 0x1f, 0x0A43); | |
+ mdio_write(tp, 0x13, 0x8028); | |
+ mdio_write(tp, 0x14, 0x6201); | |
+ mdio_write(tp, 0x13, 0xB82E); | |
+ mdio_write(tp, 0x14, 0x0001); | |
+ | |
+ | |
+ mdio_write(tp, 0x1F, 0x0A43); | |
+ mdio_write(tp, 0x13, 0xB820); | |
+ mdio_write(tp, 0x14, 0x0290); | |
+ mdio_write(tp, 0x13, 0xA012); | |
+ mdio_write(tp, 0x14, 0x0000); | |
+ mdio_write(tp, 0x13, 0xA014); | |
+ mdio_write(tp, 0x14, 0x2c04); | |
+ mdio_write(tp, 0x14, 0x2c09); | |
+ mdio_write(tp, 0x14, 0x2c09); | |
+ mdio_write(tp, 0x14, 0x2c09); | |
+ mdio_write(tp, 0x14, 0xad01); | |
+ mdio_write(tp, 0x14, 0xad01); | |
+ mdio_write(tp, 0x14, 0xad01); | |
+ mdio_write(tp, 0x14, 0xad01); | |
+ mdio_write(tp, 0x14, 0x236c); | |
+ mdio_write(tp, 0x13, 0xA01A); | |
+ mdio_write(tp, 0x14, 0x0000); | |
+ mdio_write(tp, 0x13, 0xA006); | |
+ mdio_write(tp, 0x14, 0x0fff); | |
+ mdio_write(tp, 0x13, 0xA004); | |
+ mdio_write(tp, 0x14, 0x0fff); | |
+ mdio_write(tp, 0x13, 0xA002); | |
+ mdio_write(tp, 0x14, 0x0fff); | |
+ mdio_write(tp, 0x13, 0xA000); | |
+ mdio_write(tp, 0x14, 0x136b); | |
+ mdio_write(tp, 0x13, 0xB820); | |
+ mdio_write(tp, 0x14, 0x0210); | |
+ | |
+ | |
+ mdio_write(tp,0x1F, 0x0A43); | |
+ mdio_write(tp,0x13, 0x0000); | |
+ mdio_write(tp,0x14, 0x0000); | |
+ mdio_write(tp,0x1f, 0x0B82); | |
+ gphy_val = mdio_read(tp, 0x17); | |
+ gphy_val &= ~(BIT_0); | |
+ mdio_write(tp,0x17, gphy_val); | |
+ mdio_write(tp,0x1f, 0x0A43); | |
+ mdio_write(tp,0x13, 0x8028); | |
+ mdio_write(tp,0x14, 0x0000); | |
+ | |
+ | |
+ mdio_write(tp, 0x1f, 0x0B82); | |
+ gphy_val = mdio_read(tp, 0x10); | |
+ gphy_val &= ~(BIT_4); | |
+ mdio_write(tp, 0x10, gphy_val); | |
+ | |
+ if (tp->RequiredSecLanDonglePatch) { | |
+ mdio_write(tp, 0x1F, 0x0A43); | |
+ gphy_val = mdio_read(tp, 0x11); | |
+ gphy_val &= ~BIT_6; | |
+ mdio_write(tp, 0x11, gphy_val); | |
+ } | |
+} | |
+ | |
+static void | |
+rtl8168_init_hw_phy_mcu(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ | |
+ if (tp->NotWrRamCodeToMicroP == TRUE) return; | |
+ if (rtl8168_check_hw_phy_mcu_code_ver(dev)) return; | |
+ | |
+ if (FALSE == rtl8168_phy_ram_code_check(dev)) { | |
+ rtl8168_set_phy_ram_code_check_fail_flag(dev); | |
+ return; | |
+ } | |
+ | |
+ switch (tp->mcfg) { | |
+ case CFG_METHOD_14: | |
+ rtl8168_set_phy_mcu_8168e_1(dev); | |
+ break; | |
+ case CFG_METHOD_15: | |
+ rtl8168_set_phy_mcu_8168e_2(dev); | |
+ break; | |
+ case CFG_METHOD_16: | |
+ rtl8168_set_phy_mcu_8168evl_1(dev); | |
+ break; | |
+ case CFG_METHOD_17: | |
+ rtl8168_set_phy_mcu_8168evl_2(dev); | |
+ break; | |
+ case CFG_METHOD_18: | |
+ rtl8168_set_phy_mcu_8168f_1(dev); | |
+ break; | |
+ case CFG_METHOD_19: | |
+ rtl8168_set_phy_mcu_8168f_2(dev); | |
+ break; | |
+ case CFG_METHOD_20: | |
+ rtl8168_set_phy_mcu_8411_1(dev); | |
+ break; | |
+ case CFG_METHOD_21: | |
+ rtl8168_set_phy_mcu_8168g_1(dev); | |
+ break; | |
+ case CFG_METHOD_25: | |
+ rtl8168_set_phy_mcu_8168gu_2(dev); | |
+ break; | |
+ case CFG_METHOD_26: | |
+ rtl8168_set_phy_mcu_8411b_1(dev); | |
+ break; | |
+ case CFG_METHOD_29: | |
+ rtl8168_set_phy_mcu_8168h_1(dev); | |
+ break; | |
+ case CFG_METHOD_30: | |
+ rtl8168_set_phy_mcu_8168h_2(dev); | |
+ break; | |
+ } | |
+ | |
+ rtl8168_write_hw_phy_mcu_code_ver(dev); | |
+ | |
+ mdio_write(tp,0x1F, 0x0000); | |
+ | |
+ tp->HwHasWrRamCodeToMicroP = TRUE; | |
+} | |
+ | |
+static void | |
+rtl8168_hw_phy_config(struct net_device *dev) | |
+{ | |
+ struct rtl8168_private *tp = netdev_priv(dev); | |
+ struct pci_dev *pdev = tp->pci_dev; | |
+ u16 gphy_val; | |
+ unsigned int i; | |
+ unsigned long flags; | |
+ | |
+ tp->phy_reset_enable(dev); | |
+ | |
+ spin_lock_irqsave(&tp->phy_lock, flags); | |
+ | |
+ rtl8168_init_hw_phy_mcu(dev); | |
+ | |
+ if (tp->mcfg == CFG_METHOD_1) { | |
+ mdio_write(tp, 0x1F, 0x0001); | |
+ mdio_write(tp, 0x0B, 0x94B0); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0003); | |
+ mdio_write(tp, 0x12, 0x6096); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x0D, 0xF8A0); | |
+ } else if (tp->mcfg == CFG_METHOD_2) { | |
+ mdio_write(tp, 0x1F, 0x0001); | |
+ mdio_write(tp, 0x0B, 0x94B0); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0003); | |
+ mdio_write(tp, 0x12, 0x6096); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ } else if (tp->mcfg == CFG_METHOD_3) { | |
+ mdio_write(tp, 0x1F, 0x0001); | |
+ mdio_write(tp, 0x0B, 0x94B0); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0003); | |
+ mdio_write(tp, 0x12, 0x6096); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ } else if (tp->mcfg == CFG_METHOD_4) { | |
+ mdio_write(tp, 0x1F, 0x0001); | |
+ mdio_write(tp, 0x12, 0x2300); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ mdio_write(tp, 0x1F, 0x0003); | |
+ mdio_write(tp, 0x16, 0x000A); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0003); | |
+ mdio_write(tp, 0x12, 0xC096); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ mdio_write(tp, 0x00, 0x88DE); | |
+ mdio_write(tp, 0x01, 0x82B1); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ mdio_write(tp, 0x08, 0x9E30); | |
+ mdio_write(tp, 0x09, 0x01F0); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ mdio_write(tp, 0x0A, 0x5500); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ mdio_write(tp, 0x03, 0x7002); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ mdio_write(tp, 0x0C, 0x00C8); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ mdio_write(tp, 0x14, mdio_read(tp, 0x14) | (1 << 5)); | |
+ mdio_write(tp, 0x0D, mdio_read(tp, 0x0D) & ~(1 << 5)); | |
+ } else if (tp->mcfg == CFG_METHOD_5) { | |
+ mdio_write(tp, 0x1F, 0x0001); | |
+ mdio_write(tp, 0x12, 0x2300); | |
+ mdio_write(tp, 0x1F, 0x0003); | |
+ mdio_write(tp, 0x16, 0x0F0A); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ mdio_write(tp, 0x00, 0x88DE); | |
+ mdio_write(tp, 0x01, 0x82B1); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ mdio_write(tp, 0x0C, 0x7EB8); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ mdio_write(tp, 0x06, 0x0761); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0001); | |
+ mdio_write(tp, 0x03, 0x802F); | |
+ mdio_write(tp, 0x02, 0x4F02); | |
+ mdio_write(tp, 0x01, 0x0409); | |
+ mdio_write(tp, 0x00, 0xF099); | |
+ mdio_write(tp, 0x04, 0x9800); | |
+ mdio_write(tp, 0x04, 0x9000); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ mdio_write(tp, 0x16, mdio_read(tp, 0x16) | (1 << 0)); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ mdio_write(tp, 0x14, mdio_read(tp, 0x14) | (1 << 5)); | |
+ mdio_write(tp, 0x0D, mdio_read(tp, 0x0D) & ~(1 << 5)); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0001); | |
+ mdio_write(tp, 0x1D, 0x3D98); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0001); | |
+ mdio_write(tp, 0x17, 0x0CC0); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ } else if (tp->mcfg == CFG_METHOD_6) { | |
+ mdio_write(tp, 0x1F, 0x0001); | |
+ mdio_write(tp, 0x12, 0x2300); | |
+ mdio_write(tp, 0x1F, 0x0003); | |
+ mdio_write(tp, 0x16, 0x0F0A); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ mdio_write(tp, 0x00, 0x88DE); | |
+ mdio_write(tp, 0x01, 0x82B1); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ mdio_write(tp, 0x0C, 0x7EB8); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ mdio_write(tp, 0x06, 0x5461); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ mdio_write(tp, 0x06, 0x5461); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ mdio_write(tp, 0x16, mdio_read(tp, 0x16) | (1 << 0)); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ mdio_write(tp, 0x14, mdio_read(tp, 0x14) | (1 << 5)); | |
+ mdio_write(tp, 0x0D, mdio_read(tp, 0x0D) & ~(1 << 5)); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0001); | |
+ mdio_write(tp, 0x1D, 0x3D98); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1f, 0x0001); | |
+ mdio_write(tp, 0x17, 0x0CC0); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ } else if (tp->mcfg == CFG_METHOD_7) { | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ mdio_write(tp, 0x14, mdio_read(tp, 0x14) | (1 << 5)); | |
+ mdio_write(tp, 0x0D, mdio_read(tp, 0x0D) & ~(1 << 5)); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0001); | |
+ mdio_write(tp, 0x1D, 0x3D98); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0001); | |
+ mdio_write(tp, 0x14, 0xCAA3); | |
+ mdio_write(tp, 0x1C, 0x000A); | |
+ mdio_write(tp, 0x18, 0x65D0); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0003); | |
+ mdio_write(tp, 0x17, 0xB580); | |
+ mdio_write(tp, 0x18, 0xFF54); | |
+ mdio_write(tp, 0x19, 0x3954); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ mdio_write(tp, 0x0D, 0x310C); | |
+ mdio_write(tp, 0x0E, 0x310C); | |
+ mdio_write(tp, 0x0F, 0x311C); | |
+ mdio_write(tp, 0x06, 0x0761); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0003); | |
+ mdio_write(tp, 0x18, 0xFF55); | |
+ mdio_write(tp, 0x19, 0x3955); | |
+ mdio_write(tp, 0x18, 0xFF54); | |
+ mdio_write(tp, 0x19, 0x3954); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0001); | |
+ mdio_write(tp, 0x17, 0x0CC0); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ } else if (tp->mcfg == CFG_METHOD_8) { | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ mdio_write(tp, 0x14, mdio_read(tp, 0x14) | (1 << 5)); | |
+ mdio_write(tp, 0x0D, mdio_read(tp, 0x0D) & ~(1 << 5)); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0001); | |
+ mdio_write(tp, 0x14, 0xCAA3); | |
+ mdio_write(tp, 0x1C, 0x000A); | |
+ mdio_write(tp, 0x18, 0x65D0); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0003); | |
+ mdio_write(tp, 0x17, 0xB580); | |
+ mdio_write(tp, 0x18, 0xFF54); | |
+ mdio_write(tp, 0x19, 0x3954); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ mdio_write(tp, 0x0D, 0x310C); | |
+ mdio_write(tp, 0x0E, 0x310C); | |
+ mdio_write(tp, 0x0F, 0x311C); | |
+ mdio_write(tp, 0x06, 0x0761); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0003); | |
+ mdio_write(tp, 0x18, 0xFF55); | |
+ mdio_write(tp, 0x19, 0x3955); | |
+ mdio_write(tp, 0x18, 0xFF54); | |
+ mdio_write(tp, 0x19, 0x3954); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0001); | |
+ mdio_write(tp, 0x17, 0x0CC0); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ mdio_write(tp, 0x16, mdio_read(tp, 0x16) | (1 << 0)); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ } else if (tp->mcfg == CFG_METHOD_9) { | |
+ mdio_write(tp, 0x1F, 0x0001); | |
+ mdio_write(tp, 0x06, 0x4064); | |
+ mdio_write(tp, 0x07, 0x2863); | |
+ mdio_write(tp, 0x08, 0x059C); | |
+ mdio_write(tp, 0x09, 0x26B4); | |
+ mdio_write(tp, 0x0A, 0x6A19); | |
+ mdio_write(tp, 0x0B, 0xDCC8); | |
+ mdio_write(tp, 0x10, 0xF06D); | |
+ mdio_write(tp, 0x14, 0x7F68); | |
+ mdio_write(tp, 0x18, 0x7FD9); | |
+ mdio_write(tp, 0x1C, 0xF0FF); | |
+ mdio_write(tp, 0x1D, 0x3D9C); | |
+ mdio_write(tp, 0x1F, 0x0003); | |
+ mdio_write(tp, 0x12, 0xF49F); | |
+ mdio_write(tp, 0x13, 0x070B); | |
+ mdio_write(tp, 0x1A, 0x05AD); | |
+ mdio_write(tp, 0x14, 0x94C0); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ gphy_val = mdio_read(tp, 0x0B) & 0xFF00; | |
+ gphy_val |= 0x10; | |
+ mdio_write(tp, 0x0B, gphy_val); | |
+ gphy_val = mdio_read(tp, 0x0C) & 0x00FF; | |
+ gphy_val |= 0xA200; | |
+ mdio_write(tp, 0x0C, gphy_val); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ mdio_write(tp, 0x06, 0x5561); | |
+ mdio_write(tp, 0x1F, 0x0005); | |
+ mdio_write(tp, 0x05, 0x8332); | |
+ mdio_write(tp, 0x06, 0x5561); | |
+ | |
+ if (rtl8168_efuse_read(tp, 0x01) == 0xb1) { | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ mdio_write(tp, 0x05, 0x669A); | |
+ mdio_write(tp, 0x1F, 0x0005); | |
+ mdio_write(tp, 0x05, 0x8330); | |
+ mdio_write(tp, 0x06, 0x669A); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ gphy_val = mdio_read(tp, 0x0D); | |
+ if ((gphy_val & 0x00FF) != 0x006C) { | |
+ gphy_val &= 0xFF00; | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ mdio_write(tp, 0x0D, gphy_val | 0x0065); | |
+ mdio_write(tp, 0x0D, gphy_val | 0x0066); | |
+ mdio_write(tp, 0x0D, gphy_val | 0x0067); | |
+ mdio_write(tp, 0x0D, gphy_val | 0x0068); | |
+ mdio_write(tp, 0x0D, gphy_val | 0x0069); | |
+ mdio_write(tp, 0x0D, gphy_val | 0x006A); | |
+ mdio_write(tp, 0x0D, gphy_val | 0x006B); | |
+ mdio_write(tp, 0x0D, gphy_val | 0x006C); | |
+ } | |
+ } else { | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ mdio_write(tp, 0x05, 0x6662); | |
+ mdio_write(tp, 0x1F, 0x0005); | |
+ mdio_write(tp, 0x05, 0x8330); | |
+ mdio_write(tp, 0x06, 0x6662); | |
+ } | |
+ | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ gphy_val = mdio_read(tp, 0x0D); | |
+ gphy_val |= BIT_9; | |
+ gphy_val |= BIT_8; | |
+ mdio_write(tp, 0x0D, gphy_val); | |
+ gphy_val = mdio_read(tp, 0x0F); | |
+ gphy_val |= BIT_4; | |
+ mdio_write(tp, 0x0F, gphy_val); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ gphy_val = mdio_read(tp, 0x02); | |
+ gphy_val &= ~BIT_10; | |
+ gphy_val &= ~BIT_9; | |
+ gphy_val |= BIT_8; | |
+ mdio_write(tp, 0x02, gphy_val); | |
+ gphy_val = mdio_read(tp, 0x03); | |
+ gphy_val &= ~BIT_15; | |
+ gphy_val &= ~BIT_14; | |
+ gphy_val &= ~BIT_13; | |
+ mdio_write(tp, 0x03, gphy_val); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0001); | |
+ mdio_write(tp, 0x17, 0x0CC0); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0005); | |
+ mdio_write(tp, 0x05, 0x001B); | |
+ if (mdio_read(tp, 0x06) == 0xBF00) { | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ mdio_write(tp, 0x05, 0xfff6); | |
+ mdio_write(tp, 0x06, 0x0080); | |
+ mdio_write(tp, 0x05, 0x8000); | |
+ mdio_write(tp, 0x06, 0xf8f9); | |
+ mdio_write(tp, 0x06, 0xfaef); | |
+ mdio_write(tp, 0x06, 0x59ee); | |
+ mdio_write(tp, 0x06, 0xf8ea); | |
+ mdio_write(tp, 0x06, 0x00ee); | |
+ mdio_write(tp, 0x06, 0xf8eb); | |
+ mdio_write(tp, 0x06, 0x00e0); | |
+ mdio_write(tp, 0x06, 0xf87c); | |
+ mdio_write(tp, 0x06, 0xe1f8); | |
+ mdio_write(tp, 0x06, 0x7d59); | |
+ mdio_write(tp, 0x06, 0x0fef); | |
+ mdio_write(tp, 0x06, 0x0139); | |
+ mdio_write(tp, 0x06, 0x029e); | |
+ mdio_write(tp, 0x06, 0x06ef); | |
+ mdio_write(tp, 0x06, 0x1039); | |
+ mdio_write(tp, 0x06, 0x089f); | |
+ mdio_write(tp, 0x06, 0x2aee); | |
+ mdio_write(tp, 0x06, 0xf8ea); | |
+ mdio_write(tp, 0x06, 0x00ee); | |
+ mdio_write(tp, 0x06, 0xf8eb); | |
+ mdio_write(tp, 0x06, 0x01e0); | |
+ mdio_write(tp, 0x06, 0xf87c); | |
+ mdio_write(tp, 0x06, 0xe1f8); | |
+ mdio_write(tp, 0x06, 0x7d58); | |
+ mdio_write(tp, 0x06, 0x409e); | |
+ mdio_write(tp, 0x06, 0x0f39); | |
+ mdio_write(tp, 0x06, 0x46aa); | |
+ mdio_write(tp, 0x06, 0x0bbf); | |
+ mdio_write(tp, 0x06, 0x8290); | |
+ mdio_write(tp, 0x06, 0xd682); | |
+ mdio_write(tp, 0x06, 0x9802); | |
+ mdio_write(tp, 0x06, 0x014f); | |
+ mdio_write(tp, 0x06, 0xae09); | |
+ mdio_write(tp, 0x06, 0xbf82); | |
+ mdio_write(tp, 0x06, 0x98d6); | |
+ mdio_write(tp, 0x06, 0x82a0); | |
+ mdio_write(tp, 0x06, 0x0201); | |
+ mdio_write(tp, 0x06, 0x4fef); | |
+ mdio_write(tp, 0x06, 0x95fe); | |
+ mdio_write(tp, 0x06, 0xfdfc); | |
+ mdio_write(tp, 0x06, 0x05f8); | |
+ mdio_write(tp, 0x06, 0xf9fa); | |
+ mdio_write(tp, 0x06, 0xeef8); | |
+ mdio_write(tp, 0x06, 0xea00); | |
+ mdio_write(tp, 0x06, 0xeef8); | |
+ mdio_write(tp, 0x06, 0xeb00); | |
+ mdio_write(tp, 0x06, 0xe2f8); | |
+ mdio_write(tp, 0x06, 0x7ce3); | |
+ mdio_write(tp, 0x06, 0xf87d); | |
+ mdio_write(tp, 0x06, 0xa511); | |
+ mdio_write(tp, 0x06, 0x1112); | |
+ mdio_write(tp, 0x06, 0xd240); | |
+ mdio_write(tp, 0x06, 0xd644); | |
+ mdio_write(tp, 0x06, 0x4402); | |
+ mdio_write(tp, 0x06, 0x8217); | |
+ mdio_write(tp, 0x06, 0xd2a0); | |
+ mdio_write(tp, 0x06, 0xd6aa); | |
+ mdio_write(tp, 0x06, 0xaa02); | |
+ mdio_write(tp, 0x06, 0x8217); | |
+ mdio_write(tp, 0x06, 0xae0f); | |
+ mdio_write(tp, 0x06, 0xa544); | |
+ mdio_write(tp, 0x06, 0x4402); | |
+ mdio_write(tp, 0x06, 0xae4d); | |
+ mdio_write(tp, 0x06, 0xa5aa); | |
+ mdio_write(tp, 0x06, 0xaa02); | |
+ mdio_write(tp, 0x06, 0xae47); | |
+ mdio_write(tp, 0x06, 0xaf82); | |
+ mdio_write(tp, 0x06, 0x13ee); | |
+ mdio_write(tp, 0x06, 0x834e); | |
+ mdio_write(tp, 0x06, 0x00ee); | |
+ mdio_write(tp, 0x06, 0x834d); | |
+ mdio_write(tp, 0x06, 0x0fee); | |
+ mdio_write(tp, 0x06, 0x834c); | |
+ mdio_write(tp, 0x06, 0x0fee); | |
+ mdio_write(tp, 0x06, 0x834f); | |
+ mdio_write(tp, 0x06, 0x00ee); | |
+ mdio_write(tp, 0x06, 0x8351); | |
+ mdio_write(tp, 0x06, 0x00ee); | |
+ mdio_write(tp, 0x06, 0x834a); | |
+ mdio_write(tp, 0x06, 0xffee); | |
+ mdio_write(tp, 0x06, 0x834b); | |
+ mdio_write(tp, 0x06, 0xffe0); | |
+ mdio_write(tp, 0x06, 0x8330); | |
+ mdio_write(tp, 0x06, 0xe183); | |
+ mdio_write(tp, 0x06, 0x3158); | |
+ mdio_write(tp, 0x06, 0xfee4); | |
+ mdio_write(tp, 0x06, 0xf88a); | |
+ mdio_write(tp, 0x06, 0xe5f8); | |
+ mdio_write(tp, 0x06, 0x8be0); | |
+ mdio_write(tp, 0x06, 0x8332); | |
+ mdio_write(tp, 0x06, 0xe183); | |
+ mdio_write(tp, 0x06, 0x3359); | |
+ mdio_write(tp, 0x06, 0x0fe2); | |
+ mdio_write(tp, 0x06, 0x834d); | |
+ mdio_write(tp, 0x06, 0x0c24); | |
+ mdio_write(tp, 0x06, 0x5af0); | |
+ mdio_write(tp, 0x06, 0x1e12); | |
+ mdio_write(tp, 0x06, 0xe4f8); | |
+ mdio_write(tp, 0x06, 0x8ce5); | |
+ mdio_write(tp, 0x06, 0xf88d); | |
+ mdio_write(tp, 0x06, 0xaf82); | |
+ mdio_write(tp, 0x06, 0x13e0); | |
+ mdio_write(tp, 0x06, 0x834f); | |
+ mdio_write(tp, 0x06, 0x10e4); | |
+ mdio_write(tp, 0x06, 0x834f); | |
+ mdio_write(tp, 0x06, 0xe083); | |
+ mdio_write(tp, 0x06, 0x4e78); | |
+ mdio_write(tp, 0x06, 0x009f); | |
+ mdio_write(tp, 0x06, 0x0ae0); | |
+ mdio_write(tp, 0x06, 0x834f); | |
+ mdio_write(tp, 0x06, 0xa010); | |
+ mdio_write(tp, 0x06, 0xa5ee); | |
+ mdio_write(tp, 0x06, 0x834e); | |
+ mdio_write(tp, 0x06, 0x01e0); | |
+ mdio_write(tp, 0x06, 0x834e); | |
+ mdio_write(tp, 0x06, 0x7805); | |
+ mdio_write(tp, 0x06, 0x9e9a); | |
+ mdio_write(tp, 0x06, 0xe083); | |
+ mdio_write(tp, 0x06, 0x4e78); | |
+ mdio_write(tp, 0x06, 0x049e); | |
+ mdio_write(tp, 0x06, 0x10e0); | |
+ mdio_write(tp, 0x06, 0x834e); | |
+ mdio_write(tp, 0x06, 0x7803); | |
+ mdio_write(tp, 0x06, 0x9e0f); | |
+ mdio_write(tp, 0x06, 0xe083); | |
+ mdio_write(tp, 0x06, 0x4e78); | |
+ mdio_write(tp, 0x06, 0x019e); | |
+ mdio_write(tp, 0x06, 0x05ae); | |
+ mdio_write(tp, 0x06, 0x0caf); | |
+ mdio_write(tp, 0x06, 0x81f8); | |
+ mdio_write(tp, 0x06, 0xaf81); | |
+ mdio_write(tp, 0x06, 0xa3af); | |
+ mdio_write(tp, 0x06, 0x81dc); | |
+ mdio_write(tp, 0x06, 0xaf82); | |
+ mdio_write(tp, 0x06, 0x13ee); | |
+ mdio_write(tp, 0x06, 0x8348); | |
+ mdio_write(tp, 0x06, 0x00ee); | |
+ mdio_write(tp, 0x06, 0x8349); | |
+ mdio_write(tp, 0x06, 0x00e0); | |
+ mdio_write(tp, 0x06, 0x8351); | |
+ mdio_write(tp, 0x06, 0x10e4); | |
+ mdio_write(tp, 0x06, 0x8351); | |
+ mdio_write(tp, 0x06, 0x5801); | |
+ mdio_write(tp, 0x06, 0x9fea); | |
+ mdio_write(tp, 0x06, 0xd000); | |
+ mdio_write(tp, 0x06, 0xd180); | |
+ mdio_write(tp, 0x06, 0x1f66); | |
+ mdio_write(tp, 0x06, 0xe2f8); | |
+ mdio_write(tp, 0x06, 0xeae3); | |
+ mdio_write(tp, 0x06, 0xf8eb); | |
+ mdio_write(tp, 0x06, 0x5af8); | |
+ mdio_write(tp, 0x06, 0x1e20); | |
+ mdio_write(tp, 0x06, 0xe6f8); | |
+ mdio_write(tp, 0x06, 0xeae5); | |
+ mdio_write(tp, 0x06, 0xf8eb); | |
+ mdio_write(tp, 0x06, 0xd302); | |
+ mdio_write(tp, 0x06, 0xb3fe); | |
+ mdio_write(tp, 0x06, 0xe2f8); | |
+ mdio_write(tp, 0x06, 0x7cef); | |
+ mdio_write(tp, 0x06, 0x325b); | |
+ mdio_write(tp, 0x06, 0x80e3); | |
+ mdio_write(tp, 0x06, 0xf87d); | |
+ mdio_write(tp, 0x06, 0x9e03); | |
+ mdio_write(tp, 0x06, 0x7dff); | |
+ mdio_write(tp, 0x06, 0xff0d); | |
+ mdio_write(tp, 0x06, 0x581c); | |
+ mdio_write(tp, 0x06, 0x551a); | |
+ mdio_write(tp, 0x06, 0x6511); | |
+ mdio_write(tp, 0x06, 0xa190); | |
+ mdio_write(tp, 0x06, 0xd3e2); | |
+ mdio_write(tp, 0x06, 0x8348); | |
+ mdio_write(tp, 0x06, 0xe383); | |
+ mdio_write(tp, 0x06, 0x491b); | |
+ mdio_write(tp, 0x06, 0x56ab); | |
+ mdio_write(tp, 0x06, 0x08ef); | |
+ mdio_write(tp, 0x06, 0x56e6); | |
+ mdio_write(tp, 0x06, 0x8348); | |
+ mdio_write(tp, 0x06, 0xe783); | |
+ mdio_write(tp, 0x06, 0x4910); | |
+ mdio_write(tp, 0x06, 0xd180); | |
+ mdio_write(tp, 0x06, 0x1f66); | |
+ mdio_write(tp, 0x06, 0xa004); | |
+ mdio_write(tp, 0x06, 0xb9e2); | |
+ mdio_write(tp, 0x06, 0x8348); | |
+ mdio_write(tp, 0x06, 0xe383); | |
+ mdio_write(tp, 0x06, 0x49ef); | |
+ mdio_write(tp, 0x06, 0x65e2); | |
+ mdio_write(tp, 0x06, 0x834a); | |
+ mdio_write(tp, 0x06, 0xe383); | |
+ mdio_write(tp, 0x06, 0x4b1b); | |
+ mdio_write(tp, 0x06, 0x56aa); | |
+ mdio_write(tp, 0x06, 0x0eef); | |
+ mdio_write(tp, 0x06, 0x56e6); | |
+ mdio_write(tp, 0x06, 0x834a); | |
+ mdio_write(tp, 0x06, 0xe783); | |
+ mdio_write(tp, 0x06, 0x4be2); | |
+ mdio_write(tp, 0x06, 0x834d); | |
+ mdio_write(tp, 0x06, 0xe683); | |
+ mdio_write(tp, 0x06, 0x4ce0); | |
+ mdio_write(tp, 0x06, 0x834d); | |
+ mdio_write(tp, 0x06, 0xa000); | |
+ mdio_write(tp, 0x06, 0x0caf); | |
+ mdio_write(tp, 0x06, 0x81dc); | |
+ mdio_write(tp, 0x06, 0xe083); | |
+ mdio_write(tp, 0x06, 0x4d10); | |
+ mdio_write(tp, 0x06, 0xe483); | |
+ mdio_write(tp, 0x06, 0x4dae); | |
+ mdio_write(tp, 0x06, 0x0480); | |
+ mdio_write(tp, 0x06, 0xe483); | |
+ mdio_write(tp, 0x06, 0x4de0); | |
+ mdio_write(tp, 0x06, 0x834e); | |
+ mdio_write(tp, 0x06, 0x7803); | |
+ mdio_write(tp, 0x06, 0x9e0b); | |
+ mdio_write(tp, 0x06, 0xe083); | |
+ mdio_write(tp, 0x06, 0x4e78); | |
+ mdio_write(tp, 0x06, 0x049e); | |
+ mdio_write(tp, 0x06, 0x04ee); | |
+ mdio_write(tp, 0x06, 0x834e); | |
+ mdio_write(tp, 0x06, 0x02e0); | |
+ mdio_write(tp, 0x06, 0x8332); | |
+ mdio_write(tp, 0x06, 0xe183); | |
+ mdio_write(tp, 0x06, 0x3359); | |
+ mdio_write(tp, 0x06, 0x0fe2); | |
+ mdio_write(tp, 0x06, 0x834d); | |
+ mdio_write(tp, 0x06, 0x0c24); | |
+ mdio_write(tp, 0x06, 0x5af0); | |
+ mdio_write(tp, 0x06, 0x1e12); | |
+ mdio_write(tp, 0x06, 0xe4f8); | |
+ mdio_write(tp, 0x06, 0x8ce5); | |
+ mdio_write(tp, 0x06, 0xf88d); | |
+ mdio_write(tp, 0x06, 0xe083); | |
+ mdio_write(tp, 0x06, 0x30e1); | |
+ mdio_write(tp, 0x06, 0x8331); | |
+ mdio_write(tp, 0x06, 0x6801); | |
+ mdio_write(tp, 0x06, 0xe4f8); | |
+ mdio_write(tp, 0x06, 0x8ae5); | |
+ mdio_write(tp, 0x06, 0xf88b); | |
+ mdio_write(tp, 0x06, 0xae37); | |
+ mdio_write(tp, 0x06, 0xee83); | |
+ mdio_write(tp, 0x06, 0x4e03); | |
+ mdio_write(tp, 0x06, 0xe083); | |
+ mdio_write(tp, 0x06, 0x4ce1); | |
+ mdio_write(tp, 0x06, 0x834d); | |
+ mdio_write(tp, 0x06, 0x1b01); | |
+ mdio_write(tp, 0x06, 0x9e04); | |
+ mdio_write(tp, 0x06, 0xaaa1); | |
+ mdio_write(tp, 0x06, 0xaea8); | |
+ mdio_write(tp, 0x06, 0xee83); | |
+ mdio_write(tp, 0x06, 0x4e04); | |
+ mdio_write(tp, 0x06, 0xee83); | |
+ mdio_write(tp, 0x06, 0x4f00); | |
+ mdio_write(tp, 0x06, 0xaeab); | |
+ mdio_write(tp, 0x06, 0xe083); | |
+ mdio_write(tp, 0x06, 0x4f78); | |
+ mdio_write(tp, 0x06, 0x039f); | |
+ mdio_write(tp, 0x06, 0x14ee); | |
+ mdio_write(tp, 0x06, 0x834e); | |
+ mdio_write(tp, 0x06, 0x05d2); | |
+ mdio_write(tp, 0x06, 0x40d6); | |
+ mdio_write(tp, 0x06, 0x5554); | |
+ mdio_write(tp, 0x06, 0x0282); | |
+ mdio_write(tp, 0x06, 0x17d2); | |
+ mdio_write(tp, 0x06, 0xa0d6); | |
+ mdio_write(tp, 0x06, 0xba00); | |
+ mdio_write(tp, 0x06, 0x0282); | |
+ mdio_write(tp, 0x06, 0x17fe); | |
+ mdio_write(tp, 0x06, 0xfdfc); | |
+ mdio_write(tp, 0x06, 0x05f8); | |
+ mdio_write(tp, 0x06, 0xe0f8); | |
+ mdio_write(tp, 0x06, 0x60e1); | |
+ mdio_write(tp, 0x06, 0xf861); | |
+ mdio_write(tp, 0x06, 0x6802); | |
+ mdio_write(tp, 0x06, 0xe4f8); | |
+ mdio_write(tp, 0x06, 0x60e5); | |
+ mdio_write(tp, 0x06, 0xf861); | |
+ mdio_write(tp, 0x06, 0xe0f8); | |
+ mdio_write(tp, 0x06, 0x48e1); | |
+ mdio_write(tp, 0x06, 0xf849); | |
+ mdio_write(tp, 0x06, 0x580f); | |
+ mdio_write(tp, 0x06, 0x1e02); | |
+ mdio_write(tp, 0x06, 0xe4f8); | |
+ mdio_write(tp, 0x06, 0x48e5); | |
+ mdio_write(tp, 0x06, 0xf849); | |
+ mdio_write(tp, 0x06, 0xd000); | |
+ mdio_write(tp, 0x06, 0x0282); | |
+ mdio_write(tp, 0x06, 0x5bbf); | |
+ mdio_write(tp, 0x06, 0x8350); | |
+ mdio_write(tp, 0x06, 0xef46); | |
+ mdio_write(tp, 0x06, 0xdc19); | |
+ mdio_write(tp, 0x06, 0xddd0); | |
+ mdio_write(tp, 0x06, 0x0102); | |
+ mdio_write(tp, 0x06, 0x825b); | |
+ mdio_write(tp, 0x06, 0x0282); | |
+ mdio_write(tp, 0x06, 0x77e0); | |
+ mdio_write(tp, 0x06, 0xf860); | |
+ mdio_write(tp, 0x06, 0xe1f8); | |
+ mdio_write(tp, 0x06, 0x6158); | |
+ mdio_write(tp, 0x06, 0xfde4); | |
+ mdio_write(tp, 0x06, 0xf860); | |
+ mdio_write(tp, 0x06, 0xe5f8); | |
+ mdio_write(tp, 0x06, 0x61fc); | |
+ mdio_write(tp, 0x06, 0x04f9); | |
+ mdio_write(tp, 0x06, 0xfafb); | |
+ mdio_write(tp, 0x06, 0xc6bf); | |
+ mdio_write(tp, 0x06, 0xf840); | |
+ mdio_write(tp, 0x06, 0xbe83); | |
+ mdio_write(tp, 0x06, 0x50a0); | |
+ mdio_write(tp, 0x06, 0x0101); | |
+ mdio_write(tp, 0x06, 0x071b); | |
+ mdio_write(tp, 0x06, 0x89cf); | |
+ mdio_write(tp, 0x06, 0xd208); | |
+ mdio_write(tp, 0x06, 0xebdb); | |
+ mdio_write(tp, 0x06, 0x19b2); | |
+ mdio_write(tp, 0x06, 0xfbff); | |
+ mdio_write(tp, 0x06, 0xfefd); | |
+ mdio_write(tp, 0x06, 0x04f8); | |
+ mdio_write(tp, 0x06, 0xe0f8); | |
+ mdio_write(tp, 0x06, 0x48e1); | |
+ mdio_write(tp, 0x06, 0xf849); | |
+ mdio_write(tp, 0x06, 0x6808); | |
+ mdio_write(tp, 0x06, 0xe4f8); | |
+ mdio_write(tp, 0x06, 0x48e5); | |
+ mdio_write(tp, 0x06, 0xf849); | |
+ mdio_write(tp, 0x06, 0x58f7); | |
+ mdio_write(tp, 0x06, 0xe4f8); | |
+ mdio_write(tp, 0x06, 0x48e5); | |
+ mdio_write(tp, 0x06, 0xf849); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0x4d20); | |
+ mdio_write(tp, 0x06, 0x0002); | |
+ mdio_write(tp, 0x06, 0x4e22); | |
+ mdio_write(tp, 0x06, 0x0002); | |
+ mdio_write(tp, 0x06, 0x4ddf); | |
+ mdio_write(tp, 0x06, 0xff01); | |
+ mdio_write(tp, 0x06, 0x4edd); | |
+ mdio_write(tp, 0x06, 0xff01); | |
+ mdio_write(tp, 0x06, 0xf8fa); | |
+ mdio_write(tp, 0x06, 0xfbef); | |
+ mdio_write(tp, 0x06, 0x79bf); | |
+ mdio_write(tp, 0x06, 0xf822); | |
+ mdio_write(tp, 0x06, 0xd819); | |
+ mdio_write(tp, 0x06, 0xd958); | |
+ mdio_write(tp, 0x06, 0x849f); | |
+ mdio_write(tp, 0x06, 0x09bf); | |
+ mdio_write(tp, 0x06, 0x82be); | |
+ mdio_write(tp, 0x06, 0xd682); | |
+ mdio_write(tp, 0x06, 0xc602); | |
+ mdio_write(tp, 0x06, 0x014f); | |
+ mdio_write(tp, 0x06, 0xef97); | |
+ mdio_write(tp, 0x06, 0xfffe); | |
+ mdio_write(tp, 0x06, 0xfc05); | |
+ mdio_write(tp, 0x06, 0x17ff); | |
+ mdio_write(tp, 0x06, 0xfe01); | |
+ mdio_write(tp, 0x06, 0x1700); | |
+ mdio_write(tp, 0x06, 0x0102); | |
+ mdio_write(tp, 0x05, 0x83d8); | |
+ mdio_write(tp, 0x06, 0x8051); | |
+ mdio_write(tp, 0x05, 0x83d6); | |
+ mdio_write(tp, 0x06, 0x82a0); | |
+ mdio_write(tp, 0x05, 0x83d4); | |
+ mdio_write(tp, 0x06, 0x8000); | |
+ mdio_write(tp, 0x02, 0x2010); | |
+ mdio_write(tp, 0x03, 0xdc00); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x0b, 0x0600); | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ mdio_write(tp, 0x05, 0xfff6); | |
+ mdio_write(tp, 0x06, 0x00fc); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ } | |
+ | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ mdio_write(tp, 0x0D, 0xF880); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ } else if (tp->mcfg == CFG_METHOD_10) { | |
+ mdio_write(tp, 0x1F, 0x0001); | |
+ mdio_write(tp, 0x06, 0x4064); | |
+ mdio_write(tp, 0x07, 0x2863); | |
+ mdio_write(tp, 0x08, 0x059C); | |
+ mdio_write(tp, 0x09, 0x26B4); | |
+ mdio_write(tp, 0x0A, 0x6A19); | |
+ mdio_write(tp, 0x0B, 0xDCC8); | |
+ mdio_write(tp, 0x10, 0xF06D); | |
+ mdio_write(tp, 0x14, 0x7F68); | |
+ mdio_write(tp, 0x18, 0x7FD9); | |
+ mdio_write(tp, 0x1C, 0xF0FF); | |
+ mdio_write(tp, 0x1D, 0x3D9C); | |
+ mdio_write(tp, 0x1F, 0x0003); | |
+ mdio_write(tp, 0x12, 0xF49F); | |
+ mdio_write(tp, 0x13, 0x070B); | |
+ mdio_write(tp, 0x1A, 0x05AD); | |
+ mdio_write(tp, 0x14, 0x94C0); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ mdio_write(tp, 0x06, 0x5561); | |
+ mdio_write(tp, 0x1F, 0x0005); | |
+ mdio_write(tp, 0x05, 0x8332); | |
+ mdio_write(tp, 0x06, 0x5561); | |
+ | |
+ if (rtl8168_efuse_read(tp, 0x01) == 0xb1) { | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ mdio_write(tp, 0x05, 0x669A); | |
+ mdio_write(tp, 0x1F, 0x0005); | |
+ mdio_write(tp, 0x05, 0x8330); | |
+ mdio_write(tp, 0x06, 0x669A); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ gphy_val = mdio_read(tp, 0x0D); | |
+ if ((gphy_val & 0x00FF) != 0x006C) { | |
+ gphy_val &= 0xFF00; | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ mdio_write(tp, 0x0D, gphy_val | 0x0065); | |
+ mdio_write(tp, 0x0D, gphy_val | 0x0066); | |
+ mdio_write(tp, 0x0D, gphy_val | 0x0067); | |
+ mdio_write(tp, 0x0D, gphy_val | 0x0068); | |
+ mdio_write(tp, 0x0D, gphy_val | 0x0069); | |
+ mdio_write(tp, 0x0D, gphy_val | 0x006A); | |
+ mdio_write(tp, 0x0D, gphy_val | 0x006B); | |
+ mdio_write(tp, 0x0D, gphy_val | 0x006C); | |
+ } | |
+ } else { | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ mdio_write(tp, 0x05, 0x2642); | |
+ mdio_write(tp, 0x1F, 0x0005); | |
+ mdio_write(tp, 0x05, 0x8330); | |
+ mdio_write(tp, 0x06, 0x2642); | |
+ } | |
+ | |
+ if (rtl8168_efuse_read(tp, 0x30) == 0x98) { | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ mdio_write(tp, 0x11, mdio_read(tp, 0x11) & ~BIT_1); | |
+ mdio_write(tp, 0x1F, 0x0005); | |
+ mdio_write(tp, 0x01, mdio_read(tp, 0x01) | BIT_9); | |
+ } else if (rtl8168_efuse_read(tp, 0x30) == 0x90) { | |
+ mdio_write(tp, 0x1F, 0x0005); | |
+ mdio_write(tp, 0x01, mdio_read(tp, 0x01) & ~BIT_9); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ mdio_write(tp, 0x16, 0x5101); | |
+ } | |
+ | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ gphy_val = mdio_read(tp, 0x02); | |
+ gphy_val &= ~BIT_10; | |
+ gphy_val &= ~BIT_9; | |
+ gphy_val |= BIT_8; | |
+ mdio_write(tp, 0x02, gphy_val); | |
+ gphy_val = mdio_read(tp, 0x03); | |
+ gphy_val &= ~BIT_15; | |
+ gphy_val &= ~BIT_14; | |
+ gphy_val &= ~BIT_13; | |
+ mdio_write(tp, 0x03, gphy_val); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0001); | |
+ mdio_write(tp, 0x17, 0x0CC0); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ gphy_val = mdio_read(tp, 0x0F); | |
+ gphy_val |= BIT_4; | |
+ gphy_val |= BIT_2; | |
+ gphy_val |= BIT_1; | |
+ gphy_val |= BIT_0; | |
+ mdio_write(tp, 0x0F, gphy_val); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0005); | |
+ mdio_write(tp, 0x05, 0x001B); | |
+ if (mdio_read(tp, 0x06) == 0xB300) { | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ mdio_write(tp, 0x05, 0xfff6); | |
+ mdio_write(tp, 0x06, 0x0080); | |
+ mdio_write(tp, 0x05, 0x8000); | |
+ mdio_write(tp, 0x06, 0xf8f9); | |
+ mdio_write(tp, 0x06, 0xfaee); | |
+ mdio_write(tp, 0x06, 0xf8ea); | |
+ mdio_write(tp, 0x06, 0x00ee); | |
+ mdio_write(tp, 0x06, 0xf8eb); | |
+ mdio_write(tp, 0x06, 0x00e2); | |
+ mdio_write(tp, 0x06, 0xf87c); | |
+ mdio_write(tp, 0x06, 0xe3f8); | |
+ mdio_write(tp, 0x06, 0x7da5); | |
+ mdio_write(tp, 0x06, 0x1111); | |
+ mdio_write(tp, 0x06, 0x12d2); | |
+ mdio_write(tp, 0x06, 0x40d6); | |
+ mdio_write(tp, 0x06, 0x4444); | |
+ mdio_write(tp, 0x06, 0x0281); | |
+ mdio_write(tp, 0x06, 0xc6d2); | |
+ mdio_write(tp, 0x06, 0xa0d6); | |
+ mdio_write(tp, 0x06, 0xaaaa); | |
+ mdio_write(tp, 0x06, 0x0281); | |
+ mdio_write(tp, 0x06, 0xc6ae); | |
+ mdio_write(tp, 0x06, 0x0fa5); | |
+ mdio_write(tp, 0x06, 0x4444); | |
+ mdio_write(tp, 0x06, 0x02ae); | |
+ mdio_write(tp, 0x06, 0x4da5); | |
+ mdio_write(tp, 0x06, 0xaaaa); | |
+ mdio_write(tp, 0x06, 0x02ae); | |
+ mdio_write(tp, 0x06, 0x47af); | |
+ mdio_write(tp, 0x06, 0x81c2); | |
+ mdio_write(tp, 0x06, 0xee83); | |
+ mdio_write(tp, 0x06, 0x4e00); | |
+ mdio_write(tp, 0x06, 0xee83); | |
+ mdio_write(tp, 0x06, 0x4d0f); | |
+ mdio_write(tp, 0x06, 0xee83); | |
+ mdio_write(tp, 0x06, 0x4c0f); | |
+ mdio_write(tp, 0x06, 0xee83); | |
+ mdio_write(tp, 0x06, 0x4f00); | |
+ mdio_write(tp, 0x06, 0xee83); | |
+ mdio_write(tp, 0x06, 0x5100); | |
+ mdio_write(tp, 0x06, 0xee83); | |
+ mdio_write(tp, 0x06, 0x4aff); | |
+ mdio_write(tp, 0x06, 0xee83); | |
+ mdio_write(tp, 0x06, 0x4bff); | |
+ mdio_write(tp, 0x06, 0xe083); | |
+ mdio_write(tp, 0x06, 0x30e1); | |
+ mdio_write(tp, 0x06, 0x8331); | |
+ mdio_write(tp, 0x06, 0x58fe); | |
+ mdio_write(tp, 0x06, 0xe4f8); | |
+ mdio_write(tp, 0x06, 0x8ae5); | |
+ mdio_write(tp, 0x06, 0xf88b); | |
+ mdio_write(tp, 0x06, 0xe083); | |
+ mdio_write(tp, 0x06, 0x32e1); | |
+ mdio_write(tp, 0x06, 0x8333); | |
+ mdio_write(tp, 0x06, 0x590f); | |
+ mdio_write(tp, 0x06, 0xe283); | |
+ mdio_write(tp, 0x06, 0x4d0c); | |
+ mdio_write(tp, 0x06, 0x245a); | |
+ mdio_write(tp, 0x06, 0xf01e); | |
+ mdio_write(tp, 0x06, 0x12e4); | |
+ mdio_write(tp, 0x06, 0xf88c); | |
+ mdio_write(tp, 0x06, 0xe5f8); | |
+ mdio_write(tp, 0x06, 0x8daf); | |
+ mdio_write(tp, 0x06, 0x81c2); | |
+ mdio_write(tp, 0x06, 0xe083); | |
+ mdio_write(tp, 0x06, 0x4f10); | |
+ mdio_write(tp, 0x06, 0xe483); | |
+ mdio_write(tp, 0x06, 0x4fe0); | |
+ mdio_write(tp, 0x06, 0x834e); | |
+ mdio_write(tp, 0x06, 0x7800); | |
+ mdio_write(tp, 0x06, 0x9f0a); | |
+ mdio_write(tp, 0x06, 0xe083); | |
+ mdio_write(tp, 0x06, 0x4fa0); | |
+ mdio_write(tp, 0x06, 0x10a5); | |
+ mdio_write(tp, 0x06, 0xee83); | |
+ mdio_write(tp, 0x06, 0x4e01); | |
+ mdio_write(tp, 0x06, 0xe083); | |
+ mdio_write(tp, 0x06, 0x4e78); | |
+ mdio_write(tp, 0x06, 0x059e); | |
+ mdio_write(tp, 0x06, 0x9ae0); | |
+ mdio_write(tp, 0x06, 0x834e); | |
+ mdio_write(tp, 0x06, 0x7804); | |
+ mdio_write(tp, 0x06, 0x9e10); | |
+ mdio_write(tp, 0x06, 0xe083); | |
+ mdio_write(tp, 0x06, 0x4e78); | |
+ mdio_write(tp, 0x06, 0x039e); | |
+ mdio_write(tp, 0x06, 0x0fe0); | |
+ mdio_write(tp, 0x06, 0x834e); | |
+ mdio_write(tp, 0x06, 0x7801); | |
+ mdio_write(tp, 0x06, 0x9e05); | |
+ mdio_write(tp, 0x06, 0xae0c); | |
+ mdio_write(tp, 0x06, 0xaf81); | |
+ mdio_write(tp, 0x06, 0xa7af); | |
+ mdio_write(tp, 0x06, 0x8152); | |
+ mdio_write(tp, 0x06, 0xaf81); | |
+ mdio_write(tp, 0x06, 0x8baf); | |
+ mdio_write(tp, 0x06, 0x81c2); | |
+ mdio_write(tp, 0x06, 0xee83); | |
+ mdio_write(tp, 0x06, 0x4800); | |
+ mdio_write(tp, 0x06, 0xee83); | |
+ mdio_write(tp, 0x06, 0x4900); | |
+ mdio_write(tp, 0x06, 0xe083); | |
+ mdio_write(tp, 0x06, 0x5110); | |
+ mdio_write(tp, 0x06, 0xe483); | |
+ mdio_write(tp, 0x06, 0x5158); | |
+ mdio_write(tp, 0x06, 0x019f); | |
+ mdio_write(tp, 0x06, 0xead0); | |
+ mdio_write(tp, 0x06, 0x00d1); | |
+ mdio_write(tp, 0x06, 0x801f); | |
+ mdio_write(tp, 0x06, 0x66e2); | |
+ mdio_write(tp, 0x06, 0xf8ea); | |
+ mdio_write(tp, 0x06, 0xe3f8); | |
+ mdio_write(tp, 0x06, 0xeb5a); | |
+ mdio_write(tp, 0x06, 0xf81e); | |
+ mdio_write(tp, 0x06, 0x20e6); | |
+ mdio_write(tp, 0x06, 0xf8ea); | |
+ mdio_write(tp, 0x06, 0xe5f8); | |
+ mdio_write(tp, 0x06, 0xebd3); | |
+ mdio_write(tp, 0x06, 0x02b3); | |
+ mdio_write(tp, 0x06, 0xfee2); | |
+ mdio_write(tp, 0x06, 0xf87c); | |
+ mdio_write(tp, 0x06, 0xef32); | |
+ mdio_write(tp, 0x06, 0x5b80); | |
+ mdio_write(tp, 0x06, 0xe3f8); | |
+ mdio_write(tp, 0x06, 0x7d9e); | |
+ mdio_write(tp, 0x06, 0x037d); | |
+ mdio_write(tp, 0x06, 0xffff); | |
+ mdio_write(tp, 0x06, 0x0d58); | |
+ mdio_write(tp, 0x06, 0x1c55); | |
+ mdio_write(tp, 0x06, 0x1a65); | |
+ mdio_write(tp, 0x06, 0x11a1); | |
+ mdio_write(tp, 0x06, 0x90d3); | |
+ mdio_write(tp, 0x06, 0xe283); | |
+ mdio_write(tp, 0x06, 0x48e3); | |
+ mdio_write(tp, 0x06, 0x8349); | |
+ mdio_write(tp, 0x06, 0x1b56); | |
+ mdio_write(tp, 0x06, 0xab08); | |
+ mdio_write(tp, 0x06, 0xef56); | |
+ mdio_write(tp, 0x06, 0xe683); | |
+ mdio_write(tp, 0x06, 0x48e7); | |
+ mdio_write(tp, 0x06, 0x8349); | |
+ mdio_write(tp, 0x06, 0x10d1); | |
+ mdio_write(tp, 0x06, 0x801f); | |
+ mdio_write(tp, 0x06, 0x66a0); | |
+ mdio_write(tp, 0x06, 0x04b9); | |
+ mdio_write(tp, 0x06, 0xe283); | |
+ mdio_write(tp, 0x06, 0x48e3); | |
+ mdio_write(tp, 0x06, 0x8349); | |
+ mdio_write(tp, 0x06, 0xef65); | |
+ mdio_write(tp, 0x06, 0xe283); | |
+ mdio_write(tp, 0x06, 0x4ae3); | |
+ mdio_write(tp, 0x06, 0x834b); | |
+ mdio_write(tp, 0x06, 0x1b56); | |
+ mdio_write(tp, 0x06, 0xaa0e); | |
+ mdio_write(tp, 0x06, 0xef56); | |
+ mdio_write(tp, 0x06, 0xe683); | |
+ mdio_write(tp, 0x06, 0x4ae7); | |
+ mdio_write(tp, 0x06, 0x834b); | |
+ mdio_write(tp, 0x06, 0xe283); | |
+ mdio_write(tp, 0x06, 0x4de6); | |
+ mdio_write(tp, 0x06, 0x834c); | |
+ mdio_write(tp, 0x06, 0xe083); | |
+ mdio_write(tp, 0x06, 0x4da0); | |
+ mdio_write(tp, 0x06, 0x000c); | |
+ mdio_write(tp, 0x06, 0xaf81); | |
+ mdio_write(tp, 0x06, 0x8be0); | |
+ mdio_write(tp, 0x06, 0x834d); | |
+ mdio_write(tp, 0x06, 0x10e4); | |
+ mdio_write(tp, 0x06, 0x834d); | |
+ mdio_write(tp, 0x06, 0xae04); | |
+ mdio_write(tp, 0x06, 0x80e4); | |
+ mdio_write(tp, 0x06, 0x834d); | |
+ mdio_write(tp, 0x06, 0xe083); | |
+ mdio_write(tp, 0x06, 0x4e78); | |
+ mdio_write(tp, 0x06, 0x039e); | |
+ mdio_write(tp, 0x06, 0x0be0); | |
+ mdio_write(tp, 0x06, 0x834e); | |
+ mdio_write(tp, 0x06, 0x7804); | |
+ mdio_write(tp, 0x06, 0x9e04); | |
+ mdio_write(tp, 0x06, 0xee83); | |
+ mdio_write(tp, 0x06, 0x4e02); | |
+ mdio_write(tp, 0x06, 0xe083); | |
+ mdio_write(tp, 0x06, 0x32e1); | |
+ mdio_write(tp, 0x06, 0x8333); | |
+ mdio_write(tp, 0x06, 0x590f); | |
+ mdio_write(tp, 0x06, 0xe283); | |
+ mdio_write(tp, 0x06, 0x4d0c); | |
+ mdio_write(tp, 0x06, 0x245a); | |
+ mdio_write(tp, 0x06, 0xf01e); | |
+ mdio_write(tp, 0x06, 0x12e4); | |
+ mdio_write(tp, 0x06, 0xf88c); | |
+ mdio_write(tp, 0x06, 0xe5f8); | |
+ mdio_write(tp, 0x06, 0x8de0); | |
+ mdio_write(tp, 0x06, 0x8330); | |
+ mdio_write(tp, 0x06, 0xe183); | |
+ mdio_write(tp, 0x06, 0x3168); | |
+ mdio_write(tp, 0x06, 0x01e4); | |
+ mdio_write(tp, 0x06, 0xf88a); | |
+ mdio_write(tp, 0x06, 0xe5f8); | |
+ mdio_write(tp, 0x06, 0x8bae); | |
+ mdio_write(tp, 0x06, 0x37ee); | |
+ mdio_write(tp, 0x06, 0x834e); | |
+ mdio_write(tp, 0x06, 0x03e0); | |
+ mdio_write(tp, 0x06, 0x834c); | |
+ mdio_write(tp, 0x06, 0xe183); | |
+ mdio_write(tp, 0x06, 0x4d1b); | |
+ mdio_write(tp, 0x06, 0x019e); | |
+ mdio_write(tp, 0x06, 0x04aa); | |
+ mdio_write(tp, 0x06, 0xa1ae); | |
+ mdio_write(tp, 0x06, 0xa8ee); | |
+ mdio_write(tp, 0x06, 0x834e); | |
+ mdio_write(tp, 0x06, 0x04ee); | |
+ mdio_write(tp, 0x06, 0x834f); | |
+ mdio_write(tp, 0x06, 0x00ae); | |
+ mdio_write(tp, 0x06, 0xabe0); | |
+ mdio_write(tp, 0x06, 0x834f); | |
+ mdio_write(tp, 0x06, 0x7803); | |
+ mdio_write(tp, 0x06, 0x9f14); | |
+ mdio_write(tp, 0x06, 0xee83); | |
+ mdio_write(tp, 0x06, 0x4e05); | |
+ mdio_write(tp, 0x06, 0xd240); | |
+ mdio_write(tp, 0x06, 0xd655); | |
+ mdio_write(tp, 0x06, 0x5402); | |
+ mdio_write(tp, 0x06, 0x81c6); | |
+ mdio_write(tp, 0x06, 0xd2a0); | |
+ mdio_write(tp, 0x06, 0xd6ba); | |
+ mdio_write(tp, 0x06, 0x0002); | |
+ mdio_write(tp, 0x06, 0x81c6); | |
+ mdio_write(tp, 0x06, 0xfefd); | |
+ mdio_write(tp, 0x06, 0xfc05); | |
+ mdio_write(tp, 0x06, 0xf8e0); | |
+ mdio_write(tp, 0x06, 0xf860); | |
+ mdio_write(tp, 0x06, 0xe1f8); | |
+ mdio_write(tp, 0x06, 0x6168); | |
+ mdio_write(tp, 0x06, 0x02e4); | |
+ mdio_write(tp, 0x06, 0xf860); | |
+ mdio_write(tp, 0x06, 0xe5f8); | |
+ mdio_write(tp, 0x06, 0x61e0); | |
+ mdio_write(tp, 0x06, 0xf848); | |
+ mdio_write(tp, 0x06, 0xe1f8); | |
+ mdio_write(tp, 0x06, 0x4958); | |
+ mdio_write(tp, 0x06, 0x0f1e); | |
+ mdio_write(tp, 0x06, 0x02e4); | |
+ mdio_write(tp, 0x06, 0xf848); | |
+ mdio_write(tp, 0x06, 0xe5f8); | |
+ mdio_write(tp, 0x06, 0x49d0); | |
+ mdio_write(tp, 0x06, 0x0002); | |
+ mdio_write(tp, 0x06, 0x820a); | |
+ mdio_write(tp, 0x06, 0xbf83); | |
+ mdio_write(tp, 0x06, 0x50ef); | |
+ mdio_write(tp, 0x06, 0x46dc); | |
+ mdio_write(tp, 0x06, 0x19dd); | |
+ mdio_write(tp, 0x06, 0xd001); | |
+ mdio_write(tp, 0x06, 0x0282); | |
+ mdio_write(tp, 0x06, 0x0a02); | |
+ mdio_write(tp, 0x06, 0x8226); | |
+ mdio_write(tp, 0x06, 0xe0f8); | |
+ mdio_write(tp, 0x06, 0x60e1); | |
+ mdio_write(tp, 0x06, 0xf861); | |
+ mdio_write(tp, 0x06, 0x58fd); | |
+ mdio_write(tp, 0x06, 0xe4f8); | |
+ mdio_write(tp, 0x06, 0x60e5); | |
+ mdio_write(tp, 0x06, 0xf861); | |
+ mdio_write(tp, 0x06, 0xfc04); | |
+ mdio_write(tp, 0x06, 0xf9fa); | |
+ mdio_write(tp, 0x06, 0xfbc6); | |
+ mdio_write(tp, 0x06, 0xbff8); | |
+ mdio_write(tp, 0x06, 0x40be); | |
+ mdio_write(tp, 0x06, 0x8350); | |
+ mdio_write(tp, 0x06, 0xa001); | |
+ mdio_write(tp, 0x06, 0x0107); | |
+ mdio_write(tp, 0x06, 0x1b89); | |
+ mdio_write(tp, 0x06, 0xcfd2); | |
+ mdio_write(tp, 0x06, 0x08eb); | |
+ mdio_write(tp, 0x06, 0xdb19); | |
+ mdio_write(tp, 0x06, 0xb2fb); | |
+ mdio_write(tp, 0x06, 0xfffe); | |
+ mdio_write(tp, 0x06, 0xfd04); | |
+ mdio_write(tp, 0x06, 0xf8e0); | |
+ mdio_write(tp, 0x06, 0xf848); | |
+ mdio_write(tp, 0x06, 0xe1f8); | |
+ mdio_write(tp, 0x06, 0x4968); | |
+ mdio_write(tp, 0x06, 0x08e4); | |
+ mdio_write(tp, 0x06, 0xf848); | |
+ mdio_write(tp, 0x06, 0xe5f8); | |
+ mdio_write(tp, 0x06, 0x4958); | |
+ mdio_write(tp, 0x06, 0xf7e4); | |
+ mdio_write(tp, 0x06, 0xf848); | |
+ mdio_write(tp, 0x06, 0xe5f8); | |
+ mdio_write(tp, 0x06, 0x49fc); | |
+ mdio_write(tp, 0x06, 0x044d); | |
+ mdio_write(tp, 0x06, 0x2000); | |
+ mdio_write(tp, 0x06, 0x024e); | |
+ mdio_write(tp, 0x06, 0x2200); | |
+ mdio_write(tp, 0x06, 0x024d); | |
+ mdio_write(tp, 0x06, 0xdfff); | |
+ mdio_write(tp, 0x06, 0x014e); | |
+ mdio_write(tp, 0x06, 0xddff); | |
+ mdio_write(tp, 0x06, 0x01f8); | |
+ mdio_write(tp, 0x06, 0xfafb); | |
+ mdio_write(tp, 0x06, 0xef79); | |
+ mdio_write(tp, 0x06, 0xbff8); | |
+ mdio_write(tp, 0x06, 0x22d8); | |
+ mdio_write(tp, 0x06, 0x19d9); | |
+ mdio_write(tp, 0x06, 0x5884); | |
+ mdio_write(tp, 0x06, 0x9f09); | |
+ mdio_write(tp, 0x06, 0xbf82); | |
+ mdio_write(tp, 0x06, 0x6dd6); | |
+ mdio_write(tp, 0x06, 0x8275); | |
+ mdio_write(tp, 0x06, 0x0201); | |
+ mdio_write(tp, 0x06, 0x4fef); | |
+ mdio_write(tp, 0x06, 0x97ff); | |
+ mdio_write(tp, 0x06, 0xfefc); | |
+ mdio_write(tp, 0x06, 0x0517); | |
+ mdio_write(tp, 0x06, 0xfffe); | |
+ mdio_write(tp, 0x06, 0x0117); | |
+ mdio_write(tp, 0x06, 0x0001); | |
+ mdio_write(tp, 0x06, 0x0200); | |
+ mdio_write(tp, 0x05, 0x83d8); | |
+ mdio_write(tp, 0x06, 0x8000); | |
+ mdio_write(tp, 0x05, 0x83d6); | |
+ mdio_write(tp, 0x06, 0x824f); | |
+ mdio_write(tp, 0x02, 0x2010); | |
+ mdio_write(tp, 0x03, 0xdc00); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x0b, 0x0600); | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ mdio_write(tp, 0x05, 0xfff6); | |
+ mdio_write(tp, 0x06, 0x00fc); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ } | |
+ | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ mdio_write(tp, 0x0D, 0xF880); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ } else if (tp->mcfg == CFG_METHOD_11) { | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ mdio_write(tp, 0x10, 0x0008); | |
+ mdio_write(tp, 0x0D, 0x006C); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0001); | |
+ mdio_write(tp, 0x17, 0x0CC0); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0001); | |
+ mdio_write(tp, 0x0B, 0xA4D8); | |
+ mdio_write(tp, 0x09, 0x281C); | |
+ mdio_write(tp, 0x07, 0x2883); | |
+ mdio_write(tp, 0x0A, 0x6B35); | |
+ mdio_write(tp, 0x1D, 0x3DA4); | |
+ mdio_write(tp, 0x1C, 0xEFFD); | |
+ mdio_write(tp, 0x14, 0x7F52); | |
+ mdio_write(tp, 0x18, 0x7FC6); | |
+ mdio_write(tp, 0x08, 0x0601); | |
+ mdio_write(tp, 0x06, 0x4063); | |
+ mdio_write(tp, 0x10, 0xF074); | |
+ mdio_write(tp, 0x1F, 0x0003); | |
+ mdio_write(tp, 0x13, 0x0789); | |
+ mdio_write(tp, 0x12, 0xF4BD); | |
+ mdio_write(tp, 0x1A, 0x04FD); | |
+ mdio_write(tp, 0x14, 0x84B0); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ mdio_write(tp, 0x00, 0x9200); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0005); | |
+ mdio_write(tp, 0x01, 0x0340); | |
+ mdio_write(tp, 0x1F, 0x0001); | |
+ mdio_write(tp, 0x04, 0x4000); | |
+ mdio_write(tp, 0x03, 0x1D21); | |
+ mdio_write(tp, 0x02, 0x0C32); | |
+ mdio_write(tp, 0x01, 0x0200); | |
+ mdio_write(tp, 0x00, 0x5554); | |
+ mdio_write(tp, 0x04, 0x4800); | |
+ mdio_write(tp, 0x04, 0x4000); | |
+ mdio_write(tp, 0x04, 0xF000); | |
+ mdio_write(tp, 0x03, 0xDF01); | |
+ mdio_write(tp, 0x02, 0xDF20); | |
+ mdio_write(tp, 0x01, 0x101A); | |
+ mdio_write(tp, 0x00, 0xA0FF); | |
+ mdio_write(tp, 0x04, 0xF800); | |
+ mdio_write(tp, 0x04, 0xF000); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0007); | |
+ mdio_write(tp, 0x1E, 0x0023); | |
+ mdio_write(tp, 0x16, 0x0000); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ gphy_val = mdio_read(tp, 0x0D); | |
+ gphy_val |= BIT_5; | |
+ mdio_write(tp, 0x0D, gphy_val); | |
+ } else if (tp->mcfg == CFG_METHOD_12 || tp->mcfg == CFG_METHOD_13) { | |
+ mdio_write(tp, 0x1F, 0x0001); | |
+ mdio_write(tp, 0x17, 0x0CC0); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0007); | |
+ mdio_write(tp, 0x1E, 0x002D); | |
+ mdio_write(tp, 0x18, 0x0040); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ gphy_val = mdio_read(tp, 0x0D); | |
+ gphy_val |= BIT_5; | |
+ mdio_write(tp, 0x0D, gphy_val); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ gphy_val = mdio_read(tp, 0x0C); | |
+ gphy_val |= BIT_10; | |
+ mdio_write(tp, 0x0C, gphy_val); | |
+ } else if (tp->mcfg == CFG_METHOD_14 || tp->mcfg == CFG_METHOD_15) { | |
+ mdio_write(tp, 0x1F, 0x0007); | |
+ mdio_write(tp, 0x1E, 0x0023); | |
+ gphy_val = mdio_read(tp, 0x17) | BIT_1; | |
+ if (tp->RequiredSecLanDonglePatch) | |
+ gphy_val &= ~(BIT_2); | |
+ else | |
+ gphy_val |= (BIT_2); | |
+ mdio_write(tp, 0x17, gphy_val); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1f, 0x0005); | |
+ mdio_write(tp, 0x05, 0x8b80); | |
+ mdio_write(tp, 0x06, 0xc896); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0001); | |
+ mdio_write(tp, 0x0B, 0x6C20); | |
+ mdio_write(tp, 0x07, 0x2872); | |
+ mdio_write(tp, 0x1C, 0xEFFF); | |
+ mdio_write(tp, 0x1F, 0x0003); | |
+ mdio_write(tp, 0x14, 0x6420); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ gphy_val = mdio_read(tp, 0x08) & 0x00FF; | |
+ mdio_write(tp, 0x08, gphy_val | 0x8000); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0007); | |
+ mdio_write(tp, 0x1E, 0x002D); | |
+ gphy_val = mdio_read(tp, 0x18); | |
+ mdio_write(tp, 0x18, gphy_val | 0x0010); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ gphy_val = mdio_read(tp, 0x14); | |
+ mdio_write(tp, 0x14, gphy_val | 0x8000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ mdio_write(tp, 0x00, 0x080B); | |
+ mdio_write(tp, 0x0B, 0x09D7); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ if (aspm) { | |
+ if (tp->HwHasWrRamCodeToMicroP == TRUE) { | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ mdio_write(tp, 0x15, 0x1006); | |
+ } | |
+ } | |
+ | |
+ mdio_write(tp, 0x1F, 0x0003); | |
+ mdio_write(tp, 0x19, 0x7F46); | |
+ mdio_write(tp, 0x1F, 0x0005); | |
+ mdio_write(tp, 0x05, 0x8AD2); | |
+ mdio_write(tp, 0x06, 0x6810); | |
+ mdio_write(tp, 0x05, 0x8AD4); | |
+ mdio_write(tp, 0x06, 0x8002); | |
+ mdio_write(tp, 0x05, 0x8ADE); | |
+ mdio_write(tp, 0x06, 0x8025); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0007); | |
+ mdio_write(tp, 0x1E, 0x002F); | |
+ mdio_write(tp, 0x15, 0x1919); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0007); | |
+ mdio_write(tp, 0x1E, 0x002D); | |
+ gphy_val = mdio_read(tp, 0x18); | |
+ mdio_write(tp, 0x18, gphy_val | 0x0040); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0005); | |
+ mdio_write(tp, 0x05, 0x8B86); | |
+ gphy_val = mdio_read(tp, 0x06); | |
+ mdio_write(tp, 0x06, gphy_val | 0x0001); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0007); | |
+ mdio_write(tp, 0x1E, 0x00AC); | |
+ mdio_write(tp, 0x18, 0x0006); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ } else if (tp->mcfg == CFG_METHOD_16) { | |
+ mdio_write(tp, 0x1F, 0x0005); | |
+ mdio_write(tp, 0x05, 0x8B80); | |
+ gphy_val = mdio_read(tp, 0x06); | |
+ gphy_val |= BIT_2 | BIT_1; | |
+ mdio_write(tp, 0x06, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1f, 0x0004); | |
+ mdio_write(tp, 0x1f, 0x0007); | |
+ mdio_write(tp, 0x1e, 0x002D); | |
+ gphy_val = mdio_read(tp, 0x18); | |
+ gphy_val |= BIT_4; | |
+ mdio_write(tp, 0x18, gphy_val); | |
+ mdio_write(tp, 0x1f, 0x0002); | |
+ mdio_write(tp, 0x1f, 0x0000); | |
+ gphy_val = mdio_read(tp, 0x14); | |
+ gphy_val |= BIT_15; | |
+ mdio_write(tp, 0x14, gphy_val); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ mdio_write(tp, 0x15, 0x1006); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0005); | |
+ mdio_write(tp, 0x05, 0x8B86); | |
+ gphy_val = mdio_read(tp, 0x06); | |
+ gphy_val |= BIT_0; | |
+ mdio_write(tp, 0x06, gphy_val); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0001); | |
+ mdio_write(tp, 0x0B, 0x6C14); | |
+ mdio_write(tp, 0x14, 0x7F3D); | |
+ mdio_write(tp, 0x1C, 0xFAFE); | |
+ mdio_write(tp, 0x08, 0x07C5); | |
+ mdio_write(tp, 0x10, 0xF090); | |
+ mdio_write(tp, 0x1F, 0x0003); | |
+ mdio_write(tp, 0x14, 0x641A); | |
+ mdio_write(tp, 0x1A, 0x0606); | |
+ mdio_write(tp, 0x12, 0xF480); | |
+ mdio_write(tp, 0x13, 0x0747); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0004); | |
+ mdio_write(tp, 0x1F, 0x0007); | |
+ mdio_write(tp, 0x1E, 0x0078); | |
+ mdio_write(tp, 0x15, 0xA408); | |
+ mdio_write(tp, 0x17, 0x5100); | |
+ mdio_write(tp, 0x19, 0x0008); | |
+ mdio_write(tp, 0x1F, 0x0002); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0003); | |
+ mdio_write(tp, 0x0D, 0x0207); | |
+ mdio_write(tp, 0x02, 0x5FD0); | |
+ mdio_write(tp, 0x1F, 0x0000); | |
+ | |
+ mdio_write(tp, 0x1F, 0x0004); | |
+ mdio_write(tp, 0x1F, 0x0007); | |
+ mdio_write(tp, 0x1E, 0x00A1); | |
+ gphy_val = mdio_read(tp, 0x1A); | |
+ gphy_val &= ~BIT_2; | |
+ mdio_write(tp, 0x1A, gphy_ |
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