Simple Makefile template

Makefile

TARGET ?= target 
LIBS = -lm
CC = gcc
CFLAGS = -g -Wall

.PHONY: default all test clean

default: $(TARGET)
all: default test

OBJECTS = $(patsubst %.c, %.o, $(wildcard *.c))
HEADERS = $(wildcard *.h)

%.o: %.c $(HEADERS)
	$(CC) $(CFLAGS) -c $< -o $@

.PRECIOUS: $(TARGET) $(OBJECTS)

$(TARGET): $(OBJECTS)
	$(CC) $(OBJECTS) -Wall $(LIBS) -o $@

test: 
	./$(TARGET)

clean:
	rm -f *.o
	rm -f $(TARGET)