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Created April 10, 2020 15:04
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dfflegalize [options]
Converts all flip-flops and latches in the design to a specified subset of
cells actually supported by the target device, applying conversions between
cell types as necessary.
-sr
-dlatch
-dlatchr
-dlatchsr
-dff
-dffe
-adff
-adffe
-dffsr
-dffsre
-dffs
-dffse
-dffes
Allows the usage of the corresponding cell type in the output.
If none of the above options are specified, all supported FF/latch
types are assumed to be allowed.
-clk-polarity <P|N>
Requires that all FFs in the output have the specified clock polarity.
-arst-polarity <P|N>
Requires that all FFs in the output have the specified async reset polarity.
-srst-polarity <P|N>
Requires that all FFs in the output have the specified sync reset polarity.
-lrst-polarity <P|N>
Requires that all latches in the output have the specified reset polarity.
-reset-polarity <P|N>
Specifies all three above options at once.
-len-polarity <P|N>
Requires that all latches in the output have the specified enable polarity.
-ce-polarity <P|N>
Requires that all FFs in the output have the specified clock enable polarity.
-arst-val <0|1>
Requires that all FFs in the output have the given async reset value.
-srst-val <0|1>
Requires that all FFs in the output have the given sync reset value.
-lrst-val <0|1>
Requires that all latches in the output have the given reset value.
-match-reset-init
Requires that the initialization value matches the reset value for
dlatchr, adff, adffe, dffs, dffse, dffes cells in the output.
-zero-init
Requires that all initialization values are 0 (or undefined) in
the output.
-mince <num>
Requires that each clock enable signal in the output is used by
at least <num> FFs.
-minsrst <num>
Requires that each sync reset signal in the output is used by
at least <num> FFs.
The following transformations are performed by this pass:
- upconversion from a less capable cell to a more capable cell, if the less
capable cell is not supported (eg. dff -> dffe, or adff -> dffsr)
- unmapping FFs with clock enable (due to unsupported cell type or -mince)
- unmapping FFs with sync reset (due to unsupported cell type, -minsrst, or
-match-reset-init)
- adding inverters on the control pins (due to unsupported polarity)
- converting sr into dlatchr
- emulating unsupported dffsr cell by adff + adff + sr + mux
- emulating unsupported dlatchsr cell by dlatchr + dlatchr + sr + mux
- emulating adff with -match-reset-init violation by dff + adff + dlatch + mux
- emulating dlatchr with -match-reset-init violation by dlatch + dlatchr + dlatch + mux
If the pass is unable to realize a given cell type (eg. adff when only -dff
option is passed), an error is raised.
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