ice40-lp8k-broken-pll-lock

gistfile1.txt

// pcf
set_io pin_cs F7
set_io pin_sck G7
set_io pin_mosi G6
set_io pin_miso H7
set_io -nowarn pin_usbp A3
set_io -nowarn pin_usbn A4
set_io pin_clk C4

set_io test_led J1
set_io test_clk B2

// module
module bootloader (
  input  pin_clk,

  inout  pin_usbp,
  inout  pin_usbn,

  output test_led,
  output test_clk,

  input  pin_miso,
  output pin_cs,
  output pin_mosi,
  output pin_sck
);
  // generate 48 mhz clock
  wire clk_48mhz;

  SB_PLL40_CORE #(
    .FEEDBACK_PATH("SIMPLE"),
    .DIVR(4'b0000),		// DIVR =  0
    .DIVF(7'b0101111),	// DIVF = 47
    .DIVQ(3'b100),		// DIVQ =  4
    .FILTER_RANGE(3'b001)	// FILTER_RANGE = 1
  ) usb_pll_inst (
    .LOCK(test_led),
    .RESETB(1'b1),
    .BYPASS(1'b0),
    .REFERENCECLK(pin_clk),
    .PLLOUTCORE(clk_48mhz)
    );
  assign test_clk = clk_48mhz;

endmodule