The Skywater PDK is a collection of definitions for Cells (common patterns that get linked together via a list of electrical connectiond defined in your hardware definition, used for designing circuits) and Design Rules (physical constraints that define whether a cell design will function electrically, used to design cells) that define how the Python code you write is ultimately converted to a collection of Masks ( https://en.wikipedia.org/wiki/Photomask ) to produce functional silicon.
Temporary To get the source code that the above applies to, in lieu of an installation guide, you need to install git and then use:
git clone https://github.com/google/skywater-pdk.git
The first step is to follow the Installation Guide (is there one?) and be able to successfully run:
make clean make
from the source root directory to complete the initial build of your environment.
Next, you need to select a tool to use for building a layout of your VLSI ( https://en.wikipedia.org/wiki/Very_Large_Scale_Integration ) circuit, with the two main options being Magic ( http://opencircuitdesign.com/magic/ ) and kLayout ( https://www.klayout.de/intro.html ) which use distinct intermediate file formats (mag vs gdsii/oasis). For this tutorial we will use Magic as it is at the time of writing better supported.
For Ubuntu 20.04 based systems, Magic may be installed with:
sudo apt install magic
TODO: Other operating systems... presumably this works on Debian and earlier Ubuntu versions as well but I know nothing about Mac or Windows.
The amazing authors of Magic have produced quite a few extremely high quality tutorials for other reading at http://opencircuitdesign.com/magic/
In particular, the introductory tutorial by John Ousterhout will clarify what Magic does and how it fits into the process of describing a circuit functionality and converting that into a manufacturable design.
On Ubuntu 20.04, the tutorials for Magic are in the folder:
/usr/share/doc/magic/tutorial/
Magic operates by acting as a CAD tool to let you design cells by defining different types of features that can be patterned. From http://opencircuitdesign.com/magic/tutorials/tut2.html
Each cell contains (primarily) four things: colored shapes, called paint, that define the circuit's structure; textual labels attached to the paint; subcells, which are instances of other cells, and properties, which are arbitrary key-value pairs attached to the cell definition. The paint and the subcell placement are what determine the eventual function of the VLSI circuit.
If you have used other circuit design programs such as kicad, you may think of a cell as an individual component you are placing in your circuit defined by "netlists" that define the electrical connections required for the circuit to be functional. In this analogy, a cell is like defining your footprint and these cells are then routed with patterned "wires" that connect the pads you define in the cell to one another.
- What skywater-pdk provides is a set of pre-defined rules and cells that are available on the skywater process. To load this technology, use the command DEFINITELY WRONG, NEED ADVICE ::
- load tech skywater-pdk
If using the graphical interface, click on "Cell" -> "New Cell" and give it the name RESISTOR. This creates a new cell with dimensions of 1 micron x 1 micron. The size of this cell will automatically grow to surround the pattern you define. The snap-to grid can be changed in the "Window" menu but it will ignore selections under 1 micron with the error:
Grid spacing must be greater than zero.
for reasons unknown to me at this time.
After you figure out how to make a cell bigger, note that the top right corner show you the cursor's coordinates relative to the origin at which your cell is automatically placed. "Window" -> "Full View" will zoom to show the cell more clearly.
Painting a selection entails first selecting a shape with the mouse (see Magic tutorial, left clicking defines bottom left corner or moves a fixed selection box shape while right clicking defines the top right corner, both snapped to the grid spacing. Painting a pattern tells the software that the specified feature should be patterned in that location of the cell. These layers may be any type of material allowed by the PDK specification such as a polysilicon feature or a metal interconnect to define a semiconductor device.
The Skywater PDK has high sheet rho (sheet resistance - https://en.wikipedia.org/wiki/Sheet_resistance ) used to define the materials properties of a uniform thin film such as those found in a semiconductor device. We can use this layer along with a defined shape to target a resistor value we desire. From the PDK specification ( https://skywater-pdk.readthedocs.io/en/latest/ ) we can find a value for the sheet rho and note that we can if we desire directly convert this to the bulk resistivity \rho by \rho = R_s \cdot t where t is the thickness.
From the sheet resistance we can calculate the expected resistance of a painted area to be R_s * L/W where L is the direction current is flowing and W is the width of the painted area. As expected, as the length of the painted area increases, the current passes through more material and sees a higher resistance. If the painted area becomes wider, the current density decreases and the resistance drops.
For this example, we will produce a 10k resistor that might be placed in series with an I/O for ESD protection. Note that the formula R_s * L/W depends only on the aspect ratio of the painted area rather than the absolute values. If L and W are both doubled, the resistance is the same. As such, the first step is to get the target aspect ratio: .. math:
\frac{L}{W} = \frac{R_{target}}{R_s}
In this case (making up numbers), we have a 10000 ohm resistor target and a R_s of 1000 ohms, so our aspect ratio must be 10:1.
Based on a 1um grid, we can see that we might use a 10um long, 1um wide "high rho" area with defined pads on each end as our 10k resistor.
After creating a cell, select an area that is 1um by 10um wide by first selecting the bottom corner with the left mouse button, releasing it, and then using the right mouse button to select a location 1um up and 10um to the right. Next, find the ??? layer on the right and use the middle mouse button to paint the selected area with high-rho polysilicon. The surrounding area must be in the ??? layer to ensure that other current paths from one end of the resistor to the other are blocked (silicon oxide?).
The below screenshot shows what your resistor cell should now look like after painting the design.
Not sure how to add an image but I will take screenshots as I go.
After creating the shape that defines a 10k resistor, the next step is to place labels at each end by using the label command to define the terminals of the device. These names will be used to convert the netlist into physical wiring. To do this, select a 1um square box on the left end of the resistor and use the command:
label Res1
to add it to the drawing. Next select a box on the far right and label it Res2 to indicate the two terminals of the resistor.
Next step is perhaps http://opencircuitdesign.com/magic/tutorials/tut7.html ?