extracted LLVM IR from https://gist.github.com/nickdesaulniers/c0cb8fc67720a5abbadf42fde5440a8e

generic.get_fixed_ranges.ll

; llvm-extract -func get_fixed_ranges generic.ll -o generic.get_fixed_ranges.ll -S --recursive
; ModuleID = 'generic.ll'
source_filename = "arch/x86/kernel/cpu/mtrr/generic.c"
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%struct.cpuinfo_x86 = type { i8, i8, i8, i8, i32, i8, i8, i8, i8, i32, i32, [20 x i32], [16 x i8], [64 x i8], i32, i32, i32, i32, i32, i64, i16, i16, i16, i16, i16, i16, i16, i16, i16, i32, i8, i8 }
%struct.tracepoint = type { i8*, %struct.static_key, i32 ()*, void ()*, %struct.tracepoint_func* }
%struct.static_key = type { %struct.atomic_t, %union.anon }
%struct.atomic_t = type { i32 }
%union.anon = type { i64 }
%struct.tracepoint_func = type { i8*, i8*, i32 }

@boot_cpu_data = external dso_local global %struct.cpuinfo_x86, align 8
@.str.5 = external hidden unnamed_addr constant [48 x i8], align 1
@cpu_number = external dso_local global i32, section ".data..percpu..read_mostly", align 4
@.str.10 = external hidden unnamed_addr constant [98 x i8], align 1
@__tracepoint_read_msr = external dso_local global %struct.tracepoint, align 8
@__tracepoint_write_msr = external dso_local global %struct.tracepoint, align 8

; Function Attrs: argmemonly nounwind
declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) #0

; Function Attrs: argmemonly nounwind
declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) #0

; Function Attrs: noredzone nounwind sspstrong
define hidden void @get_fixed_ranges(i8*) #1 {
  %2 = alloca i8*, align 8
  %3 = alloca i32*, align 8
  %4 = alloca i32, align 4
  %5 = alloca i64, align 8
  %6 = alloca i64, align 8
  %7 = alloca i64, align 8
  store i8* %0, i8** %2, align 8
  %8 = bitcast i32** %3 to i8*
  call void @llvm.lifetime.start.p0i8(i64 8, i8* %8) #6
  %9 = load i8*, i8** %2, align 8
  %10 = bitcast i8* %9 to i32*
  store i32* %10, i32** %3, align 8
  %11 = bitcast i32* %4 to i8*
  call void @llvm.lifetime.start.p0i8(i64 4, i8* %11) #6
  call void @k8_check_syscfg_dram_mod_en() #7
  br label %12

12:                                               ; preds = %1
  %13 = bitcast i64* %5 to i8*
  call void @llvm.lifetime.start.p0i8(i64 8, i8* %13) #6
  %14 = call i64 @native_read_msr(i32 592) #7
  store i64 %14, i64* %5, align 8
  %15 = load i64, i64* %5, align 8
  %16 = trunc i64 %15 to i32
  %17 = load i32*, i32** %3, align 8
  %18 = getelementptr i32, i32* %17, i64 0
  store i32 %16, i32* %18, align 4
  %19 = load i64, i64* %5, align 8
  %20 = lshr i64 %19, 32
  %21 = trunc i64 %20 to i32
  %22 = load i32*, i32** %3, align 8
  %23 = getelementptr i32, i32* %22, i64 1
  store i32 %21, i32* %23, align 4
  %24 = bitcast i64* %5 to i8*
  call void @llvm.lifetime.end.p0i8(i64 8, i8* %24) #6
  br label %25

25:                                               ; preds = %12
  br label %26

26:                                               ; preds = %25
  store i32 0, i32* %4, align 4
  br label %27

27:                                               ; preds = %56, %26
  %28 = load i32, i32* %4, align 4
  %29 = icmp slt i32 %28, 2
  br i1 %29, label %30, label %59

30:                                               ; preds = %27
  br label %31

31:                                               ; preds = %30
  %32 = bitcast i64* %6 to i8*
  call void @llvm.lifetime.start.p0i8(i64 8, i8* %32) #6
  %33 = load i32, i32* %4, align 4
  %34 = add i32 600, %33
  %35 = call i64 @native_read_msr(i32 %34) #7
  store i64 %35, i64* %6, align 8
  %36 = load i64, i64* %6, align 8
  %37 = trunc i64 %36 to i32
  %38 = load i32*, i32** %3, align 8
  %39 = load i32, i32* %4, align 4
  %40 = mul i32 %39, 2
  %41 = add i32 2, %40
  %42 = sext i32 %41 to i64
  %43 = getelementptr i32, i32* %38, i64 %42
  store i32 %37, i32* %43, align 4
  %44 = load i64, i64* %6, align 8
  %45 = lshr i64 %44, 32
  %46 = trunc i64 %45 to i32
  %47 = load i32*, i32** %3, align 8
  %48 = load i32, i32* %4, align 4
  %49 = mul i32 %48, 2
  %50 = add i32 3, %49
  %51 = sext i32 %50 to i64
  %52 = getelementptr i32, i32* %47, i64 %51
  store i32 %46, i32* %52, align 4
  %53 = bitcast i64* %6 to i8*
  call void @llvm.lifetime.end.p0i8(i64 8, i8* %53) #6
  br label %54

54:                                               ; preds = %31
  br label %55

55:                                               ; preds = %54
  br label %56

56:                                               ; preds = %55
  %57 = load i32, i32* %4, align 4
  %58 = add i32 %57, 1
  store i32 %58, i32* %4, align 4
  br label %27

59:                                               ; preds = %27
  store i32 0, i32* %4, align 4
  br label %60

60:                                               ; preds = %89, %59
  %61 = load i32, i32* %4, align 4
  %62 = icmp slt i32 %61, 8
  br i1 %62, label %63, label %92

63:                                               ; preds = %60
  br label %64

64:                                               ; preds = %63
  %65 = bitcast i64* %7 to i8*
  call void @llvm.lifetime.start.p0i8(i64 8, i8* %65) #6
  %66 = load i32, i32* %4, align 4
  %67 = add i32 616, %66
  %68 = call i64 @native_read_msr(i32 %67) #7
  store i64 %68, i64* %7, align 8
  %69 = load i64, i64* %7, align 8
  %70 = trunc i64 %69 to i32
  %71 = load i32*, i32** %3, align 8
  %72 = load i32, i32* %4, align 4
  %73 = mul i32 %72, 2
  %74 = add i32 6, %73
  %75 = sext i32 %74 to i64
  %76 = getelementptr i32, i32* %71, i64 %75
  store i32 %70, i32* %76, align 4
  %77 = load i64, i64* %7, align 8
  %78 = lshr i64 %77, 32
  %79 = trunc i64 %78 to i32
  %80 = load i32*, i32** %3, align 8
  %81 = load i32, i32* %4, align 4
  %82 = mul i32 %81, 2
  %83 = add i32 7, %82
  %84 = sext i32 %83 to i64
  %85 = getelementptr i32, i32* %80, i64 %84
  store i32 %79, i32* %85, align 4
  %86 = bitcast i64* %7 to i8*
  call void @llvm.lifetime.end.p0i8(i64 8, i8* %86) #6
  br label %87

87:                                               ; preds = %64
  br label %88

88:                                               ; preds = %87
  br label %89

89:                                               ; preds = %88
  %90 = load i32, i32* %4, align 4
  %91 = add i32 %90, 1
  store i32 %91, i32* %4, align 4
  br label %60

92:                                               ; preds = %60
  %93 = bitcast i32* %4 to i8*
  call void @llvm.lifetime.end.p0i8(i64 4, i8* %93) #6
  %94 = bitcast i32** %3 to i8*
  call void @llvm.lifetime.end.p0i8(i64 8, i8* %94) #6
  ret void
}

; Function Attrs: inlinehint noredzone nounwind sspstrong
define hidden i64 @native_read_msr(i32) #2 {
  %2 = alloca i32, align 4
  %3 = alloca i64, align 8
  store i32 %0, i32* %2, align 4
  %4 = bitcast i64* %3 to i8*
  call void @llvm.lifetime.start.p0i8(i64 8, i8* %4) #6
  %5 = load i32, i32* %2, align 4
  %6 = call i64 @__rdmsr(i32 %5) #7
  store i64 %6, i64* %3, align 8
  %7 = call zeroext i1 @static_key_false(%struct.static_key* getelementptr inbounds (%struct.tracepoint, %struct.tracepoint* @__tracepoint_read_msr, i32 0, i32 1)) #7
  br i1 %7, label %8, label %11

8:                                                ; preds = %1
  %9 = load i32, i32* %2, align 4
  %10 = load i64, i64* %3, align 8
  call void @do_trace_read_msr(i32 %9, i64 %10, i32 0) #7
  br label %11

11:                                               ; preds = %8, %1
  %12 = load i64, i64* %3, align 8
  %13 = bitcast i64* %3 to i8*
  call void @llvm.lifetime.end.p0i8(i64 8, i8* %13) #6
  ret i64 %12
}

; Function Attrs: cold noredzone
declare dso_local i32 @printk(i8*, ...) #3

; Function Attrs: noredzone nounwind sspstrong
define dso_local void @mtrr_wrmsr(i32, i32, i32) #1 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  %8 = alloca i8*, align 8
  %9 = alloca i32, align 4
  %10 = alloca i32, align 4
  %11 = alloca i32, align 4
  store i32 %0, i32* %4, align 4
  store i32 %1, i32* %5, align 4
  store i32 %2, i32* %6, align 4
  %12 = load i32, i32* %4, align 4
  %13 = load i32, i32* %5, align 4
  %14 = load i32, i32* %6, align 4
  %15 = call i32 @wrmsr_safe(i32 %12, i32 %13, i32 %14) #7
  %16 = icmp slt i32 %15, 0
  br i1 %16, label %17, label %37

17:                                               ; preds = %3
  %18 = bitcast i32* %7 to i8*
  call void @llvm.lifetime.start.p0i8(i64 4, i8* %18) #6
  br label %19

19:                                               ; preds = %17
  %20 = bitcast i8** %8 to i8*
  call void @llvm.lifetime.start.p0i8(i64 8, i8* %20) #6
  store i8* null, i8** %8, align 8
  %21 = load i8*, i8** %8, align 8
  %22 = bitcast i8** %8 to i8*
  call void @llvm.lifetime.end.p0i8(i64 8, i8* %22) #6
  br label %23

23:                                               ; preds = %19
  br label %24

24:                                               ; preds = %23
  %25 = bitcast i32* %9 to i8*
  call void @llvm.lifetime.start.p0i8(i64 4, i8* %25) #6
  %26 = call i32 asm sideeffect "movl %gs:$1,$0", "=r,*m,~{dirflag},~{fpsr},~{flags}"(i32* @cpu_number) #6, !srcloc !3
  store i32 %26, i32* %9, align 4
  %27 = load i32, i32* %9, align 4
  store i32 %27, i32* %10, align 4
  %28 = bitcast i32* %9 to i8*
  call void @llvm.lifetime.end.p0i8(i64 4, i8* %28) #6
  %29 = load i32, i32* %10, align 4
  store i32 %29, i32* %7, align 4
  %30 = load i32, i32* %7, align 4
  store i32 %30, i32* %11, align 4
  %31 = bitcast i32* %7 to i8*
  call void @llvm.lifetime.end.p0i8(i64 4, i8* %31) #6
  %32 = load i32, i32* %11, align 4
  %33 = load i32, i32* %4, align 4
  %34 = load i32, i32* %5, align 4
  %35 = load i32, i32* %6, align 4
  %36 = call i32 (i8*, ...) @printk(i8* getelementptr inbounds ([48 x i8], [48 x i8]* @.str.5, i64 0, i64 0), i32 %32, i32 %33, i32 %34, i32 %35) #8
  br label %37

37:                                               ; preds = %24, %3
  ret void
}

; Function Attrs: inlinehint noredzone nounwind sspstrong
define hidden i32 @wrmsr_safe(i32, i32, i32) #2 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  store i32 %0, i32* %4, align 4
  store i32 %1, i32* %5, align 4
  store i32 %2, i32* %6, align 4
  %7 = load i32, i32* %4, align 4
  %8 = load i32, i32* %5, align 4
  %9 = load i32, i32* %6, align 4
  %10 = call i32 @native_write_msr_safe(i32 %7, i32 %8, i32 %9) #7
  ret i32 %10
}

; Function Attrs: inlinehint noredzone nounwind sspstrong
define hidden void @k8_check_syscfg_dram_mod_en() #2 {
  %1 = alloca i32, align 4
  %2 = alloca i32, align 4
  %3 = alloca i32, align 4
  %4 = alloca i64, align 8
  %5 = alloca i32, align 4
  %6 = alloca i8*, align 8
  %7 = alloca i32, align 4
  %8 = alloca i32, align 4
  %9 = alloca i32, align 4
  %10 = bitcast i32* %1 to i8*
  call void @llvm.lifetime.start.p0i8(i64 4, i8* %10) #6
  %11 = bitcast i32* %2 to i8*
  call void @llvm.lifetime.start.p0i8(i64 4, i8* %11) #6
  %12 = load i8, i8* getelementptr inbounds (%struct.cpuinfo_x86, %struct.cpuinfo_x86* @boot_cpu_data, i32 0, i32 1), align 1
  %13 = zext i8 %12 to i32
  %14 = icmp eq i32 %13, 2
  br i1 %14, label %15, label %19

15:                                               ; preds = %0
  %16 = load i8, i8* getelementptr inbounds (%struct.cpuinfo_x86, %struct.cpuinfo_x86* @boot_cpu_data, i32 0, i32 0), align 8
  %17 = zext i8 %16 to i32
  %18 = icmp sge i32 %17, 15
  br i1 %18, label %20, label %19

19:                                               ; preds = %15, %0
  store i32 1, i32* %3, align 4
  br label %57

20:                                               ; preds = %15
  br label %21

21:                                               ; preds = %20
  %22 = bitcast i64* %4 to i8*
  call void @llvm.lifetime.start.p0i8(i64 8, i8* %22) #6
  %23 = call i64 @native_read_msr(i32 -1073676272) #7
  store i64 %23, i64* %4, align 8
  %24 = load i64, i64* %4, align 8
  %25 = trunc i64 %24 to i32
  store i32 %25, i32* %1, align 4
  %26 = load i64, i64* %4, align 8
  %27 = lshr i64 %26, 32
  %28 = trunc i64 %27 to i32
  store i32 %28, i32* %2, align 4
  %29 = bitcast i64* %4 to i8*
  call void @llvm.lifetime.end.p0i8(i64 8, i8* %29) #6
  br label %30

30:                                               ; preds = %21
  br label %31

31:                                               ; preds = %30
  %32 = load i32, i32* %1, align 4
  %33 = and i32 %32, 524288
  %34 = icmp ne i32 %33, 0
  br i1 %34, label %35, label %56

35:                                               ; preds = %31
  %36 = bitcast i32* %5 to i8*
  call void @llvm.lifetime.start.p0i8(i64 4, i8* %36) #6
  br label %37

37:                                               ; preds = %35
  %38 = bitcast i8** %6 to i8*
  call void @llvm.lifetime.start.p0i8(i64 8, i8* %38) #6
  store i8* null, i8** %6, align 8
  %39 = load i8*, i8** %6, align 8
  %40 = bitcast i8** %6 to i8*
  call void @llvm.lifetime.end.p0i8(i64 8, i8* %40) #6
  br label %41

41:                                               ; preds = %37
  br label %42

42:                                               ; preds = %41
  %43 = bitcast i32* %7 to i8*
  call void @llvm.lifetime.start.p0i8(i64 4, i8* %43) #6
  %44 = call i32 asm sideeffect "movl %gs:$1,$0", "=r,*m,~{dirflag},~{fpsr},~{flags}"(i32* @cpu_number) #6, !srcloc !4
  store i32 %44, i32* %7, align 4
  %45 = load i32, i32* %7, align 4
  store i32 %45, i32* %8, align 4
  %46 = bitcast i32* %7 to i8*
  call void @llvm.lifetime.end.p0i8(i64 4, i8* %46) #6
  %47 = load i32, i32* %8, align 4
  store i32 %47, i32* %5, align 4
  %48 = load i32, i32* %5, align 4
  store i32 %48, i32* %9, align 4
  %49 = bitcast i32* %5 to i8*
  call void @llvm.lifetime.end.p0i8(i64 4, i8* %49) #6
  %50 = load i32, i32* %9, align 4
  %51 = call i32 (i8*, ...) @printk(i8* getelementptr inbounds ([98 x i8], [98 x i8]* @.str.10, i64 0, i64 0), i32 %50) #8
  %52 = load i32, i32* %1, align 4
  %53 = and i32 %52, -524289
  store i32 %53, i32* %1, align 4
  %54 = load i32, i32* %1, align 4
  %55 = load i32, i32* %2, align 4
  call void @mtrr_wrmsr(i32 -1073676272, i32 %54, i32 %55) #7
  br label %56

56:                                               ; preds = %42, %31
  store i32 0, i32* %3, align 4
  br label %57

57:                                               ; preds = %56, %19
  %58 = bitcast i32* %2 to i8*
  call void @llvm.lifetime.end.p0i8(i64 4, i8* %58) #6
  %59 = bitcast i32* %1 to i8*
  call void @llvm.lifetime.end.p0i8(i64 4, i8* %59) #6
  %60 = load i32, i32* %3, align 4
  switch i32 %60, label %62 [
    i32 0, label %61
    i32 1, label %61
  ]

61:                                               ; preds = %57, %57
  ret void

62:                                               ; preds = %57
  unreachable
}

; Function Attrs: inlinehint noredzone nounwind sspstrong
define hidden i64 @__rdmsr(i32) #2 {
  %2 = alloca i32, align 4
  %3 = alloca i64, align 8
  %4 = alloca i64, align 8
  store i32 %0, i32* %2, align 4
  %5 = bitcast i64* %3 to i8*
  call void @llvm.lifetime.start.p0i8(i64 8, i8* %5) #6
  %6 = bitcast i64* %4 to i8*
  call void @llvm.lifetime.start.p0i8(i64 8, i8* %6) #6
  %7 = load i32, i32* %2, align 4
  %8 = call { i64, i64 } asm sideeffect "1: rdmsr\0A2:\0A .pushsection \22__ex_table\22,\22a\22\0A .balign 4\0A .long (1b) - .\0A .long (2b) - .\0A .long (ex_handler_rdmsr_unsafe) - .\0A .popsection\0A", "={ax},={dx},{cx},~{dirflag},~{fpsr},~{flags}"(i32 %7) #6, !srcloc !5
  %9 = extractvalue { i64, i64 } %8, 0
  %10 = extractvalue { i64, i64 } %8, 1
  store i64 %9, i64* %3, align 8
  store i64 %10, i64* %4, align 8
  %11 = load i64, i64* %3, align 8
  %12 = load i64, i64* %4, align 8
  %13 = shl i64 %12, 32
  %14 = or i64 %11, %13
  %15 = bitcast i64* %4 to i8*
  call void @llvm.lifetime.end.p0i8(i64 8, i8* %15) #6
  %16 = bitcast i64* %3 to i8*
  call void @llvm.lifetime.end.p0i8(i64 8, i8* %16) #6
  ret i64 %14
}

; Function Attrs: alwaysinline noredzone nounwind sspstrong
define hidden zeroext i1 @static_key_false(%struct.static_key*) #4 {
  %2 = alloca %struct.static_key*, align 8
  store %struct.static_key* %0, %struct.static_key** %2, align 8
  %3 = load %struct.static_key*, %struct.static_key** %2, align 8
  %4 = call zeroext i1 @arch_static_branch(%struct.static_key* %3, i1 zeroext false) #7
  ret i1 %4
}

; Function Attrs: noredzone
declare dso_local void @do_trace_read_msr(i32, i64, i32) #5

; Function Attrs: alwaysinline noredzone nounwind sspstrong
define hidden zeroext i1 @arch_static_branch(%struct.static_key*, i1 zeroext) #4 {
  %3 = alloca i1, align 1
  %4 = alloca %struct.static_key*, align 8
  %5 = alloca i8, align 1
  store %struct.static_key* %0, %struct.static_key** %4, align 8
  %6 = zext i1 %1 to i8
  store i8 %6, i8* %5, align 1
  %7 = load %struct.static_key*, %struct.static_key** %4, align 8
  %8 = load i8, i8* %5, align 1, !range !6
  %9 = trunc i8 %8 to i1
  callbr void asm sideeffect "1:.byte 0x0f,0x1f,0x44,0x00,0\0A\09.pushsection __jump_table,  \22aw\22 \0A\09 .balign 8 \0A\09.long 1b - ., ${2:l} - . \0A\09 .quad ${0:c} + ${1:c} - .\0A\09.popsection \0A\09", "i,i,X,~{dirflag},~{fpsr},~{flags}"(%struct.static_key* %7, i1 %9, i8* blockaddress(@arch_static_branch, %11)) #6
          to label %10 [label %11], !srcloc !7

10:                                               ; preds = %2
  store i1 false, i1* %3, align 1
  br label %12

11:                                               ; preds = %2
  store i1 true, i1* %3, align 1
  br label %12

12:                                               ; preds = %11, %10
  %13 = load i1, i1* %3, align 1
  ret i1 %13
}

; Function Attrs: inlinehint noredzone nounwind sspstrong
define hidden i32 @native_write_msr_safe(i32, i32, i32) #2 {
  %4 = alloca i32, align 4
  %5 = alloca i32, align 4
  %6 = alloca i32, align 4
  %7 = alloca i32, align 4
  store i32 %0, i32* %4, align 4
  store i32 %1, i32* %5, align 4
  store i32 %2, i32* %6, align 4
  %8 = bitcast i32* %7 to i8*
  call void @llvm.lifetime.start.p0i8(i64 4, i8* %8) #6
  %9 = load i32, i32* %4, align 4
  %10 = load i32, i32* %5, align 4
  %11 = load i32, i32* %6, align 4
  %12 = call i32 asm sideeffect "2: wrmsr ; xor $0,$0\0A1:\0A\09.section .fixup,\22ax\22\0A\093:  mov $4,$0 ; jmp 1b\0A\09.previous\0A\09 .pushsection \22__ex_table\22,\22a\22\0A .balign 4\0A .long (2b) - .\0A .long (3b) - .\0A .long (ex_handler_default) - .\0A .popsection\0A", "={ax},{cx},0,{dx},i,~{memory},~{dirflag},~{fpsr},~{flags}"(i32 %9, i32 %10, i32 %11, i32 -5) #6, !srcloc !8
  store i32 %12, i32* %7, align 4
  %13 = call zeroext i1 @static_key_false(%struct.static_key* getelementptr inbounds (%struct.tracepoint, %struct.tracepoint* @__tracepoint_write_msr, i32 0, i32 1)) #7
  br i1 %13, label %14, label %23

14:                                               ; preds = %3
  %15 = load i32, i32* %4, align 4
  %16 = load i32, i32* %6, align 4
  %17 = zext i32 %16 to i64
  %18 = shl i64 %17, 32
  %19 = load i32, i32* %5, align 4
  %20 = zext i32 %19 to i64
  %21 = or i64 %18, %20
  %22 = load i32, i32* %7, align 4
  call void @do_trace_write_msr(i32 %15, i64 %21, i32 %22) #7
  br label %23

23:                                               ; preds = %14, %3
  %24 = load i32, i32* %7, align 4
  %25 = bitcast i32* %7 to i8*
  call void @llvm.lifetime.end.p0i8(i64 4, i8* %25) #6
  ret i32 %24
}

; Function Attrs: noredzone
declare dso_local void @do_trace_write_msr(i32, i64, i32) #5

attributes #0 = { argmemonly nounwind }
attributes #1 = { noredzone nounwind sspstrong "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "null-pointer-is-valid"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+retpoline-external-thunk,+retpoline-indirect-branches,+retpoline-indirect-calls,-3dnow,-3dnowa,-aes,-avx,-avx2,-avx512bf16,-avx512bitalg,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512ifma,-avx512pf,-avx512vbmi,-avx512vbmi2,-avx512vl,-avx512vnni,-avx512vp2intersect,-avx512vpopcntdq,-f16c,-fma,-fma4,-gfni,-mmx,-pclmul,-sha,-sse,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-vaes,-vpclmulqdq,-x87,-xop,-xsave,-xsaveopt" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #2 = { inlinehint noredzone nounwind sspstrong "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "null-pointer-is-valid"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+retpoline-external-thunk,+retpoline-indirect-branches,+retpoline-indirect-calls,-3dnow,-3dnowa,-aes,-avx,-avx2,-avx512bf16,-avx512bitalg,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512ifma,-avx512pf,-avx512vbmi,-avx512vbmi2,-avx512vl,-avx512vnni,-avx512vp2intersect,-avx512vpopcntdq,-f16c,-fma,-fma4,-gfni,-mmx,-pclmul,-sha,-sse,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-vaes,-vpclmulqdq,-x87,-xop,-xsave,-xsaveopt" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #3 = { cold noredzone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "null-pointer-is-valid"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+retpoline-external-thunk,+retpoline-indirect-branches,+retpoline-indirect-calls,-3dnow,-3dnowa,-aes,-avx,-avx2,-avx512bf16,-avx512bitalg,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512ifma,-avx512pf,-avx512vbmi,-avx512vbmi2,-avx512vl,-avx512vnni,-avx512vp2intersect,-avx512vpopcntdq,-f16c,-fma,-fma4,-gfni,-mmx,-pclmul,-sha,-sse,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-vaes,-vpclmulqdq,-x87,-xop,-xsave,-xsaveopt" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #4 = { alwaysinline noredzone nounwind sspstrong "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "null-pointer-is-valid"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+retpoline-external-thunk,+retpoline-indirect-branches,+retpoline-indirect-calls,-3dnow,-3dnowa,-aes,-avx,-avx2,-avx512bf16,-avx512bitalg,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512ifma,-avx512pf,-avx512vbmi,-avx512vbmi2,-avx512vl,-avx512vnni,-avx512vp2intersect,-avx512vpopcntdq,-f16c,-fma,-fma4,-gfni,-mmx,-pclmul,-sha,-sse,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-vaes,-vpclmulqdq,-x87,-xop,-xsave,-xsaveopt" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #5 = { noredzone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "null-pointer-is-valid"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+retpoline-external-thunk,+retpoline-indirect-branches,+retpoline-indirect-calls,-3dnow,-3dnowa,-aes,-avx,-avx2,-avx512bf16,-avx512bitalg,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512ifma,-avx512pf,-avx512vbmi,-avx512vbmi2,-avx512vl,-avx512vnni,-avx512vp2intersect,-avx512vpopcntdq,-f16c,-fma,-fma4,-gfni,-mmx,-pclmul,-sha,-sse,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-vaes,-vpclmulqdq,-x87,-xop,-xsave,-xsaveopt" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #6 = { nounwind }
attributes #7 = { noredzone }
attributes #8 = { cold noredzone }

!llvm.module.flags = !{!0, !1}
!llvm.ident = !{!2}

!0 = !{i32 1, !"wchar_size", i32 2}
!1 = !{i32 1, !"Code Model", i32 2}
!2 = !{!"clang version 9.0.0 (https://github.com/llvm/llvm-project.git e1006259d84da5fe7d877978e9f41dd29ee5d4e9)"}
!3 = !{i32 1472568}
!4 = !{i32 1457746}
!5 = !{i32 294390, i32 294411, i32 294425, i32 294464, i32 294479, i32 294505, i32 294531, i32 294578}
!6 = !{i8 0, i8 2}
!7 = !{i32 88732, i32 88773, i32 88815, i32 88842, i32 88877, i32 88913, i32 88932}
!8 = !{i32 296987, i32 297028, i32 297032, i32 297068, i32 297114, i32 297137, i32 297188, i32 297203, i32 297229, i32 297255, i32 297297}