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nikic/select.diff Secret

Created Jan 12, 2021
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diff --git llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
index 5a43b8b20db9..e732073df69b 100644
--- llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
+++ llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
@@ -49,7 +49,7 @@ using namespace PatternMatch;
/// FIXME: Enabled by default until the pattern is supported well.
static cl::opt<bool> EnableUnsafeSelectTransform(
- "instcombine-unsafe-select-transform", cl::init(true),
+ "instcombine-unsafe-select-transform", cl::init(false),
cl::desc("Enable poison-unsafe select to and/or transform"));
static Value *createMinMax(InstCombiner::BuilderTy &Builder,
diff --git llvm/test/Transforms/InstCombine/2007-03-13-CompareMerge.ll llvm/test/Transforms/InstCombine/2007-03-13-CompareMerge.ll
index 7cedb1c5ced2..a1b29412a3d3 100644
--- llvm/test/Transforms/InstCombine/2007-03-13-CompareMerge.ll
+++ llvm/test/Transforms/InstCombine/2007-03-13-CompareMerge.ll
@@ -16,8 +16,10 @@ define i1 @test(i32 %c.3.i, i32 %d.292.2.i) {
define i1 @test_logical(i32 %c.3.i, i32 %d.292.2.i) {
; CHECK-LABEL: @test_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sle i32 [[C_3_I:%.*]], [[D_292_2_I:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[TMP266_I:%.*]] = icmp slt i32 [[C_3_I:%.*]], [[D_292_2_I:%.*]]
+; CHECK-NEXT: [[TMP276_I:%.*]] = icmp eq i32 [[C_3_I]], [[D_292_2_I]]
+; CHECK-NEXT: [[SEL_TMP80:%.*]] = select i1 [[TMP266_I]], i1 true, i1 [[TMP276_I]]
+; CHECK-NEXT: ret i1 [[SEL_TMP80]]
;
%tmp266.i = icmp slt i32 %c.3.i, %d.292.2.i
%tmp276.i = icmp eq i32 %c.3.i, %d.292.2.i
diff --git llvm/test/Transforms/InstCombine/2008-02-28-OrFCmpCrash.ll llvm/test/Transforms/InstCombine/2008-02-28-OrFCmpCrash.ll
index 50657d744da1..cb0f5d82c088 100644
--- llvm/test/Transforms/InstCombine/2008-02-28-OrFCmpCrash.ll
+++ llvm/test/Transforms/InstCombine/2008-02-28-OrFCmpCrash.ll
@@ -33,7 +33,7 @@ define float @test_logical(float %x, x86_fp80 %y) nounwind readonly {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP67:%.*]] = fcmp uno x86_fp80 [[Y:%.*]], 0xK00000000000000000000
; CHECK-NEXT: [[TMP71:%.*]] = fcmp uno float [[X:%.*]], 0.000000e+00
-; CHECK-NEXT: [[BOTHCOND:%.*]] = or i1 [[TMP67]], [[TMP71]]
+; CHECK-NEXT: [[BOTHCOND:%.*]] = select i1 [[TMP67]], i1 true, i1 [[TMP71]]
; CHECK-NEXT: br i1 [[BOTHCOND]], label [[BB74:%.*]], label [[BB80:%.*]]
; CHECK: bb74:
; CHECK-NEXT: ret float 0.000000e+00
diff --git llvm/test/Transforms/InstCombine/2008-08-05-And.ll llvm/test/Transforms/InstCombine/2008-08-05-And.ll
index bec055a2ee7c..65b2ca7029d6 100644
--- llvm/test/Transforms/InstCombine/2008-08-05-And.ll
+++ llvm/test/Transforms/InstCombine/2008-08-05-And.ll
@@ -49,7 +49,7 @@ define void @f_logical(i8* %x) nounwind {
; CHECK-NEXT: [[C1:%.*]] = icmp ugt i8 [[S1]], 2
; CHECK-NEXT: [[S2:%.*]] = add i8 [[L1]], -10
; CHECK-NEXT: [[C2:%.*]] = icmp ugt i8 [[S2]], 2
-; CHECK-NEXT: [[A1:%.*]] = and i1 [[C1]], [[C2]]
+; CHECK-NEXT: [[A1:%.*]] = select i1 [[C1]], i1 [[C2]], i1 false
; CHECK-NEXT: br i1 [[A1]], label [[INCOMPATIBLE:%.*]], label [[OKAY:%.*]]
; CHECK: okay:
; CHECK-NEXT: ret void
diff --git llvm/test/Transforms/InstCombine/2012-02-28-ICmp.ll llvm/test/Transforms/InstCombine/2012-02-28-ICmp.ll
index 85792304c50d..30f8df8e306a 100644
--- llvm/test/Transforms/InstCombine/2012-02-28-ICmp.ll
+++ llvm/test/Transforms/InstCombine/2012-02-28-ICmp.ll
@@ -27,7 +27,7 @@ define i1 @f1_logical(i32 %x) {
; CHECK-NEXT: [[B:%.*]] = icmp ne i8 [[A]], 0
; CHECK-NEXT: [[C:%.*]] = and i32 [[X]], 16711680
; CHECK-NEXT: [[D:%.*]] = icmp ne i32 [[C]], 0
-; CHECK-NEXT: [[E:%.*]] = and i1 [[B]], [[D]]
+; CHECK-NEXT: [[E:%.*]] = select i1 [[B]], i1 [[D]], i1 false
; CHECK-NEXT: ret i1 [[E]]
;
%a = trunc i32 %x to i8
diff --git llvm/test/Transforms/InstCombine/2012-03-10-InstCombine.ll llvm/test/Transforms/InstCombine/2012-03-10-InstCombine.ll
index d180560bfbcc..2574d52c5ce0 100644
--- llvm/test/Transforms/InstCombine/2012-03-10-InstCombine.ll
+++ llvm/test/Transforms/InstCombine/2012-03-10-InstCombine.ll
@@ -60,12 +60,12 @@ define i32 @func_logical(i8* %c, i8* %f) nounwind uwtable readnone noinline ssp
; CHECK: if.then:
; CHECK-NEXT: [[CMP2:%.*]] = icmp ule i8* [[D]], [[F:%.*]]
; CHECK-NEXT: [[NOT_CMP1:%.*]] = icmp uge i8* [[C]], [[F]]
-; CHECK-NEXT: [[DOTCMP2:%.*]] = and i1 [[CMP2]], [[NOT_CMP1]]
+; CHECK-NEXT: [[DOTCMP2:%.*]] = select i1 [[CMP2]], i1 [[NOT_CMP1]], i1 false
; CHECK-NEXT: br label [[RETURN:%.*]]
; CHECK: if.else:
; CHECK-NEXT: [[CMP5:%.*]] = icmp uge i8* [[D]], [[F]]
; CHECK-NEXT: [[NOT_CMP3:%.*]] = icmp ule i8* [[C]], [[F]]
-; CHECK-NEXT: [[DOTCMP5:%.*]] = and i1 [[CMP5]], [[NOT_CMP3]]
+; CHECK-NEXT: [[DOTCMP5:%.*]] = select i1 [[CMP5]], i1 [[NOT_CMP3]], i1 false
; CHECK-NEXT: br label [[RETURN]]
; CHECK: return:
; CHECK-NEXT: [[RETVAL_0_IN:%.*]] = phi i1 [ [[DOTCMP2]], [[IF_THEN]] ], [ [[DOTCMP5]], [[IF_ELSE]] ]
diff --git llvm/test/Transforms/InstCombine/and-fcmp.ll llvm/test/Transforms/InstCombine/and-fcmp.ll
index 18689c969bd0..8c8ec43ee45b 100644
--- llvm/test/Transforms/InstCombine/and-fcmp.ll
+++ llvm/test/Transforms/InstCombine/and-fcmp.ll
@@ -14,8 +14,10 @@ define i1 @PR1738(double %x, double %y) {
define i1 @PR1738_logical(double %x, double %y) {
; CHECK-LABEL: @PR1738_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ord double [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord double [[X:%.*]], 0.000000e+00
+; CHECK-NEXT: [[CMP2:%.*]] = fcmp ord double [[Y:%.*]], 0.000000e+00
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[CMP1]], i1 [[CMP2]], i1 false
+; CHECK-NEXT: ret i1 [[AND]]
;
%cmp1 = fcmp ord double %x, 0.0
%cmp2 = fcmp ord double %y, 0.0
@@ -49,8 +51,10 @@ define i1 @PR41069(i1 %z, float %c, float %d) {
define i1 @PR41069_logical(i1 %z, float %c, float %d) {
; CHECK-LABEL: @PR41069_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ord float [[D:%.*]], [[C:%.*]]
-; CHECK-NEXT: [[R:%.*]] = and i1 [[TMP1]], [[Z:%.*]]
+; CHECK-NEXT: [[ORD1:%.*]] = fcmp arcp ord float [[C:%.*]], 0.000000e+00
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[ORD1]], i1 [[Z:%.*]], i1 false
+; CHECK-NEXT: [[ORD2:%.*]] = fcmp afn ord float [[D:%.*]], 0.000000e+00
+; CHECK-NEXT: [[R:%.*]] = select i1 [[AND]], i1 [[ORD2]], i1 false
; CHECK-NEXT: ret i1 [[R]]
;
%ord1 = fcmp arcp ord float %c, 0.0
@@ -75,8 +79,8 @@ define i1 @PR41069_commute(i1 %z, float %c, float %d) {
define i1 @PR41069_commute_logical(i1 %z, float %c, float %d) {
; CHECK-LABEL: @PR41069_commute_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ninf ord float [[D:%.*]], [[C:%.*]]
-; CHECK-NEXT: [[R:%.*]] = and i1 [[TMP1]], [[Z:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = fcmp ord float [[D:%.*]], [[C:%.*]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP1]], i1 [[Z:%.*]], i1 false
; CHECK-NEXT: ret i1 [[R]]
;
%ord1 = fcmp ninf ord float %c, 0.0
@@ -135,7 +139,7 @@ define i1 @PR15737_logical(float %a, double %b) {
; CHECK-LABEL: @PR15737_logical(
; CHECK-NEXT: [[CMP:%.*]] = fcmp ord float [[A:%.*]], 0.000000e+00
; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord double [[B:%.*]], 0.000000e+00
-; CHECK-NEXT: [[AND:%.*]] = and i1 [[CMP]], [[CMP1]]
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
; CHECK-NEXT: ret i1 [[AND]]
;
%cmp = fcmp ord float %a, 0.000000e+00
@@ -170,8 +174,10 @@ define i1 @fcmp_ord_nonzero(float %x, float %y) {
define i1 @fcmp_ord_nonzero_logical(float %x, float %y) {
; CHECK-LABEL: @fcmp_ord_nonzero_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ord float [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord float [[X:%.*]], 0.000000e+00
+; CHECK-NEXT: [[CMP2:%.*]] = fcmp ord float [[Y:%.*]], 0.000000e+00
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[CMP1]], i1 [[CMP2]], i1 false
+; CHECK-NEXT: ret i1 [[AND]]
;
%cmp1 = fcmp ord float %x, 1.0
%cmp2 = fcmp ord float %y, 2.0
@@ -243,8 +249,10 @@ define i1 @auto_gen_2(double %a, double %b) {
define i1 @auto_gen_2_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_2_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp oeq double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -284,7 +292,10 @@ define i1 @auto_gen_4(double %a, double %b) {
define i1 @auto_gen_4_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_4_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ogt double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -305,8 +316,10 @@ define i1 @auto_gen_5(double %a, double %b) {
define i1 @auto_gen_5_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_5_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ogt double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -347,8 +360,10 @@ define i1 @auto_gen_7(double %a, double %b) {
define i1 @auto_gen_7_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_7_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp oge double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -369,8 +384,10 @@ define i1 @auto_gen_8(double %a, double %b) {
define i1 @auto_gen_8_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_8_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp oge double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -391,8 +408,10 @@ define i1 @auto_gen_9(double %a, double %b) {
define i1 @auto_gen_9_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_9_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp oge double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -432,7 +451,10 @@ define i1 @auto_gen_11(double %a, double %b) {
define i1 @auto_gen_11_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_11_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp olt double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -452,7 +474,10 @@ define i1 @auto_gen_12(double %a, double %b) {
define i1 @auto_gen_12_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_12_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp olt double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -472,7 +497,10 @@ define i1 @auto_gen_13(double %a, double %b) {
define i1 @auto_gen_13_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_13_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp olt double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -493,8 +521,10 @@ define i1 @auto_gen_14(double %a, double %b) {
define i1 @auto_gen_14_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_14_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp olt double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -535,8 +565,10 @@ define i1 @auto_gen_16(double %a, double %b) {
define i1 @auto_gen_16_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_16_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ole double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -556,7 +588,10 @@ define i1 @auto_gen_17(double %a, double %b) {
define i1 @auto_gen_17_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_17_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ole double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -577,8 +612,10 @@ define i1 @auto_gen_18(double %a, double %b) {
define i1 @auto_gen_18_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_18_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ole double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -599,8 +636,10 @@ define i1 @auto_gen_19(double %a, double %b) {
define i1 @auto_gen_19_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_19_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ole double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -621,8 +660,10 @@ define i1 @auto_gen_20(double %a, double %b) {
define i1 @auto_gen_20_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_20_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ole double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ole double %a, %b
%cmp1 = fcmp ole double %a, %b
@@ -662,7 +703,10 @@ define i1 @auto_gen_22(double %a, double %b) {
define i1 @auto_gen_22_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_22_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp one double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -683,8 +727,10 @@ define i1 @auto_gen_23(double %a, double %b) {
define i1 @auto_gen_23_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_23_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp one double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -705,8 +751,10 @@ define i1 @auto_gen_24(double %a, double %b) {
define i1 @auto_gen_24_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_24_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp one double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -727,8 +775,10 @@ define i1 @auto_gen_25(double %a, double %b) {
define i1 @auto_gen_25_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_25_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp one double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -749,8 +799,10 @@ define i1 @auto_gen_26(double %a, double %b) {
define i1 @auto_gen_26_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_26_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ole double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp one double %a, %b
%cmp1 = fcmp ole double %a, %b
@@ -771,8 +823,10 @@ define i1 @auto_gen_27(double %a, double %b) {
define i1 @auto_gen_27_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_27_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp one double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp one double %a, %b
%cmp1 = fcmp one double %a, %b
@@ -813,8 +867,10 @@ define i1 @auto_gen_29(double %a, double %b) {
define i1 @auto_gen_29_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_29_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ord double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -835,8 +891,10 @@ define i1 @auto_gen_30(double %a, double %b) {
define i1 @auto_gen_30_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_30_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ord double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -857,8 +915,10 @@ define i1 @auto_gen_31(double %a, double %b) {
define i1 @auto_gen_31_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_31_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ord double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -879,8 +939,10 @@ define i1 @auto_gen_32(double %a, double %b) {
define i1 @auto_gen_32_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_32_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ord double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -901,8 +963,10 @@ define i1 @auto_gen_33(double %a, double %b) {
define i1 @auto_gen_33_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_33_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ole double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ord double %a, %b
%cmp1 = fcmp ole double %a, %b
@@ -923,8 +987,10 @@ define i1 @auto_gen_34(double %a, double %b) {
define i1 @auto_gen_34_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_34_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp one double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ord double %a, %b
%cmp1 = fcmp one double %a, %b
@@ -945,8 +1011,10 @@ define i1 @auto_gen_35(double %a, double %b) {
define i1 @auto_gen_35_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_35_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ord double %a, %b
%cmp1 = fcmp ord double %a, %b
@@ -987,8 +1055,10 @@ define i1 @auto_gen_37(double %a, double %b) {
define i1 @auto_gen_37_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_37_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ueq double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -1008,7 +1078,10 @@ define i1 @auto_gen_38(double %a, double %b) {
define i1 @auto_gen_38_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_38_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ueq double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -1029,8 +1102,10 @@ define i1 @auto_gen_39(double %a, double %b) {
define i1 @auto_gen_39_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_39_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ueq double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -1050,7 +1125,10 @@ define i1 @auto_gen_40(double %a, double %b) {
define i1 @auto_gen_40_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_40_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ueq double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -1071,8 +1149,10 @@ define i1 @auto_gen_41(double %a, double %b) {
define i1 @auto_gen_41_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_41_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ole double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ueq double %a, %b
%cmp1 = fcmp ole double %a, %b
@@ -1092,7 +1172,10 @@ define i1 @auto_gen_42(double %a, double %b) {
define i1 @auto_gen_42_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_42_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp one double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ueq double %a, %b
%cmp1 = fcmp one double %a, %b
@@ -1113,8 +1196,10 @@ define i1 @auto_gen_43(double %a, double %b) {
define i1 @auto_gen_43_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_43_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ueq double %a, %b
%cmp1 = fcmp ord double %a, %b
@@ -1135,8 +1220,10 @@ define i1 @auto_gen_44(double %a, double %b) {
define i1 @auto_gen_44_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_44_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ueq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ueq double %a, %b
%cmp1 = fcmp ueq double %a, %b
@@ -1176,7 +1263,10 @@ define i1 @auto_gen_46(double %a, double %b) {
define i1 @auto_gen_46_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_46_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ugt double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -1197,8 +1287,10 @@ define i1 @auto_gen_47(double %a, double %b) {
define i1 @auto_gen_47_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_47_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ugt double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -1219,8 +1311,10 @@ define i1 @auto_gen_48(double %a, double %b) {
define i1 @auto_gen_48_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_48_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ugt double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -1240,7 +1334,10 @@ define i1 @auto_gen_49(double %a, double %b) {
define i1 @auto_gen_49_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_49_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ugt double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -1260,7 +1357,10 @@ define i1 @auto_gen_50(double %a, double %b) {
define i1 @auto_gen_50_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_50_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ole double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ugt double %a, %b
%cmp1 = fcmp ole double %a, %b
@@ -1281,8 +1381,10 @@ define i1 @auto_gen_51(double %a, double %b) {
define i1 @auto_gen_51_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_51_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp one double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ugt double %a, %b
%cmp1 = fcmp one double %a, %b
@@ -1303,8 +1405,10 @@ define i1 @auto_gen_52(double %a, double %b) {
define i1 @auto_gen_52_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_52_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ugt double %a, %b
%cmp1 = fcmp ord double %a, %b
@@ -1325,8 +1429,10 @@ define i1 @auto_gen_53(double %a, double %b) {
define i1 @auto_gen_53_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_53_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ueq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ugt double %a, %b
%cmp1 = fcmp ueq double %a, %b
@@ -1347,8 +1453,10 @@ define i1 @auto_gen_54(double %a, double %b) {
define i1 @auto_gen_54_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_54_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ugt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ugt double %a, %b
%cmp1 = fcmp ugt double %a, %b
@@ -1389,8 +1497,10 @@ define i1 @auto_gen_56(double %a, double %b) {
define i1 @auto_gen_56_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_56_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uge double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -1411,8 +1521,10 @@ define i1 @auto_gen_57(double %a, double %b) {
define i1 @auto_gen_57_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_57_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uge double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -1433,8 +1545,10 @@ define i1 @auto_gen_58(double %a, double %b) {
define i1 @auto_gen_58_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_58_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uge double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -1454,7 +1568,10 @@ define i1 @auto_gen_59(double %a, double %b) {
define i1 @auto_gen_59_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_59_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uge double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -1475,8 +1592,10 @@ define i1 @auto_gen_60(double %a, double %b) {
define i1 @auto_gen_60_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_60_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ole double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uge double %a, %b
%cmp1 = fcmp ole double %a, %b
@@ -1497,8 +1616,10 @@ define i1 @auto_gen_61(double %a, double %b) {
define i1 @auto_gen_61_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_61_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp one double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uge double %a, %b
%cmp1 = fcmp one double %a, %b
@@ -1519,8 +1640,10 @@ define i1 @auto_gen_62(double %a, double %b) {
define i1 @auto_gen_62_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_62_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uge double %a, %b
%cmp1 = fcmp ord double %a, %b
@@ -1541,8 +1664,10 @@ define i1 @auto_gen_63(double %a, double %b) {
define i1 @auto_gen_63_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_63_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ueq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uge double %a, %b
%cmp1 = fcmp ueq double %a, %b
@@ -1563,8 +1688,10 @@ define i1 @auto_gen_64(double %a, double %b) {
define i1 @auto_gen_64_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_64_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ugt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uge double %a, %b
%cmp1 = fcmp ugt double %a, %b
@@ -1585,8 +1712,10 @@ define i1 @auto_gen_65(double %a, double %b) {
define i1 @auto_gen_65_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_65_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp uge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uge double %a, %b
%cmp1 = fcmp uge double %a, %b
@@ -1626,7 +1755,10 @@ define i1 @auto_gen_67(double %a, double %b) {
define i1 @auto_gen_67_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_67_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -1646,7 +1778,10 @@ define i1 @auto_gen_68(double %a, double %b) {
define i1 @auto_gen_68_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_68_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -1666,7 +1801,10 @@ define i1 @auto_gen_69(double %a, double %b) {
define i1 @auto_gen_69_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_69_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -1687,8 +1825,10 @@ define i1 @auto_gen_70(double %a, double %b) {
define i1 @auto_gen_70_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_70_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -1709,8 +1849,10 @@ define i1 @auto_gen_71(double %a, double %b) {
define i1 @auto_gen_71_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_71_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ole double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp ole double %a, %b
@@ -1731,8 +1873,10 @@ define i1 @auto_gen_72(double %a, double %b) {
define i1 @auto_gen_72_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_72_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp one double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp one double %a, %b
@@ -1753,8 +1897,10 @@ define i1 @auto_gen_73(double %a, double %b) {
define i1 @auto_gen_73_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_73_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp ord double %a, %b
@@ -1775,8 +1921,10 @@ define i1 @auto_gen_74(double %a, double %b) {
define i1 @auto_gen_74_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_74_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ueq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp ueq double %a, %b
@@ -1797,8 +1945,10 @@ define i1 @auto_gen_75(double %a, double %b) {
define i1 @auto_gen_75_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_75_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ugt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp ugt double %a, %b
@@ -1819,8 +1969,10 @@ define i1 @auto_gen_76(double %a, double %b) {
define i1 @auto_gen_76_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_76_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp uge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp uge double %a, %b
@@ -1841,8 +1993,10 @@ define i1 @auto_gen_77(double %a, double %b) {
define i1 @auto_gen_77_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_77_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ult double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp ult double %a, %b
@@ -1883,8 +2037,10 @@ define i1 @auto_gen_79(double %a, double %b) {
define i1 @auto_gen_79_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_79_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -1904,7 +2060,10 @@ define i1 @auto_gen_80(double %a, double %b) {
define i1 @auto_gen_80_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_80_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -1925,8 +2084,10 @@ define i1 @auto_gen_81(double %a, double %b) {
define i1 @auto_gen_81_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_81_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -1947,8 +2108,10 @@ define i1 @auto_gen_82(double %a, double %b) {
define i1 @auto_gen_82_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_82_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -1969,8 +2132,10 @@ define i1 @auto_gen_83(double %a, double %b) {
define i1 @auto_gen_83_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_83_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ole double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp ole double %a, %b
@@ -1991,8 +2156,10 @@ define i1 @auto_gen_84(double %a, double %b) {
define i1 @auto_gen_84_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_84_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp one double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp one double %a, %b
@@ -2013,8 +2180,10 @@ define i1 @auto_gen_85(double %a, double %b) {
define i1 @auto_gen_85_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_85_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp ord double %a, %b
@@ -2035,8 +2204,10 @@ define i1 @auto_gen_86(double %a, double %b) {
define i1 @auto_gen_86_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_86_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ueq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp ueq double %a, %b
@@ -2057,8 +2228,10 @@ define i1 @auto_gen_87(double %a, double %b) {
define i1 @auto_gen_87_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_87_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ugt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp ugt double %a, %b
@@ -2079,8 +2252,10 @@ define i1 @auto_gen_88(double %a, double %b) {
define i1 @auto_gen_88_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_88_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp uge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp uge double %a, %b
@@ -2101,8 +2276,10 @@ define i1 @auto_gen_89(double %a, double %b) {
define i1 @auto_gen_89_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_89_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ult double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp ult double %a, %b
@@ -2123,8 +2300,10 @@ define i1 @auto_gen_90(double %a, double %b) {
define i1 @auto_gen_90_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_90_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ule double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp ule double %a, %b
@@ -2164,7 +2343,10 @@ define i1 @auto_gen_92(double %a, double %b) {
define i1 @auto_gen_92_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_92_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -2185,8 +2367,10 @@ define i1 @auto_gen_93(double %a, double %b) {
define i1 @auto_gen_93_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_93_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -2207,8 +2391,10 @@ define i1 @auto_gen_94(double %a, double %b) {
define i1 @auto_gen_94_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_94_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -2229,8 +2415,10 @@ define i1 @auto_gen_95(double %a, double %b) {
define i1 @auto_gen_95_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_95_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -2251,8 +2439,10 @@ define i1 @auto_gen_96(double %a, double %b) {
define i1 @auto_gen_96_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_96_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ole double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp ole double %a, %b
@@ -2273,8 +2463,10 @@ define i1 @auto_gen_97(double %a, double %b) {
define i1 @auto_gen_97_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_97_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp one double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp one double %a, %b
@@ -2295,8 +2487,10 @@ define i1 @auto_gen_98(double %a, double %b) {
define i1 @auto_gen_98_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_98_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp ord double %a, %b
@@ -2317,8 +2511,10 @@ define i1 @auto_gen_99(double %a, double %b) {
define i1 @auto_gen_99_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_99_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ueq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp ueq double %a, %b
@@ -2339,8 +2535,10 @@ define i1 @auto_gen_100(double %a, double %b) {
define i1 @auto_gen_100_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_100_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ugt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp ugt double %a, %b
@@ -2361,8 +2559,10 @@ define i1 @auto_gen_101(double %a, double %b) {
define i1 @auto_gen_101_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_101_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp uge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp uge double %a, %b
@@ -2383,8 +2583,10 @@ define i1 @auto_gen_102(double %a, double %b) {
define i1 @auto_gen_102_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_102_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ult double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp ult double %a, %b
@@ -2405,8 +2607,10 @@ define i1 @auto_gen_103(double %a, double %b) {
define i1 @auto_gen_103_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_103_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ule double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp ule double %a, %b
@@ -2427,8 +2631,10 @@ define i1 @auto_gen_104(double %a, double %b) {
define i1 @auto_gen_104_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_104_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp une double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp une double %a, %b
@@ -2468,7 +2674,10 @@ define i1 @auto_gen_106(double %a, double %b) {
define i1 @auto_gen_106_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_106_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -2488,7 +2697,10 @@ define i1 @auto_gen_107(double %a, double %b) {
define i1 @auto_gen_107_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_107_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -2508,7 +2720,10 @@ define i1 @auto_gen_108(double %a, double %b) {
define i1 @auto_gen_108_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_108_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -2528,7 +2743,10 @@ define i1 @auto_gen_109(double %a, double %b) {
define i1 @auto_gen_109_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_109_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -2548,7 +2766,10 @@ define i1 @auto_gen_110(double %a, double %b) {
define i1 @auto_gen_110_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_110_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ole double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp ole double %a, %b
@@ -2568,7 +2789,10 @@ define i1 @auto_gen_111(double %a, double %b) {
define i1 @auto_gen_111_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_111_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp one double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp one double %a, %b
@@ -2588,7 +2812,10 @@ define i1 @auto_gen_112(double %a, double %b) {
define i1 @auto_gen_112_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_112_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp ord double %a, %b
@@ -2609,8 +2836,10 @@ define i1 @auto_gen_113(double %a, double %b) {
define i1 @auto_gen_113_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_113_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ueq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp ueq double %a, %b
@@ -2631,8 +2860,10 @@ define i1 @auto_gen_114(double %a, double %b) {
define i1 @auto_gen_114_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_114_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ugt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp ugt double %a, %b
@@ -2653,8 +2884,10 @@ define i1 @auto_gen_115(double %a, double %b) {
define i1 @auto_gen_115_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_115_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp uge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp uge double %a, %b
@@ -2675,8 +2908,10 @@ define i1 @auto_gen_116(double %a, double %b) {
define i1 @auto_gen_116_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_116_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ult double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp ult double %a, %b
@@ -2697,8 +2932,10 @@ define i1 @auto_gen_117(double %a, double %b) {
define i1 @auto_gen_117_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_117_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ule double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp ule double %a, %b
@@ -2719,8 +2956,10 @@ define i1 @auto_gen_118(double %a, double %b) {
define i1 @auto_gen_118_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_118_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp une double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp une double %a, %b
@@ -2741,8 +2980,10 @@ define i1 @auto_gen_119(double %a, double %b) {
define i1 @auto_gen_119_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_119_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp uno double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp uno double %a, %b
diff --git llvm/test/Transforms/InstCombine/and-or-icmp-nullptr.ll llvm/test/Transforms/InstCombine/and-or-icmp-nullptr.ll
index b8a43c57bf58..d9623346d5a8 100644
--- llvm/test/Transforms/InstCombine/and-or-icmp-nullptr.ll
+++ llvm/test/Transforms/InstCombine/and-or-icmp-nullptr.ll
@@ -704,9 +704,9 @@ define i1 @slt_and_min(i8* %a, i8* %b) {
define i1 @slt_and_min_logical(i8* %a, i8* %b) {
; CHECK-LABEL: @slt_and_min_logical(
; CHECK-NEXT: [[CMPEQ:%.*]] = icmp eq i8* [[A:%.*]], null
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i8* [[B:%.*]], null
-; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[CMPEQ]], [[TMP1]]
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8* [[A]], [[B:%.*]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[CMPEQ]], i1 [[CMP]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%cmpeq = icmp eq i8* %a, null
%cmp = icmp slt i8* %a, %b
diff --git llvm/test/Transforms/InstCombine/and-or-icmps.ll llvm/test/Transforms/InstCombine/and-or-icmps.ll
index 0e8f0ca7bf96..4981020931ee 100644
--- llvm/test/Transforms/InstCombine/and-or-icmps.ll
+++ llvm/test/Transforms/InstCombine/and-or-icmps.ll
@@ -61,9 +61,10 @@ define i1 @PR2330(i32 %a, i32 %b) {
define i1 @PR2330_logical(i32 %a, i32 %b) {
; CHECK-LABEL: @PR2330_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[B:%.*]], [[A:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 [[TMP1]], 8
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[A:%.*]], 8
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[B:%.*]], 8
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[CMP2]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[AND]]
;
%cmp1 = icmp ult i32 %a, 8
%cmp2 = icmp ult i32 %b, 8
@@ -665,9 +666,9 @@ define i1 @substitute_constant_and_eq_eq(i8 %x, i8 %y) {
define i1 @substitute_constant_and_eq_eq_logical(i8 %x, i8 %y) {
; CHECK-LABEL: @substitute_constant_and_eq_eq_logical(
; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 42
-; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[Y:%.*]], 42
-; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[C1]], [[TMP1]]
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[C2:%.*]] = icmp eq i8 [[X]], [[Y:%.*]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[C1]], i1 [[C2]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%c1 = icmp eq i8 %x, 42
%c2 = icmp eq i8 %x, %y
@@ -904,9 +905,9 @@ define i1 @substitute_constant_or_ne_swap_sle(i8 %x, i8 %y) {
define i1 @substitute_constant_or_ne_swap_sle_logical(i8 %x, i8 %y) {
; CHECK-LABEL: @substitute_constant_or_ne_swap_sle_logical(
; CHECK-NEXT: [[C1:%.*]] = icmp ne i8 [[X:%.*]], 42
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i8 [[Y:%.*]], 43
-; CHECK-NEXT: [[TMP2:%.*]] = or i1 [[C1]], [[TMP1]]
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[C2:%.*]] = icmp sle i8 [[Y:%.*]], [[X]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[C1]], i1 true, i1 [[C2]]
+; CHECK-NEXT: ret i1 [[R]]
;
%c1 = icmp ne i8 %x, 42
%c2 = icmp sle i8 %y, %x
@@ -972,7 +973,7 @@ define i1 @substitute_constant_or_eq_swap_ne_logical(i8 %x, i8 %y) {
; CHECK-LABEL: @substitute_constant_or_eq_swap_ne_logical(
; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 42
; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[Y:%.*]], [[X]]
-; CHECK-NEXT: [[R:%.*]] = or i1 [[C1]], [[C2]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[C1]], i1 true, i1 [[C2]]
; CHECK-NEXT: ret i1 [[R]]
;
%c1 = icmp eq i8 %x, 42
diff --git llvm/test/Transforms/InstCombine/and.ll llvm/test/Transforms/InstCombine/and.ll
index 669cba88faba..ff7977f6933a 100644
--- llvm/test/Transforms/InstCombine/and.ll
+++ llvm/test/Transforms/InstCombine/and.ll
@@ -162,7 +162,9 @@ define i1 @test12(i32 %A, i32 %B) {
define i1 @test12_logical(i32 %A, i32 %B) {
; CHECK-LABEL: @test12_logical(
; CHECK-NEXT: [[C1:%.*]] = icmp ult i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[C1]]
+; CHECK-NEXT: [[C2:%.*]] = icmp ule i32 [[A]], [[B]]
+; CHECK-NEXT: [[D:%.*]] = select i1 [[C1]], i1 [[C2]], i1 false
+; CHECK-NEXT: ret i1 [[D]]
;
%C1 = icmp ult i32 %A, %B
%C2 = icmp ule i32 %A, %B
@@ -184,7 +186,10 @@ define i1 @test13(i32 %A, i32 %B) {
define i1 @test13_logical(i32 %A, i32 %B) {
; CHECK-LABEL: @test13_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[C1:%.*]] = icmp ult i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[C2:%.*]] = icmp ugt i32 [[A]], [[B]]
+; CHECK-NEXT: [[D:%.*]] = select i1 [[C1]], i1 [[C2]], i1 false
+; CHECK-NEXT: ret i1 [[D]]
;
%C1 = icmp ult i32 %A, %B
%C2 = icmp ugt i32 %A, %B
@@ -843,8 +848,10 @@ define i1 @and_orn_cmp_1(i32 %a, i32 %b, i32 %c) {
define i1 @and_orn_cmp_1_logical(i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: @and_orn_cmp_1_logical(
; CHECK-NEXT: [[X:%.*]] = icmp sgt i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[X_INV:%.*]] = icmp sle i32 [[A]], [[B]]
; CHECK-NEXT: [[Y:%.*]] = icmp ugt i32 [[C:%.*]], 42
-; CHECK-NEXT: [[AND:%.*]] = and i1 [[X]], [[Y]]
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[Y]], i1 true, i1 [[X_INV]]
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[X]], i1 [[OR]], i1 false
; CHECK-NEXT: ret i1 [[AND]]
;
%x = icmp sgt i32 %a, %b
@@ -894,8 +901,10 @@ define i1 @and_orn_cmp_3(i72 %a, i72 %b, i72 %c) {
define i1 @and_orn_cmp_3_logical(i72 %a, i72 %b, i72 %c) {
; CHECK-LABEL: @and_orn_cmp_3_logical(
; CHECK-NEXT: [[X:%.*]] = icmp ugt i72 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[X_INV:%.*]] = icmp ule i72 [[A]], [[B]]
; CHECK-NEXT: [[Y:%.*]] = icmp ugt i72 [[C:%.*]], 42
-; CHECK-NEXT: [[AND:%.*]] = and i1 [[X]], [[Y]]
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[X_INV]], i1 true, i1 [[Y]]
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[X]], i1 [[OR]], i1 false
; CHECK-NEXT: ret i1 [[AND]]
;
%x = icmp ugt i72 %a, %b
@@ -944,9 +953,11 @@ define i1 @andn_or_cmp_1(i37 %a, i37 %b, i37 %c) {
define i1 @andn_or_cmp_1_logical(i37 %a, i37 %b, i37 %c) {
; CHECK-LABEL: @andn_or_cmp_1_logical(
-; CHECK-NEXT: [[X_INV:%.*]] = icmp sle i37 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[X:%.*]] = icmp sgt i37 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[X_INV:%.*]] = icmp sle i37 [[A]], [[B]]
; CHECK-NEXT: [[Y:%.*]] = icmp ugt i37 [[C:%.*]], 42
-; CHECK-NEXT: [[AND:%.*]] = and i1 [[X_INV]], [[Y]]
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[Y]], i1 true, i1 [[X]]
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[X_INV]], i1 [[OR]], i1 false
; CHECK-NEXT: ret i1 [[AND]]
;
%x = icmp sgt i37 %a, %b
@@ -977,9 +988,11 @@ define i1 @andn_or_cmp_2(i16 %a, i16 %b, i16 %c) {
define i1 @andn_or_cmp_2_logical(i16 %a, i16 %b, i16 %c) {
; CHECK-LABEL: @andn_or_cmp_2_logical(
-; CHECK-NEXT: [[X_INV:%.*]] = icmp slt i16 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[X:%.*]] = icmp sge i16 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[X_INV:%.*]] = icmp slt i16 [[A]], [[B]]
; CHECK-NEXT: [[Y:%.*]] = icmp ugt i16 [[C:%.*]], 42
-; CHECK-NEXT: [[AND:%.*]] = and i1 [[Y]], [[X_INV]]
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[Y]], i1 true, i1 [[X]]
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[OR]], i1 [[X_INV]], i1 false
; CHECK-NEXT: ret i1 [[AND]]
;
%x = icmp sge i16 %a, %b
@@ -1028,9 +1041,11 @@ define i1 @andn_or_cmp_4(i32 %a, i32 %b, i32 %c) {
define i1 @andn_or_cmp_4_logical(i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: @andn_or_cmp_4_logical(
-; CHECK-NEXT: [[X_INV:%.*]] = icmp ne i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[X:%.*]] = icmp eq i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[X_INV:%.*]] = icmp ne i32 [[A]], [[B]]
; CHECK-NEXT: [[Y:%.*]] = icmp ugt i32 [[C:%.*]], 42
-; CHECK-NEXT: [[AND:%.*]] = and i1 [[Y]], [[X_INV]]
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[X]], i1 true, i1 [[Y]]
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[OR]], i1 [[X_INV]], i1 false
; CHECK-NEXT: ret i1 [[AND]]
;
%x = icmp eq i32 %a, %b
diff --git llvm/test/Transforms/InstCombine/and2.ll llvm/test/Transforms/InstCombine/and2.ll
index 6b12e26ab5f3..63257c209e33 100644
--- llvm/test/Transforms/InstCombine/and2.ll
+++ llvm/test/Transforms/InstCombine/and2.ll
@@ -13,8 +13,9 @@ define i1 @test2(i1 %X, i1 %Y) {
define i1 @test2_logical(i1 %X, i1 %Y) {
; CHECK-LABEL: @test2_logical(
-; CHECK-NEXT: [[A:%.*]] = and i1 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: ret i1 [[A]]
+; CHECK-NEXT: [[A:%.*]] = select i1 [[X:%.*]], i1 [[Y:%.*]], i1 false
+; CHECK-NEXT: [[B:%.*]] = select i1 [[A]], i1 [[X]], i1 false
+; CHECK-NEXT: ret i1 [[B]]
;
%a = select i1 %X, i1 %Y, i1 false
%b = select i1 %a, i1 %X, i1 false
@@ -46,9 +47,11 @@ define i1 @test7(i32 %i, i1 %b) {
define i1 @test7_logical(i32 %i, i1 %b) {
; CHECK-LABEL: @test7_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[I:%.*]], 0
-; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[I:%.*]], 1
+; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[I]], -1
+; CHECK-NEXT: [[AND1:%.*]] = select i1 [[CMP1]], i1 [[B:%.*]], i1 false
+; CHECK-NEXT: [[AND2:%.*]] = select i1 [[AND1]], i1 [[CMP2]], i1 false
+; CHECK-NEXT: ret i1 [[AND2]]
;
%cmp1 = icmp slt i32 %i, 1
%cmp2 = icmp sgt i32 %i, -1
diff --git llvm/test/Transforms/InstCombine/bit-checks.ll llvm/test/Transforms/InstCombine/bit-checks.ll
index 28464c41ad49..b8063736d9b0 100644
--- llvm/test/Transforms/InstCombine/bit-checks.ll
+++ llvm/test/Transforms/InstCombine/bit-checks.ll
@@ -19,9 +19,12 @@ define i32 @main1(i32 %argc) {
define i32 @main1_logical(i32 %argc) {
; CHECK-LABEL: @main1_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 3
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 3
-; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[TMP2]], i32 2, i32 1
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 1
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 0
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], 2
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[AND2]], 0
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 1
; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
%and = and i32 %argc, 1
@@ -51,9 +54,13 @@ define i32 @main2(i32 %argc) {
define i32 @main2_logical(i32 %argc) {
; CHECK-LABEL: @main2_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 3
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP1]], 3
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[DOTNOT]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 1
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], 0
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], 2
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], 0
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]
+; CHECK-NEXT: [[NOT_OR_COND:%.*]] = xor i1 [[OR_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_OR_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, 1
@@ -88,9 +95,13 @@ define i32 @main3(i32 %argc) {
define i32 @main3_logical(i32 %argc) {
; CHECK-LABEL: @main3_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP2]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 7
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], 0
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], 48
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], 0
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, 7
@@ -120,9 +131,13 @@ define i32 @main3b(i32 %argc) {
define i32 @main3b_logical(i32 %argc) {
; CHECK-LABEL: @main3b_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP2]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 7
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], 0
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], 16
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], 0
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, 7
@@ -153,10 +168,13 @@ define i32 @main3e_like(i32 %argc, i32 %argc2, i32 %argc3) {
define i32 @main3e_like_logical(i32 %argc, i32 %argc2, i32 %argc3) {
; CHECK-LABEL: @main3e_like_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[ARGC2:%.*]], [[ARGC3:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[ARGC:%.*]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP3]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], 0
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], [[ARGC3:%.*]]
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], 0
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, %argc2
@@ -187,9 +205,13 @@ define i32 @main3c(i32 %argc) {
define i32 @main3c_logical(i32 %argc) {
; CHECK-LABEL: @main3c_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP1]], 0
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[DOTNOT]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 7
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 0
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], 48
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[AND2]], 0
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]
+; CHECK-NEXT: [[NOT_OR_COND:%.*]] = xor i1 [[OR_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_OR_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, 7
@@ -219,9 +241,13 @@ define i32 @main3d(i32 %argc) {
define i32 @main3d_logical(i32 %argc) {
; CHECK-LABEL: @main3d_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP1]], 0
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[DOTNOT]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 7
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 0
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], 16
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[AND2]], 0
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]
+; CHECK-NEXT: [[NOT_OR_COND:%.*]] = xor i1 [[OR_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_OR_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, 7
@@ -252,10 +278,13 @@ define i32 @main3f_like(i32 %argc, i32 %argc2, i32 %argc3) {
define i32 @main3f_like_logical(i32 %argc, i32 %argc2, i32 %argc3) {
; CHECK-LABEL: @main3f_like_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[ARGC2:%.*]], [[ARGC3:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[ARGC:%.*]]
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP2]], 0
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[DOTNOT]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 0
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], [[ARGC3:%.*]]
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[AND2]], 0
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]
+; CHECK-NEXT: [[NOT_OR_COND:%.*]] = xor i1 [[OR_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_OR_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, %argc2
@@ -286,9 +315,13 @@ define i32 @main4(i32 %argc) {
define i32 @main4_logical(i32 %argc) {
; CHECK-LABEL: @main4_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 55
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP2]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 7
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], 7
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], 48
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], 48
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, 7
@@ -318,9 +351,13 @@ define i32 @main4b(i32 %argc) {
define i32 @main4b_logical(i32 %argc) {
; CHECK-LABEL: @main4b_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 23
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP2]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 7
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], 7
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], 16
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[AND2]], 0
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, 7
@@ -351,10 +388,13 @@ define i32 @main4e_like(i32 %argc, i32 %argc2, i32 %argc3) {
define i32 @main4e_like_logical(i32 %argc, i32 %argc2, i32 %argc3) {
; CHECK-LABEL: @main4e_like_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[ARGC2:%.*]], [[ARGC3:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[ARGC:%.*]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP3]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], [[ARGC2]]
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], [[ARGC3:%.*]]
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], [[ARGC3]]
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, %argc2
@@ -385,9 +425,13 @@ define i32 @main4c(i32 %argc) {
define i32 @main4c_logical(i32 %argc) {
; CHECK-LABEL: @main4c_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP1]], 55
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[DOTNOT]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 7
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 7
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], 48
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[AND2]], 48
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]
+; CHECK-NEXT: [[NOT_OR_COND:%.*]] = xor i1 [[OR_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_OR_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, 7
@@ -417,9 +461,13 @@ define i32 @main4d(i32 %argc) {
define i32 @main4d_logical(i32 %argc) {
; CHECK-LABEL: @main4d_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP1]], 23
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[DOTNOT]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 7
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 7
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], 16
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], 0
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]
+; CHECK-NEXT: [[NOT_OR_COND:%.*]] = xor i1 [[OR_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_OR_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, 7
@@ -450,10 +498,13 @@ define i32 @main4f_like(i32 %argc, i32 %argc2, i32 %argc3) {
define i32 @main4f_like_logical(i32 %argc, i32 %argc2, i32 %argc3) {
; CHECK-LABEL: @main4f_like_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[ARGC2:%.*]], [[ARGC3:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[ARGC:%.*]]
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP2]], [[TMP1]]
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[DOTNOT]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], [[ARGC2]]
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], [[ARGC3:%.*]]
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[AND2]], [[ARGC3]]
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]
+; CHECK-NEXT: [[NOT_OR_COND:%.*]] = xor i1 [[OR_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_OR_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, %argc2
@@ -485,10 +536,13 @@ define i32 @main5_like(i32 %argc, i32 %argc2) {
define i32 @main5_like_logical(i32 %argc, i32 %argc2) {
; CHECK-LABEL: @main5_like_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 7
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 7
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP3]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 7
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], 7
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC2:%.*]], 7
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], 7
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, 7
@@ -519,10 +573,13 @@ define i32 @main5e_like(i32 %argc, i32 %argc2, i32 %argc3) {
define i32 @main5e_like_logical(i32 %argc, i32 %argc2, i32 %argc3) {
; CHECK-LABEL: @main5e_like_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC3:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[ARGC:%.*]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], [[ARGC]]
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP3]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], [[ARGC]]
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], [[ARGC3:%.*]]
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], [[ARGC]]
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, %argc2
@@ -554,10 +611,13 @@ define i32 @main5c_like(i32 %argc, i32 %argc2) {
define i32 @main5c_like_logical(i32 %argc, i32 %argc2) {
; CHECK-LABEL: @main5c_like_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 7
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP2]], 7
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[DOTNOT]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 7
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 7
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC2:%.*]], 7
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[AND2]], 7
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]
+; CHECK-NEXT: [[NOT_OR_COND:%.*]] = xor i1 [[OR_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_OR_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, 7
@@ -588,10 +648,13 @@ define i32 @main5f_like(i32 %argc, i32 %argc2, i32 %argc3) {
define i32 @main5f_like_logical(i32 %argc, i32 %argc2, i32 %argc3) {
; CHECK-LABEL: @main5f_like_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC3:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[ARGC:%.*]]
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP2]], [[ARGC]]
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[DOTNOT]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], [[ARGC]]
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], [[ARGC3:%.*]]
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[AND2]], [[ARGC]]
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]
+; CHECK-NEXT: [[NOT_OR_COND:%.*]] = xor i1 [[OR_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_OR_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, %argc2
@@ -623,9 +686,13 @@ define i32 @main6(i32 %argc) {
define i32 @main6_logical(i32 %argc) {
; CHECK-LABEL: @main6_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 19
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP2]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 7
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], 3
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], 48
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], 16
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, 7
@@ -655,9 +722,13 @@ define i32 @main6b(i32 %argc) {
define i32 @main6b_logical(i32 %argc) {
; CHECK-LABEL: @main6b_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 19
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP2]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 7
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], 3
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], 16
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[AND2]], 0
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, 7
@@ -689,9 +760,13 @@ define i32 @main6c(i32 %argc) {
define i32 @main6c_logical(i32 %argc) {
; CHECK-LABEL: @main6c_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP1]], 19
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[DOTNOT]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 7
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 3
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], 48
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[AND2]], 16
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]
+; CHECK-NEXT: [[NOT_OR_COND:%.*]] = xor i1 [[OR_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_OR_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, 7
@@ -721,9 +796,13 @@ define i32 @main6d(i32 %argc) {
define i32 @main6d_logical(i32 %argc) {
; CHECK-LABEL: @main6d_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP1]], 19
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[DOTNOT]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 7
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 3
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], 16
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], 0
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]
+; CHECK-NEXT: [[NOT_OR_COND:%.*]] = xor i1 [[OR_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_OR_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, 7
@@ -756,10 +835,13 @@ define i32 @main7a(i32 %argc, i32 %argc2, i32 %argc3) {
define i32 @main7a_logical(i32 %argc, i32 %argc2, i32 %argc3) {
; CHECK-LABEL: @main7a_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[ARGC2:%.*]], [[ARGC3:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[ARGC:%.*]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP3]] to i32
+; CHECK-NEXT: [[AND1:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC:%.*]]
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND1]], [[ARGC2]]
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC]]
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], [[ARGC3]]
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and1 = and i32 %argc2, %argc
@@ -791,10 +873,13 @@ define i32 @main7b(i32 %argc, i32 %argc2, i32 %argc3) {
define i32 @main7b_logical(i32 %argc, i32 %argc2, i32 %argc3) {
; CHECK-LABEL: @main7b_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[ARGC2:%.*]], [[ARGC3:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[ARGC:%.*]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP3]] to i32
+; CHECK-NEXT: [[AND1:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND1]], [[ARGC2]]
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], [[ARGC3:%.*]]
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], [[ARGC3]]
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and1 = and i32 %argc, %argc2
@@ -826,10 +911,13 @@ define i32 @main7c(i32 %argc, i32 %argc2, i32 %argc3) {
define i32 @main7c_logical(i32 %argc, i32 %argc2, i32 %argc3) {
; CHECK-LABEL: @main7c_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[ARGC2:%.*]], [[ARGC3:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[ARGC:%.*]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP3]] to i32
+; CHECK-NEXT: [[AND1:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC:%.*]]
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND1]], [[ARGC2]]
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC]]
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], [[ARGC3]]
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and1 = and i32 %argc2, %argc
@@ -867,10 +955,13 @@ define i32 @main7d_logical(i32 %argc, i32 %argc2, i32 %argc3, i32 %argc4, i32 %a
; CHECK-LABEL: @main7d_logical(
; CHECK-NEXT: [[BC:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC4:%.*]]
; CHECK-NEXT: [[DE:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC5:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[BC]], [[DE]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[ARGC:%.*]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP3]] to i32
+; CHECK-NEXT: [[AND1:%.*]] = and i32 [[BC]], [[ARGC:%.*]]
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND1]], [[BC]]
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[DE]], [[ARGC]]
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], [[DE]]
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%bc = and i32 %argc2, %argc4
@@ -910,10 +1001,13 @@ define i32 @main7e_logical(i32 %argc, i32 %argc2, i32 %argc3, i32 %argc4, i32 %a
; CHECK-LABEL: @main7e_logical(
; CHECK-NEXT: [[BC:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC4:%.*]]
; CHECK-NEXT: [[DE:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC5:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[BC]], [[DE]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[ARGC:%.*]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP3]] to i32
+; CHECK-NEXT: [[AND1:%.*]] = and i32 [[BC]], [[ARGC:%.*]]
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND1]], [[BC]]
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[DE]], [[ARGC]]
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], [[DE]]
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%bc = and i32 %argc2, %argc4
@@ -953,10 +1047,13 @@ define i32 @main7f_logical(i32 %argc, i32 %argc2, i32 %argc3, i32 %argc4, i32 %a
; CHECK-LABEL: @main7f_logical(
; CHECK-NEXT: [[BC:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC4:%.*]]
; CHECK-NEXT: [[DE:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC5:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[BC]], [[DE]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[ARGC:%.*]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP3]] to i32
+; CHECK-NEXT: [[AND1:%.*]] = and i32 [[BC]], [[ARGC:%.*]]
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[BC]], [[AND1]]
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[DE]], [[ARGC]]
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[DE]], [[AND2]]
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%bc = and i32 %argc2, %argc4
@@ -996,10 +1093,13 @@ define i32 @main7g_logical(i32 %argc, i32 %argc2, i32 %argc3, i32 %argc4, i32 %a
; CHECK-LABEL: @main7g_logical(
; CHECK-NEXT: [[BC:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC4:%.*]]
; CHECK-NEXT: [[DE:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC5:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[BC]], [[DE]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[ARGC:%.*]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP3]] to i32
+; CHECK-NEXT: [[AND1:%.*]] = and i32 [[BC]], [[ARGC:%.*]]
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[BC]], [[AND1]]
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[DE]], [[ARGC]]
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[DE]], [[AND2]]
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%bc = and i32 %argc2, %argc4
@@ -1031,9 +1131,12 @@ define i32 @main8(i32 %argc) {
define i32 @main8_logical(i32 %argc) {
; CHECK-LABEL: @main8_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 192
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP1]], 0
-; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[DOTNOT]], i32 1, i32 2
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 64
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 0
+; CHECK-NEXT: [[TRUNC2:%.*]] = trunc i32 [[ARGC]] to i8
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp slt i8 [[TRUNC2]], 0
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]
+; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 1
; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
%and = and i32 %argc, 64
@@ -1063,9 +1166,12 @@ define i32 @main9(i32 %argc) {
define i32 @main9_logical(i32 %argc) {
; CHECK-LABEL: @main9_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 192
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 192
-; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[TMP2]], i32 2, i32 1
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 64
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 0
+; CHECK-NEXT: [[TRUNC2:%.*]] = trunc i32 [[ARGC]] to i8
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp slt i8 [[TRUNC2]], 0
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 1
; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
%and = and i32 %argc, 64
@@ -1095,9 +1201,12 @@ define i32 @main10(i32 %argc) {
define i32 @main10_logical(i32 %argc) {
; CHECK-LABEL: @main10_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 192
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0
-; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[TMP2]], i32 2, i32 1
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 64
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], 0
+; CHECK-NEXT: [[TRUNC2:%.*]] = trunc i32 [[ARGC]] to i8
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp sgt i8 [[TRUNC2]], -1
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 1
; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
%and = and i32 %argc, 64
@@ -1127,9 +1236,12 @@ define i32 @main11(i32 %argc) {
define i32 @main11_logical(i32 %argc) {
; CHECK-LABEL: @main11_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 192
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP1]], 192
-; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[DOTNOT]], i32 1, i32 2
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 64
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], 0
+; CHECK-NEXT: [[TRUNC2:%.*]] = trunc i32 [[ARGC]] to i8
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp sgt i8 [[TRUNC2]], -1
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]
+; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 1
; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
%and = and i32 %argc, 64
@@ -1159,9 +1271,12 @@ define i32 @main12(i32 %argc) {
define i32 @main12_logical(i32 %argc) {
; CHECK-LABEL: @main12_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 32896
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP1]], 0
-; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[DOTNOT]], i32 1, i32 2
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[ARGC:%.*]] to i16
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp slt i16 [[TRUNC]], 0
+; CHECK-NEXT: [[TRUNC2:%.*]] = trunc i32 [[ARGC]] to i8
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp slt i8 [[TRUNC2]], 0
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]
+; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 1
; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
%trunc = trunc i32 %argc to i16
@@ -1191,9 +1306,12 @@ define i32 @main13(i32 %argc) {
define i32 @main13_logical(i32 %argc) {
; CHECK-LABEL: @main13_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 32896
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 32896
-; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[TMP2]], i32 2, i32 1
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[ARGC:%.*]] to i16
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp slt i16 [[TRUNC]], 0
+; CHECK-NEXT: [[TRUNC2:%.*]] = trunc i32 [[ARGC]] to i8
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp slt i8 [[TRUNC2]], 0
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 1
; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
%trunc = trunc i32 %argc to i16
@@ -1223,9 +1341,12 @@ define i32 @main14(i32 %argc) {
define i32 @main14_logical(i32 %argc) {
; CHECK-LABEL: @main14_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 32896
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0
-; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[TMP2]], i32 2, i32 1
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[ARGC:%.*]] to i16
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp sgt i16 [[TRUNC]], -1
+; CHECK-NEXT: [[TRUNC2:%.*]] = trunc i32 [[ARGC]] to i8
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp sgt i8 [[TRUNC2]], -1
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 1
; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
%trunc = trunc i32 %argc to i16
@@ -1255,9 +1376,12 @@ define i32 @main15(i32 %argc) {
define i32 @main15_logical(i32 %argc) {
; CHECK-LABEL: @main15_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 32896
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP1]], 32896
-; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[DOTNOT]], i32 1, i32 2
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[ARGC:%.*]] to i16
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp sgt i16 [[TRUNC]], -1
+; CHECK-NEXT: [[TRUNC2:%.*]] = trunc i32 [[ARGC]] to i8
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp sgt i8 [[TRUNC2]], -1
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]
+; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 1
; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
%trunc = trunc i32 %argc to i16
diff --git llvm/test/Transforms/InstCombine/demorgan.ll llvm/test/Transforms/InstCombine/demorgan.ll
index 809c43d1a09d..74117ec1ff16 100644
--- llvm/test/Transforms/InstCombine/demorgan.ll
+++ llvm/test/Transforms/InstCombine/demorgan.ll
@@ -473,9 +473,10 @@ define i32 @PR28476(i32 %x, i32 %y) {
define i32 @PR28476_logical(i32 %x, i32 %y) {
; CHECK-LABEL: @PR28476_logical(
-; CHECK-NEXT: [[CMP0:%.*]] = icmp eq i32 [[X:%.*]], 0
-; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[Y:%.*]], 0
-; CHECK-NEXT: [[TMP1:%.*]] = or i1 [[CMP0]], [[CMP1]]
+; CHECK-NEXT: [[CMP0:%.*]] = icmp ne i32 [[X:%.*]], 0
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ne i32 [[Y:%.*]], 0
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[CMP0]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: [[TMP1:%.*]] = xor i1 [[AND]], true
; CHECK-NEXT: [[COND:%.*]] = zext i1 [[TMP1]] to i32
; CHECK-NEXT: ret i32 [[COND]]
;
diff --git llvm/test/Transforms/InstCombine/dont-distribute-phi.ll llvm/test/Transforms/InstCombine/dont-distribute-phi.ll
index 98d91c9b048f..f7cf72851940 100644
--- llvm/test/Transforms/InstCombine/dont-distribute-phi.ll
+++ llvm/test/Transforms/InstCombine/dont-distribute-phi.ll
@@ -55,7 +55,7 @@ define zeroext i1 @foo_logical(i32 %arg) {
; CHECK: bb_exit:
; CHECK-NEXT: [[PHI1:%.*]] = phi i1 [ [[CMP2]], [[BB_ELSE]] ], [ undef, [[BB_THEN]] ]
; CHECK-NEXT: [[XOR1:%.*]] = xor i1 [[CMP1]], true
-; CHECK-NEXT: [[AND1:%.*]] = and i1 [[PHI1]], [[XOR1]]
+; CHECK-NEXT: [[AND1:%.*]] = select i1 [[PHI1]], i1 [[XOR1]], i1 false
; CHECK-NEXT: ret i1 [[AND1]]
;
diff --git llvm/test/Transforms/InstCombine/icmp-custom-dl.ll llvm/test/Transforms/InstCombine/icmp-custom-dl.ll
index 6e76525bad35..702e61d22e94 100644
--- llvm/test/Transforms/InstCombine/icmp-custom-dl.ll
+++ llvm/test/Transforms/InstCombine/icmp-custom-dl.ll
@@ -205,7 +205,7 @@ define i1 @icmp_and_ashr_multiuse_logical(i32 %X) {
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 224
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[X]], 496
; CHECK-NEXT: [[TOBOOL2:%.*]] = icmp ne i32 [[TMP2]], 432
-; CHECK-NEXT: [[AND3:%.*]] = and i1 [[TOBOOL]], [[TOBOOL2]]
+; CHECK-NEXT: [[AND3:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL2]], i1 false
; CHECK-NEXT: ret i1 [[AND3]]
;
%shr = ashr i32 %X, 4
diff --git llvm/test/Transforms/InstCombine/icmp-logical.ll llvm/test/Transforms/InstCombine/icmp-logical.ll
index cc23b114bd01..aa559a4e82de 100644
--- llvm/test/Transforms/InstCombine/icmp-logical.ll
+++ llvm/test/Transforms/InstCombine/icmp-logical.ll
@@ -19,7 +19,10 @@ define i1 @masked_and_notallzeroes_logical(i32 %A) {
; CHECK-LABEL: @masked_and_notallzeroes_logical(
; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[A:%.*]], 7
; CHECK-NEXT: [[TST1:%.*]] = icmp ne i32 [[MASK1]], 0
-; CHECK-NEXT: ret i1 [[TST1]]
+; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A]], 39
+; CHECK-NEXT: [[TST2:%.*]] = icmp ne i32 [[MASK2]], 0
+; CHECK-NEXT: [[RES:%.*]] = select i1 [[TST1]], i1 [[TST2]], i1 false
+; CHECK-NEXT: ret i1 [[RES]]
;
%mask1 = and i32 %A, 7
%tst1 = icmp ne i32 %mask1, 0
@@ -47,7 +50,10 @@ define i1 @masked_or_allzeroes_logical(i32 %A) {
; CHECK-LABEL: @masked_or_allzeroes_logical(
; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[A:%.*]], 7
; CHECK-NEXT: [[TST1:%.*]] = icmp eq i32 [[MASK1]], 0
-; CHECK-NEXT: ret i1 [[TST1]]
+; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A]], 39
+; CHECK-NEXT: [[TST2:%.*]] = icmp eq i32 [[MASK2]], 0
+; CHECK-NEXT: [[RES:%.*]] = select i1 [[TST1]], i1 true, i1 [[TST2]]
+; CHECK-NEXT: ret i1 [[RES]]
;
%mask1 = and i32 %A, 7
%tst1 = icmp eq i32 %mask1, 0
@@ -75,7 +81,10 @@ define i1 @masked_and_notallones_logical(i32 %A) {
; CHECK-LABEL: @masked_and_notallones_logical(
; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[A:%.*]], 7
; CHECK-NEXT: [[TST1:%.*]] = icmp ne i32 [[MASK1]], 7
-; CHECK-NEXT: ret i1 [[TST1]]
+; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A]], 39
+; CHECK-NEXT: [[TST2:%.*]] = icmp ne i32 [[MASK2]], 39
+; CHECK-NEXT: [[RES:%.*]] = select i1 [[TST1]], i1 [[TST2]], i1 false
+; CHECK-NEXT: ret i1 [[RES]]
;
%mask1 = and i32 %A, 7
%tst1 = icmp ne i32 %mask1, 7
@@ -103,7 +112,10 @@ define i1 @masked_or_allones_logical(i32 %A) {
; CHECK-LABEL: @masked_or_allones_logical(
; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[A:%.*]], 7
; CHECK-NEXT: [[TST1:%.*]] = icmp eq i32 [[MASK1]], 7
-; CHECK-NEXT: ret i1 [[TST1]]
+; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A]], 39
+; CHECK-NEXT: [[TST2:%.*]] = icmp eq i32 [[MASK2]], 39
+; CHECK-NEXT: [[RES:%.*]] = select i1 [[TST1]], i1 true, i1 [[TST2]]
+; CHECK-NEXT: ret i1 [[RES]]
;
%mask1 = and i32 %A, 7
%tst1 = icmp eq i32 %mask1, 7
@@ -129,9 +141,12 @@ define i1 @masked_and_notA(i32 %A) {
define i1 @masked_and_notA_logical(i32 %A) {
; CHECK-LABEL: @masked_and_notA_logical(
-; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A:%.*]], 78
+; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[A:%.*]], 14
+; CHECK-NEXT: [[TST1:%.*]] = icmp ne i32 [[MASK1]], [[A]]
+; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A]], 78
; CHECK-NEXT: [[TST2:%.*]] = icmp ne i32 [[MASK2]], [[A]]
-; CHECK-NEXT: ret i1 [[TST2]]
+; CHECK-NEXT: [[RES:%.*]] = select i1 [[TST1]], i1 [[TST2]], i1 false
+; CHECK-NEXT: ret i1 [[RES]]
;
%mask1 = and i32 %A, 14
%tst1 = icmp ne i32 %mask1, %A
@@ -161,7 +176,7 @@ define i1 @masked_and_notA_slightly_optimized_logical(i32 %A) {
; CHECK-NEXT: [[T0:%.*]] = icmp ugt i32 [[A:%.*]], 7
; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A]], 39
; CHECK-NEXT: [[TST2:%.*]] = icmp ne i32 [[MASK2]], [[A]]
-; CHECK-NEXT: [[RES:%.*]] = and i1 [[T0]], [[TST2]]
+; CHECK-NEXT: [[RES:%.*]] = select i1 [[T0]], i1 [[TST2]], i1 false
; CHECK-NEXT: ret i1 [[RES]]
;
%t0 = icmp uge i32 %A, 8
@@ -187,9 +202,12 @@ define i1 @masked_or_A(i32 %A) {
define i1 @masked_or_A_logical(i32 %A) {
; CHECK-LABEL: @masked_or_A_logical(
-; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A:%.*]], 78
+; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[A:%.*]], 14
+; CHECK-NEXT: [[TST1:%.*]] = icmp eq i32 [[MASK1]], [[A]]
+; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A]], 78
; CHECK-NEXT: [[TST2:%.*]] = icmp eq i32 [[MASK2]], [[A]]
-; CHECK-NEXT: ret i1 [[TST2]]
+; CHECK-NEXT: [[RES:%.*]] = select i1 [[TST1]], i1 true, i1 [[TST2]]
+; CHECK-NEXT: ret i1 [[RES]]
;
%mask1 = and i32 %A, 14
%tst1 = icmp eq i32 %mask1, %A
@@ -219,7 +237,7 @@ define i1 @masked_or_A_slightly_optimized_logical(i32 %A) {
; CHECK-NEXT: [[T0:%.*]] = icmp ult i32 [[A:%.*]], 8
; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A]], 39
; CHECK-NEXT: [[TST2:%.*]] = icmp eq i32 [[MASK2]], [[A]]
-; CHECK-NEXT: [[RES:%.*]] = or i1 [[T0]], [[TST2]]
+; CHECK-NEXT: [[RES:%.*]] = select i1 [[T0]], i1 true, i1 [[TST2]]
; CHECK-NEXT: ret i1 [[RES]]
;
%t0 = icmp ult i32 %A, 8
@@ -252,7 +270,7 @@ define i1 @masked_or_allzeroes_notoptimised_logical(i32 %A) {
; CHECK-NEXT: [[TST1:%.*]] = icmp eq i32 [[MASK1]], 0
; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A]], 39
; CHECK-NEXT: [[TST2:%.*]] = icmp eq i32 [[MASK2]], 0
-; CHECK-NEXT: [[RES:%.*]] = or i1 [[TST1]], [[TST2]]
+; CHECK-NEXT: [[RES:%.*]] = select i1 [[TST1]], i1 true, i1 [[TST2]]
; CHECK-NEXT: ret i1 [[RES]]
;
%mask1 = and i32 %A, 15
@@ -306,7 +324,9 @@ define i1 @nomask_rhs_logical(i32 %in) {
; CHECK-LABEL: @nomask_rhs_logical(
; CHECK-NEXT: [[MASKED:%.*]] = and i32 [[IN:%.*]], 1
; CHECK-NEXT: [[TST1:%.*]] = icmp eq i32 [[MASKED]], 0
-; CHECK-NEXT: ret i1 [[TST1]]
+; CHECK-NEXT: [[TST2:%.*]] = icmp eq i32 [[IN]], 0
+; CHECK-NEXT: [[VAL:%.*]] = select i1 [[TST1]], i1 true, i1 [[TST2]]
+; CHECK-NEXT: ret i1 [[VAL]]
;
%masked = and i32 %in, 1
%tst1 = icmp eq i32 %masked, 0
@@ -417,7 +437,7 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_0_logical(i32 %x) {
; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3
; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 1
-; CHECK-NEXT: [[T5:%.*]] = and i1 [[T2]], [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 12
@@ -445,9 +465,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_1(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_1_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_1_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 15
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 9
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 12
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 7
+; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 1
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 12
%t2 = icmp ne i32 %t1, 0
@@ -481,7 +504,7 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_1b_logical(i32 %x) {
; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3
; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 1
-; CHECK-NEXT: [[T5:%.*]] = and i1 [[T2]], [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 14
@@ -507,7 +530,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_2(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_2_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_2_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 3
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 7
+; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 0
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 3
%t2 = icmp ne i32 %t1, 0
@@ -534,9 +562,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_3(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_3_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_3_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 15
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 8
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 7
+; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 0
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 15
%t2 = icmp ne i32 %t1, 0
@@ -570,7 +601,7 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_3b_logical(i32 %x) {
; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3
; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 0
-; CHECK-NEXT: [[T5:%.*]] = and i1 [[T2]], [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 15
@@ -598,9 +629,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_4(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_4_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_4_logical(
-; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 255
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 8
-; CHECK-NEXT: ret i1 [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 255
%t2 = icmp ne i32 %t1, 0
@@ -627,9 +661,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_5(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_5_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_5_logical(
-; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 8
-; CHECK-NEXT: ret i1 [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 15
%t2 = icmp ne i32 %t1, 0
@@ -656,9 +693,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_6(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_6_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_6_logical(
-; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 12
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 8
-; CHECK-NEXT: ret i1 [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 12
%t2 = icmp ne i32 %t1, 0
@@ -683,7 +723,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_7(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_7_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_7_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 7
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
+; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 8
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 7
%t2 = icmp ne i32 %t1, 0
@@ -708,7 +753,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_7b(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_7b_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_7b_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 6
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
+; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 8
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 6
%t2 = icmp ne i32 %t1, 0
@@ -743,7 +793,7 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_0_logical(i32 %x) {
; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3
; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 1
-; CHECK-NEXT: [[T5:%.*]] = or i1 [[T2]], [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 true, i1 [[T4]]
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 12
@@ -772,9 +822,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_1(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_1_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_1_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 15
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 9
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 12
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 7
+; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 1
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 true, i1 [[T4]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 12
%t2 = icmp eq i32 %t1, 0
@@ -809,7 +862,7 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_1b_logical(i32 %x)
; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3
; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 1
-; CHECK-NEXT: [[T5:%.*]] = or i1 [[T2]], [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 true, i1 [[T4]]
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 14
@@ -836,7 +889,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_2(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_2_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_2_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 3
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 7
+; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 0
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 true, i1 [[T4]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 3
%t2 = icmp eq i32 %t1, 0
@@ -864,9 +922,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_3(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_3_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_3_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 15
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 8
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 7
+; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 0
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 true, i1 [[T4]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 15
%t2 = icmp eq i32 %t1, 0
@@ -901,7 +962,7 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_3b_logical(i32 %x)
; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3
; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 0
-; CHECK-NEXT: [[T5:%.*]] = or i1 [[T2]], [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 true, i1 [[T4]]
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 15
@@ -930,9 +991,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_4(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_4_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_4_logical(
-; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 255
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 8
-; CHECK-NEXT: ret i1 [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 true, i1 [[T4]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 255
%t2 = icmp eq i32 %t1, 0
@@ -960,9 +1024,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_5(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_5_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_5_logical(
-; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 8
-; CHECK-NEXT: ret i1 [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 true, i1 [[T4]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 15
%t2 = icmp eq i32 %t1, 0
@@ -990,9 +1057,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_6(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_6_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_6_logical(
-; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 12
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 8
-; CHECK-NEXT: ret i1 [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 true, i1 [[T4]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 12
%t2 = icmp eq i32 %t1, 0
@@ -1018,7 +1088,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_7(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_7_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_7_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 7
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
+; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 8
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 true, i1 [[T4]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 7
%t2 = icmp eq i32 %t1, 0
@@ -1044,7 +1119,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_7b(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_7b_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_7b_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 6
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
+; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 8
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 true, i1 [[T4]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 6
%t2 = icmp eq i32 %t1, 0
@@ -1079,7 +1159,7 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_0_logical(i32 %x) {
; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3
; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 1
-; CHECK-NEXT: [[T5:%.*]] = and i1 [[T4]], [[T2]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 [[T2]], i1 false
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 12
@@ -1107,9 +1187,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_1(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_1_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_1_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 15
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 9
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 12
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 7
+; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 1
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 [[T2]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 12
%t2 = icmp ne i32 %t1, 0
@@ -1143,7 +1226,7 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_1b_logical(i32 %x)
; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3
; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 1
-; CHECK-NEXT: [[T5:%.*]] = and i1 [[T4]], [[T2]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 [[T2]], i1 false
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 14
@@ -1169,7 +1252,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_2(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_2_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_2_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 3
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 7
+; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 0
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 [[T2]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 3
%t2 = icmp ne i32 %t1, 0
@@ -1196,9 +1284,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_3(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_3_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_3_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 15
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 8
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 7
+; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 0
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 [[T2]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 15
%t2 = icmp ne i32 %t1, 0
@@ -1232,7 +1323,7 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_3b_logical(i32 %x)
; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3
; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 0
-; CHECK-NEXT: [[T5:%.*]] = and i1 [[T4]], [[T2]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 [[T2]], i1 false
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 15
@@ -1260,9 +1351,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_4(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_4_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_4_logical(
-; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 255
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 8
-; CHECK-NEXT: ret i1 [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 [[T2]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 255
%t2 = icmp ne i32 %t1, 0
@@ -1289,9 +1383,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_5(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_5_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_5_logical(
-; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 8
-; CHECK-NEXT: ret i1 [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 [[T2]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 15
%t2 = icmp ne i32 %t1, 0
@@ -1318,9 +1415,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_6(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_6_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_6_logical(
-; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 12
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 8
-; CHECK-NEXT: ret i1 [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 [[T2]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 12
%t2 = icmp ne i32 %t1, 0
@@ -1345,7 +1445,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_7(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_7_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_7_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 7
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
+; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 8
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 [[T2]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 7
%t2 = icmp ne i32 %t1, 0
@@ -1370,7 +1475,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_7b(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_7b_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_7b_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 6
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
+; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 8
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 [[T2]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 6
%t2 = icmp ne i32 %t1, 0
@@ -1405,7 +1515,7 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_0_logical(i
; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3
; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 1
-; CHECK-NEXT: [[T5:%.*]] = or i1 [[T4]], [[T2]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 true, i1 [[T2]]
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 12
@@ -1434,9 +1544,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_1(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_1_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_1_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 15
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 9
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 12
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 7
+; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 1
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 true, i1 [[T2]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 12
%t2 = icmp eq i32 %t1, 0
@@ -1471,7 +1584,7 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_1b_logical(
; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3
; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 1
-; CHECK-NEXT: [[T5:%.*]] = or i1 [[T4]], [[T2]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 true, i1 [[T2]]
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 14
@@ -1498,7 +1611,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_2(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_2_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_2_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 3
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 7
+; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 0
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 true, i1 [[T2]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 3
%t2 = icmp eq i32 %t1, 0
@@ -1526,9 +1644,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_3(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_3_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_3_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 15
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 8
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 7
+; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 0
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 true, i1 [[T2]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 15
%t2 = icmp eq i32 %t1, 0
@@ -1563,7 +1684,7 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_3b_logical(
; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3
; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 0
-; CHECK-NEXT: [[T5:%.*]] = or i1 [[T4]], [[T2]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 true, i1 [[T2]]
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 15
@@ -1592,9 +1713,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_4(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_4_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_4_logical(
-; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 255
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 8
-; CHECK-NEXT: ret i1 [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 true, i1 [[T2]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 255
%t2 = icmp eq i32 %t1, 0
@@ -1622,9 +1746,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_5(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_5_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_5_logical(
-; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 8
-; CHECK-NEXT: ret i1 [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 true, i1 [[T2]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 15
%t2 = icmp eq i32 %t1, 0
@@ -1652,9 +1779,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_6(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_6_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_6_logical(
-; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 12
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 8
-; CHECK-NEXT: ret i1 [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 true, i1 [[T2]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 12
%t2 = icmp eq i32 %t1, 0
@@ -1680,7 +1810,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_7(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_7_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_7_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 7
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
+; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 8
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 true, i1 [[T2]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 7
%t2 = icmp eq i32 %t1, 0
@@ -1706,7 +1841,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_7b(i32 %x)
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_7b_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_7b_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 6
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
+; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 8
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 true, i1 [[T2]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 6
%t2 = icmp eq i32 %t1, 0
diff --git llvm/test/Transforms/InstCombine/icmp.ll llvm/test/Transforms/InstCombine/icmp.ll
index b48466e678d8..04d4f2f00b15 100644
--- llvm/test/Transforms/InstCombine/icmp.ll
+++ llvm/test/Transforms/InstCombine/icmp.ll
@@ -972,9 +972,12 @@ define i1 @test52(i32 %x1) {
define i1 @test52_logical(i32 %x1) {
; CHECK-LABEL: @test52_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X1:%.*]], 16711935
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 4980863
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[CONV:%.*]] = and i32 [[X1:%.*]], 255
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[CONV]], 127
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X1]], 16711680
+; CHECK-NEXT: [[CMP15:%.*]] = icmp eq i32 [[TMP1]], 4980736
+; CHECK-NEXT: [[A:%.*]] = select i1 [[CMP]], i1 [[CMP15]], i1 false
+; CHECK-NEXT: ret i1 [[A]]
;
%conv = and i32 %x1, 255
%cmp = icmp eq i32 %conv, 127
@@ -1004,9 +1007,12 @@ define i1 @test52b(i128 %x1) {
define i1 @test52b_logical(i128 %x1) {
; CHECK-LABEL: @test52b_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i128 [[X1:%.*]], 16711935
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i128 [[TMP1]], 4980863
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[CONV:%.*]] = and i128 [[X1:%.*]], 255
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i128 [[CONV]], 127
+; CHECK-NEXT: [[TMP1:%.*]] = and i128 [[X1]], 16711680
+; CHECK-NEXT: [[CMP15:%.*]] = icmp eq i128 [[TMP1]], 4980736
+; CHECK-NEXT: [[A:%.*]] = select i1 [[CMP]], i1 [[CMP15]], i1 false
+; CHECK-NEXT: ret i1 [[A]]
;
%conv = and i128 %x1, 255
%cmp = icmp eq i128 %conv, 127
@@ -1879,7 +1885,7 @@ define i1 @icmp_and_shr_multiuse_logical(i32 %X) {
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 224
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[X]], 496
; CHECK-NEXT: [[TOBOOL2:%.*]] = icmp ne i32 [[TMP2]], 432
-; CHECK-NEXT: [[AND3:%.*]] = and i1 [[TOBOOL]], [[TOBOOL2]]
+; CHECK-NEXT: [[AND3:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL2]], i1 false
; CHECK-NEXT: ret i1 [[AND3]]
;
%shr = lshr i32 %X, 4
@@ -1916,7 +1922,7 @@ define i1 @icmp_and_ashr_multiuse_logical(i32 %X) {
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 224
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[X]], 496
; CHECK-NEXT: [[TOBOOL2:%.*]] = icmp ne i32 [[TMP2]], 432
-; CHECK-NEXT: [[AND3:%.*]] = and i1 [[TOBOOL]], [[TOBOOL2]]
+; CHECK-NEXT: [[AND3:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL2]], i1 false
; CHECK-NEXT: ret i1 [[AND3]]
;
%shr = ashr i32 %X, 4
@@ -2232,9 +2238,10 @@ define i1 @or_icmp_eq_B_0_icmp_ult_A_B(i64 %a, i64 %b) {
define i1 @or_icmp_eq_B_0_icmp_ult_A_B_logical(i64 %a, i64 %b) {
; CHECK-LABEL: @or_icmp_eq_B_0_icmp_ult_A_B_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[B:%.*]], -1
-; CHECK-NEXT: [[TMP2:%.*]] = icmp uge i64 [[TMP1]], [[A:%.*]]
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[B:%.*]], 0
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i64 [[A:%.*]], [[B]]
+; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP1]], i1 true, i1 [[TMP2]]
+; CHECK-NEXT: ret i1 [[TMP3]]
;
%1 = icmp eq i64 %b, 0
%2 = icmp ult i64 %a, %b
@@ -2280,9 +2287,10 @@ define i1 @or_icmp_ne_A_0_icmp_ne_B_0(i64 %a, i64 %b) {
define i1 @or_icmp_ne_A_0_icmp_ne_B_0_logical(i64 %a, i64 %b) {
; CHECK-LABEL: @or_icmp_ne_A_0_icmp_ne_B_0_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = or i64 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i64 [[TMP1]], 0
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[A:%.*]], 0
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i64 [[B:%.*]], 0
+; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP1]], i1 true, i1 [[TMP2]]
+; CHECK-NEXT: ret i1 [[TMP3]]
;
%1 = icmp ne i64 %a, 0
%2 = icmp ne i64 %b, 0
diff --git llvm/test/Transforms/InstCombine/ispow2.ll llvm/test/Transforms/InstCombine/ispow2.ll
index c54c6271ec07..170f5f25827c 100644
--- llvm/test/Transforms/InstCombine/ispow2.ll
+++ llvm/test/Transforms/InstCombine/ispow2.ll
@@ -194,8 +194,10 @@ define i1 @is_pow2_ctpop(i32 %x) {
define i1 @is_pow2_ctpop_logical(i32 %x) {
; CHECK-LABEL: @is_pow2_ctpop_logical(
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), [[RNG0]]
-; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[T0]], 1
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[T0]], 2
+; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne i32 [[X]], 0
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOTZERO]], i1 [[CMP]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
%cmp = icmp ult i32 %t0, 2
@@ -233,8 +235,8 @@ define i1 @is_pow2_ctpop_extra_uses_logical(i32 %x) {
; CHECK-NEXT: call void @use_i1(i1 [[CMP]])
; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: call void @use_i1(i1 [[NOTZERO]])
-; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[T0]], 1
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOTZERO]], i1 [[CMP]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
%cmp = icmp ult i32 %t0, 2
@@ -282,7 +284,7 @@ define i1 @is_pow2_ctpop_wrong_cmp_op1_logical(i32 %x) {
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), [[RNG0]]
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[T0]], 3
; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne i32 [[X]], 0
-; CHECK-NEXT: [[R:%.*]] = and i1 [[NOTZERO]], [[CMP]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOTZERO]], i1 [[CMP]], i1 false
; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
@@ -314,7 +316,7 @@ define i1 @is_pow2_ctpop_wrong_cmp_op2_logical(i32 %x) {
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), [[RNG0]]
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[T0]], 2
; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne i32 [[X]], 1
-; CHECK-NEXT: [[R:%.*]] = and i1 [[NOTZERO]], [[CMP]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOTZERO]], i1 [[CMP]], i1 false
; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
@@ -346,7 +348,7 @@ define i1 @is_pow2_ctpop_wrong_pred1_logical(i32 %x) {
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), [[RNG0]]
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[T0]], 2
; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne i32 [[X]], 0
-; CHECK-NEXT: [[R:%.*]] = and i1 [[NOTZERO]], [[CMP]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOTZERO]], i1 [[CMP]], i1 false
; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
@@ -378,7 +380,7 @@ define i1 @is_pow2_ctpop_wrong_pred2_logical(i32 %x) {
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), [[RNG0]]
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[T0]], 2
; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[X]], 0
-; CHECK-NEXT: [[R:%.*]] = and i1 [[CMP2]], [[CMP]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP2]], i1 [[CMP]], i1 false
; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
@@ -406,8 +408,10 @@ define i1 @isnot_pow2_ctpop(i32 %x) {
define i1 @isnot_pow2_ctpop_logical(i32 %x) {
; CHECK-LABEL: @isnot_pow2_ctpop_logical(
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), [[RNG0]]
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i32 [[T0]], 1
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[T0]], 1
+; CHECK-NEXT: [[ISZERO:%.*]] = icmp eq i32 [[X]], 0
+; CHECK-NEXT: [[R:%.*]] = select i1 [[ISZERO]], i1 true, i1 [[CMP]]
+; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
%cmp = icmp ugt i32 %t0, 1
@@ -444,8 +448,8 @@ define i1 @isnot_pow2_ctpop_extra_uses_logical(i32 %x) {
; CHECK-NEXT: call void @use_i1(i1 [[CMP]])
; CHECK-NEXT: [[ISZERO:%.*]] = icmp eq i32 [[X]], 0
; CHECK-NEXT: call void @use_i1(i1 [[ISZERO]])
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i32 [[T0]], 1
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[ISZERO]], i1 true, i1 [[CMP]]
+; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
%cmp = icmp ugt i32 %t0, 1
@@ -493,7 +497,7 @@ define i1 @isnot_pow2_ctpop_wrong_cmp_op1_logical(i32 %x) {
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), [[RNG0]]
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[T0]], 2
; CHECK-NEXT: [[ISZERO:%.*]] = icmp eq i32 [[X]], 0
-; CHECK-NEXT: [[R:%.*]] = or i1 [[ISZERO]], [[CMP]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[ISZERO]], i1 true, i1 [[CMP]]
; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
@@ -525,7 +529,7 @@ define i1 @isnot_pow2_ctpop_wrong_cmp_op2_logical(i32 %x) {
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), [[RNG0]]
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[T0]], 1
; CHECK-NEXT: [[ISZERO:%.*]] = icmp eq i32 [[X]], 1
-; CHECK-NEXT: [[R:%.*]] = or i1 [[ISZERO]], [[CMP]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[ISZERO]], i1 true, i1 [[CMP]]
; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
@@ -557,7 +561,7 @@ define i1 @isnot_pow2_ctpop_wrong_pred1_logical(i32 %x) {
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), [[RNG0]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[T0]], 1
; CHECK-NEXT: [[ISZERO:%.*]] = icmp eq i32 [[X]], 0
-; CHECK-NEXT: [[R:%.*]] = or i1 [[ISZERO]], [[CMP]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[ISZERO]], i1 true, i1 [[CMP]]
; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
@@ -589,7 +593,7 @@ define i1 @isnot_pow2_ctpop_wrong_pred2_logical(i32 %x) {
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), [[RNG0]]
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[T0]], 1
; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[X]], 0
-; CHECK-NEXT: [[R:%.*]] = or i1 [[CMP2]], [[CMP]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP2]], i1 true, i1 [[CMP]]
; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
@@ -616,8 +620,10 @@ define i1 @is_pow2_negate_op(i32 %x) {
define i1 @is_pow2_negate_op_logical(i32 %x) {
; CHECK-LABEL: @is_pow2_negate_op_logical(
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), [[RNG0]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 1
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[TMP1]], 2
+; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne i32 [[X]], 0
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOTZERO]], i1 [[CMP]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%neg = sub i32 0, %x
%and = and i32 %neg, %x
@@ -658,8 +664,10 @@ define i1 @is_pow2_decrement_op(i8 %x) {
define i1 @is_pow2_decrement_op_logical(i8 %x) {
; CHECK-LABEL: @is_pow2_decrement_op_logical(
; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.ctpop.i8(i8 [[X:%.*]]), [[RNG1]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[TMP1]], 1
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[TMP1]], 2
+; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne i8 [[X]], 0
+; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP]], i1 [[NOTZERO]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%dec = add i8 %x, -1
%and = and i8 %dec, %x
@@ -700,8 +708,10 @@ define i1 @isnot_pow2_negate_op(i32 %x) {
define i1 @isnot_pow2_negate_op_logical(i32 %x) {
; CHECK-LABEL: @isnot_pow2_negate_op_logical(
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), [[RNG0]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 1
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP1]], 1
+; CHECK-NEXT: [[ISZERO:%.*]] = icmp eq i32 [[X]], 0
+; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP]], i1 true, i1 [[ISZERO]]
+; CHECK-NEXT: ret i1 [[R]]
;
%neg = sub i32 0, %x
%and = and i32 %neg, %x
@@ -742,8 +752,10 @@ define i1 @isnot_pow2_decrement_op(i8 %x) {
define i1 @isnot_pow2_decrement_op_logical(i8 %x) {
; CHECK-LABEL: @isnot_pow2_decrement_op_logical(
; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.ctpop.i8(i8 [[X:%.*]]), [[RNG1]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i8 [[TMP1]], 1
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i8 [[TMP1]], 1
+; CHECK-NEXT: [[ISZERO:%.*]] = icmp eq i8 [[X]], 0
+; CHECK-NEXT: [[R:%.*]] = select i1 [[ISZERO]], i1 true, i1 [[CMP]]
+; CHECK-NEXT: ret i1 [[R]]
;
%dec = add i8 %x, -1
%and = and i8 %dec, %x
diff --git llvm/test/Transforms/InstCombine/logical-select-inseltpoison.ll llvm/test/Transforms/InstCombine/logical-select-inseltpoison.ll
index f67cb024c2e3..79a047a17077 100644
--- llvm/test/Transforms/InstCombine/logical-select-inseltpoison.ll
+++ llvm/test/Transforms/InstCombine/logical-select-inseltpoison.ll
@@ -378,8 +378,11 @@ define i1 @bools(i1 %a, i1 %b, i1 %c) {
define i1 @bools_logical(i1 %a, i1 %b, i1 %c) {
; CHECK-LABEL: @bools_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[C:%.*]], i1 [[B:%.*]], i1 [[A:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[NOT:%.*]] = xor i1 [[C:%.*]], true
+; CHECK-NEXT: [[AND1:%.*]] = select i1 [[NOT]], i1 [[A:%.*]], i1 false
+; CHECK-NEXT: [[AND2:%.*]] = select i1 [[C]], i1 [[B:%.*]], i1 false
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[AND1]], i1 true, i1 [[AND2]]
+; CHECK-NEXT: ret i1 [[OR]]
;
%not = xor i1 %c, -1
%and1 = select i1 %not, i1 %a, i1 false
@@ -409,9 +412,10 @@ define i1 @bools_multi_uses1(i1 %a, i1 %b, i1 %c) {
define i1 @bools_multi_uses1_logical(i1 %a, i1 %b, i1 %c) {
; CHECK-LABEL: @bools_multi_uses1_logical(
; CHECK-NEXT: [[NOT:%.*]] = xor i1 [[C:%.*]], true
-; CHECK-NEXT: [[AND1:%.*]] = and i1 [[NOT]], [[A:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[C]], i1 [[B:%.*]], i1 [[A]]
-; CHECK-NEXT: [[XOR:%.*]] = xor i1 [[TMP1]], [[AND1]]
+; CHECK-NEXT: [[AND1:%.*]] = select i1 [[NOT]], i1 [[A:%.*]], i1 false
+; CHECK-NEXT: [[AND2:%.*]] = select i1 [[C]], i1 [[B:%.*]], i1 false
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[AND1]], i1 true, i1 [[AND2]]
+; CHECK-NEXT: [[XOR:%.*]] = xor i1 [[OR]], [[AND1]]
; CHECK-NEXT: ret i1 [[XOR]]
;
%not = xor i1 %c, -1
@@ -441,8 +445,13 @@ define i1 @bools_multi_uses2(i1 %a, i1 %b, i1 %c) {
define i1 @bools_multi_uses2_logical(i1 %a, i1 %b, i1 %c) {
; CHECK-LABEL: @bools_multi_uses2_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[C:%.*]], i1 [[B:%.*]], i1 [[A:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[NOT:%.*]] = xor i1 [[C:%.*]], true
+; CHECK-NEXT: [[AND1:%.*]] = select i1 [[NOT]], i1 [[A:%.*]], i1 false
+; CHECK-NEXT: [[AND2:%.*]] = select i1 [[C]], i1 [[B:%.*]], i1 false
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[AND1]], i1 true, i1 [[AND2]]
+; CHECK-NEXT: [[ADD:%.*]] = xor i1 [[AND1]], [[AND2]]
+; CHECK-NEXT: [[AND3:%.*]] = select i1 [[OR]], i1 [[ADD]], i1 false
+; CHECK-NEXT: ret i1 [[AND3]]
;
%not = xor i1 %c, -1
%and1 = select i1 %not, i1 %a, i1 false
diff --git llvm/test/Transforms/InstCombine/logical-select.ll llvm/test/Transforms/InstCombine/logical-select.ll
index 5c16fc446cdd..e887f1642fac 100644
--- llvm/test/Transforms/InstCombine/logical-select.ll
+++ llvm/test/Transforms/InstCombine/logical-select.ll
@@ -378,8 +378,11 @@ define i1 @bools(i1 %a, i1 %b, i1 %c) {
define i1 @bools_logical(i1 %a, i1 %b, i1 %c) {
; CHECK-LABEL: @bools_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[C:%.*]], i1 [[B:%.*]], i1 [[A:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[NOT:%.*]] = xor i1 [[C:%.*]], true
+; CHECK-NEXT: [[AND1:%.*]] = select i1 [[NOT]], i1 [[A:%.*]], i1 false
+; CHECK-NEXT: [[AND2:%.*]] = select i1 [[C]], i1 [[B:%.*]], i1 false
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[AND1]], i1 true, i1 [[AND2]]
+; CHECK-NEXT: ret i1 [[OR]]
;
%not = xor i1 %c, -1
%and1 = select i1 %not, i1 %a, i1 false
@@ -409,9 +412,10 @@ define i1 @bools_multi_uses1(i1 %a, i1 %b, i1 %c) {
define i1 @bools_multi_uses1_logical(i1 %a, i1 %b, i1 %c) {
; CHECK-LABEL: @bools_multi_uses1_logical(
; CHECK-NEXT: [[NOT:%.*]] = xor i1 [[C:%.*]], true
-; CHECK-NEXT: [[AND1:%.*]] = and i1 [[NOT]], [[A:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[C]], i1 [[B:%.*]], i1 [[A]]
-; CHECK-NEXT: [[XOR:%.*]] = xor i1 [[TMP1]], [[AND1]]
+; CHECK-NEXT: [[AND1:%.*]] = select i1 [[NOT]], i1 [[A:%.*]], i1 false
+; CHECK-NEXT: [[AND2:%.*]] = select i1 [[C]], i1 [[B:%.*]], i1 false
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[AND1]], i1 true, i1 [[AND2]]
+; CHECK-NEXT: [[XOR:%.*]] = xor i1 [[OR]], [[AND1]]
; CHECK-NEXT: ret i1 [[XOR]]
;
%not = xor i1 %c, -1
@@ -441,8 +445,13 @@ define i1 @bools_multi_uses2(i1 %a, i1 %b, i1 %c) {
define i1 @bools_multi_uses2_logical(i1 %a, i1 %b, i1 %c) {
; CHECK-LABEL: @bools_multi_uses2_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[C:%.*]], i1 [[B:%.*]], i1 [[A:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[NOT:%.*]] = xor i1 [[C:%.*]], true
+; CHECK-NEXT: [[AND1:%.*]] = select i1 [[NOT]], i1 [[A:%.*]], i1 false
+; CHECK-NEXT: [[AND2:%.*]] = select i1 [[C]], i1 [[B:%.*]], i1 false
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[AND1]], i1 true, i1 [[AND2]]
+; CHECK-NEXT: [[ADD:%.*]] = xor i1 [[AND1]], [[AND2]]
+; CHECK-NEXT: [[AND3:%.*]] = select i1 [[OR]], i1 [[ADD]], i1 false
+; CHECK-NEXT: ret i1 [[AND3]]
;
%not = xor i1 %c, -1
%and1 = select i1 %not, i1 %a, i1 false
diff --git llvm/test/Transforms/InstCombine/merge-icmp.ll llvm/test/Transforms/InstCombine/merge-icmp.ll
index e9f9bb31a0e4..fd98b45f8560 100644
--- llvm/test/Transforms/InstCombine/merge-icmp.ll
+++ llvm/test/Transforms/InstCombine/merge-icmp.ll
@@ -19,8 +19,12 @@ define i1 @test1(i16* %x) {