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select.diff
diff --git llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
index 5a43b8b20db9..e732073df69b 100644
--- llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
+++ llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
@@ -49,7 +49,7 @@ using namespace PatternMatch;
/// FIXME: Enabled by default until the pattern is supported well.
static cl::opt<bool> EnableUnsafeSelectTransform(
- "instcombine-unsafe-select-transform", cl::init(true),
+ "instcombine-unsafe-select-transform", cl::init(false),
cl::desc("Enable poison-unsafe select to and/or transform"));
static Value *createMinMax(InstCombiner::BuilderTy &Builder,
diff --git llvm/test/Transforms/InstCombine/2007-03-13-CompareMerge.ll llvm/test/Transforms/InstCombine/2007-03-13-CompareMerge.ll
index 7cedb1c5ced2..a1b29412a3d3 100644
--- llvm/test/Transforms/InstCombine/2007-03-13-CompareMerge.ll
+++ llvm/test/Transforms/InstCombine/2007-03-13-CompareMerge.ll
@@ -16,8 +16,10 @@ define i1 @test(i32 %c.3.i, i32 %d.292.2.i) {
define i1 @test_logical(i32 %c.3.i, i32 %d.292.2.i) {
; CHECK-LABEL: @test_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sle i32 [[C_3_I:%.*]], [[D_292_2_I:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[TMP266_I:%.*]] = icmp slt i32 [[C_3_I:%.*]], [[D_292_2_I:%.*]]
+; CHECK-NEXT: [[TMP276_I:%.*]] = icmp eq i32 [[C_3_I]], [[D_292_2_I]]
+; CHECK-NEXT: [[SEL_TMP80:%.*]] = select i1 [[TMP266_I]], i1 true, i1 [[TMP276_I]]
+; CHECK-NEXT: ret i1 [[SEL_TMP80]]
;
%tmp266.i = icmp slt i32 %c.3.i, %d.292.2.i
%tmp276.i = icmp eq i32 %c.3.i, %d.292.2.i
diff --git llvm/test/Transforms/InstCombine/2008-02-28-OrFCmpCrash.ll llvm/test/Transforms/InstCombine/2008-02-28-OrFCmpCrash.ll
index 50657d744da1..cb0f5d82c088 100644
--- llvm/test/Transforms/InstCombine/2008-02-28-OrFCmpCrash.ll
+++ llvm/test/Transforms/InstCombine/2008-02-28-OrFCmpCrash.ll
@@ -33,7 +33,7 @@ define float @test_logical(float %x, x86_fp80 %y) nounwind readonly {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP67:%.*]] = fcmp uno x86_fp80 [[Y:%.*]], 0xK00000000000000000000
; CHECK-NEXT: [[TMP71:%.*]] = fcmp uno float [[X:%.*]], 0.000000e+00
-; CHECK-NEXT: [[BOTHCOND:%.*]] = or i1 [[TMP67]], [[TMP71]]
+; CHECK-NEXT: [[BOTHCOND:%.*]] = select i1 [[TMP67]], i1 true, i1 [[TMP71]]
; CHECK-NEXT: br i1 [[BOTHCOND]], label [[BB74:%.*]], label [[BB80:%.*]]
; CHECK: bb74:
; CHECK-NEXT: ret float 0.000000e+00
diff --git llvm/test/Transforms/InstCombine/2008-08-05-And.ll llvm/test/Transforms/InstCombine/2008-08-05-And.ll
index bec055a2ee7c..65b2ca7029d6 100644
--- llvm/test/Transforms/InstCombine/2008-08-05-And.ll
+++ llvm/test/Transforms/InstCombine/2008-08-05-And.ll
@@ -49,7 +49,7 @@ define void @f_logical(i8* %x) nounwind {
; CHECK-NEXT: [[C1:%.*]] = icmp ugt i8 [[S1]], 2
; CHECK-NEXT: [[S2:%.*]] = add i8 [[L1]], -10
; CHECK-NEXT: [[C2:%.*]] = icmp ugt i8 [[S2]], 2
-; CHECK-NEXT: [[A1:%.*]] = and i1 [[C1]], [[C2]]
+; CHECK-NEXT: [[A1:%.*]] = select i1 [[C1]], i1 [[C2]], i1 false
; CHECK-NEXT: br i1 [[A1]], label [[INCOMPATIBLE:%.*]], label [[OKAY:%.*]]
; CHECK: okay:
; CHECK-NEXT: ret void
diff --git llvm/test/Transforms/InstCombine/2012-02-28-ICmp.ll llvm/test/Transforms/InstCombine/2012-02-28-ICmp.ll
index 85792304c50d..30f8df8e306a 100644
--- llvm/test/Transforms/InstCombine/2012-02-28-ICmp.ll
+++ llvm/test/Transforms/InstCombine/2012-02-28-ICmp.ll
@@ -27,7 +27,7 @@ define i1 @f1_logical(i32 %x) {
; CHECK-NEXT: [[B:%.*]] = icmp ne i8 [[A]], 0
; CHECK-NEXT: [[C:%.*]] = and i32 [[X]], 16711680
; CHECK-NEXT: [[D:%.*]] = icmp ne i32 [[C]], 0
-; CHECK-NEXT: [[E:%.*]] = and i1 [[B]], [[D]]
+; CHECK-NEXT: [[E:%.*]] = select i1 [[B]], i1 [[D]], i1 false
; CHECK-NEXT: ret i1 [[E]]
;
%a = trunc i32 %x to i8
diff --git llvm/test/Transforms/InstCombine/2012-03-10-InstCombine.ll llvm/test/Transforms/InstCombine/2012-03-10-InstCombine.ll
index d180560bfbcc..2574d52c5ce0 100644
--- llvm/test/Transforms/InstCombine/2012-03-10-InstCombine.ll
+++ llvm/test/Transforms/InstCombine/2012-03-10-InstCombine.ll
@@ -60,12 +60,12 @@ define i32 @func_logical(i8* %c, i8* %f) nounwind uwtable readnone noinline ssp
; CHECK: if.then:
; CHECK-NEXT: [[CMP2:%.*]] = icmp ule i8* [[D]], [[F:%.*]]
; CHECK-NEXT: [[NOT_CMP1:%.*]] = icmp uge i8* [[C]], [[F]]
-; CHECK-NEXT: [[DOTCMP2:%.*]] = and i1 [[CMP2]], [[NOT_CMP1]]
+; CHECK-NEXT: [[DOTCMP2:%.*]] = select i1 [[CMP2]], i1 [[NOT_CMP1]], i1 false
; CHECK-NEXT: br label [[RETURN:%.*]]
; CHECK: if.else:
; CHECK-NEXT: [[CMP5:%.*]] = icmp uge i8* [[D]], [[F]]
; CHECK-NEXT: [[NOT_CMP3:%.*]] = icmp ule i8* [[C]], [[F]]
-; CHECK-NEXT: [[DOTCMP5:%.*]] = and i1 [[CMP5]], [[NOT_CMP3]]
+; CHECK-NEXT: [[DOTCMP5:%.*]] = select i1 [[CMP5]], i1 [[NOT_CMP3]], i1 false
; CHECK-NEXT: br label [[RETURN]]
; CHECK: return:
; CHECK-NEXT: [[RETVAL_0_IN:%.*]] = phi i1 [ [[DOTCMP2]], [[IF_THEN]] ], [ [[DOTCMP5]], [[IF_ELSE]] ]
diff --git llvm/test/Transforms/InstCombine/and-fcmp.ll llvm/test/Transforms/InstCombine/and-fcmp.ll
index 18689c969bd0..8c8ec43ee45b 100644
--- llvm/test/Transforms/InstCombine/and-fcmp.ll
+++ llvm/test/Transforms/InstCombine/and-fcmp.ll
@@ -14,8 +14,10 @@ define i1 @PR1738(double %x, double %y) {
define i1 @PR1738_logical(double %x, double %y) {
; CHECK-LABEL: @PR1738_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ord double [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord double [[X:%.*]], 0.000000e+00
+; CHECK-NEXT: [[CMP2:%.*]] = fcmp ord double [[Y:%.*]], 0.000000e+00
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[CMP1]], i1 [[CMP2]], i1 false
+; CHECK-NEXT: ret i1 [[AND]]
;
%cmp1 = fcmp ord double %x, 0.0
%cmp2 = fcmp ord double %y, 0.0
@@ -49,8 +51,10 @@ define i1 @PR41069(i1 %z, float %c, float %d) {
define i1 @PR41069_logical(i1 %z, float %c, float %d) {
; CHECK-LABEL: @PR41069_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ord float [[D:%.*]], [[C:%.*]]
-; CHECK-NEXT: [[R:%.*]] = and i1 [[TMP1]], [[Z:%.*]]
+; CHECK-NEXT: [[ORD1:%.*]] = fcmp arcp ord float [[C:%.*]], 0.000000e+00
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[ORD1]], i1 [[Z:%.*]], i1 false
+; CHECK-NEXT: [[ORD2:%.*]] = fcmp afn ord float [[D:%.*]], 0.000000e+00
+; CHECK-NEXT: [[R:%.*]] = select i1 [[AND]], i1 [[ORD2]], i1 false
; CHECK-NEXT: ret i1 [[R]]
;
%ord1 = fcmp arcp ord float %c, 0.0
@@ -75,8 +79,8 @@ define i1 @PR41069_commute(i1 %z, float %c, float %d) {
define i1 @PR41069_commute_logical(i1 %z, float %c, float %d) {
; CHECK-LABEL: @PR41069_commute_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ninf ord float [[D:%.*]], [[C:%.*]]
-; CHECK-NEXT: [[R:%.*]] = and i1 [[TMP1]], [[Z:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = fcmp ord float [[D:%.*]], [[C:%.*]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP1]], i1 [[Z:%.*]], i1 false
; CHECK-NEXT: ret i1 [[R]]
;
%ord1 = fcmp ninf ord float %c, 0.0
@@ -135,7 +139,7 @@ define i1 @PR15737_logical(float %a, double %b) {
; CHECK-LABEL: @PR15737_logical(
; CHECK-NEXT: [[CMP:%.*]] = fcmp ord float [[A:%.*]], 0.000000e+00
; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord double [[B:%.*]], 0.000000e+00
-; CHECK-NEXT: [[AND:%.*]] = and i1 [[CMP]], [[CMP1]]
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
; CHECK-NEXT: ret i1 [[AND]]
;
%cmp = fcmp ord float %a, 0.000000e+00
@@ -170,8 +174,10 @@ define i1 @fcmp_ord_nonzero(float %x, float %y) {
define i1 @fcmp_ord_nonzero_logical(float %x, float %y) {
; CHECK-LABEL: @fcmp_ord_nonzero_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ord float [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord float [[X:%.*]], 0.000000e+00
+; CHECK-NEXT: [[CMP2:%.*]] = fcmp ord float [[Y:%.*]], 0.000000e+00
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[CMP1]], i1 [[CMP2]], i1 false
+; CHECK-NEXT: ret i1 [[AND]]
;
%cmp1 = fcmp ord float %x, 1.0
%cmp2 = fcmp ord float %y, 2.0
@@ -243,8 +249,10 @@ define i1 @auto_gen_2(double %a, double %b) {
define i1 @auto_gen_2_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_2_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp oeq double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -284,7 +292,10 @@ define i1 @auto_gen_4(double %a, double %b) {
define i1 @auto_gen_4_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_4_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ogt double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -305,8 +316,10 @@ define i1 @auto_gen_5(double %a, double %b) {
define i1 @auto_gen_5_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_5_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ogt double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -347,8 +360,10 @@ define i1 @auto_gen_7(double %a, double %b) {
define i1 @auto_gen_7_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_7_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp oge double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -369,8 +384,10 @@ define i1 @auto_gen_8(double %a, double %b) {
define i1 @auto_gen_8_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_8_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp oge double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -391,8 +408,10 @@ define i1 @auto_gen_9(double %a, double %b) {
define i1 @auto_gen_9_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_9_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp oge double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -432,7 +451,10 @@ define i1 @auto_gen_11(double %a, double %b) {
define i1 @auto_gen_11_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_11_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp olt double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -452,7 +474,10 @@ define i1 @auto_gen_12(double %a, double %b) {
define i1 @auto_gen_12_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_12_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp olt double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -472,7 +497,10 @@ define i1 @auto_gen_13(double %a, double %b) {
define i1 @auto_gen_13_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_13_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp olt double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -493,8 +521,10 @@ define i1 @auto_gen_14(double %a, double %b) {
define i1 @auto_gen_14_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_14_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp olt double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -535,8 +565,10 @@ define i1 @auto_gen_16(double %a, double %b) {
define i1 @auto_gen_16_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_16_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ole double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -556,7 +588,10 @@ define i1 @auto_gen_17(double %a, double %b) {
define i1 @auto_gen_17_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_17_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ole double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -577,8 +612,10 @@ define i1 @auto_gen_18(double %a, double %b) {
define i1 @auto_gen_18_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_18_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ole double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -599,8 +636,10 @@ define i1 @auto_gen_19(double %a, double %b) {
define i1 @auto_gen_19_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_19_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ole double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -621,8 +660,10 @@ define i1 @auto_gen_20(double %a, double %b) {
define i1 @auto_gen_20_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_20_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ole double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ole double %a, %b
%cmp1 = fcmp ole double %a, %b
@@ -662,7 +703,10 @@ define i1 @auto_gen_22(double %a, double %b) {
define i1 @auto_gen_22_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_22_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp one double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -683,8 +727,10 @@ define i1 @auto_gen_23(double %a, double %b) {
define i1 @auto_gen_23_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_23_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp one double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -705,8 +751,10 @@ define i1 @auto_gen_24(double %a, double %b) {
define i1 @auto_gen_24_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_24_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp one double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -727,8 +775,10 @@ define i1 @auto_gen_25(double %a, double %b) {
define i1 @auto_gen_25_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_25_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp one double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -749,8 +799,10 @@ define i1 @auto_gen_26(double %a, double %b) {
define i1 @auto_gen_26_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_26_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ole double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp one double %a, %b
%cmp1 = fcmp ole double %a, %b
@@ -771,8 +823,10 @@ define i1 @auto_gen_27(double %a, double %b) {
define i1 @auto_gen_27_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_27_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp one double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp one double %a, %b
%cmp1 = fcmp one double %a, %b
@@ -813,8 +867,10 @@ define i1 @auto_gen_29(double %a, double %b) {
define i1 @auto_gen_29_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_29_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ord double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -835,8 +891,10 @@ define i1 @auto_gen_30(double %a, double %b) {
define i1 @auto_gen_30_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_30_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ord double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -857,8 +915,10 @@ define i1 @auto_gen_31(double %a, double %b) {
define i1 @auto_gen_31_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_31_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ord double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -879,8 +939,10 @@ define i1 @auto_gen_32(double %a, double %b) {
define i1 @auto_gen_32_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_32_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ord double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -901,8 +963,10 @@ define i1 @auto_gen_33(double %a, double %b) {
define i1 @auto_gen_33_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_33_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ole double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ord double %a, %b
%cmp1 = fcmp ole double %a, %b
@@ -923,8 +987,10 @@ define i1 @auto_gen_34(double %a, double %b) {
define i1 @auto_gen_34_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_34_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp one double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ord double %a, %b
%cmp1 = fcmp one double %a, %b
@@ -945,8 +1011,10 @@ define i1 @auto_gen_35(double %a, double %b) {
define i1 @auto_gen_35_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_35_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ord double %a, %b
%cmp1 = fcmp ord double %a, %b
@@ -987,8 +1055,10 @@ define i1 @auto_gen_37(double %a, double %b) {
define i1 @auto_gen_37_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_37_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ueq double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -1008,7 +1078,10 @@ define i1 @auto_gen_38(double %a, double %b) {
define i1 @auto_gen_38_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_38_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ueq double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -1029,8 +1102,10 @@ define i1 @auto_gen_39(double %a, double %b) {
define i1 @auto_gen_39_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_39_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ueq double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -1050,7 +1125,10 @@ define i1 @auto_gen_40(double %a, double %b) {
define i1 @auto_gen_40_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_40_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ueq double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -1071,8 +1149,10 @@ define i1 @auto_gen_41(double %a, double %b) {
define i1 @auto_gen_41_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_41_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ole double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ueq double %a, %b
%cmp1 = fcmp ole double %a, %b
@@ -1092,7 +1172,10 @@ define i1 @auto_gen_42(double %a, double %b) {
define i1 @auto_gen_42_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_42_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp one double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ueq double %a, %b
%cmp1 = fcmp one double %a, %b
@@ -1113,8 +1196,10 @@ define i1 @auto_gen_43(double %a, double %b) {
define i1 @auto_gen_43_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_43_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ueq double %a, %b
%cmp1 = fcmp ord double %a, %b
@@ -1135,8 +1220,10 @@ define i1 @auto_gen_44(double %a, double %b) {
define i1 @auto_gen_44_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_44_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ueq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ueq double %a, %b
%cmp1 = fcmp ueq double %a, %b
@@ -1176,7 +1263,10 @@ define i1 @auto_gen_46(double %a, double %b) {
define i1 @auto_gen_46_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_46_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ugt double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -1197,8 +1287,10 @@ define i1 @auto_gen_47(double %a, double %b) {
define i1 @auto_gen_47_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_47_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ugt double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -1219,8 +1311,10 @@ define i1 @auto_gen_48(double %a, double %b) {
define i1 @auto_gen_48_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_48_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ugt double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -1240,7 +1334,10 @@ define i1 @auto_gen_49(double %a, double %b) {
define i1 @auto_gen_49_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_49_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ugt double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -1260,7 +1357,10 @@ define i1 @auto_gen_50(double %a, double %b) {
define i1 @auto_gen_50_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_50_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ole double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ugt double %a, %b
%cmp1 = fcmp ole double %a, %b
@@ -1281,8 +1381,10 @@ define i1 @auto_gen_51(double %a, double %b) {
define i1 @auto_gen_51_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_51_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp one double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ugt double %a, %b
%cmp1 = fcmp one double %a, %b
@@ -1303,8 +1405,10 @@ define i1 @auto_gen_52(double %a, double %b) {
define i1 @auto_gen_52_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_52_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ugt double %a, %b
%cmp1 = fcmp ord double %a, %b
@@ -1325,8 +1429,10 @@ define i1 @auto_gen_53(double %a, double %b) {
define i1 @auto_gen_53_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_53_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ueq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ugt double %a, %b
%cmp1 = fcmp ueq double %a, %b
@@ -1347,8 +1453,10 @@ define i1 @auto_gen_54(double %a, double %b) {
define i1 @auto_gen_54_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_54_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ugt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ugt double %a, %b
%cmp1 = fcmp ugt double %a, %b
@@ -1389,8 +1497,10 @@ define i1 @auto_gen_56(double %a, double %b) {
define i1 @auto_gen_56_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_56_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uge double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -1411,8 +1521,10 @@ define i1 @auto_gen_57(double %a, double %b) {
define i1 @auto_gen_57_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_57_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uge double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -1433,8 +1545,10 @@ define i1 @auto_gen_58(double %a, double %b) {
define i1 @auto_gen_58_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_58_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uge double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -1454,7 +1568,10 @@ define i1 @auto_gen_59(double %a, double %b) {
define i1 @auto_gen_59_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_59_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uge double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -1475,8 +1592,10 @@ define i1 @auto_gen_60(double %a, double %b) {
define i1 @auto_gen_60_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_60_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ole double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uge double %a, %b
%cmp1 = fcmp ole double %a, %b
@@ -1497,8 +1616,10 @@ define i1 @auto_gen_61(double %a, double %b) {
define i1 @auto_gen_61_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_61_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp one double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uge double %a, %b
%cmp1 = fcmp one double %a, %b
@@ -1519,8 +1640,10 @@ define i1 @auto_gen_62(double %a, double %b) {
define i1 @auto_gen_62_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_62_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uge double %a, %b
%cmp1 = fcmp ord double %a, %b
@@ -1541,8 +1664,10 @@ define i1 @auto_gen_63(double %a, double %b) {
define i1 @auto_gen_63_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_63_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ueq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uge double %a, %b
%cmp1 = fcmp ueq double %a, %b
@@ -1563,8 +1688,10 @@ define i1 @auto_gen_64(double %a, double %b) {
define i1 @auto_gen_64_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_64_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ugt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uge double %a, %b
%cmp1 = fcmp ugt double %a, %b
@@ -1585,8 +1712,10 @@ define i1 @auto_gen_65(double %a, double %b) {
define i1 @auto_gen_65_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_65_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp uge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uge double %a, %b
%cmp1 = fcmp uge double %a, %b
@@ -1626,7 +1755,10 @@ define i1 @auto_gen_67(double %a, double %b) {
define i1 @auto_gen_67_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_67_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -1646,7 +1778,10 @@ define i1 @auto_gen_68(double %a, double %b) {
define i1 @auto_gen_68_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_68_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -1666,7 +1801,10 @@ define i1 @auto_gen_69(double %a, double %b) {
define i1 @auto_gen_69_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_69_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -1687,8 +1825,10 @@ define i1 @auto_gen_70(double %a, double %b) {
define i1 @auto_gen_70_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_70_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -1709,8 +1849,10 @@ define i1 @auto_gen_71(double %a, double %b) {
define i1 @auto_gen_71_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_71_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ole double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp ole double %a, %b
@@ -1731,8 +1873,10 @@ define i1 @auto_gen_72(double %a, double %b) {
define i1 @auto_gen_72_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_72_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp one double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp one double %a, %b
@@ -1753,8 +1897,10 @@ define i1 @auto_gen_73(double %a, double %b) {
define i1 @auto_gen_73_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_73_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp ord double %a, %b
@@ -1775,8 +1921,10 @@ define i1 @auto_gen_74(double %a, double %b) {
define i1 @auto_gen_74_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_74_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ueq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp ueq double %a, %b
@@ -1797,8 +1945,10 @@ define i1 @auto_gen_75(double %a, double %b) {
define i1 @auto_gen_75_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_75_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ugt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp ugt double %a, %b
@@ -1819,8 +1969,10 @@ define i1 @auto_gen_76(double %a, double %b) {
define i1 @auto_gen_76_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_76_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp uge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp uge double %a, %b
@@ -1841,8 +1993,10 @@ define i1 @auto_gen_77(double %a, double %b) {
define i1 @auto_gen_77_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_77_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ult double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp ult double %a, %b
@@ -1883,8 +2037,10 @@ define i1 @auto_gen_79(double %a, double %b) {
define i1 @auto_gen_79_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_79_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -1904,7 +2060,10 @@ define i1 @auto_gen_80(double %a, double %b) {
define i1 @auto_gen_80_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_80_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -1925,8 +2084,10 @@ define i1 @auto_gen_81(double %a, double %b) {
define i1 @auto_gen_81_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_81_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -1947,8 +2108,10 @@ define i1 @auto_gen_82(double %a, double %b) {
define i1 @auto_gen_82_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_82_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -1969,8 +2132,10 @@ define i1 @auto_gen_83(double %a, double %b) {
define i1 @auto_gen_83_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_83_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ole double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp ole double %a, %b
@@ -1991,8 +2156,10 @@ define i1 @auto_gen_84(double %a, double %b) {
define i1 @auto_gen_84_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_84_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp one double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp one double %a, %b
@@ -2013,8 +2180,10 @@ define i1 @auto_gen_85(double %a, double %b) {
define i1 @auto_gen_85_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_85_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp ord double %a, %b
@@ -2035,8 +2204,10 @@ define i1 @auto_gen_86(double %a, double %b) {
define i1 @auto_gen_86_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_86_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ueq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp ueq double %a, %b
@@ -2057,8 +2228,10 @@ define i1 @auto_gen_87(double %a, double %b) {
define i1 @auto_gen_87_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_87_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ugt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp ugt double %a, %b
@@ -2079,8 +2252,10 @@ define i1 @auto_gen_88(double %a, double %b) {
define i1 @auto_gen_88_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_88_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp uge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp uge double %a, %b
@@ -2101,8 +2276,10 @@ define i1 @auto_gen_89(double %a, double %b) {
define i1 @auto_gen_89_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_89_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ult double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp ult double %a, %b
@@ -2123,8 +2300,10 @@ define i1 @auto_gen_90(double %a, double %b) {
define i1 @auto_gen_90_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_90_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ule double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp ule double %a, %b
@@ -2164,7 +2343,10 @@ define i1 @auto_gen_92(double %a, double %b) {
define i1 @auto_gen_92_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_92_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -2185,8 +2367,10 @@ define i1 @auto_gen_93(double %a, double %b) {
define i1 @auto_gen_93_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_93_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -2207,8 +2391,10 @@ define i1 @auto_gen_94(double %a, double %b) {
define i1 @auto_gen_94_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_94_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -2229,8 +2415,10 @@ define i1 @auto_gen_95(double %a, double %b) {
define i1 @auto_gen_95_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_95_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -2251,8 +2439,10 @@ define i1 @auto_gen_96(double %a, double %b) {
define i1 @auto_gen_96_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_96_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ole double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp ole double %a, %b
@@ -2273,8 +2463,10 @@ define i1 @auto_gen_97(double %a, double %b) {
define i1 @auto_gen_97_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_97_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp one double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp one double %a, %b
@@ -2295,8 +2487,10 @@ define i1 @auto_gen_98(double %a, double %b) {
define i1 @auto_gen_98_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_98_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp ord double %a, %b
@@ -2317,8 +2511,10 @@ define i1 @auto_gen_99(double %a, double %b) {
define i1 @auto_gen_99_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_99_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ueq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp ueq double %a, %b
@@ -2339,8 +2535,10 @@ define i1 @auto_gen_100(double %a, double %b) {
define i1 @auto_gen_100_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_100_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ugt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp ugt double %a, %b
@@ -2361,8 +2559,10 @@ define i1 @auto_gen_101(double %a, double %b) {
define i1 @auto_gen_101_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_101_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp uge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp uge double %a, %b
@@ -2383,8 +2583,10 @@ define i1 @auto_gen_102(double %a, double %b) {
define i1 @auto_gen_102_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_102_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ult double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp ult double %a, %b
@@ -2405,8 +2607,10 @@ define i1 @auto_gen_103(double %a, double %b) {
define i1 @auto_gen_103_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_103_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ule double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp ule double %a, %b
@@ -2427,8 +2631,10 @@ define i1 @auto_gen_104(double %a, double %b) {
define i1 @auto_gen_104_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_104_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp une double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp une double %a, %b
@@ -2468,7 +2674,10 @@ define i1 @auto_gen_106(double %a, double %b) {
define i1 @auto_gen_106_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_106_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -2488,7 +2697,10 @@ define i1 @auto_gen_107(double %a, double %b) {
define i1 @auto_gen_107_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_107_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -2508,7 +2720,10 @@ define i1 @auto_gen_108(double %a, double %b) {
define i1 @auto_gen_108_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_108_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -2528,7 +2743,10 @@ define i1 @auto_gen_109(double %a, double %b) {
define i1 @auto_gen_109_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_109_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -2548,7 +2766,10 @@ define i1 @auto_gen_110(double %a, double %b) {
define i1 @auto_gen_110_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_110_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ole double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp ole double %a, %b
@@ -2568,7 +2789,10 @@ define i1 @auto_gen_111(double %a, double %b) {
define i1 @auto_gen_111_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_111_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp one double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp one double %a, %b
@@ -2588,7 +2812,10 @@ define i1 @auto_gen_112(double %a, double %b) {
define i1 @auto_gen_112_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_112_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp ord double %a, %b
@@ -2609,8 +2836,10 @@ define i1 @auto_gen_113(double %a, double %b) {
define i1 @auto_gen_113_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_113_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ueq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp ueq double %a, %b
@@ -2631,8 +2860,10 @@ define i1 @auto_gen_114(double %a, double %b) {
define i1 @auto_gen_114_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_114_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ugt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp ugt double %a, %b
@@ -2653,8 +2884,10 @@ define i1 @auto_gen_115(double %a, double %b) {
define i1 @auto_gen_115_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_115_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp uge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp uge double %a, %b
@@ -2675,8 +2908,10 @@ define i1 @auto_gen_116(double %a, double %b) {
define i1 @auto_gen_116_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_116_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ult double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp ult double %a, %b
@@ -2697,8 +2932,10 @@ define i1 @auto_gen_117(double %a, double %b) {
define i1 @auto_gen_117_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_117_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ule double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp ule double %a, %b
@@ -2719,8 +2956,10 @@ define i1 @auto_gen_118(double %a, double %b) {
define i1 @auto_gen_118_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_118_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp une double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp une double %a, %b
@@ -2741,8 +2980,10 @@ define i1 @auto_gen_119(double %a, double %b) {
define i1 @auto_gen_119_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_119_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp uno double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp uno double %a, %b
diff --git llvm/test/Transforms/InstCombine/and-or-icmp-nullptr.ll llvm/test/Transforms/InstCombine/and-or-icmp-nullptr.ll
index b8a43c57bf58..d9623346d5a8 100644
--- llvm/test/Transforms/InstCombine/and-or-icmp-nullptr.ll
+++ llvm/test/Transforms/InstCombine/and-or-icmp-nullptr.ll
@@ -704,9 +704,9 @@ define i1 @slt_and_min(i8* %a, i8* %b) {
define i1 @slt_and_min_logical(i8* %a, i8* %b) {
; CHECK-LABEL: @slt_and_min_logical(
; CHECK-NEXT: [[CMPEQ:%.*]] = icmp eq i8* [[A:%.*]], null
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i8* [[B:%.*]], null
-; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[CMPEQ]], [[TMP1]]
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8* [[A]], [[B:%.*]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[CMPEQ]], i1 [[CMP]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%cmpeq = icmp eq i8* %a, null
%cmp = icmp slt i8* %a, %b
diff --git llvm/test/Transforms/InstCombine/and-or-icmps.ll llvm/test/Transforms/InstCombine/and-or-icmps.ll
index 0e8f0ca7bf96..4981020931ee 100644
--- llvm/test/Transforms/InstCombine/and-or-icmps.ll
+++ llvm/test/Transforms/InstCombine/and-or-icmps.ll
@@ -61,9 +61,10 @@ define i1 @PR2330(i32 %a, i32 %b) {
define i1 @PR2330_logical(i32 %a, i32 %b) {
; CHECK-LABEL: @PR2330_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[B:%.*]], [[A:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 [[TMP1]], 8
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[A:%.*]], 8
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[B:%.*]], 8
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[CMP2]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: ret i1 [[AND]]
;
%cmp1 = icmp ult i32 %a, 8
%cmp2 = icmp ult i32 %b, 8
@@ -665,9 +666,9 @@ define i1 @substitute_constant_and_eq_eq(i8 %x, i8 %y) {
define i1 @substitute_constant_and_eq_eq_logical(i8 %x, i8 %y) {
; CHECK-LABEL: @substitute_constant_and_eq_eq_logical(
; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 42
-; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[Y:%.*]], 42
-; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[C1]], [[TMP1]]
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[C2:%.*]] = icmp eq i8 [[X]], [[Y:%.*]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[C1]], i1 [[C2]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%c1 = icmp eq i8 %x, 42
%c2 = icmp eq i8 %x, %y
@@ -904,9 +905,9 @@ define i1 @substitute_constant_or_ne_swap_sle(i8 %x, i8 %y) {
define i1 @substitute_constant_or_ne_swap_sle_logical(i8 %x, i8 %y) {
; CHECK-LABEL: @substitute_constant_or_ne_swap_sle_logical(
; CHECK-NEXT: [[C1:%.*]] = icmp ne i8 [[X:%.*]], 42
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i8 [[Y:%.*]], 43
-; CHECK-NEXT: [[TMP2:%.*]] = or i1 [[C1]], [[TMP1]]
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[C2:%.*]] = icmp sle i8 [[Y:%.*]], [[X]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[C1]], i1 true, i1 [[C2]]
+; CHECK-NEXT: ret i1 [[R]]
;
%c1 = icmp ne i8 %x, 42
%c2 = icmp sle i8 %y, %x
@@ -972,7 +973,7 @@ define i1 @substitute_constant_or_eq_swap_ne_logical(i8 %x, i8 %y) {
; CHECK-LABEL: @substitute_constant_or_eq_swap_ne_logical(
; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[X:%.*]], 42
; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[Y:%.*]], [[X]]
-; CHECK-NEXT: [[R:%.*]] = or i1 [[C1]], [[C2]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[C1]], i1 true, i1 [[C2]]
; CHECK-NEXT: ret i1 [[R]]
;
%c1 = icmp eq i8 %x, 42
diff --git llvm/test/Transforms/InstCombine/and.ll llvm/test/Transforms/InstCombine/and.ll
index 669cba88faba..ff7977f6933a 100644
--- llvm/test/Transforms/InstCombine/and.ll
+++ llvm/test/Transforms/InstCombine/and.ll
@@ -162,7 +162,9 @@ define i1 @test12(i32 %A, i32 %B) {
define i1 @test12_logical(i32 %A, i32 %B) {
; CHECK-LABEL: @test12_logical(
; CHECK-NEXT: [[C1:%.*]] = icmp ult i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[C1]]
+; CHECK-NEXT: [[C2:%.*]] = icmp ule i32 [[A]], [[B]]
+; CHECK-NEXT: [[D:%.*]] = select i1 [[C1]], i1 [[C2]], i1 false
+; CHECK-NEXT: ret i1 [[D]]
;
%C1 = icmp ult i32 %A, %B
%C2 = icmp ule i32 %A, %B
@@ -184,7 +186,10 @@ define i1 @test13(i32 %A, i32 %B) {
define i1 @test13_logical(i32 %A, i32 %B) {
; CHECK-LABEL: @test13_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[C1:%.*]] = icmp ult i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[C2:%.*]] = icmp ugt i32 [[A]], [[B]]
+; CHECK-NEXT: [[D:%.*]] = select i1 [[C1]], i1 [[C2]], i1 false
+; CHECK-NEXT: ret i1 [[D]]
;
%C1 = icmp ult i32 %A, %B
%C2 = icmp ugt i32 %A, %B
@@ -843,8 +848,10 @@ define i1 @and_orn_cmp_1(i32 %a, i32 %b, i32 %c) {
define i1 @and_orn_cmp_1_logical(i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: @and_orn_cmp_1_logical(
; CHECK-NEXT: [[X:%.*]] = icmp sgt i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[X_INV:%.*]] = icmp sle i32 [[A]], [[B]]
; CHECK-NEXT: [[Y:%.*]] = icmp ugt i32 [[C:%.*]], 42
-; CHECK-NEXT: [[AND:%.*]] = and i1 [[X]], [[Y]]
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[Y]], i1 true, i1 [[X_INV]]
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[X]], i1 [[OR]], i1 false
; CHECK-NEXT: ret i1 [[AND]]
;
%x = icmp sgt i32 %a, %b
@@ -894,8 +901,10 @@ define i1 @and_orn_cmp_3(i72 %a, i72 %b, i72 %c) {
define i1 @and_orn_cmp_3_logical(i72 %a, i72 %b, i72 %c) {
; CHECK-LABEL: @and_orn_cmp_3_logical(
; CHECK-NEXT: [[X:%.*]] = icmp ugt i72 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[X_INV:%.*]] = icmp ule i72 [[A]], [[B]]
; CHECK-NEXT: [[Y:%.*]] = icmp ugt i72 [[C:%.*]], 42
-; CHECK-NEXT: [[AND:%.*]] = and i1 [[X]], [[Y]]
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[X_INV]], i1 true, i1 [[Y]]
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[X]], i1 [[OR]], i1 false
; CHECK-NEXT: ret i1 [[AND]]
;
%x = icmp ugt i72 %a, %b
@@ -944,9 +953,11 @@ define i1 @andn_or_cmp_1(i37 %a, i37 %b, i37 %c) {
define i1 @andn_or_cmp_1_logical(i37 %a, i37 %b, i37 %c) {
; CHECK-LABEL: @andn_or_cmp_1_logical(
-; CHECK-NEXT: [[X_INV:%.*]] = icmp sle i37 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[X:%.*]] = icmp sgt i37 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[X_INV:%.*]] = icmp sle i37 [[A]], [[B]]
; CHECK-NEXT: [[Y:%.*]] = icmp ugt i37 [[C:%.*]], 42
-; CHECK-NEXT: [[AND:%.*]] = and i1 [[X_INV]], [[Y]]
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[Y]], i1 true, i1 [[X]]
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[X_INV]], i1 [[OR]], i1 false
; CHECK-NEXT: ret i1 [[AND]]
;
%x = icmp sgt i37 %a, %b
@@ -977,9 +988,11 @@ define i1 @andn_or_cmp_2(i16 %a, i16 %b, i16 %c) {
define i1 @andn_or_cmp_2_logical(i16 %a, i16 %b, i16 %c) {
; CHECK-LABEL: @andn_or_cmp_2_logical(
-; CHECK-NEXT: [[X_INV:%.*]] = icmp slt i16 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[X:%.*]] = icmp sge i16 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[X_INV:%.*]] = icmp slt i16 [[A]], [[B]]
; CHECK-NEXT: [[Y:%.*]] = icmp ugt i16 [[C:%.*]], 42
-; CHECK-NEXT: [[AND:%.*]] = and i1 [[Y]], [[X_INV]]
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[Y]], i1 true, i1 [[X]]
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[OR]], i1 [[X_INV]], i1 false
; CHECK-NEXT: ret i1 [[AND]]
;
%x = icmp sge i16 %a, %b
@@ -1028,9 +1041,11 @@ define i1 @andn_or_cmp_4(i32 %a, i32 %b, i32 %c) {
define i1 @andn_or_cmp_4_logical(i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: @andn_or_cmp_4_logical(
-; CHECK-NEXT: [[X_INV:%.*]] = icmp ne i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[X:%.*]] = icmp eq i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[X_INV:%.*]] = icmp ne i32 [[A]], [[B]]
; CHECK-NEXT: [[Y:%.*]] = icmp ugt i32 [[C:%.*]], 42
-; CHECK-NEXT: [[AND:%.*]] = and i1 [[Y]], [[X_INV]]
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[X]], i1 true, i1 [[Y]]
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[OR]], i1 [[X_INV]], i1 false
; CHECK-NEXT: ret i1 [[AND]]
;
%x = icmp eq i32 %a, %b
diff --git llvm/test/Transforms/InstCombine/and2.ll llvm/test/Transforms/InstCombine/and2.ll
index 6b12e26ab5f3..63257c209e33 100644
--- llvm/test/Transforms/InstCombine/and2.ll
+++ llvm/test/Transforms/InstCombine/and2.ll
@@ -13,8 +13,9 @@ define i1 @test2(i1 %X, i1 %Y) {
define i1 @test2_logical(i1 %X, i1 %Y) {
; CHECK-LABEL: @test2_logical(
-; CHECK-NEXT: [[A:%.*]] = and i1 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: ret i1 [[A]]
+; CHECK-NEXT: [[A:%.*]] = select i1 [[X:%.*]], i1 [[Y:%.*]], i1 false
+; CHECK-NEXT: [[B:%.*]] = select i1 [[A]], i1 [[X]], i1 false
+; CHECK-NEXT: ret i1 [[B]]
;
%a = select i1 %X, i1 %Y, i1 false
%b = select i1 %a, i1 %X, i1 false
@@ -46,9 +47,11 @@ define i1 @test7(i32 %i, i1 %b) {
define i1 @test7_logical(i32 %i, i1 %b) {
; CHECK-LABEL: @test7_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[I:%.*]], 0
-; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[I:%.*]], 1
+; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[I]], -1
+; CHECK-NEXT: [[AND1:%.*]] = select i1 [[CMP1]], i1 [[B:%.*]], i1 false
+; CHECK-NEXT: [[AND2:%.*]] = select i1 [[AND1]], i1 [[CMP2]], i1 false
+; CHECK-NEXT: ret i1 [[AND2]]
;
%cmp1 = icmp slt i32 %i, 1
%cmp2 = icmp sgt i32 %i, -1
diff --git llvm/test/Transforms/InstCombine/bit-checks.ll llvm/test/Transforms/InstCombine/bit-checks.ll
index 28464c41ad49..b8063736d9b0 100644
--- llvm/test/Transforms/InstCombine/bit-checks.ll
+++ llvm/test/Transforms/InstCombine/bit-checks.ll
@@ -19,9 +19,12 @@ define i32 @main1(i32 %argc) {
define i32 @main1_logical(i32 %argc) {
; CHECK-LABEL: @main1_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 3
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 3
-; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[TMP2]], i32 2, i32 1
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 1
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 0
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], 2
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[AND2]], 0
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 1
; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
%and = and i32 %argc, 1
@@ -51,9 +54,13 @@ define i32 @main2(i32 %argc) {
define i32 @main2_logical(i32 %argc) {
; CHECK-LABEL: @main2_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 3
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP1]], 3
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[DOTNOT]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 1
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], 0
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], 2
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], 0
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]
+; CHECK-NEXT: [[NOT_OR_COND:%.*]] = xor i1 [[OR_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_OR_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, 1
@@ -88,9 +95,13 @@ define i32 @main3(i32 %argc) {
define i32 @main3_logical(i32 %argc) {
; CHECK-LABEL: @main3_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP2]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 7
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], 0
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], 48
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], 0
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, 7
@@ -120,9 +131,13 @@ define i32 @main3b(i32 %argc) {
define i32 @main3b_logical(i32 %argc) {
; CHECK-LABEL: @main3b_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP2]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 7
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], 0
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], 16
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], 0
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, 7
@@ -153,10 +168,13 @@ define i32 @main3e_like(i32 %argc, i32 %argc2, i32 %argc3) {
define i32 @main3e_like_logical(i32 %argc, i32 %argc2, i32 %argc3) {
; CHECK-LABEL: @main3e_like_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[ARGC2:%.*]], [[ARGC3:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[ARGC:%.*]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP3]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], 0
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], [[ARGC3:%.*]]
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], 0
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, %argc2
@@ -187,9 +205,13 @@ define i32 @main3c(i32 %argc) {
define i32 @main3c_logical(i32 %argc) {
; CHECK-LABEL: @main3c_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP1]], 0
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[DOTNOT]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 7
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 0
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], 48
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[AND2]], 0
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]
+; CHECK-NEXT: [[NOT_OR_COND:%.*]] = xor i1 [[OR_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_OR_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, 7
@@ -219,9 +241,13 @@ define i32 @main3d(i32 %argc) {
define i32 @main3d_logical(i32 %argc) {
; CHECK-LABEL: @main3d_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP1]], 0
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[DOTNOT]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 7
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 0
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], 16
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[AND2]], 0
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]
+; CHECK-NEXT: [[NOT_OR_COND:%.*]] = xor i1 [[OR_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_OR_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, 7
@@ -252,10 +278,13 @@ define i32 @main3f_like(i32 %argc, i32 %argc2, i32 %argc3) {
define i32 @main3f_like_logical(i32 %argc, i32 %argc2, i32 %argc3) {
; CHECK-LABEL: @main3f_like_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[ARGC2:%.*]], [[ARGC3:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[ARGC:%.*]]
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP2]], 0
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[DOTNOT]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 0
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], [[ARGC3:%.*]]
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[AND2]], 0
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]
+; CHECK-NEXT: [[NOT_OR_COND:%.*]] = xor i1 [[OR_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_OR_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, %argc2
@@ -286,9 +315,13 @@ define i32 @main4(i32 %argc) {
define i32 @main4_logical(i32 %argc) {
; CHECK-LABEL: @main4_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 55
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP2]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 7
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], 7
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], 48
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], 48
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, 7
@@ -318,9 +351,13 @@ define i32 @main4b(i32 %argc) {
define i32 @main4b_logical(i32 %argc) {
; CHECK-LABEL: @main4b_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 23
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP2]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 7
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], 7
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], 16
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[AND2]], 0
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, 7
@@ -351,10 +388,13 @@ define i32 @main4e_like(i32 %argc, i32 %argc2, i32 %argc3) {
define i32 @main4e_like_logical(i32 %argc, i32 %argc2, i32 %argc3) {
; CHECK-LABEL: @main4e_like_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[ARGC2:%.*]], [[ARGC3:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[ARGC:%.*]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP3]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], [[ARGC2]]
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], [[ARGC3:%.*]]
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], [[ARGC3]]
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, %argc2
@@ -385,9 +425,13 @@ define i32 @main4c(i32 %argc) {
define i32 @main4c_logical(i32 %argc) {
; CHECK-LABEL: @main4c_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP1]], 55
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[DOTNOT]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 7
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 7
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], 48
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[AND2]], 48
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]
+; CHECK-NEXT: [[NOT_OR_COND:%.*]] = xor i1 [[OR_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_OR_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, 7
@@ -417,9 +461,13 @@ define i32 @main4d(i32 %argc) {
define i32 @main4d_logical(i32 %argc) {
; CHECK-LABEL: @main4d_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP1]], 23
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[DOTNOT]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 7
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 7
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], 16
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], 0
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]
+; CHECK-NEXT: [[NOT_OR_COND:%.*]] = xor i1 [[OR_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_OR_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, 7
@@ -450,10 +498,13 @@ define i32 @main4f_like(i32 %argc, i32 %argc2, i32 %argc3) {
define i32 @main4f_like_logical(i32 %argc, i32 %argc2, i32 %argc3) {
; CHECK-LABEL: @main4f_like_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[ARGC2:%.*]], [[ARGC3:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[ARGC:%.*]]
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP2]], [[TMP1]]
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[DOTNOT]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], [[ARGC2]]
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], [[ARGC3:%.*]]
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[AND2]], [[ARGC3]]
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]
+; CHECK-NEXT: [[NOT_OR_COND:%.*]] = xor i1 [[OR_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_OR_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, %argc2
@@ -485,10 +536,13 @@ define i32 @main5_like(i32 %argc, i32 %argc2) {
define i32 @main5_like_logical(i32 %argc, i32 %argc2) {
; CHECK-LABEL: @main5_like_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 7
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 7
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP3]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 7
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], 7
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC2:%.*]], 7
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], 7
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, 7
@@ -519,10 +573,13 @@ define i32 @main5e_like(i32 %argc, i32 %argc2, i32 %argc3) {
define i32 @main5e_like_logical(i32 %argc, i32 %argc2, i32 %argc3) {
; CHECK-LABEL: @main5e_like_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC3:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[ARGC:%.*]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], [[ARGC]]
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP3]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], [[ARGC]]
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], [[ARGC3:%.*]]
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], [[ARGC]]
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, %argc2
@@ -554,10 +611,13 @@ define i32 @main5c_like(i32 %argc, i32 %argc2) {
define i32 @main5c_like_logical(i32 %argc, i32 %argc2) {
; CHECK-LABEL: @main5c_like_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 7
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP2]], 7
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[DOTNOT]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 7
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 7
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC2:%.*]], 7
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[AND2]], 7
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]
+; CHECK-NEXT: [[NOT_OR_COND:%.*]] = xor i1 [[OR_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_OR_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, 7
@@ -588,10 +648,13 @@ define i32 @main5f_like(i32 %argc, i32 %argc2, i32 %argc3) {
define i32 @main5f_like_logical(i32 %argc, i32 %argc2, i32 %argc3) {
; CHECK-LABEL: @main5f_like_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC3:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[ARGC:%.*]]
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP2]], [[ARGC]]
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[DOTNOT]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], [[ARGC]]
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], [[ARGC3:%.*]]
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[AND2]], [[ARGC]]
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]
+; CHECK-NEXT: [[NOT_OR_COND:%.*]] = xor i1 [[OR_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_OR_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, %argc2
@@ -623,9 +686,13 @@ define i32 @main6(i32 %argc) {
define i32 @main6_logical(i32 %argc) {
; CHECK-LABEL: @main6_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 19
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP2]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 7
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], 3
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], 48
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], 16
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, 7
@@ -655,9 +722,13 @@ define i32 @main6b(i32 %argc) {
define i32 @main6b_logical(i32 %argc) {
; CHECK-LABEL: @main6b_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 19
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP2]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 7
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], 3
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], 16
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[AND2]], 0
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, 7
@@ -689,9 +760,13 @@ define i32 @main6c(i32 %argc) {
define i32 @main6c_logical(i32 %argc) {
; CHECK-LABEL: @main6c_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 55
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP1]], 19
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[DOTNOT]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 7
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 3
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], 48
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp ne i32 [[AND2]], 16
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]
+; CHECK-NEXT: [[NOT_OR_COND:%.*]] = xor i1 [[OR_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_OR_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, 7
@@ -721,9 +796,13 @@ define i32 @main6d(i32 %argc) {
define i32 @main6d_logical(i32 %argc) {
; CHECK-LABEL: @main6d_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 23
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP1]], 19
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[DOTNOT]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 7
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 3
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], 16
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], 0
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]
+; CHECK-NEXT: [[NOT_OR_COND:%.*]] = xor i1 [[OR_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_OR_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and = and i32 %argc, 7
@@ -756,10 +835,13 @@ define i32 @main7a(i32 %argc, i32 %argc2, i32 %argc3) {
define i32 @main7a_logical(i32 %argc, i32 %argc2, i32 %argc3) {
; CHECK-LABEL: @main7a_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[ARGC2:%.*]], [[ARGC3:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[ARGC:%.*]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP3]] to i32
+; CHECK-NEXT: [[AND1:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC:%.*]]
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND1]], [[ARGC2]]
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC]]
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], [[ARGC3]]
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and1 = and i32 %argc2, %argc
@@ -791,10 +873,13 @@ define i32 @main7b(i32 %argc, i32 %argc2, i32 %argc3) {
define i32 @main7b_logical(i32 %argc, i32 %argc2, i32 %argc3) {
; CHECK-LABEL: @main7b_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[ARGC2:%.*]], [[ARGC3:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[ARGC:%.*]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP3]] to i32
+; CHECK-NEXT: [[AND1:%.*]] = and i32 [[ARGC:%.*]], [[ARGC2:%.*]]
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND1]], [[ARGC2]]
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC]], [[ARGC3:%.*]]
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], [[ARGC3]]
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and1 = and i32 %argc, %argc2
@@ -826,10 +911,13 @@ define i32 @main7c(i32 %argc, i32 %argc2, i32 %argc3) {
define i32 @main7c_logical(i32 %argc, i32 %argc2, i32 %argc3) {
; CHECK-LABEL: @main7c_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[ARGC2:%.*]], [[ARGC3:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[ARGC:%.*]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP3]] to i32
+; CHECK-NEXT: [[AND1:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC:%.*]]
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND1]], [[ARGC2]]
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC]]
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], [[ARGC3]]
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%and1 = and i32 %argc2, %argc
@@ -867,10 +955,13 @@ define i32 @main7d_logical(i32 %argc, i32 %argc2, i32 %argc3, i32 %argc4, i32 %a
; CHECK-LABEL: @main7d_logical(
; CHECK-NEXT: [[BC:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC4:%.*]]
; CHECK-NEXT: [[DE:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC5:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[BC]], [[DE]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[ARGC:%.*]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP3]] to i32
+; CHECK-NEXT: [[AND1:%.*]] = and i32 [[BC]], [[ARGC:%.*]]
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND1]], [[BC]]
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[DE]], [[ARGC]]
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], [[DE]]
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%bc = and i32 %argc2, %argc4
@@ -910,10 +1001,13 @@ define i32 @main7e_logical(i32 %argc, i32 %argc2, i32 %argc3, i32 %argc4, i32 %a
; CHECK-LABEL: @main7e_logical(
; CHECK-NEXT: [[BC:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC4:%.*]]
; CHECK-NEXT: [[DE:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC5:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[BC]], [[DE]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[ARGC:%.*]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP3]] to i32
+; CHECK-NEXT: [[AND1:%.*]] = and i32 [[BC]], [[ARGC:%.*]]
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND1]], [[BC]]
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[DE]], [[ARGC]]
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[AND2]], [[DE]]
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%bc = and i32 %argc2, %argc4
@@ -953,10 +1047,13 @@ define i32 @main7f_logical(i32 %argc, i32 %argc2, i32 %argc3, i32 %argc4, i32 %a
; CHECK-LABEL: @main7f_logical(
; CHECK-NEXT: [[BC:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC4:%.*]]
; CHECK-NEXT: [[DE:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC5:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[BC]], [[DE]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[ARGC:%.*]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP3]] to i32
+; CHECK-NEXT: [[AND1:%.*]] = and i32 [[BC]], [[ARGC:%.*]]
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[BC]], [[AND1]]
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[DE]], [[ARGC]]
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[DE]], [[AND2]]
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%bc = and i32 %argc2, %argc4
@@ -996,10 +1093,13 @@ define i32 @main7g_logical(i32 %argc, i32 %argc2, i32 %argc3, i32 %argc4, i32 %a
; CHECK-LABEL: @main7g_logical(
; CHECK-NEXT: [[BC:%.*]] = and i32 [[ARGC2:%.*]], [[ARGC4:%.*]]
; CHECK-NEXT: [[DE:%.*]] = and i32 [[ARGC3:%.*]], [[ARGC5:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[BC]], [[DE]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[ARGC:%.*]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]
-; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[TMP3]] to i32
+; CHECK-NEXT: [[AND1:%.*]] = and i32 [[BC]], [[ARGC:%.*]]
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[BC]], [[AND1]]
+; CHECK-NEXT: [[AND2:%.*]] = and i32 [[DE]], [[ARGC]]
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp eq i32 [[DE]], [[AND2]]
+; CHECK-NEXT: [[AND_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[NOT_AND_COND:%.*]] = xor i1 [[AND_COND]], true
+; CHECK-NEXT: [[STOREMERGE:%.*]] = zext i1 [[NOT_AND_COND]] to i32
; CHECK-NEXT: ret i32 [[STOREMERGE]]
;
%bc = and i32 %argc2, %argc4
@@ -1031,9 +1131,12 @@ define i32 @main8(i32 %argc) {
define i32 @main8_logical(i32 %argc) {
; CHECK-LABEL: @main8_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 192
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP1]], 0
-; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[DOTNOT]], i32 1, i32 2
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 64
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 0
+; CHECK-NEXT: [[TRUNC2:%.*]] = trunc i32 [[ARGC]] to i8
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp slt i8 [[TRUNC2]], 0
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]
+; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 1
; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
%and = and i32 %argc, 64
@@ -1063,9 +1166,12 @@ define i32 @main9(i32 %argc) {
define i32 @main9_logical(i32 %argc) {
; CHECK-LABEL: @main9_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 192
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 192
-; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[TMP2]], i32 2, i32 1
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 64
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[AND]], 0
+; CHECK-NEXT: [[TRUNC2:%.*]] = trunc i32 [[ARGC]] to i8
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp slt i8 [[TRUNC2]], 0
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 1
; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
%and = and i32 %argc, 64
@@ -1095,9 +1201,12 @@ define i32 @main10(i32 %argc) {
define i32 @main10_logical(i32 %argc) {
; CHECK-LABEL: @main10_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 192
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0
-; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[TMP2]], i32 2, i32 1
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 64
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], 0
+; CHECK-NEXT: [[TRUNC2:%.*]] = trunc i32 [[ARGC]] to i8
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp sgt i8 [[TRUNC2]], -1
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 1
; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
%and = and i32 %argc, 64
@@ -1127,9 +1236,12 @@ define i32 @main11(i32 %argc) {
define i32 @main11_logical(i32 %argc) {
; CHECK-LABEL: @main11_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 192
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP1]], 192
-; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[DOTNOT]], i32 1, i32 2
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ARGC:%.*]], 64
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[AND]], 0
+; CHECK-NEXT: [[TRUNC2:%.*]] = trunc i32 [[ARGC]] to i8
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp sgt i8 [[TRUNC2]], -1
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]
+; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 1
; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
%and = and i32 %argc, 64
@@ -1159,9 +1271,12 @@ define i32 @main12(i32 %argc) {
define i32 @main12_logical(i32 %argc) {
; CHECK-LABEL: @main12_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 32896
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP1]], 0
-; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[DOTNOT]], i32 1, i32 2
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[ARGC:%.*]] to i16
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp slt i16 [[TRUNC]], 0
+; CHECK-NEXT: [[TRUNC2:%.*]] = trunc i32 [[ARGC]] to i8
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp slt i8 [[TRUNC2]], 0
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]
+; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 1
; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
%trunc = trunc i32 %argc to i16
@@ -1191,9 +1306,12 @@ define i32 @main13(i32 %argc) {
define i32 @main13_logical(i32 %argc) {
; CHECK-LABEL: @main13_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 32896
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 32896
-; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[TMP2]], i32 2, i32 1
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[ARGC:%.*]] to i16
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp slt i16 [[TRUNC]], 0
+; CHECK-NEXT: [[TRUNC2:%.*]] = trunc i32 [[ARGC]] to i8
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp slt i8 [[TRUNC2]], 0
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 1
; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
%trunc = trunc i32 %argc to i16
@@ -1223,9 +1341,12 @@ define i32 @main14(i32 %argc) {
define i32 @main14_logical(i32 %argc) {
; CHECK-LABEL: @main14_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 32896
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0
-; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[TMP2]], i32 2, i32 1
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[ARGC:%.*]] to i16
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp sgt i16 [[TRUNC]], -1
+; CHECK-NEXT: [[TRUNC2:%.*]] = trunc i32 [[ARGC]] to i8
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp sgt i8 [[TRUNC2]], -1
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL3]], i1 false
+; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 1
; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
%trunc = trunc i32 %argc to i16
@@ -1255,9 +1376,12 @@ define i32 @main15(i32 %argc) {
define i32 @main15_logical(i32 %argc) {
; CHECK-LABEL: @main15_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[ARGC:%.*]], 32896
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP1]], 32896
-; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[DOTNOT]], i32 1, i32 2
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[ARGC:%.*]] to i16
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp sgt i16 [[TRUNC]], -1
+; CHECK-NEXT: [[TRUNC2:%.*]] = trunc i32 [[ARGC]] to i8
+; CHECK-NEXT: [[TOBOOL3:%.*]] = icmp sgt i8 [[TRUNC2]], -1
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TOBOOL]], i1 true, i1 [[TOBOOL3]]
+; CHECK-NEXT: [[RETVAL_0:%.*]] = select i1 [[OR_COND]], i32 2, i32 1
; CHECK-NEXT: ret i32 [[RETVAL_0]]
;
%trunc = trunc i32 %argc to i16
diff --git llvm/test/Transforms/InstCombine/demorgan.ll llvm/test/Transforms/InstCombine/demorgan.ll
index 809c43d1a09d..74117ec1ff16 100644
--- llvm/test/Transforms/InstCombine/demorgan.ll
+++ llvm/test/Transforms/InstCombine/demorgan.ll
@@ -473,9 +473,10 @@ define i32 @PR28476(i32 %x, i32 %y) {
define i32 @PR28476_logical(i32 %x, i32 %y) {
; CHECK-LABEL: @PR28476_logical(
-; CHECK-NEXT: [[CMP0:%.*]] = icmp eq i32 [[X:%.*]], 0
-; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[Y:%.*]], 0
-; CHECK-NEXT: [[TMP1:%.*]] = or i1 [[CMP0]], [[CMP1]]
+; CHECK-NEXT: [[CMP0:%.*]] = icmp ne i32 [[X:%.*]], 0
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ne i32 [[Y:%.*]], 0
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[CMP0]], i1 [[CMP1]], i1 false
+; CHECK-NEXT: [[TMP1:%.*]] = xor i1 [[AND]], true
; CHECK-NEXT: [[COND:%.*]] = zext i1 [[TMP1]] to i32
; CHECK-NEXT: ret i32 [[COND]]
;
diff --git llvm/test/Transforms/InstCombine/dont-distribute-phi.ll llvm/test/Transforms/InstCombine/dont-distribute-phi.ll
index 98d91c9b048f..f7cf72851940 100644
--- llvm/test/Transforms/InstCombine/dont-distribute-phi.ll
+++ llvm/test/Transforms/InstCombine/dont-distribute-phi.ll
@@ -55,7 +55,7 @@ define zeroext i1 @foo_logical(i32 %arg) {
; CHECK: bb_exit:
; CHECK-NEXT: [[PHI1:%.*]] = phi i1 [ [[CMP2]], [[BB_ELSE]] ], [ undef, [[BB_THEN]] ]
; CHECK-NEXT: [[XOR1:%.*]] = xor i1 [[CMP1]], true
-; CHECK-NEXT: [[AND1:%.*]] = and i1 [[PHI1]], [[XOR1]]
+; CHECK-NEXT: [[AND1:%.*]] = select i1 [[PHI1]], i1 [[XOR1]], i1 false
; CHECK-NEXT: ret i1 [[AND1]]
;
diff --git llvm/test/Transforms/InstCombine/icmp-custom-dl.ll llvm/test/Transforms/InstCombine/icmp-custom-dl.ll
index 6e76525bad35..702e61d22e94 100644
--- llvm/test/Transforms/InstCombine/icmp-custom-dl.ll
+++ llvm/test/Transforms/InstCombine/icmp-custom-dl.ll
@@ -205,7 +205,7 @@ define i1 @icmp_and_ashr_multiuse_logical(i32 %X) {
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 224
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[X]], 496
; CHECK-NEXT: [[TOBOOL2:%.*]] = icmp ne i32 [[TMP2]], 432
-; CHECK-NEXT: [[AND3:%.*]] = and i1 [[TOBOOL]], [[TOBOOL2]]
+; CHECK-NEXT: [[AND3:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL2]], i1 false
; CHECK-NEXT: ret i1 [[AND3]]
;
%shr = ashr i32 %X, 4
diff --git llvm/test/Transforms/InstCombine/icmp-logical.ll llvm/test/Transforms/InstCombine/icmp-logical.ll
index cc23b114bd01..aa559a4e82de 100644
--- llvm/test/Transforms/InstCombine/icmp-logical.ll
+++ llvm/test/Transforms/InstCombine/icmp-logical.ll
@@ -19,7 +19,10 @@ define i1 @masked_and_notallzeroes_logical(i32 %A) {
; CHECK-LABEL: @masked_and_notallzeroes_logical(
; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[A:%.*]], 7
; CHECK-NEXT: [[TST1:%.*]] = icmp ne i32 [[MASK1]], 0
-; CHECK-NEXT: ret i1 [[TST1]]
+; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A]], 39
+; CHECK-NEXT: [[TST2:%.*]] = icmp ne i32 [[MASK2]], 0
+; CHECK-NEXT: [[RES:%.*]] = select i1 [[TST1]], i1 [[TST2]], i1 false
+; CHECK-NEXT: ret i1 [[RES]]
;
%mask1 = and i32 %A, 7
%tst1 = icmp ne i32 %mask1, 0
@@ -47,7 +50,10 @@ define i1 @masked_or_allzeroes_logical(i32 %A) {
; CHECK-LABEL: @masked_or_allzeroes_logical(
; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[A:%.*]], 7
; CHECK-NEXT: [[TST1:%.*]] = icmp eq i32 [[MASK1]], 0
-; CHECK-NEXT: ret i1 [[TST1]]
+; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A]], 39
+; CHECK-NEXT: [[TST2:%.*]] = icmp eq i32 [[MASK2]], 0
+; CHECK-NEXT: [[RES:%.*]] = select i1 [[TST1]], i1 true, i1 [[TST2]]
+; CHECK-NEXT: ret i1 [[RES]]
;
%mask1 = and i32 %A, 7
%tst1 = icmp eq i32 %mask1, 0
@@ -75,7 +81,10 @@ define i1 @masked_and_notallones_logical(i32 %A) {
; CHECK-LABEL: @masked_and_notallones_logical(
; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[A:%.*]], 7
; CHECK-NEXT: [[TST1:%.*]] = icmp ne i32 [[MASK1]], 7
-; CHECK-NEXT: ret i1 [[TST1]]
+; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A]], 39
+; CHECK-NEXT: [[TST2:%.*]] = icmp ne i32 [[MASK2]], 39
+; CHECK-NEXT: [[RES:%.*]] = select i1 [[TST1]], i1 [[TST2]], i1 false
+; CHECK-NEXT: ret i1 [[RES]]
;
%mask1 = and i32 %A, 7
%tst1 = icmp ne i32 %mask1, 7
@@ -103,7 +112,10 @@ define i1 @masked_or_allones_logical(i32 %A) {
; CHECK-LABEL: @masked_or_allones_logical(
; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[A:%.*]], 7
; CHECK-NEXT: [[TST1:%.*]] = icmp eq i32 [[MASK1]], 7
-; CHECK-NEXT: ret i1 [[TST1]]
+; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A]], 39
+; CHECK-NEXT: [[TST2:%.*]] = icmp eq i32 [[MASK2]], 39
+; CHECK-NEXT: [[RES:%.*]] = select i1 [[TST1]], i1 true, i1 [[TST2]]
+; CHECK-NEXT: ret i1 [[RES]]
;
%mask1 = and i32 %A, 7
%tst1 = icmp eq i32 %mask1, 7
@@ -129,9 +141,12 @@ define i1 @masked_and_notA(i32 %A) {
define i1 @masked_and_notA_logical(i32 %A) {
; CHECK-LABEL: @masked_and_notA_logical(
-; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A:%.*]], 78
+; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[A:%.*]], 14
+; CHECK-NEXT: [[TST1:%.*]] = icmp ne i32 [[MASK1]], [[A]]
+; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A]], 78
; CHECK-NEXT: [[TST2:%.*]] = icmp ne i32 [[MASK2]], [[A]]
-; CHECK-NEXT: ret i1 [[TST2]]
+; CHECK-NEXT: [[RES:%.*]] = select i1 [[TST1]], i1 [[TST2]], i1 false
+; CHECK-NEXT: ret i1 [[RES]]
;
%mask1 = and i32 %A, 14
%tst1 = icmp ne i32 %mask1, %A
@@ -161,7 +176,7 @@ define i1 @masked_and_notA_slightly_optimized_logical(i32 %A) {
; CHECK-NEXT: [[T0:%.*]] = icmp ugt i32 [[A:%.*]], 7
; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A]], 39
; CHECK-NEXT: [[TST2:%.*]] = icmp ne i32 [[MASK2]], [[A]]
-; CHECK-NEXT: [[RES:%.*]] = and i1 [[T0]], [[TST2]]
+; CHECK-NEXT: [[RES:%.*]] = select i1 [[T0]], i1 [[TST2]], i1 false
; CHECK-NEXT: ret i1 [[RES]]
;
%t0 = icmp uge i32 %A, 8
@@ -187,9 +202,12 @@ define i1 @masked_or_A(i32 %A) {
define i1 @masked_or_A_logical(i32 %A) {
; CHECK-LABEL: @masked_or_A_logical(
-; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A:%.*]], 78
+; CHECK-NEXT: [[MASK1:%.*]] = and i32 [[A:%.*]], 14
+; CHECK-NEXT: [[TST1:%.*]] = icmp eq i32 [[MASK1]], [[A]]
+; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A]], 78
; CHECK-NEXT: [[TST2:%.*]] = icmp eq i32 [[MASK2]], [[A]]
-; CHECK-NEXT: ret i1 [[TST2]]
+; CHECK-NEXT: [[RES:%.*]] = select i1 [[TST1]], i1 true, i1 [[TST2]]
+; CHECK-NEXT: ret i1 [[RES]]
;
%mask1 = and i32 %A, 14
%tst1 = icmp eq i32 %mask1, %A
@@ -219,7 +237,7 @@ define i1 @masked_or_A_slightly_optimized_logical(i32 %A) {
; CHECK-NEXT: [[T0:%.*]] = icmp ult i32 [[A:%.*]], 8
; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A]], 39
; CHECK-NEXT: [[TST2:%.*]] = icmp eq i32 [[MASK2]], [[A]]
-; CHECK-NEXT: [[RES:%.*]] = or i1 [[T0]], [[TST2]]
+; CHECK-NEXT: [[RES:%.*]] = select i1 [[T0]], i1 true, i1 [[TST2]]
; CHECK-NEXT: ret i1 [[RES]]
;
%t0 = icmp ult i32 %A, 8
@@ -252,7 +270,7 @@ define i1 @masked_or_allzeroes_notoptimised_logical(i32 %A) {
; CHECK-NEXT: [[TST1:%.*]] = icmp eq i32 [[MASK1]], 0
; CHECK-NEXT: [[MASK2:%.*]] = and i32 [[A]], 39
; CHECK-NEXT: [[TST2:%.*]] = icmp eq i32 [[MASK2]], 0
-; CHECK-NEXT: [[RES:%.*]] = or i1 [[TST1]], [[TST2]]
+; CHECK-NEXT: [[RES:%.*]] = select i1 [[TST1]], i1 true, i1 [[TST2]]
; CHECK-NEXT: ret i1 [[RES]]
;
%mask1 = and i32 %A, 15
@@ -306,7 +324,9 @@ define i1 @nomask_rhs_logical(i32 %in) {
; CHECK-LABEL: @nomask_rhs_logical(
; CHECK-NEXT: [[MASKED:%.*]] = and i32 [[IN:%.*]], 1
; CHECK-NEXT: [[TST1:%.*]] = icmp eq i32 [[MASKED]], 0
-; CHECK-NEXT: ret i1 [[TST1]]
+; CHECK-NEXT: [[TST2:%.*]] = icmp eq i32 [[IN]], 0
+; CHECK-NEXT: [[VAL:%.*]] = select i1 [[TST1]], i1 true, i1 [[TST2]]
+; CHECK-NEXT: ret i1 [[VAL]]
;
%masked = and i32 %in, 1
%tst1 = icmp eq i32 %masked, 0
@@ -417,7 +437,7 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_0_logical(i32 %x) {
; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3
; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 1
-; CHECK-NEXT: [[T5:%.*]] = and i1 [[T2]], [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 12
@@ -445,9 +465,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_1(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_1_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_1_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 15
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 9
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 12
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 7
+; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 1
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 12
%t2 = icmp ne i32 %t1, 0
@@ -481,7 +504,7 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_1b_logical(i32 %x) {
; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3
; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 1
-; CHECK-NEXT: [[T5:%.*]] = and i1 [[T2]], [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 14
@@ -507,7 +530,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_2(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_2_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_2_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 3
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 7
+; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 0
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 3
%t2 = icmp ne i32 %t1, 0
@@ -534,9 +562,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_3(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_3_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_3_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 15
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 8
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 7
+; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 0
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 15
%t2 = icmp ne i32 %t1, 0
@@ -570,7 +601,7 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_3b_logical(i32 %x) {
; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3
; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 0
-; CHECK-NEXT: [[T5:%.*]] = and i1 [[T2]], [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 15
@@ -598,9 +629,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_4(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_4_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_4_logical(
-; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 255
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 8
-; CHECK-NEXT: ret i1 [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 255
%t2 = icmp ne i32 %t1, 0
@@ -627,9 +661,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_5(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_5_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_5_logical(
-; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 8
-; CHECK-NEXT: ret i1 [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 15
%t2 = icmp ne i32 %t1, 0
@@ -656,9 +693,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_6(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_6_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_6_logical(
-; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 12
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 8
-; CHECK-NEXT: ret i1 [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 12
%t2 = icmp ne i32 %t1, 0
@@ -683,7 +723,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_7(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_7_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_7_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 7
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
+; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 8
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 7
%t2 = icmp ne i32 %t1, 0
@@ -708,7 +753,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_7b(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_7b_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_7b_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 6
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
+; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 8
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 6
%t2 = icmp ne i32 %t1, 0
@@ -743,7 +793,7 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_0_logical(i32 %x) {
; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3
; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 1
-; CHECK-NEXT: [[T5:%.*]] = or i1 [[T2]], [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 true, i1 [[T4]]
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 12
@@ -772,9 +822,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_1(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_1_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_1_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 15
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 9
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 12
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 7
+; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 1
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 true, i1 [[T4]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 12
%t2 = icmp eq i32 %t1, 0
@@ -809,7 +862,7 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_1b_logical(i32 %x)
; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3
; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 1
-; CHECK-NEXT: [[T5:%.*]] = or i1 [[T2]], [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 true, i1 [[T4]]
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 14
@@ -836,7 +889,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_2(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_2_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_2_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 3
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 7
+; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 0
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 true, i1 [[T4]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 3
%t2 = icmp eq i32 %t1, 0
@@ -864,9 +922,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_3(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_3_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_3_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 15
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 8
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 7
+; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 0
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 true, i1 [[T4]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 15
%t2 = icmp eq i32 %t1, 0
@@ -901,7 +962,7 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_3b_logical(i32 %x)
; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3
; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 0
-; CHECK-NEXT: [[T5:%.*]] = or i1 [[T2]], [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 true, i1 [[T4]]
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 15
@@ -930,9 +991,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_4(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_4_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_4_logical(
-; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 255
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 8
-; CHECK-NEXT: ret i1 [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 true, i1 [[T4]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 255
%t2 = icmp eq i32 %t1, 0
@@ -960,9 +1024,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_5(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_5_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_5_logical(
-; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 8
-; CHECK-NEXT: ret i1 [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 true, i1 [[T4]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 15
%t2 = icmp eq i32 %t1, 0
@@ -990,9 +1057,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_6(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_6_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_6_logical(
-; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 12
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 8
-; CHECK-NEXT: ret i1 [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 true, i1 [[T4]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 12
%t2 = icmp eq i32 %t1, 0
@@ -1018,7 +1088,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_7(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_7_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_7_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 7
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
+; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 8
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 true, i1 [[T4]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 7
%t2 = icmp eq i32 %t1, 0
@@ -1044,7 +1119,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_7b(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_7b_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_7b_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 6
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
+; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 8
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 true, i1 [[T4]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 6
%t2 = icmp eq i32 %t1, 0
@@ -1079,7 +1159,7 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_0_logical(i32 %x) {
; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3
; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 1
-; CHECK-NEXT: [[T5:%.*]] = and i1 [[T4]], [[T2]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 [[T2]], i1 false
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 12
@@ -1107,9 +1187,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_1(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_1_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_1_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 15
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 9
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 12
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 7
+; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 1
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 [[T2]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 12
%t2 = icmp ne i32 %t1, 0
@@ -1143,7 +1226,7 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_1b_logical(i32 %x)
; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3
; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 1
-; CHECK-NEXT: [[T5:%.*]] = and i1 [[T4]], [[T2]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 [[T2]], i1 false
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 14
@@ -1169,7 +1252,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_2(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_2_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_2_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 3
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 7
+; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 0
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 [[T2]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 3
%t2 = icmp ne i32 %t1, 0
@@ -1196,9 +1284,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_3(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_3_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_3_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 15
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 8
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 7
+; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 0
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 [[T2]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 15
%t2 = icmp ne i32 %t1, 0
@@ -1232,7 +1323,7 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_3b_logical(i32 %x)
; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3
; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 0
-; CHECK-NEXT: [[T5:%.*]] = and i1 [[T4]], [[T2]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 [[T2]], i1 false
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 15
@@ -1260,9 +1351,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_4(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_4_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_4_logical(
-; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 255
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 8
-; CHECK-NEXT: ret i1 [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 [[T2]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 255
%t2 = icmp ne i32 %t1, 0
@@ -1289,9 +1383,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_5(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_5_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_5_logical(
-; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 8
-; CHECK-NEXT: ret i1 [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 [[T2]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 15
%t2 = icmp ne i32 %t1, 0
@@ -1318,9 +1415,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_6(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_6_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_6_logical(
-; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 12
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 8
-; CHECK-NEXT: ret i1 [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 [[T2]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 12
%t2 = icmp ne i32 %t1, 0
@@ -1345,7 +1445,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_7(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_7_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_7_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 7
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
+; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 8
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 [[T2]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 7
%t2 = icmp ne i32 %t1, 0
@@ -1370,7 +1475,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_7b(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_swapped_7b_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_swapped_7b_logical(
-; CHECK-NEXT: ret i1 false
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 6
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
+; CHECK-NEXT: [[T4:%.*]] = icmp eq i32 [[T3]], 8
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 [[T2]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 6
%t2 = icmp ne i32 %t1, 0
@@ -1405,7 +1515,7 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_0_logical(i
; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3
; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 1
-; CHECK-NEXT: [[T5:%.*]] = or i1 [[T4]], [[T2]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 true, i1 [[T2]]
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 12
@@ -1434,9 +1544,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_1(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_1_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_1_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 15
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 9
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 12
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 7
+; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 1
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 true, i1 [[T2]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 12
%t2 = icmp eq i32 %t1, 0
@@ -1471,7 +1584,7 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_1b_logical(
; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3
; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 1
-; CHECK-NEXT: [[T5:%.*]] = or i1 [[T4]], [[T2]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 true, i1 [[T2]]
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 14
@@ -1498,7 +1611,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_2(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_2_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_2_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 3
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 7
+; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 0
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 true, i1 [[T2]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 3
%t2 = icmp eq i32 %t1, 0
@@ -1526,9 +1644,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_3(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_3_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_3_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X:%.*]], 15
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 8
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 7
+; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 0
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 true, i1 [[T2]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 15
%t2 = icmp eq i32 %t1, 0
@@ -1563,7 +1684,7 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_3b_logical(
; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 3
; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 0
-; CHECK-NEXT: [[T5:%.*]] = or i1 [[T4]], [[T2]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 true, i1 [[T2]]
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 15
@@ -1592,9 +1713,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_4(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_4_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_4_logical(
-; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 255
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 8
-; CHECK-NEXT: ret i1 [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 true, i1 [[T2]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 255
%t2 = icmp eq i32 %t1, 0
@@ -1622,9 +1746,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_5(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_5_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_5_logical(
-; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 8
-; CHECK-NEXT: ret i1 [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 true, i1 [[T2]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 15
%t2 = icmp eq i32 %t1, 0
@@ -1652,9 +1779,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_6(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_6_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_6_logical(
-; CHECK-NEXT: [[T3:%.*]] = and i32 [[X:%.*]], 15
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 12
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 8
-; CHECK-NEXT: ret i1 [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 true, i1 [[T2]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 12
%t2 = icmp eq i32 %t1, 0
@@ -1680,7 +1810,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_7(i32 %x) {
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_7_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_7_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 7
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
+; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 8
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 true, i1 [[T2]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 7
%t2 = icmp eq i32 %t1, 0
@@ -1706,7 +1841,12 @@ define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_7b(i32 %x)
define i1 @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_7b_logical(i32 %x) {
; CHECK-LABEL: @masked_icmps_mask_notallzeros_bmask_mixed_negated_swapped_7b_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[X:%.*]], 6
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = and i32 [[X]], 15
+; CHECK-NEXT: [[T4:%.*]] = icmp ne i32 [[T3]], 8
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T4]], i1 true, i1 [[T2]]
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %x, 6
%t2 = icmp eq i32 %t1, 0
diff --git llvm/test/Transforms/InstCombine/icmp.ll llvm/test/Transforms/InstCombine/icmp.ll
index b48466e678d8..04d4f2f00b15 100644
--- llvm/test/Transforms/InstCombine/icmp.ll
+++ llvm/test/Transforms/InstCombine/icmp.ll
@@ -972,9 +972,12 @@ define i1 @test52(i32 %x1) {
define i1 @test52_logical(i32 %x1) {
; CHECK-LABEL: @test52_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X1:%.*]], 16711935
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 4980863
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[CONV:%.*]] = and i32 [[X1:%.*]], 255
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[CONV]], 127
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[X1]], 16711680
+; CHECK-NEXT: [[CMP15:%.*]] = icmp eq i32 [[TMP1]], 4980736
+; CHECK-NEXT: [[A:%.*]] = select i1 [[CMP]], i1 [[CMP15]], i1 false
+; CHECK-NEXT: ret i1 [[A]]
;
%conv = and i32 %x1, 255
%cmp = icmp eq i32 %conv, 127
@@ -1004,9 +1007,12 @@ define i1 @test52b(i128 %x1) {
define i1 @test52b_logical(i128 %x1) {
; CHECK-LABEL: @test52b_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i128 [[X1:%.*]], 16711935
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i128 [[TMP1]], 4980863
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[CONV:%.*]] = and i128 [[X1:%.*]], 255
+; CHECK-NEXT: [[CMP:%.*]] = icmp eq i128 [[CONV]], 127
+; CHECK-NEXT: [[TMP1:%.*]] = and i128 [[X1]], 16711680
+; CHECK-NEXT: [[CMP15:%.*]] = icmp eq i128 [[TMP1]], 4980736
+; CHECK-NEXT: [[A:%.*]] = select i1 [[CMP]], i1 [[CMP15]], i1 false
+; CHECK-NEXT: ret i1 [[A]]
;
%conv = and i128 %x1, 255
%cmp = icmp eq i128 %conv, 127
@@ -1879,7 +1885,7 @@ define i1 @icmp_and_shr_multiuse_logical(i32 %X) {
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 224
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[X]], 496
; CHECK-NEXT: [[TOBOOL2:%.*]] = icmp ne i32 [[TMP2]], 432
-; CHECK-NEXT: [[AND3:%.*]] = and i1 [[TOBOOL]], [[TOBOOL2]]
+; CHECK-NEXT: [[AND3:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL2]], i1 false
; CHECK-NEXT: ret i1 [[AND3]]
;
%shr = lshr i32 %X, 4
@@ -1916,7 +1922,7 @@ define i1 @icmp_and_ashr_multiuse_logical(i32 %X) {
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 224
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[X]], 496
; CHECK-NEXT: [[TOBOOL2:%.*]] = icmp ne i32 [[TMP2]], 432
-; CHECK-NEXT: [[AND3:%.*]] = and i1 [[TOBOOL]], [[TOBOOL2]]
+; CHECK-NEXT: [[AND3:%.*]] = select i1 [[TOBOOL]], i1 [[TOBOOL2]], i1 false
; CHECK-NEXT: ret i1 [[AND3]]
;
%shr = ashr i32 %X, 4
@@ -2232,9 +2238,10 @@ define i1 @or_icmp_eq_B_0_icmp_ult_A_B(i64 %a, i64 %b) {
define i1 @or_icmp_eq_B_0_icmp_ult_A_B_logical(i64 %a, i64 %b) {
; CHECK-LABEL: @or_icmp_eq_B_0_icmp_ult_A_B_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[B:%.*]], -1
-; CHECK-NEXT: [[TMP2:%.*]] = icmp uge i64 [[TMP1]], [[A:%.*]]
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[B:%.*]], 0
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i64 [[A:%.*]], [[B]]
+; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP1]], i1 true, i1 [[TMP2]]
+; CHECK-NEXT: ret i1 [[TMP3]]
;
%1 = icmp eq i64 %b, 0
%2 = icmp ult i64 %a, %b
@@ -2280,9 +2287,10 @@ define i1 @or_icmp_ne_A_0_icmp_ne_B_0(i64 %a, i64 %b) {
define i1 @or_icmp_ne_A_0_icmp_ne_B_0_logical(i64 %a, i64 %b) {
; CHECK-LABEL: @or_icmp_ne_A_0_icmp_ne_B_0_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = or i64 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i64 [[TMP1]], 0
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[A:%.*]], 0
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i64 [[B:%.*]], 0
+; CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP1]], i1 true, i1 [[TMP2]]
+; CHECK-NEXT: ret i1 [[TMP3]]
;
%1 = icmp ne i64 %a, 0
%2 = icmp ne i64 %b, 0
diff --git llvm/test/Transforms/InstCombine/ispow2.ll llvm/test/Transforms/InstCombine/ispow2.ll
index c54c6271ec07..170f5f25827c 100644
--- llvm/test/Transforms/InstCombine/ispow2.ll
+++ llvm/test/Transforms/InstCombine/ispow2.ll
@@ -194,8 +194,10 @@ define i1 @is_pow2_ctpop(i32 %x) {
define i1 @is_pow2_ctpop_logical(i32 %x) {
; CHECK-LABEL: @is_pow2_ctpop_logical(
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), [[RNG0]]
-; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[T0]], 1
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[T0]], 2
+; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne i32 [[X]], 0
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOTZERO]], i1 [[CMP]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
%cmp = icmp ult i32 %t0, 2
@@ -233,8 +235,8 @@ define i1 @is_pow2_ctpop_extra_uses_logical(i32 %x) {
; CHECK-NEXT: call void @use_i1(i1 [[CMP]])
; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: call void @use_i1(i1 [[NOTZERO]])
-; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[T0]], 1
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOTZERO]], i1 [[CMP]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
%cmp = icmp ult i32 %t0, 2
@@ -282,7 +284,7 @@ define i1 @is_pow2_ctpop_wrong_cmp_op1_logical(i32 %x) {
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), [[RNG0]]
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[T0]], 3
; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne i32 [[X]], 0
-; CHECK-NEXT: [[R:%.*]] = and i1 [[NOTZERO]], [[CMP]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOTZERO]], i1 [[CMP]], i1 false
; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
@@ -314,7 +316,7 @@ define i1 @is_pow2_ctpop_wrong_cmp_op2_logical(i32 %x) {
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), [[RNG0]]
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[T0]], 2
; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne i32 [[X]], 1
-; CHECK-NEXT: [[R:%.*]] = and i1 [[NOTZERO]], [[CMP]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOTZERO]], i1 [[CMP]], i1 false
; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
@@ -346,7 +348,7 @@ define i1 @is_pow2_ctpop_wrong_pred1_logical(i32 %x) {
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), [[RNG0]]
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[T0]], 2
; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne i32 [[X]], 0
-; CHECK-NEXT: [[R:%.*]] = and i1 [[NOTZERO]], [[CMP]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOTZERO]], i1 [[CMP]], i1 false
; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
@@ -378,7 +380,7 @@ define i1 @is_pow2_ctpop_wrong_pred2_logical(i32 %x) {
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), [[RNG0]]
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[T0]], 2
; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[X]], 0
-; CHECK-NEXT: [[R:%.*]] = and i1 [[CMP2]], [[CMP]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP2]], i1 [[CMP]], i1 false
; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
@@ -406,8 +408,10 @@ define i1 @isnot_pow2_ctpop(i32 %x) {
define i1 @isnot_pow2_ctpop_logical(i32 %x) {
; CHECK-LABEL: @isnot_pow2_ctpop_logical(
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), [[RNG0]]
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i32 [[T0]], 1
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[T0]], 1
+; CHECK-NEXT: [[ISZERO:%.*]] = icmp eq i32 [[X]], 0
+; CHECK-NEXT: [[R:%.*]] = select i1 [[ISZERO]], i1 true, i1 [[CMP]]
+; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
%cmp = icmp ugt i32 %t0, 1
@@ -444,8 +448,8 @@ define i1 @isnot_pow2_ctpop_extra_uses_logical(i32 %x) {
; CHECK-NEXT: call void @use_i1(i1 [[CMP]])
; CHECK-NEXT: [[ISZERO:%.*]] = icmp eq i32 [[X]], 0
; CHECK-NEXT: call void @use_i1(i1 [[ISZERO]])
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i32 [[T0]], 1
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[ISZERO]], i1 true, i1 [[CMP]]
+; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
%cmp = icmp ugt i32 %t0, 1
@@ -493,7 +497,7 @@ define i1 @isnot_pow2_ctpop_wrong_cmp_op1_logical(i32 %x) {
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), [[RNG0]]
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[T0]], 2
; CHECK-NEXT: [[ISZERO:%.*]] = icmp eq i32 [[X]], 0
-; CHECK-NEXT: [[R:%.*]] = or i1 [[ISZERO]], [[CMP]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[ISZERO]], i1 true, i1 [[CMP]]
; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
@@ -525,7 +529,7 @@ define i1 @isnot_pow2_ctpop_wrong_cmp_op2_logical(i32 %x) {
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), [[RNG0]]
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[T0]], 1
; CHECK-NEXT: [[ISZERO:%.*]] = icmp eq i32 [[X]], 1
-; CHECK-NEXT: [[R:%.*]] = or i1 [[ISZERO]], [[CMP]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[ISZERO]], i1 true, i1 [[CMP]]
; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
@@ -557,7 +561,7 @@ define i1 @isnot_pow2_ctpop_wrong_pred1_logical(i32 %x) {
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), [[RNG0]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[T0]], 1
; CHECK-NEXT: [[ISZERO:%.*]] = icmp eq i32 [[X]], 0
-; CHECK-NEXT: [[R:%.*]] = or i1 [[ISZERO]], [[CMP]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[ISZERO]], i1 true, i1 [[CMP]]
; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
@@ -589,7 +593,7 @@ define i1 @isnot_pow2_ctpop_wrong_pred2_logical(i32 %x) {
; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), [[RNG0]]
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[T0]], 1
; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[X]], 0
-; CHECK-NEXT: [[R:%.*]] = or i1 [[CMP2]], [[CMP]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP2]], i1 true, i1 [[CMP]]
; CHECK-NEXT: ret i1 [[R]]
;
%t0 = tail call i32 @llvm.ctpop.i32(i32 %x)
@@ -616,8 +620,10 @@ define i1 @is_pow2_negate_op(i32 %x) {
define i1 @is_pow2_negate_op_logical(i32 %x) {
; CHECK-LABEL: @is_pow2_negate_op_logical(
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), [[RNG0]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 1
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[TMP1]], 2
+; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne i32 [[X]], 0
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOTZERO]], i1 [[CMP]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%neg = sub i32 0, %x
%and = and i32 %neg, %x
@@ -658,8 +664,10 @@ define i1 @is_pow2_decrement_op(i8 %x) {
define i1 @is_pow2_decrement_op_logical(i8 %x) {
; CHECK-LABEL: @is_pow2_decrement_op_logical(
; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.ctpop.i8(i8 [[X:%.*]]), [[RNG1]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i8 [[TMP1]], 1
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[TMP1]], 2
+; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne i8 [[X]], 0
+; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP]], i1 [[NOTZERO]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%dec = add i8 %x, -1
%and = and i8 %dec, %x
@@ -700,8 +708,10 @@ define i1 @isnot_pow2_negate_op(i32 %x) {
define i1 @isnot_pow2_negate_op_logical(i32 %x) {
; CHECK-LABEL: @isnot_pow2_negate_op_logical(
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), [[RNG0]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 1
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP1]], 1
+; CHECK-NEXT: [[ISZERO:%.*]] = icmp eq i32 [[X]], 0
+; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP]], i1 true, i1 [[ISZERO]]
+; CHECK-NEXT: ret i1 [[R]]
;
%neg = sub i32 0, %x
%and = and i32 %neg, %x
@@ -742,8 +752,10 @@ define i1 @isnot_pow2_decrement_op(i8 %x) {
define i1 @isnot_pow2_decrement_op_logical(i8 %x) {
; CHECK-LABEL: @isnot_pow2_decrement_op_logical(
; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.ctpop.i8(i8 [[X:%.*]]), [[RNG1]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i8 [[TMP1]], 1
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i8 [[TMP1]], 1
+; CHECK-NEXT: [[ISZERO:%.*]] = icmp eq i8 [[X]], 0
+; CHECK-NEXT: [[R:%.*]] = select i1 [[ISZERO]], i1 true, i1 [[CMP]]
+; CHECK-NEXT: ret i1 [[R]]
;
%dec = add i8 %x, -1
%and = and i8 %dec, %x
diff --git llvm/test/Transforms/InstCombine/logical-select-inseltpoison.ll llvm/test/Transforms/InstCombine/logical-select-inseltpoison.ll
index f67cb024c2e3..79a047a17077 100644
--- llvm/test/Transforms/InstCombine/logical-select-inseltpoison.ll
+++ llvm/test/Transforms/InstCombine/logical-select-inseltpoison.ll
@@ -378,8 +378,11 @@ define i1 @bools(i1 %a, i1 %b, i1 %c) {
define i1 @bools_logical(i1 %a, i1 %b, i1 %c) {
; CHECK-LABEL: @bools_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[C:%.*]], i1 [[B:%.*]], i1 [[A:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[NOT:%.*]] = xor i1 [[C:%.*]], true
+; CHECK-NEXT: [[AND1:%.*]] = select i1 [[NOT]], i1 [[A:%.*]], i1 false
+; CHECK-NEXT: [[AND2:%.*]] = select i1 [[C]], i1 [[B:%.*]], i1 false
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[AND1]], i1 true, i1 [[AND2]]
+; CHECK-NEXT: ret i1 [[OR]]
;
%not = xor i1 %c, -1
%and1 = select i1 %not, i1 %a, i1 false
@@ -409,9 +412,10 @@ define i1 @bools_multi_uses1(i1 %a, i1 %b, i1 %c) {
define i1 @bools_multi_uses1_logical(i1 %a, i1 %b, i1 %c) {
; CHECK-LABEL: @bools_multi_uses1_logical(
; CHECK-NEXT: [[NOT:%.*]] = xor i1 [[C:%.*]], true
-; CHECK-NEXT: [[AND1:%.*]] = and i1 [[NOT]], [[A:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[C]], i1 [[B:%.*]], i1 [[A]]
-; CHECK-NEXT: [[XOR:%.*]] = xor i1 [[TMP1]], [[AND1]]
+; CHECK-NEXT: [[AND1:%.*]] = select i1 [[NOT]], i1 [[A:%.*]], i1 false
+; CHECK-NEXT: [[AND2:%.*]] = select i1 [[C]], i1 [[B:%.*]], i1 false
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[AND1]], i1 true, i1 [[AND2]]
+; CHECK-NEXT: [[XOR:%.*]] = xor i1 [[OR]], [[AND1]]
; CHECK-NEXT: ret i1 [[XOR]]
;
%not = xor i1 %c, -1
@@ -441,8 +445,13 @@ define i1 @bools_multi_uses2(i1 %a, i1 %b, i1 %c) {
define i1 @bools_multi_uses2_logical(i1 %a, i1 %b, i1 %c) {
; CHECK-LABEL: @bools_multi_uses2_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[C:%.*]], i1 [[B:%.*]], i1 [[A:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[NOT:%.*]] = xor i1 [[C:%.*]], true
+; CHECK-NEXT: [[AND1:%.*]] = select i1 [[NOT]], i1 [[A:%.*]], i1 false
+; CHECK-NEXT: [[AND2:%.*]] = select i1 [[C]], i1 [[B:%.*]], i1 false
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[AND1]], i1 true, i1 [[AND2]]
+; CHECK-NEXT: [[ADD:%.*]] = xor i1 [[AND1]], [[AND2]]
+; CHECK-NEXT: [[AND3:%.*]] = select i1 [[OR]], i1 [[ADD]], i1 false
+; CHECK-NEXT: ret i1 [[AND3]]
;
%not = xor i1 %c, -1
%and1 = select i1 %not, i1 %a, i1 false
diff --git llvm/test/Transforms/InstCombine/logical-select.ll llvm/test/Transforms/InstCombine/logical-select.ll
index 5c16fc446cdd..e887f1642fac 100644
--- llvm/test/Transforms/InstCombine/logical-select.ll
+++ llvm/test/Transforms/InstCombine/logical-select.ll
@@ -378,8 +378,11 @@ define i1 @bools(i1 %a, i1 %b, i1 %c) {
define i1 @bools_logical(i1 %a, i1 %b, i1 %c) {
; CHECK-LABEL: @bools_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[C:%.*]], i1 [[B:%.*]], i1 [[A:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[NOT:%.*]] = xor i1 [[C:%.*]], true
+; CHECK-NEXT: [[AND1:%.*]] = select i1 [[NOT]], i1 [[A:%.*]], i1 false
+; CHECK-NEXT: [[AND2:%.*]] = select i1 [[C]], i1 [[B:%.*]], i1 false
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[AND1]], i1 true, i1 [[AND2]]
+; CHECK-NEXT: ret i1 [[OR]]
;
%not = xor i1 %c, -1
%and1 = select i1 %not, i1 %a, i1 false
@@ -409,9 +412,10 @@ define i1 @bools_multi_uses1(i1 %a, i1 %b, i1 %c) {
define i1 @bools_multi_uses1_logical(i1 %a, i1 %b, i1 %c) {
; CHECK-LABEL: @bools_multi_uses1_logical(
; CHECK-NEXT: [[NOT:%.*]] = xor i1 [[C:%.*]], true
-; CHECK-NEXT: [[AND1:%.*]] = and i1 [[NOT]], [[A:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[C]], i1 [[B:%.*]], i1 [[A]]
-; CHECK-NEXT: [[XOR:%.*]] = xor i1 [[TMP1]], [[AND1]]
+; CHECK-NEXT: [[AND1:%.*]] = select i1 [[NOT]], i1 [[A:%.*]], i1 false
+; CHECK-NEXT: [[AND2:%.*]] = select i1 [[C]], i1 [[B:%.*]], i1 false
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[AND1]], i1 true, i1 [[AND2]]
+; CHECK-NEXT: [[XOR:%.*]] = xor i1 [[OR]], [[AND1]]
; CHECK-NEXT: ret i1 [[XOR]]
;
%not = xor i1 %c, -1
@@ -441,8 +445,13 @@ define i1 @bools_multi_uses2(i1 %a, i1 %b, i1 %c) {
define i1 @bools_multi_uses2_logical(i1 %a, i1 %b, i1 %c) {
; CHECK-LABEL: @bools_multi_uses2_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[C:%.*]], i1 [[B:%.*]], i1 [[A:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[NOT:%.*]] = xor i1 [[C:%.*]], true
+; CHECK-NEXT: [[AND1:%.*]] = select i1 [[NOT]], i1 [[A:%.*]], i1 false
+; CHECK-NEXT: [[AND2:%.*]] = select i1 [[C]], i1 [[B:%.*]], i1 false
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[AND1]], i1 true, i1 [[AND2]]
+; CHECK-NEXT: [[ADD:%.*]] = xor i1 [[AND1]], [[AND2]]
+; CHECK-NEXT: [[AND3:%.*]] = select i1 [[OR]], i1 [[ADD]], i1 false
+; CHECK-NEXT: ret i1 [[AND3]]
;
%not = xor i1 %c, -1
%and1 = select i1 %not, i1 %a, i1 false
diff --git llvm/test/Transforms/InstCombine/merge-icmp.ll llvm/test/Transforms/InstCombine/merge-icmp.ll
index e9f9bb31a0e4..fd98b45f8560 100644
--- llvm/test/Transforms/InstCombine/merge-icmp.ll
+++ llvm/test/Transforms/InstCombine/merge-icmp.ll
@@ -19,8 +19,12 @@ define i1 @test1(i16* %x) {
define i1 @test1_logical(i16* %x) {
; CHECK-LABEL: @test1_logical(
; CHECK-NEXT: [[LOAD:%.*]] = load i16, i16* [[X:%.*]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i16 [[LOAD]], 17791
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i16 [[LOAD]] to i8
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i8 [[TRUNC]], 127
+; CHECK-NEXT: [[AND:%.*]] = and i16 [[LOAD]], -256
+; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i16 [[AND]], 17664
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[CMP1]], i1 [[CMP2]], i1 false
+; CHECK-NEXT: ret i1 [[OR]]
;
%load = load i16, i16* %x, align 4
%trunc = trunc i16 %load to i8
@@ -49,8 +53,12 @@ define i1 @test2(i16* %x) {
define i1 @test2_logical(i16* %x) {
; CHECK-LABEL: @test2_logical(
; CHECK-NEXT: [[LOAD:%.*]] = load i16, i16* [[X:%.*]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i16 [[LOAD]], 32581
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[AND:%.*]] = and i16 [[LOAD]], -256
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i16 [[AND]], 32512
+; CHECK-NEXT: [[TRUNC:%.*]] = trunc i16 [[LOAD]] to i8
+; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i8 [[TRUNC]], 69
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[CMP1]], i1 [[CMP2]], i1 false
+; CHECK-NEXT: ret i1 [[OR]]
;
%load = load i16, i16* %x, align 4
%and = and i16 %load, -256
diff --git llvm/test/Transforms/InstCombine/onehot_merge.ll llvm/test/Transforms/InstCombine/onehot_merge.ll
index bc0047e7a84a..879866b9ab79 100644
--- llvm/test/Transforms/InstCombine/onehot_merge.ll
+++ llvm/test/Transforms/InstCombine/onehot_merge.ll
@@ -17,9 +17,12 @@ define i1 @and_consts(i32 %k, i32 %c1, i32 %c2) {
define i1 @and_consts_logical(i32 %k, i32 %c1, i32 %c2) {
; CHECK-LABEL: @and_consts_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[K:%.*]], 12
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 12
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[K:%.*]], 4
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T5:%.*]] = and i32 [[K]], 8
+; CHECK-NEXT: [[T6:%.*]] = icmp eq i32 [[T5]], 0
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[T2]], i1 true, i1 [[T6]]
+; CHECK-NEXT: ret i1 [[OR]]
;
%t1 = and i32 4, %k
%t2 = icmp eq i32 %t1, 0
@@ -66,10 +69,12 @@ define i1 @foo1_and_logical(i32 %k, i32 %c1, i32 %c2) {
; CHECK-LABEL: @foo1_and_logical(
; CHECK-NEXT: [[T:%.*]] = shl i32 1, [[C1:%.*]]
; CHECK-NEXT: [[T4:%.*]] = shl i32 1, [[C2:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[T]], [[T4]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[K:%.*]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]
-; CHECK-NEXT: ret i1 [[TMP3]]
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[T]], [[K:%.*]]
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T5:%.*]] = and i32 [[T4]], [[K]]
+; CHECK-NEXT: [[T6:%.*]] = icmp eq i32 [[T5]], 0
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[T2]], i1 true, i1 [[T6]]
+; CHECK-NEXT: ret i1 [[OR]]
;
%t = shl i32 1, %c1
%t4 = shl i32 1, %c2
@@ -127,10 +132,12 @@ define i1 @foo1_and_commuted_logical(i32 %k, i32 %c1, i32 %c2) {
; CHECK-NEXT: [[K2:%.*]] = mul i32 [[K:%.*]], [[K]]
; CHECK-NEXT: [[T:%.*]] = shl i32 1, [[C1:%.*]]
; CHECK-NEXT: [[T4:%.*]] = shl i32 1, [[C2:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[T]], [[T4]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[K2]], [[TMP1]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]
-; CHECK-NEXT: ret i1 [[TMP3]]
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[K2]], [[T]]
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T5:%.*]] = and i32 [[T4]], [[K2]]
+; CHECK-NEXT: [[T6:%.*]] = icmp eq i32 [[T5]], 0
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[T2]], i1 true, i1 [[T6]]
+; CHECK-NEXT: ret i1 [[OR]]
;
%k2 = mul i32 %k, %k ; to trick the complexity sorting
%t = shl i32 1, %c1
@@ -180,9 +187,12 @@ define i1 @or_consts(i32 %k, i32 %c1, i32 %c2) {
define i1 @or_consts_logical(i32 %k, i32 %c1, i32 %c2) {
; CHECK-LABEL: @or_consts_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[K:%.*]], 12
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 12
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[K:%.*]], 4
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T5:%.*]] = and i32 [[K]], 8
+; CHECK-NEXT: [[T6:%.*]] = icmp ne i32 [[T5]], 0
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[T2]], i1 [[T6]], i1 false
+; CHECK-NEXT: ret i1 [[OR]]
;
%t1 = and i32 4, %k
%t2 = icmp ne i32 %t1, 0
@@ -229,10 +239,12 @@ define i1 @foo1_or_logical(i32 %k, i32 %c1, i32 %c2) {
; CHECK-LABEL: @foo1_or_logical(
; CHECK-NEXT: [[T:%.*]] = shl i32 1, [[C1:%.*]]
; CHECK-NEXT: [[T4:%.*]] = shl i32 1, [[C2:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[T]], [[T4]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[K:%.*]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP2]], [[TMP1]]
-; CHECK-NEXT: ret i1 [[TMP3]]
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[T]], [[K:%.*]]
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T5:%.*]] = and i32 [[T4]], [[K]]
+; CHECK-NEXT: [[T6:%.*]] = icmp ne i32 [[T5]], 0
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[T2]], i1 [[T6]], i1 false
+; CHECK-NEXT: ret i1 [[OR]]
;
%t = shl i32 1, %c1
%t4 = shl i32 1, %c2
@@ -290,10 +302,12 @@ define i1 @foo1_or_commuted_logical(i32 %k, i32 %c1, i32 %c2) {
; CHECK-NEXT: [[K2:%.*]] = mul i32 [[K:%.*]], [[K]]
; CHECK-NEXT: [[T:%.*]] = shl i32 1, [[C1:%.*]]
; CHECK-NEXT: [[T4:%.*]] = shl i32 1, [[C2:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[T]], [[T4]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[K2]], [[TMP1]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP2]], [[TMP1]]
-; CHECK-NEXT: ret i1 [[TMP3]]
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[K2]], [[T]]
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T5:%.*]] = and i32 [[T4]], [[K2]]
+; CHECK-NEXT: [[T6:%.*]] = icmp ne i32 [[T5]], 0
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[T2]], i1 [[T6]], i1 false
+; CHECK-NEXT: ret i1 [[OR]]
;
%k2 = mul i32 %k, %k ; to trick the complexity sorting
%t = shl i32 1, %c1
@@ -350,10 +364,12 @@ define i1 @foo1_and_signbit_lshr_logical(i32 %k, i32 %c1, i32 %c2) {
; CHECK-LABEL: @foo1_and_signbit_lshr_logical(
; CHECK-NEXT: [[T:%.*]] = shl i32 1, [[C1:%.*]]
; CHECK-NEXT: [[T4:%.*]] = lshr i32 -2147483648, [[C2:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[T]], [[T4]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[K:%.*]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]
-; CHECK-NEXT: ret i1 [[TMP3]]
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[T]], [[K:%.*]]
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T5:%.*]] = and i32 [[T4]], [[K]]
+; CHECK-NEXT: [[T6:%.*]] = icmp eq i32 [[T5]], 0
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[T2]], i1 true, i1 [[T6]]
+; CHECK-NEXT: ret i1 [[OR]]
;
%t = shl i32 1, %c1
%t4 = lshr i32 -2147483648, %c2
@@ -407,10 +423,12 @@ define i1 @foo1_or_signbit_lshr_logical(i32 %k, i32 %c1, i32 %c2) {
; CHECK-LABEL: @foo1_or_signbit_lshr_logical(
; CHECK-NEXT: [[T:%.*]] = shl i32 1, [[C1:%.*]]
; CHECK-NEXT: [[T4:%.*]] = lshr i32 -2147483648, [[C2:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[T]], [[T4]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[K:%.*]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP2]], [[TMP1]]
-; CHECK-NEXT: ret i1 [[TMP3]]
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[T]], [[K:%.*]]
+; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
+; CHECK-NEXT: [[T5:%.*]] = and i32 [[T4]], [[K]]
+; CHECK-NEXT: [[T6:%.*]] = icmp ne i32 [[T5]], 0
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[T2]], i1 [[T6]], i1 false
+; CHECK-NEXT: ret i1 [[OR]]
;
%t = shl i32 1, %c1
%t4 = lshr i32 -2147483648, %c2
@@ -468,7 +486,7 @@ define i1 @foo1_and_signbit_lshr_without_shifting_signbit_logical(i32 %k, i32 %c
; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = shl i32 [[K]], [[C2:%.*]]
; CHECK-NEXT: [[T4:%.*]] = icmp sgt i32 [[T3]], -1
-; CHECK-NEXT: [[OR:%.*]] = or i1 [[T2]], [[T4]]
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[T2]], i1 true, i1 [[T4]]
; CHECK-NEXT: ret i1 [[OR]]
;
%t0 = shl i32 1, %c1
@@ -506,7 +524,7 @@ define i1 @foo1_or_signbit_lshr_without_shifting_signbit_logical(i32 %k, i32 %c1
; CHECK-NEXT: [[T2:%.*]] = icmp ne i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = shl i32 [[K]], [[C2:%.*]]
; CHECK-NEXT: [[T4:%.*]] = icmp slt i32 [[T3]], 0
-; CHECK-NEXT: [[OR:%.*]] = and i1 [[T2]], [[T4]]
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
; CHECK-NEXT: ret i1 [[OR]]
;
%t0 = shl i32 1, %c1
@@ -538,10 +556,11 @@ define i1 @foo1_and_signbit_lshr_without_shifting_signbit_both_sides(i32 %k, i32
define i1 @foo1_and_signbit_lshr_without_shifting_signbit_both_sides_logical(i32 %k, i32 %c1, i32 %c2) {
; CHECK-LABEL: @foo1_and_signbit_lshr_without_shifting_signbit_both_sides_logical(
; CHECK-NEXT: [[T0:%.*]] = shl i32 [[K:%.*]], [[C1:%.*]]
+; CHECK-NEXT: [[T1:%.*]] = icmp sgt i32 [[T0]], -1
; CHECK-NEXT: [[T2:%.*]] = shl i32 [[K]], [[C2:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[T0]], [[T2]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[TMP1]], -1
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[T3:%.*]] = icmp sgt i32 [[T2]], -1
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[T1]], i1 true, i1 [[T3]]
+; CHECK-NEXT: ret i1 [[OR]]
;
%t0 = shl i32 %k, %c1
%t1 = icmp sgt i32 %t0, -1
@@ -570,10 +589,11 @@ define i1 @foo1_or_signbit_lshr_without_shifting_signbit_both_sides(i32 %k, i32
define i1 @foo1_or_signbit_lshr_without_shifting_signbit_both_sides_logical(i32 %k, i32 %c1, i32 %c2) {
; CHECK-LABEL: @foo1_or_signbit_lshr_without_shifting_signbit_both_sides_logical(
; CHECK-NEXT: [[T0:%.*]] = shl i32 [[K:%.*]], [[C1:%.*]]
+; CHECK-NEXT: [[T1:%.*]] = icmp slt i32 [[T0]], 0
; CHECK-NEXT: [[T2:%.*]] = shl i32 [[K]], [[C2:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[T0]], [[T2]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP1]], 0
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[T3:%.*]] = icmp slt i32 [[T2]], 0
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[T1]], i1 [[T3]], i1 false
+; CHECK-NEXT: ret i1 [[OR]]
;
%t0 = shl i32 %k, %c1
%t1 = icmp slt i32 %t0, 0
@@ -612,10 +632,12 @@ define i1 @foo1_and_extra_use_shl_logical(i32 %k, i32 %c1, i32 %c2, i32* %p) {
; CHECK-NEXT: [[T0:%.*]] = shl i32 1, [[C1:%.*]]
; CHECK-NEXT: store i32 [[T0]], i32* [[P:%.*]], align 4
; CHECK-NEXT: [[T1:%.*]] = shl i32 1, [[C2:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[T0]], [[T1]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[K:%.*]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]
-; CHECK-NEXT: ret i1 [[TMP3]]
+; CHECK-NEXT: [[T2:%.*]] = and i32 [[T0]], [[K:%.*]]
+; CHECK-NEXT: [[T3:%.*]] = icmp eq i32 [[T2]], 0
+; CHECK-NEXT: [[T4:%.*]] = and i32 [[T1]], [[K]]
+; CHECK-NEXT: [[T5:%.*]] = icmp eq i32 [[T4]], 0
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[T3]], i1 true, i1 [[T5]]
+; CHECK-NEXT: ret i1 [[OR]]
;
%t0 = shl i32 1, %c1
store i32 %t0, i32* %p ; extra use of shl
@@ -657,10 +679,11 @@ define i1 @foo1_and_extra_use_and_logical(i32 %k, i32 %c1, i32 %c2, i32* %p) {
; CHECK-NEXT: [[T1:%.*]] = shl i32 1, [[C2:%.*]]
; CHECK-NEXT: [[T2:%.*]] = and i32 [[T0]], [[K:%.*]]
; CHECK-NEXT: store i32 [[T2]], i32* [[P:%.*]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[T0]], [[T1]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[K]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]
-; CHECK-NEXT: ret i1 [[TMP3]]
+; CHECK-NEXT: [[T3:%.*]] = icmp eq i32 [[T2]], 0
+; CHECK-NEXT: [[T4:%.*]] = and i32 [[T1]], [[K]]
+; CHECK-NEXT: [[T5:%.*]] = icmp eq i32 [[T4]], 0
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[T3]], i1 true, i1 [[T5]]
+; CHECK-NEXT: ret i1 [[OR]]
;
%t0 = shl i32 1, %c1
%t1 = shl i32 1, %c2
@@ -704,10 +727,10 @@ define i1 @foo1_and_extra_use_cmp_logical(i32 %k, i32 %c1, i32 %c2, i1* %p) {
; CHECK-NEXT: [[T2:%.*]] = and i32 [[T0]], [[K:%.*]]
; CHECK-NEXT: [[T3:%.*]] = icmp eq i32 [[T2]], 0
; CHECK-NEXT: store i1 [[T3]], i1* [[P:%.*]], align 1
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[T0]], [[T1]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[K]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]
-; CHECK-NEXT: ret i1 [[TMP3]]
+; CHECK-NEXT: [[T4:%.*]] = and i32 [[T1]], [[K]]
+; CHECK-NEXT: [[T5:%.*]] = icmp eq i32 [[T4]], 0
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[T3]], i1 true, i1 [[T5]]
+; CHECK-NEXT: ret i1 [[OR]]
;
%t0 = shl i32 1, %c1
%t1 = shl i32 1, %c2
@@ -747,10 +770,12 @@ define i1 @foo1_and_extra_use_shl2_logical(i32 %k, i32 %c1, i32 %c2, i32* %p) {
; CHECK-NEXT: [[T0:%.*]] = shl i32 1, [[C1:%.*]]
; CHECK-NEXT: [[T1:%.*]] = shl i32 1, [[C2:%.*]]
; CHECK-NEXT: store i32 [[T1]], i32* [[P:%.*]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[T0]], [[T1]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[K:%.*]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]
-; CHECK-NEXT: ret i1 [[TMP3]]
+; CHECK-NEXT: [[T2:%.*]] = and i32 [[T0]], [[K:%.*]]
+; CHECK-NEXT: [[T3:%.*]] = icmp eq i32 [[T2]], 0
+; CHECK-NEXT: [[T4:%.*]] = and i32 [[T1]], [[K]]
+; CHECK-NEXT: [[T5:%.*]] = icmp eq i32 [[T4]], 0
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[T3]], i1 true, i1 [[T5]]
+; CHECK-NEXT: ret i1 [[OR]]
;
%t0 = shl i32 1, %c1
%t1 = shl i32 1, %c2
@@ -790,12 +815,13 @@ define i1 @foo1_and_extra_use_and2_logical(i32 %k, i32 %c1, i32 %c2, i32* %p) {
; CHECK-LABEL: @foo1_and_extra_use_and2_logical(
; CHECK-NEXT: [[T0:%.*]] = shl i32 1, [[C1:%.*]]
; CHECK-NEXT: [[T1:%.*]] = shl i32 1, [[C2:%.*]]
-; CHECK-NEXT: [[T4:%.*]] = and i32 [[T1]], [[K:%.*]]
+; CHECK-NEXT: [[T2:%.*]] = and i32 [[T0]], [[K:%.*]]
+; CHECK-NEXT: [[T3:%.*]] = icmp eq i32 [[T2]], 0
+; CHECK-NEXT: [[T4:%.*]] = and i32 [[T1]], [[K]]
; CHECK-NEXT: store i32 [[T4]], i32* [[P:%.*]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[T0]], [[T1]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[K]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]
-; CHECK-NEXT: ret i1 [[TMP3]]
+; CHECK-NEXT: [[T5:%.*]] = icmp eq i32 [[T4]], 0
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[T3]], i1 true, i1 [[T5]]
+; CHECK-NEXT: ret i1 [[OR]]
;
%t0 = shl i32 1, %c1
%t1 = shl i32 1, %c2
@@ -836,13 +862,13 @@ define i1 @foo1_and_extra_use_cmp2_logical(i32 %k, i32 %c1, i32 %c2, i1* %p) {
; CHECK-LABEL: @foo1_and_extra_use_cmp2_logical(
; CHECK-NEXT: [[T0:%.*]] = shl i32 1, [[C1:%.*]]
; CHECK-NEXT: [[T1:%.*]] = shl i32 1, [[C2:%.*]]
-; CHECK-NEXT: [[T4:%.*]] = and i32 [[T1]], [[K:%.*]]
+; CHECK-NEXT: [[T2:%.*]] = and i32 [[T0]], [[K:%.*]]
+; CHECK-NEXT: [[T3:%.*]] = icmp eq i32 [[T2]], 0
+; CHECK-NEXT: [[T4:%.*]] = and i32 [[T1]], [[K]]
; CHECK-NEXT: [[T5:%.*]] = icmp eq i32 [[T4]], 0
; CHECK-NEXT: store i1 [[T5]], i1* [[P:%.*]], align 1
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[T0]], [[T1]]
-; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], [[K]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], [[TMP1]]
-; CHECK-NEXT: ret i1 [[TMP3]]
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[T3]], i1 true, i1 [[T5]]
+; CHECK-NEXT: ret i1 [[OR]]
;
%t0 = shl i32 1, %c1
%t1 = shl i32 1, %c2
@@ -886,7 +912,7 @@ define i1 @foo1_and_signbit_lshr_without_shifting_signbit_extra_use_shl1_logical
; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = shl i32 [[K]], [[C2:%.*]]
; CHECK-NEXT: [[T4:%.*]] = icmp sgt i32 [[T3]], -1
-; CHECK-NEXT: [[OR:%.*]] = or i1 [[T2]], [[T4]]
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[T2]], i1 true, i1 [[T4]]
; CHECK-NEXT: ret i1 [[OR]]
;
%t0 = shl i32 1, %c1
@@ -929,7 +955,7 @@ define i1 @foo1_and_signbit_lshr_without_shifting_signbit_extra_use_and_logical(
; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = shl i32 [[K]], [[C2:%.*]]
; CHECK-NEXT: [[T4:%.*]] = icmp sgt i32 [[T3]], -1
-; CHECK-NEXT: [[OR:%.*]] = or i1 [[T2]], [[T4]]
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[T2]], i1 true, i1 [[T4]]
; CHECK-NEXT: ret i1 [[OR]]
;
%t0 = shl i32 1, %c1
@@ -972,7 +998,7 @@ define i1 @foo1_and_signbit_lshr_without_shifting_signbit_extra_use_cmp1_logical
; CHECK-NEXT: store i1 [[T2]], i1* [[P:%.*]], align 1
; CHECK-NEXT: [[T3:%.*]] = shl i32 [[K]], [[C2:%.*]]
; CHECK-NEXT: [[T4:%.*]] = icmp sgt i32 [[T3]], -1
-; CHECK-NEXT: [[OR:%.*]] = or i1 [[T2]], [[T4]]
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[T2]], i1 true, i1 [[T4]]
; CHECK-NEXT: ret i1 [[OR]]
;
%t0 = shl i32 1, %c1
@@ -1015,7 +1041,7 @@ define i1 @foo1_and_signbit_lshr_without_shifting_signbit_extra_use_shl2_logical
; CHECK-NEXT: [[T3:%.*]] = shl i32 [[K]], [[C2:%.*]]
; CHECK-NEXT: store i32 [[T3]], i32* [[P:%.*]], align 4
; CHECK-NEXT: [[T4:%.*]] = icmp sgt i32 [[T3]], -1
-; CHECK-NEXT: [[OR:%.*]] = or i1 [[T2]], [[T4]]
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[T2]], i1 true, i1 [[T4]]
; CHECK-NEXT: ret i1 [[OR]]
;
%t0 = shl i32 1, %c1
@@ -1058,7 +1084,7 @@ define i1 @foo1_and_signbit_lshr_without_shifting_signbit_extra_use_cmp2_logical
; CHECK-NEXT: [[T3:%.*]] = shl i32 [[K]], [[C2:%.*]]
; CHECK-NEXT: [[T4:%.*]] = icmp sgt i32 [[T3]], -1
; CHECK-NEXT: store i1 [[T4]], i1* [[P:%.*]], align 1
-; CHECK-NEXT: [[OR:%.*]] = or i1 [[T2]], [[T4]]
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[T2]], i1 true, i1 [[T4]]
; CHECK-NEXT: ret i1 [[OR]]
;
%t0 = shl i32 1, %c1
@@ -1100,7 +1126,7 @@ define i1 @foo1_and_signbit_lshr_without_shifting_signbit_not_pwr2_logical(i32 %
; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = shl i32 [[K]], [[C2:%.*]]
; CHECK-NEXT: [[T4:%.*]] = icmp sgt i32 [[T3]], -1
-; CHECK-NEXT: [[OR:%.*]] = or i1 [[T2]], [[T4]]
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[T2]], i1 true, i1 [[T4]]
; CHECK-NEXT: ret i1 [[OR]]
;
%t0 = shl i32 3, %c1
diff --git llvm/test/Transforms/InstCombine/or-fcmp.ll llvm/test/Transforms/InstCombine/or-fcmp.ll
index da12ddf668c4..40a38eac90cb 100644
--- llvm/test/Transforms/InstCombine/or-fcmp.ll
+++ llvm/test/Transforms/InstCombine/or-fcmp.ll
@@ -14,8 +14,10 @@ define i1 @PR1738(double %x, double %y) {
define i1 @PR1738_logical(double %x, double %y) {
; CHECK-LABEL: @PR1738_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno double [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp uno double [[X:%.*]], 0.000000e+00
+; CHECK-NEXT: [[CMP2:%.*]] = fcmp uno double [[Y:%.*]], 0.000000e+00
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[CMP1]], i1 true, i1 [[CMP2]]
+; CHECK-NEXT: ret i1 [[OR]]
;
%cmp1 = fcmp uno double %x, 0.0
%cmp2 = fcmp uno double %y, 0.0
@@ -52,8 +54,10 @@ define i1 @PR41069(double %a, double %b, double %c, double %d) {
define i1 @PR41069_logical(double %a, double %b, double %c, double %d) {
; CHECK-LABEL: @PR41069_logical(
; CHECK-NEXT: [[UNO1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno double [[D:%.*]], [[C:%.*]]
-; CHECK-NEXT: [[R:%.*]] = or i1 [[TMP1]], [[UNO1]]
+; CHECK-NEXT: [[UNO2:%.*]] = fcmp uno double [[C:%.*]], 0.000000e+00
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[UNO1]], i1 true, i1 [[UNO2]]
+; CHECK-NEXT: [[UNO3:%.*]] = fcmp uno double [[D:%.*]], 0.000000e+00
+; CHECK-NEXT: [[R:%.*]] = select i1 [[OR]], i1 true, i1 [[UNO3]]
; CHECK-NEXT: ret i1 [[R]]
;
%uno1 = fcmp uno double %a, %b
@@ -82,8 +86,10 @@ define i1 @PR41069_commute(double %a, double %b, double %c, double %d) {
define i1 @PR41069_commute_logical(double %a, double %b, double %c, double %d) {
; CHECK-LABEL: @PR41069_commute_logical(
; CHECK-NEXT: [[UNO1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno double [[D:%.*]], [[C:%.*]]
-; CHECK-NEXT: [[R:%.*]] = or i1 [[TMP1]], [[UNO1]]
+; CHECK-NEXT: [[UNO2:%.*]] = fcmp uno double [[C:%.*]], 0.000000e+00
+; CHECK-NEXT: [[UNO3:%.*]] = fcmp uno double [[D:%.*]], 0.000000e+00
+; CHECK-NEXT: [[TMP1:%.*]] = or i1 [[UNO3]], [[UNO1]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP1]], i1 true, i1 [[UNO2]]
; CHECK-NEXT: ret i1 [[R]]
;
%uno1 = fcmp uno double %a, %b
@@ -133,8 +139,10 @@ define i1 @fcmp_uno_nonzero(float %x, float %y) {
define i1 @fcmp_uno_nonzero_logical(float %x, float %y) {
; CHECK-LABEL: @fcmp_uno_nonzero_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno float [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp uno float [[X:%.*]], 0.000000e+00
+; CHECK-NEXT: [[CMP2:%.*]] = fcmp uno float [[Y:%.*]], 0.000000e+00
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[CMP1]], i1 true, i1 [[CMP2]]
+; CHECK-NEXT: ret i1 [[OR]]
;
%cmp1 = fcmp uno float %x, 1.0
%cmp2 = fcmp uno float %y, 2.0
@@ -208,8 +216,10 @@ define i1 @auto_gen_2(double %a, double %b) {
define i1 @auto_gen_2_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_2_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp oeq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp oeq double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -252,8 +262,10 @@ define i1 @auto_gen_4(double %a, double %b) {
define i1 @auto_gen_4_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_4_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ogt double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -274,8 +286,10 @@ define i1 @auto_gen_5(double %a, double %b) {
define i1 @auto_gen_5_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_5_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ogt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ogt double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -318,8 +332,10 @@ define i1 @auto_gen_7(double %a, double %b) {
define i1 @auto_gen_7_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_7_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp oge double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -340,8 +356,10 @@ define i1 @auto_gen_8(double %a, double %b) {
define i1 @auto_gen_8_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_8_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp oge double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -362,8 +380,10 @@ define i1 @auto_gen_9(double %a, double %b) {
define i1 @auto_gen_9_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_9_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp oge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp oge double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -406,8 +426,10 @@ define i1 @auto_gen_11(double %a, double %b) {
define i1 @auto_gen_11_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_11_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp olt double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -428,8 +450,10 @@ define i1 @auto_gen_12(double %a, double %b) {
define i1 @auto_gen_12_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_12_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp olt double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -450,8 +474,10 @@ define i1 @auto_gen_13(double %a, double %b) {
define i1 @auto_gen_13_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_13_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp olt double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -472,8 +498,10 @@ define i1 @auto_gen_14(double %a, double %b) {
define i1 @auto_gen_14_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_14_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp olt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp olt double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -516,8 +544,10 @@ define i1 @auto_gen_16(double %a, double %b) {
define i1 @auto_gen_16_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_16_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ole double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -538,8 +568,10 @@ define i1 @auto_gen_17(double %a, double %b) {
define i1 @auto_gen_17_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_17_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ole double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -560,8 +592,10 @@ define i1 @auto_gen_18(double %a, double %b) {
define i1 @auto_gen_18_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_18_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ole double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -582,8 +616,10 @@ define i1 @auto_gen_19(double %a, double %b) {
define i1 @auto_gen_19_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_19_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ole double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -604,8 +640,10 @@ define i1 @auto_gen_20(double %a, double %b) {
define i1 @auto_gen_20_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_20_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ole double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ole double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ole double %a, %b
%cmp1 = fcmp ole double %a, %b
@@ -648,8 +686,10 @@ define i1 @auto_gen_22(double %a, double %b) {
define i1 @auto_gen_22_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_22_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp one double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -670,8 +710,10 @@ define i1 @auto_gen_23(double %a, double %b) {
define i1 @auto_gen_23_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_23_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp one double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -692,8 +734,10 @@ define i1 @auto_gen_24(double %a, double %b) {
define i1 @auto_gen_24_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_24_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp one double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -714,8 +758,10 @@ define i1 @auto_gen_25(double %a, double %b) {
define i1 @auto_gen_25_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_25_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp one double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -736,8 +782,10 @@ define i1 @auto_gen_26(double %a, double %b) {
define i1 @auto_gen_26_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_26_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ole double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp one double %a, %b
%cmp1 = fcmp ole double %a, %b
@@ -758,8 +806,10 @@ define i1 @auto_gen_27(double %a, double %b) {
define i1 @auto_gen_27_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_27_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp one double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp one double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp one double %a, %b
%cmp1 = fcmp one double %a, %b
@@ -802,8 +852,10 @@ define i1 @auto_gen_29(double %a, double %b) {
define i1 @auto_gen_29_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_29_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ord double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -824,8 +876,10 @@ define i1 @auto_gen_30(double %a, double %b) {
define i1 @auto_gen_30_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_30_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ord double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -846,8 +900,10 @@ define i1 @auto_gen_31(double %a, double %b) {
define i1 @auto_gen_31_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_31_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ord double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -868,8 +924,10 @@ define i1 @auto_gen_32(double %a, double %b) {
define i1 @auto_gen_32_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_32_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ord double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -890,8 +948,10 @@ define i1 @auto_gen_33(double %a, double %b) {
define i1 @auto_gen_33_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_33_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ole double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ord double %a, %b
%cmp1 = fcmp ole double %a, %b
@@ -912,8 +972,10 @@ define i1 @auto_gen_34(double %a, double %b) {
define i1 @auto_gen_34_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_34_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp one double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ord double %a, %b
%cmp1 = fcmp one double %a, %b
@@ -934,8 +996,10 @@ define i1 @auto_gen_35(double %a, double %b) {
define i1 @auto_gen_35_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_35_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ord double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ord double %a, %b
%cmp1 = fcmp ord double %a, %b
@@ -978,8 +1042,10 @@ define i1 @auto_gen_37(double %a, double %b) {
define i1 @auto_gen_37_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_37_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ueq double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -1000,8 +1066,10 @@ define i1 @auto_gen_38(double %a, double %b) {
define i1 @auto_gen_38_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_38_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ueq double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -1022,8 +1090,10 @@ define i1 @auto_gen_39(double %a, double %b) {
define i1 @auto_gen_39_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_39_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ueq double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -1044,8 +1114,10 @@ define i1 @auto_gen_40(double %a, double %b) {
define i1 @auto_gen_40_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_40_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ueq double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -1066,8 +1138,10 @@ define i1 @auto_gen_41(double %a, double %b) {
define i1 @auto_gen_41_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_41_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ole double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ueq double %a, %b
%cmp1 = fcmp ole double %a, %b
@@ -1087,7 +1161,10 @@ define i1 @auto_gen_42(double %a, double %b) {
define i1 @auto_gen_42_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_42_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp one double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ueq double %a, %b
%cmp1 = fcmp one double %a, %b
@@ -1107,7 +1184,10 @@ define i1 @auto_gen_43(double %a, double %b) {
define i1 @auto_gen_43_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_43_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ueq double %a, %b
%cmp1 = fcmp ord double %a, %b
@@ -1128,8 +1208,10 @@ define i1 @auto_gen_44(double %a, double %b) {
define i1 @auto_gen_44_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_44_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ueq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ueq double %a, %b
%cmp1 = fcmp ueq double %a, %b
@@ -1172,8 +1254,10 @@ define i1 @auto_gen_46(double %a, double %b) {
define i1 @auto_gen_46_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_46_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ugt double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -1194,8 +1278,10 @@ define i1 @auto_gen_47(double %a, double %b) {
define i1 @auto_gen_47_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_47_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ugt double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -1216,8 +1302,10 @@ define i1 @auto_gen_48(double %a, double %b) {
define i1 @auto_gen_48_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_48_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ugt double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -1238,8 +1326,10 @@ define i1 @auto_gen_49(double %a, double %b) {
define i1 @auto_gen_49_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_49_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ugt double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -1259,7 +1349,10 @@ define i1 @auto_gen_50(double %a, double %b) {
define i1 @auto_gen_50_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_50_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ole double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ugt double %a, %b
%cmp1 = fcmp ole double %a, %b
@@ -1280,8 +1373,10 @@ define i1 @auto_gen_51(double %a, double %b) {
define i1 @auto_gen_51_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_51_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp one double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ugt double %a, %b
%cmp1 = fcmp one double %a, %b
@@ -1301,7 +1396,10 @@ define i1 @auto_gen_52(double %a, double %b) {
define i1 @auto_gen_52_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_52_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ugt double %a, %b
%cmp1 = fcmp ord double %a, %b
@@ -1322,8 +1420,10 @@ define i1 @auto_gen_53(double %a, double %b) {
define i1 @auto_gen_53_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_53_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ueq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ugt double %a, %b
%cmp1 = fcmp ueq double %a, %b
@@ -1344,8 +1444,10 @@ define i1 @auto_gen_54(double %a, double %b) {
define i1 @auto_gen_54_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_54_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ugt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ugt double %a, %b
%cmp1 = fcmp ugt double %a, %b
@@ -1388,8 +1490,10 @@ define i1 @auto_gen_56(double %a, double %b) {
define i1 @auto_gen_56_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_56_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uge double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -1410,8 +1514,10 @@ define i1 @auto_gen_57(double %a, double %b) {
define i1 @auto_gen_57_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_57_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uge double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -1432,8 +1538,10 @@ define i1 @auto_gen_58(double %a, double %b) {
define i1 @auto_gen_58_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_58_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uge double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -1453,7 +1561,10 @@ define i1 @auto_gen_59(double %a, double %b) {
define i1 @auto_gen_59_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_59_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uge double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -1473,7 +1584,10 @@ define i1 @auto_gen_60(double %a, double %b) {
define i1 @auto_gen_60_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_60_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ole double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uge double %a, %b
%cmp1 = fcmp ole double %a, %b
@@ -1493,7 +1607,10 @@ define i1 @auto_gen_61(double %a, double %b) {
define i1 @auto_gen_61_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_61_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp one double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uge double %a, %b
%cmp1 = fcmp one double %a, %b
@@ -1513,7 +1630,10 @@ define i1 @auto_gen_62(double %a, double %b) {
define i1 @auto_gen_62_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_62_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uge double %a, %b
%cmp1 = fcmp ord double %a, %b
@@ -1534,8 +1654,10 @@ define i1 @auto_gen_63(double %a, double %b) {
define i1 @auto_gen_63_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_63_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ueq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uge double %a, %b
%cmp1 = fcmp ueq double %a, %b
@@ -1556,8 +1678,10 @@ define i1 @auto_gen_64(double %a, double %b) {
define i1 @auto_gen_64_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_64_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ugt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uge double %a, %b
%cmp1 = fcmp ugt double %a, %b
@@ -1578,8 +1702,10 @@ define i1 @auto_gen_65(double %a, double %b) {
define i1 @auto_gen_65_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_65_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp uge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uge double %a, %b
%cmp1 = fcmp uge double %a, %b
@@ -1622,8 +1748,10 @@ define i1 @auto_gen_67(double %a, double %b) {
define i1 @auto_gen_67_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_67_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -1644,8 +1772,10 @@ define i1 @auto_gen_68(double %a, double %b) {
define i1 @auto_gen_68_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_68_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -1665,7 +1795,10 @@ define i1 @auto_gen_69(double %a, double %b) {
define i1 @auto_gen_69_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_69_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -1686,8 +1819,10 @@ define i1 @auto_gen_70(double %a, double %b) {
define i1 @auto_gen_70_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_70_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -1708,8 +1843,10 @@ define i1 @auto_gen_71(double %a, double %b) {
define i1 @auto_gen_71_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_71_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ole double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp ole double %a, %b
@@ -1730,8 +1867,10 @@ define i1 @auto_gen_72(double %a, double %b) {
define i1 @auto_gen_72_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_72_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp one double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp one double %a, %b
@@ -1751,7 +1890,10 @@ define i1 @auto_gen_73(double %a, double %b) {
define i1 @auto_gen_73_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_73_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp ord double %a, %b
@@ -1772,8 +1914,10 @@ define i1 @auto_gen_74(double %a, double %b) {
define i1 @auto_gen_74_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_74_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ueq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp ueq double %a, %b
@@ -1794,8 +1938,10 @@ define i1 @auto_gen_75(double %a, double %b) {
define i1 @auto_gen_75_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_75_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ugt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp ugt double %a, %b
@@ -1815,7 +1961,10 @@ define i1 @auto_gen_76(double %a, double %b) {
define i1 @auto_gen_76_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_76_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp uge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp uge double %a, %b
@@ -1836,8 +1985,10 @@ define i1 @auto_gen_77(double %a, double %b) {
define i1 @auto_gen_77_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_77_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ult double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ult double %a, %b
%cmp1 = fcmp ult double %a, %b
@@ -1880,8 +2031,10 @@ define i1 @auto_gen_79(double %a, double %b) {
define i1 @auto_gen_79_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_79_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -1901,7 +2054,10 @@ define i1 @auto_gen_80(double %a, double %b) {
define i1 @auto_gen_80_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_80_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -1921,7 +2077,10 @@ define i1 @auto_gen_81(double %a, double %b) {
define i1 @auto_gen_81_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_81_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -1942,8 +2101,10 @@ define i1 @auto_gen_82(double %a, double %b) {
define i1 @auto_gen_82_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_82_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -1964,8 +2125,10 @@ define i1 @auto_gen_83(double %a, double %b) {
define i1 @auto_gen_83_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_83_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ole double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp ole double %a, %b
@@ -1985,7 +2148,10 @@ define i1 @auto_gen_84(double %a, double %b) {
define i1 @auto_gen_84_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_84_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp one double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp one double %a, %b
@@ -2005,7 +2171,10 @@ define i1 @auto_gen_85(double %a, double %b) {
define i1 @auto_gen_85_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_85_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp ord double %a, %b
@@ -2026,8 +2195,10 @@ define i1 @auto_gen_86(double %a, double %b) {
define i1 @auto_gen_86_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_86_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ueq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp ueq double %a, %b
@@ -2047,7 +2218,10 @@ define i1 @auto_gen_87(double %a, double %b) {
define i1 @auto_gen_87_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_87_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ugt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp ugt double %a, %b
@@ -2067,7 +2241,10 @@ define i1 @auto_gen_88(double %a, double %b) {
define i1 @auto_gen_88_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_88_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp uge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp uge double %a, %b
@@ -2088,8 +2265,10 @@ define i1 @auto_gen_89(double %a, double %b) {
define i1 @auto_gen_89_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_89_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ult double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp ult double %a, %b
@@ -2110,8 +2289,10 @@ define i1 @auto_gen_90(double %a, double %b) {
define i1 @auto_gen_90_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_90_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ule double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp ule double %a, %b
%cmp1 = fcmp ule double %a, %b
@@ -2153,7 +2334,10 @@ define i1 @auto_gen_92(double %a, double %b) {
define i1 @auto_gen_92_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_92_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -2174,8 +2358,10 @@ define i1 @auto_gen_93(double %a, double %b) {
define i1 @auto_gen_93_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_93_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -2195,7 +2381,10 @@ define i1 @auto_gen_94(double %a, double %b) {
define i1 @auto_gen_94_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_94_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -2216,8 +2405,10 @@ define i1 @auto_gen_95(double %a, double %b) {
define i1 @auto_gen_95_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_95_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -2237,7 +2428,10 @@ define i1 @auto_gen_96(double %a, double %b) {
define i1 @auto_gen_96_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_96_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ole double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp ole double %a, %b
@@ -2258,8 +2452,10 @@ define i1 @auto_gen_97(double %a, double %b) {
define i1 @auto_gen_97_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_97_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp one double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp one double %a, %b
@@ -2279,7 +2475,10 @@ define i1 @auto_gen_98(double %a, double %b) {
define i1 @auto_gen_98_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_98_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp ord double %a, %b
@@ -2299,7 +2498,10 @@ define i1 @auto_gen_99(double %a, double %b) {
define i1 @auto_gen_99_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_99_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ueq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp ueq double %a, %b
@@ -2320,8 +2522,10 @@ define i1 @auto_gen_100(double %a, double %b) {
define i1 @auto_gen_100_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_100_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ugt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp ugt double %a, %b
@@ -2341,7 +2545,10 @@ define i1 @auto_gen_101(double %a, double %b) {
define i1 @auto_gen_101_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_101_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp uge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp uge double %a, %b
@@ -2362,8 +2569,10 @@ define i1 @auto_gen_102(double %a, double %b) {
define i1 @auto_gen_102_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_102_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ult double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp ult double %a, %b
@@ -2383,7 +2592,10 @@ define i1 @auto_gen_103(double %a, double %b) {
define i1 @auto_gen_103_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_103_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ule double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp ule double %a, %b
@@ -2404,8 +2616,10 @@ define i1 @auto_gen_104(double %a, double %b) {
define i1 @auto_gen_104_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_104_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp une double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp une double %a, %b
%cmp1 = fcmp une double %a, %b
@@ -2448,8 +2662,10 @@ define i1 @auto_gen_106(double %a, double %b) {
define i1 @auto_gen_106_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_106_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oeq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp oeq double %a, %b
@@ -2470,8 +2686,10 @@ define i1 @auto_gen_107(double %a, double %b) {
define i1 @auto_gen_107_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_107_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp ogt double %a, %b
@@ -2492,8 +2710,10 @@ define i1 @auto_gen_108(double %a, double %b) {
define i1 @auto_gen_108_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_108_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp oge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp oge double %a, %b
@@ -2514,8 +2734,10 @@ define i1 @auto_gen_109(double %a, double %b) {
define i1 @auto_gen_109_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_109_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp olt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp olt double %a, %b
@@ -2536,8 +2758,10 @@ define i1 @auto_gen_110(double %a, double %b) {
define i1 @auto_gen_110_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_110_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ole double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp ole double %a, %b
@@ -2558,8 +2782,10 @@ define i1 @auto_gen_111(double %a, double %b) {
define i1 @auto_gen_111_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_111_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp one double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp one double %a, %b
@@ -2579,7 +2805,10 @@ define i1 @auto_gen_112(double %a, double %b) {
define i1 @auto_gen_112_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_112_logical(
-; CHECK-NEXT: ret i1 true
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ord double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp ord double %a, %b
@@ -2600,8 +2829,10 @@ define i1 @auto_gen_113(double %a, double %b) {
define i1 @auto_gen_113_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_113_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ueq double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ueq double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp ueq double %a, %b
@@ -2622,8 +2853,10 @@ define i1 @auto_gen_114(double %a, double %b) {
define i1 @auto_gen_114_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_114_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ugt double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ugt double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp ugt double %a, %b
@@ -2644,8 +2877,10 @@ define i1 @auto_gen_115(double %a, double %b) {
define i1 @auto_gen_115_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_115_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uge double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp uge double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp uge double %a, %b
@@ -2666,8 +2901,10 @@ define i1 @auto_gen_116(double %a, double %b) {
define i1 @auto_gen_116_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_116_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ult double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ult double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp ult double %a, %b
@@ -2688,8 +2925,10 @@ define i1 @auto_gen_117(double %a, double %b) {
define i1 @auto_gen_117_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_117_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp ule double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp ule double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp ule double %a, %b
@@ -2710,8 +2949,10 @@ define i1 @auto_gen_118(double %a, double %b) {
define i1 @auto_gen_118_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_118_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp une double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp une double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp une double %a, %b
@@ -2732,8 +2973,10 @@ define i1 @auto_gen_119(double %a, double %b) {
define i1 @auto_gen_119_logical(double %a, double %b) {
; CHECK-LABEL: @auto_gen_119_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP:%.*]] = fcmp uno double [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[CMP1:%.*]] = fcmp uno double [[A]], [[B]]
+; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[CMP]], i1 true, i1 [[CMP1]]
+; CHECK-NEXT: ret i1 [[RETVAL]]
;
%cmp = fcmp uno double %a, %b
%cmp1 = fcmp uno double %a, %b
diff --git llvm/test/Transforms/InstCombine/or.ll llvm/test/Transforms/InstCombine/or.ll
index ff6244526563..896550ec64f5 100644
--- llvm/test/Transforms/InstCombine/or.ll
+++ llvm/test/Transforms/InstCombine/or.ll
@@ -39,8 +39,10 @@ define i1 @test14(i32 %A, i32 %B) {
define i1 @test14_logical(i32 %A, i32 %B) {
; CHECK-LABEL: @test14_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[C1:%.*]] = icmp ult i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[C2:%.*]] = icmp ugt i32 [[A]], [[B]]
+; CHECK-NEXT: [[D:%.*]] = select i1 [[C1]], i1 true, i1 [[C2]]
+; CHECK-NEXT: ret i1 [[D]]
;
%C1 = icmp ult i32 %A, %B
%C2 = icmp ugt i32 %A, %B
@@ -63,8 +65,10 @@ define i1 @test15(i32 %A, i32 %B) {
define i1 @test15_logical(i32 %A, i32 %B) {
; CHECK-LABEL: @test15_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ule i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[C1:%.*]] = icmp ult i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[C2:%.*]] = icmp eq i32 [[A]], [[B]]
+; CHECK-NEXT: [[D:%.*]] = select i1 [[C1]], i1 true, i1 [[C2]]
+; CHECK-NEXT: ret i1 [[D]]
;
%C1 = icmp ult i32 %A, %B
%C2 = icmp eq i32 %A, %B
@@ -210,9 +214,10 @@ define i1 @test25(i32 %A, i32 %B) {
define i1 @test25_logical(i32 %A, i32 %B) {
; CHECK-LABEL: @test25_logical(
-; CHECK-NEXT: [[C:%.*]] = icmp ne i32 [[A:%.*]], 0
-; CHECK-NEXT: [[D:%.*]] = icmp ne i32 [[B:%.*]], 57
-; CHECK-NEXT: [[F:%.*]] = and i1 [[C]], [[D]]
+; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[A:%.*]], 0
+; CHECK-NEXT: [[D:%.*]] = icmp eq i32 [[B:%.*]], 57
+; CHECK-NEXT: [[E:%.*]] = select i1 [[C]], i1 true, i1 [[D]]
+; CHECK-NEXT: [[F:%.*]] = xor i1 [[E]], true
; CHECK-NEXT: ret i1 [[F]]
;
%C = icmp eq i32 %A, 0
@@ -238,9 +243,10 @@ define i1 @test26(i32 %A, i32 %B) {
define i1 @test26_logical(i32 %A, i32 %B) {
; CHECK-LABEL: @test26_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[C1:%.*]] = icmp eq i32 [[A:%.*]], 0
+; CHECK-NEXT: [[C2:%.*]] = icmp eq i32 [[B:%.*]], 0
+; CHECK-NEXT: [[D:%.*]] = select i1 [[C1]], i1 [[C2]], i1 false
+; CHECK-NEXT: ret i1 [[D]]
;
%C1 = icmp eq i32 %A, 0
%C2 = icmp eq i32 %B, 0
@@ -293,9 +299,10 @@ define i1 @test28(i32 %A, i32 %B) {
define i1 @test28_logical(i32 %A, i32 %B) {
; CHECK-LABEL: @test28_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[C1:%.*]] = icmp ne i32 [[A:%.*]], 0
+; CHECK-NEXT: [[C2:%.*]] = icmp ne i32 [[B:%.*]], 0
+; CHECK-NEXT: [[D:%.*]] = select i1 [[C1]], i1 true, i1 [[C2]]
+; CHECK-NEXT: ret i1 [[D]]
;
%C1 = icmp ne i32 %A, 0
%C2 = icmp ne i32 %B, 0
@@ -420,8 +427,9 @@ define i1 @test33(i1 %X, i1 %Y) {
define i1 @test33_logical(i1 %X, i1 %Y) {
; CHECK-LABEL: @test33_logical(
-; CHECK-NEXT: [[A:%.*]] = or i1 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: ret i1 [[A]]
+; CHECK-NEXT: [[A:%.*]] = select i1 [[X:%.*]], i1 true, i1 [[Y:%.*]]
+; CHECK-NEXT: [[B:%.*]] = select i1 [[A]], i1 true, i1 [[X]]
+; CHECK-NEXT: ret i1 [[B]]
;
%a = select i1 %X, i1 true, i1 %Y
%b = select i1 %a, i1 true, i1 %X
@@ -466,8 +474,10 @@ define i1 @test36(i32 %x) {
define i1 @test36_logical(i32 %x) {
; CHECK-LABEL: @test36_logical(
; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -23
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 [[TMP1]], 3
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 [[TMP1]], 2
+; CHECK-NEXT: [[CMP3:%.*]] = icmp eq i32 [[X]], 25
+; CHECK-NEXT: [[RET2:%.*]] = select i1 [[TMP2]], i1 true, i1 [[CMP3]]
+; CHECK-NEXT: ret i1 [[RET2]]
;
%cmp1 = icmp eq i32 %x, 23
%cmp2 = icmp eq i32 %x, 24
@@ -493,8 +503,10 @@ define i1 @test37(i32 %x) {
define i1 @test37_logical(i32 %x) {
; CHECK-LABEL: @test37_logical(
; CHECK-NEXT: [[ADD1:%.*]] = add i32 [[X:%.*]], 7
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[ADD1]], 31
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[ADD1]], 30
+; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[X]], 23
+; CHECK-NEXT: [[RET1:%.*]] = select i1 [[CMP1]], i1 true, i1 [[CMP2]]
+; CHECK-NEXT: ret i1 [[RET1]]
;
%add1 = add i32 %x, 7
%cmp1 = icmp ult i32 %add1, 30
@@ -779,10 +791,12 @@ define i1 @test46(i8 signext %c) {
define i1 @test46_logical(i8 signext %c) {
; CHECK-LABEL: @test46_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[C:%.*]], -33
-; CHECK-NEXT: [[TMP2:%.*]] = add i8 [[TMP1]], -65
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ult i8 [[TMP2]], 26
-; CHECK-NEXT: ret i1 [[TMP3]]
+; CHECK-NEXT: [[C_OFF:%.*]] = add i8 [[C:%.*]], -97
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i8 [[C_OFF]], 26
+; CHECK-NEXT: [[C_OFF17:%.*]] = add i8 [[C]], -65
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i8 [[C_OFF17]], 26
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[CMP1]], i1 true, i1 [[CMP2]]
+; CHECK-NEXT: ret i1 [[OR]]
;
%c.off = add i8 %c, -97
%cmp1 = icmp ult i8 %c.off, 26
@@ -843,10 +857,12 @@ define i1 @test47(i8 signext %c) {
define i1 @test47_logical(i8 signext %c) {
; CHECK-LABEL: @test47_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i8 [[C:%.*]], -33
-; CHECK-NEXT: [[TMP2:%.*]] = add i8 [[TMP1]], -65
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ult i8 [[TMP2]], 27
-; CHECK-NEXT: ret i1 [[TMP3]]
+; CHECK-NEXT: [[C_OFF:%.*]] = add i8 [[C:%.*]], -65
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i8 [[C_OFF]], 27
+; CHECK-NEXT: [[C_OFF17:%.*]] = add i8 [[C]], -97
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i8 [[C_OFF17]], 27
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[CMP1]], i1 true, i1 [[CMP2]]
+; CHECK-NEXT: ret i1 [[OR]]
;
%c.off = add i8 %c, -65
%cmp1 = icmp ule i8 %c.off, 26
@@ -990,8 +1006,10 @@ define i1 @or_andn_cmp_1(i32 %a, i32 %b, i32 %c) {
define i1 @or_andn_cmp_1_logical(i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: @or_andn_cmp_1_logical(
; CHECK-NEXT: [[X:%.*]] = icmp sgt i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[X_INV:%.*]] = icmp sle i32 [[A]], [[B]]
; CHECK-NEXT: [[Y:%.*]] = icmp ugt i32 [[C:%.*]], 42
-; CHECK-NEXT: [[OR:%.*]] = or i1 [[X]], [[Y]]
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[Y]], i1 [[X_INV]], i1 false
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[X]], i1 true, i1 [[AND]]
; CHECK-NEXT: ret i1 [[OR]]
;
%x = icmp sgt i32 %a, %b
@@ -1041,8 +1059,10 @@ define i1 @or_andn_cmp_3(i72 %a, i72 %b, i72 %c) {
define i1 @or_andn_cmp_3_logical(i72 %a, i72 %b, i72 %c) {
; CHECK-LABEL: @or_andn_cmp_3_logical(
; CHECK-NEXT: [[X:%.*]] = icmp ugt i72 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[X_INV:%.*]] = icmp ule i72 [[A]], [[B]]
; CHECK-NEXT: [[Y:%.*]] = icmp ugt i72 [[C:%.*]], 42
-; CHECK-NEXT: [[OR:%.*]] = or i1 [[X]], [[Y]]
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[X_INV]], i1 [[Y]], i1 false
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[X]], i1 true, i1 [[AND]]
; CHECK-NEXT: ret i1 [[OR]]
;
%x = icmp ugt i72 %a, %b
@@ -1091,9 +1111,11 @@ define i1 @orn_and_cmp_1(i37 %a, i37 %b, i37 %c) {
define i1 @orn_and_cmp_1_logical(i37 %a, i37 %b, i37 %c) {
; CHECK-LABEL: @orn_and_cmp_1_logical(
-; CHECK-NEXT: [[X_INV:%.*]] = icmp sle i37 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[X:%.*]] = icmp sgt i37 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[X_INV:%.*]] = icmp sle i37 [[A]], [[B]]
; CHECK-NEXT: [[Y:%.*]] = icmp ugt i37 [[C:%.*]], 42
-; CHECK-NEXT: [[OR:%.*]] = or i1 [[X_INV]], [[Y]]
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[Y]], i1 [[X]], i1 false
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[X_INV]], i1 true, i1 [[AND]]
; CHECK-NEXT: ret i1 [[OR]]
;
%x = icmp sgt i37 %a, %b
@@ -1124,9 +1146,11 @@ define i1 @orn_and_cmp_2(i16 %a, i16 %b, i16 %c) {
define i1 @orn_and_cmp_2_logical(i16 %a, i16 %b, i16 %c) {
; CHECK-LABEL: @orn_and_cmp_2_logical(
-; CHECK-NEXT: [[X_INV:%.*]] = icmp slt i16 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[X:%.*]] = icmp sge i16 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[X_INV:%.*]] = icmp slt i16 [[A]], [[B]]
; CHECK-NEXT: [[Y:%.*]] = icmp ugt i16 [[C:%.*]], 42
-; CHECK-NEXT: [[OR:%.*]] = or i1 [[Y]], [[X_INV]]
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[Y]], i1 [[X]], i1 false
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[AND]], i1 true, i1 [[X_INV]]
; CHECK-NEXT: ret i1 [[OR]]
;
%x = icmp sge i16 %a, %b
@@ -1175,9 +1199,11 @@ define i1 @orn_and_cmp_4(i32 %a, i32 %b, i32 %c) {
define i1 @orn_and_cmp_4_logical(i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: @orn_and_cmp_4_logical(
-; CHECK-NEXT: [[X_INV:%.*]] = icmp ne i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[X:%.*]] = icmp eq i32 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[X_INV:%.*]] = icmp ne i32 [[A]], [[B]]
; CHECK-NEXT: [[Y:%.*]] = icmp ugt i32 [[C:%.*]], 42
-; CHECK-NEXT: [[OR:%.*]] = or i1 [[Y]], [[X_INV]]
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[X]], i1 [[Y]], i1 false
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[AND]], i1 true, i1 [[X_INV]]
; CHECK-NEXT: ret i1 [[OR]]
;
%x = icmp eq i32 %a, %b
diff --git llvm/test/Transforms/InstCombine/prevent-cmp-merge.ll llvm/test/Transforms/InstCombine/prevent-cmp-merge.ll
index 17d1dd28e126..3dd89f8eda12 100644
--- llvm/test/Transforms/InstCombine/prevent-cmp-merge.ll
+++ llvm/test/Transforms/InstCombine/prevent-cmp-merge.ll
@@ -26,7 +26,7 @@ define zeroext i1 @test1_logical(i32 %lhs, i32 %rhs) {
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[LHS:%.*]], 5
; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[XOR]], 10
; CHECK-NEXT: [[CMP2:%.*]] = icmp eq i32 [[XOR]], [[RHS:%.*]]
-; CHECK-NEXT: [[SEL:%.*]] = or i1 [[CMP1]], [[CMP2]]
+; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP1]], i1 true, i1 [[CMP2]]
; CHECK-NEXT: ret i1 [[SEL]]
;
diff --git llvm/test/Transforms/InstCombine/range-check.ll llvm/test/Transforms/InstCombine/range-check.ll
index 5d56e0a90360..4639d71a457c 100644
--- llvm/test/Transforms/InstCombine/range-check.ll
+++ llvm/test/Transforms/InstCombine/range-check.ll
@@ -20,8 +20,10 @@ define i1 @test_and1(i32 %x, i32 %n) {
define i1 @test_and1_logical(i32 %x, i32 %n) {
; CHECK-LABEL: @test_and1_logical(
; CHECK-NEXT: [[NN:%.*]] = and i32 [[N:%.*]], 2147483647
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[NN]], [[X:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[A:%.*]] = icmp sgt i32 [[X:%.*]], -1
+; CHECK-NEXT: [[B:%.*]] = icmp sgt i32 [[NN]], [[X]]
+; CHECK-NEXT: [[C:%.*]] = select i1 [[A]], i1 [[B]], i1 false
+; CHECK-NEXT: ret i1 [[C]]
;
%nn = and i32 %n, 2147483647
%a = icmp sge i32 %x, 0
@@ -46,8 +48,10 @@ define i1 @test_and2(i32 %x, i32 %n) {
define i1 @test_and2_logical(i32 %x, i32 %n) {
; CHECK-LABEL: @test_and2_logical(
; CHECK-NEXT: [[NN:%.*]] = and i32 [[N:%.*]], 2147483647
-; CHECK-NEXT: [[TMP1:%.*]] = icmp uge i32 [[NN]], [[X:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[A:%.*]] = icmp sgt i32 [[X:%.*]], -1
+; CHECK-NEXT: [[B:%.*]] = icmp sge i32 [[NN]], [[X]]
+; CHECK-NEXT: [[C:%.*]] = select i1 [[A]], i1 [[B]], i1 false
+; CHECK-NEXT: ret i1 [[C]]
;
%nn = and i32 %n, 2147483647
%a = icmp sgt i32 %x, -1
@@ -124,8 +128,10 @@ define i1 @test_or1(i32 %x, i32 %n) {
define i1 @test_or1_logical(i32 %x, i32 %n) {
; CHECK-LABEL: @test_or1_logical(
; CHECK-NEXT: [[NN:%.*]] = and i32 [[N:%.*]], 2147483647
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ule i32 [[NN]], [[X:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[A:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[B:%.*]] = icmp sle i32 [[NN]], [[X]]
+; CHECK-NEXT: [[C:%.*]] = select i1 [[A]], i1 true, i1 [[B]]
+; CHECK-NEXT: ret i1 [[C]]
;
%nn = and i32 %n, 2147483647
%a = icmp slt i32 %x, 0
@@ -150,8 +156,10 @@ define i1 @test_or2(i32 %x, i32 %n) {
define i1 @test_or2_logical(i32 %x, i32 %n) {
; CHECK-LABEL: @test_or2_logical(
; CHECK-NEXT: [[NN:%.*]] = and i32 [[N:%.*]], 2147483647
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[NN]], [[X:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[A:%.*]] = icmp slt i32 [[X:%.*]], 0
+; CHECK-NEXT: [[B:%.*]] = icmp slt i32 [[NN]], [[X]]
+; CHECK-NEXT: [[C:%.*]] = select i1 [[A]], i1 true, i1 [[B]]
+; CHECK-NEXT: ret i1 [[C]]
;
%nn = and i32 %n, 2147483647
%a = icmp sle i32 %x, -1
@@ -290,7 +298,7 @@ define i1 @negative3_logical(i32 %x, i32 %y, i32 %n) {
; CHECK-NEXT: [[NN:%.*]] = and i32 [[N:%.*]], 2147483647
; CHECK-NEXT: [[A:%.*]] = icmp sgt i32 [[NN]], [[X:%.*]]
; CHECK-NEXT: [[B:%.*]] = icmp sgt i32 [[Y:%.*]], -1
-; CHECK-NEXT: [[C:%.*]] = and i1 [[A]], [[B]]
+; CHECK-NEXT: [[C:%.*]] = select i1 [[A]], i1 [[B]], i1 false
; CHECK-NEXT: ret i1 [[C]]
;
%nn = and i32 %n, 2147483647
diff --git llvm/test/Transforms/InstCombine/result-of-add-of-negative-is-non-zero-and-no-underflow.ll llvm/test/Transforms/InstCombine/result-of-add-of-negative-is-non-zero-and-no-underflow.ll
index bcc62dc983c6..5bdc9f6d6497 100644
--- llvm/test/Transforms/InstCombine/result-of-add-of-negative-is-non-zero-and-no-underflow.ll
+++ llvm/test/Transforms/InstCombine/result-of-add-of-negative-is-non-zero-and-no-underflow.ll
@@ -30,7 +30,7 @@ define i1 @t0_bad_logical(i8 %base, i8 %offset) {
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ult i8 [[ADJUSTED]], [[BASE]]
-; CHECK-NEXT: [[R:%.*]] = and i1 [[NOT_NULL]], [[NO_UNDERFLOW]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_NULL]], i1 [[NO_UNDERFLOW]], i1 false
; CHECK-NEXT: ret i1 [[R]]
;
%adjusted = add i8 %base, %offset
@@ -69,9 +69,10 @@ define i1 @t1_logical(i8 %base, i8 %offset) {
; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]])
; CHECK-NEXT: [[ADJUSTED:%.*]] = add i8 [[BASE]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
-; CHECK-NEXT: [[TMP1:%.*]] = sub i8 0, [[BASE]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i8 [[TMP1]], [[OFFSET]]
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
+; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ult i8 [[ADJUSTED]], [[BASE]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_NULL]], i1 [[NO_UNDERFLOW]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%cmp = icmp slt i8 %base, 0
call void @llvm.assume(i1 %cmp)
@@ -112,9 +113,10 @@ define i1 @t2_logical(i8 %base, i8 %offset) {
; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]])
; CHECK-NEXT: [[ADJUSTED:%.*]] = add i8 [[BASE:%.*]], [[OFFSET]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
-; CHECK-NEXT: [[TMP1:%.*]] = sub i8 0, [[OFFSET]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i8 [[TMP1]], [[BASE]]
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
+; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ult i8 [[ADJUSTED]], [[BASE]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_NULL]], i1 [[NO_UNDERFLOW]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%cmp = icmp slt i8 %offset, 0
call void @llvm.assume(i1 %cmp)
@@ -160,9 +162,9 @@ define i1 @t3_oneuse0_logical(i8 %base, i8 %offset) {
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
-; CHECK-NEXT: [[TMP1:%.*]] = sub i8 0, [[BASE]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i8 [[TMP1]], [[OFFSET]]
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ult i8 [[ADJUSTED]], [[BASE]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_NULL]], i1 [[NO_UNDERFLOW]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%cmp = icmp slt i8 %base, 0
call void @llvm.assume(i1 %cmp)
@@ -205,11 +207,11 @@ define i1 @t4_oneuse1_logical(i8 %base, i8 %offset) {
; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]])
; CHECK-NEXT: [[ADJUSTED:%.*]] = add i8 [[BASE]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
+; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ult i8 [[ADJUSTED]], [[BASE]]
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
-; CHECK-NEXT: [[TMP1:%.*]] = sub i8 0, [[BASE]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i8 [[TMP1]], [[OFFSET]]
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_NULL]], i1 [[NO_UNDERFLOW]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%cmp = icmp slt i8 %base, 0
call void @llvm.assume(i1 %cmp)
@@ -258,7 +260,7 @@ define i1 @t5_oneuse2_bad_logical(i8 %base, i8 %offset) {
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ult i8 [[ADJUSTED]], [[BASE]]
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
-; CHECK-NEXT: [[R:%.*]] = and i1 [[NOT_NULL]], [[NO_UNDERFLOW]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_NULL]], i1 [[NO_UNDERFLOW]], i1 false
; CHECK-NEXT: ret i1 [[R]]
;
%cmp = icmp slt i8 %base, 0
@@ -342,9 +344,10 @@ define i1 @t7_commutativity1_logical(i8 %base, i8 %offset) {
; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]])
; CHECK-NEXT: [[ADJUSTED:%.*]] = add i8 [[BASE]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
-; CHECK-NEXT: [[TMP1:%.*]] = sub i8 0, [[BASE]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i8 [[TMP1]], [[OFFSET]]
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
+; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ult i8 [[ADJUSTED]], [[BASE]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_NULL]], i1 [[NO_UNDERFLOW]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%cmp = icmp slt i8 %base, 0
call void @llvm.assume(i1 %cmp)
@@ -426,9 +429,10 @@ define i1 @t8_logical(i8 %base, i8 %offset) {
; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]])
; CHECK-NEXT: [[ADJUSTED:%.*]] = add i8 [[BASE]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
-; CHECK-NEXT: [[TMP1:%.*]] = sub i8 0, [[BASE]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp uge i8 [[TMP1]], [[OFFSET]]
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp eq i8 [[ADJUSTED]], 0
+; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp uge i8 [[ADJUSTED]], [[BASE]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_NULL]], i1 true, i1 [[NO_UNDERFLOW]]
+; CHECK-NEXT: ret i1 [[R]]
;
%cmp = icmp slt i8 %base, 0
call void @llvm.assume(i1 %cmp)
@@ -469,9 +473,10 @@ define i1 @t9_logical(i8 %base, i8 %offset) {
; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]])
; CHECK-NEXT: [[ADJUSTED:%.*]] = add i8 [[BASE]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
-; CHECK-NEXT: [[TMP1:%.*]] = sub i8 0, [[BASE]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i8 [[TMP1]], [[OFFSET]]
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
+; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ult i8 [[ADJUSTED]], [[OFFSET]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_NULL]], i1 [[NO_UNDERFLOW]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%cmp = icmp slt i8 %base, 0
call void @llvm.assume(i1 %cmp)
diff --git llvm/test/Transforms/InstCombine/result-of-add-of-negative-or-zero-is-non-zero-and-no-underflow.ll llvm/test/Transforms/InstCombine/result-of-add-of-negative-or-zero-is-non-zero-and-no-underflow.ll
index e2f256140b51..153f260df6e1 100644
--- llvm/test/Transforms/InstCombine/result-of-add-of-negative-or-zero-is-non-zero-and-no-underflow.ll
+++ llvm/test/Transforms/InstCombine/result-of-add-of-negative-or-zero-is-non-zero-and-no-underflow.ll
@@ -26,9 +26,10 @@ define i1 @t0_logical(i8 %base, i8 %offset) {
; CHECK-LABEL: @t0_logical(
; CHECK-NEXT: [[ADJUSTED:%.*]] = add i8 [[BASE:%.*]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
-; CHECK-NEXT: [[TMP1:%.*]] = sub i8 0, [[OFFSET]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i8 [[TMP1]], [[BASE]]
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
+; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ule i8 [[ADJUSTED]], [[BASE]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_NULL]], i1 [[NO_UNDERFLOW]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%adjusted = add i8 %base, %offset
call void @use8(i8 %adjusted)
@@ -64,9 +65,9 @@ define i1 @t1_oneuse0_logical(i8 %base, i8 %offset) {
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
-; CHECK-NEXT: [[TMP1:%.*]] = sub i8 0, [[OFFSET]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i8 [[TMP1]], [[BASE]]
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ule i8 [[ADJUSTED]], [[BASE]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_NULL]], i1 [[NO_UNDERFLOW]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%adjusted = add i8 %base, %offset
call void @use8(i8 %adjusted)
@@ -99,11 +100,11 @@ define i1 @t2_oneuse1_logical(i8 %base, i8 %offset) {
; CHECK-LABEL: @t2_oneuse1_logical(
; CHECK-NEXT: [[ADJUSTED:%.*]] = add i8 [[BASE:%.*]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
+; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ule i8 [[ADJUSTED]], [[BASE]]
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
-; CHECK-NEXT: [[TMP1:%.*]] = sub i8 0, [[OFFSET]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i8 [[TMP1]], [[BASE]]
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_NULL]], i1 [[NO_UNDERFLOW]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%adjusted = add i8 %base, %offset
call void @use8(i8 %adjusted)
@@ -142,7 +143,7 @@ define i1 @n3_oneuse2_bad_logical(i8 %base, i8 %offset) {
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ule i8 [[ADJUSTED]], [[BASE]]
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
-; CHECK-NEXT: [[R:%.*]] = and i1 [[NOT_NULL]], [[NO_UNDERFLOW]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_NULL]], i1 [[NO_UNDERFLOW]], i1 false
; CHECK-NEXT: ret i1 [[R]]
;
%adjusted = add i8 %base, %offset
@@ -206,9 +207,10 @@ define i1 @t5_commutativity1_logical(i8 %base, i8 %offset) {
; CHECK-LABEL: @t5_commutativity1_logical(
; CHECK-NEXT: [[ADJUSTED:%.*]] = add i8 [[BASE:%.*]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
-; CHECK-NEXT: [[TMP1:%.*]] = sub i8 0, [[OFFSET]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i8 [[TMP1]], [[BASE]]
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
+; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ule i8 [[ADJUSTED]], [[BASE]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_NULL]], i1 [[NO_UNDERFLOW]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%adjusted = add i8 %base, %offset
call void @use8(i8 %adjusted)
@@ -270,9 +272,10 @@ define i1 @t7_logical(i8 %base, i8 %offset) {
; CHECK-LABEL: @t7_logical(
; CHECK-NEXT: [[ADJUSTED:%.*]] = add i8 [[BASE:%.*]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
-; CHECK-NEXT: [[TMP1:%.*]] = add i8 [[ADJUSTED]], -1
-; CHECK-NEXT: [[TMP2:%.*]] = icmp uge i8 [[TMP1]], [[BASE]]
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp eq i8 [[ADJUSTED]], 0
+; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ugt i8 [[ADJUSTED]], [[BASE]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_NULL]], i1 true, i1 [[NO_UNDERFLOW]]
+; CHECK-NEXT: ret i1 [[R]]
;
%adjusted = add i8 %base, %offset
call void @use8(i8 %adjusted)
@@ -303,9 +306,10 @@ define i1 @t8_logical(i8 %base, i8 %offset) {
; CHECK-LABEL: @t8_logical(
; CHECK-NEXT: [[ADJUSTED:%.*]] = add i8 [[BASE:%.*]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
-; CHECK-NEXT: [[TMP1:%.*]] = sub i8 0, [[BASE]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i8 [[TMP1]], [[OFFSET]]
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
+; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ule i8 [[ADJUSTED]], [[OFFSET]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_NULL]], i1 [[NO_UNDERFLOW]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%adjusted = add i8 %base, %offset
call void @use8(i8 %adjusted)
diff --git llvm/test/Transforms/InstCombine/result-of-usub-is-non-zero-and-no-overflow.ll llvm/test/Transforms/InstCombine/result-of-usub-is-non-zero-and-no-overflow.ll
index b875396a8c6d..d93b0a7b33df 100644
--- llvm/test/Transforms/InstCombine/result-of-usub-is-non-zero-and-no-overflow.ll
+++ llvm/test/Transforms/InstCombine/result-of-usub-is-non-zero-and-no-overflow.ll
@@ -45,8 +45,8 @@ define i1 @t0_noncanonical_ignoreme_logical(i8 %base, i8 %offset) {
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_NULL]], i1 [[NO_UNDERFLOW]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%adjusted = sub i8 %base, %offset
call void @use8(i8 %adjusted)
@@ -87,8 +87,8 @@ define i1 @t1_logical(i8 %base, i8 %offset) {
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_NULL]], i1 [[NO_UNDERFLOW]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%adjusted = sub i8 %base, %offset
call void @use8(i8 %adjusted)
@@ -127,7 +127,8 @@ define i1 @t1_strict_logical(i8 %base, i8 %offset) {
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
-; CHECK-NEXT: ret i1 [[NO_UNDERFLOW]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_NULL]], i1 [[NO_UNDERFLOW]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%adjusted = sub i8 %base, %offset
call void @use8(i8 %adjusted)
@@ -177,7 +178,7 @@ define i1 @t2_logical(i8 %base, i8 %offset) {
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = xor i1 [[UNDERFLOW]], true
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
-; CHECK-NEXT: [[R:%.*]] = and i1 [[NOT_NULL]], [[NO_UNDERFLOW]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_NULL]], i1 [[NO_UNDERFLOW]], i1 false
; CHECK-NEXT: ret i1 [[R]]
;
%agg = call {i8, i1} @llvm.usub.with.overflow(i8 %base, i8 %offset)
@@ -224,8 +225,8 @@ define i1 @t3_commutability0_logical(i8 %base, i8 %offset) {
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_NULL]], i1 [[NO_UNDERFLOW]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%adjusted = sub i8 %base, %offset
call void @use8(i8 %adjusted)
@@ -265,8 +266,8 @@ define i1 @t4_commutability1_logical(i8 %base, i8 %offset) {
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NO_UNDERFLOW]], i1 [[NOT_NULL]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%adjusted = sub i8 %base, %offset
call void @use8(i8 %adjusted)
@@ -306,8 +307,8 @@ define i1 @t5_commutability2_logical(i8 %base, i8 %offset) {
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NO_UNDERFLOW]], i1 [[NOT_NULL]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%adjusted = sub i8 %base, %offset
call void @use8(i8 %adjusted)
@@ -357,7 +358,7 @@ define i1 @t6_commutability_logical(i8 %base, i8 %offset) {
; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = xor i1 [[UNDERFLOW]], true
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
-; CHECK-NEXT: [[R:%.*]] = and i1 [[NOT_NULL]], [[NO_UNDERFLOW]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NO_UNDERFLOW]], i1 [[NOT_NULL]], i1 false
; CHECK-NEXT: ret i1 [[R]]
;
%agg = call {i8, i1} @llvm.usub.with.overflow(i8 %base, i8 %offset)
@@ -405,8 +406,8 @@ define i1 @t7_logical(i8 %base, i8 %offset) {
; CHECK-NEXT: call void @use1(i1 [[UNDERFLOW]])
; CHECK-NEXT: [[NULL:%.*]] = icmp eq i8 [[ADJUSTED]], 0
; CHECK-NEXT: call void @use1(i1 [[NULL]])
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ule i8 [[BASE]], [[OFFSET]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NULL]], i1 true, i1 [[UNDERFLOW]]
+; CHECK-NEXT: ret i1 [[R]]
;
%adjusted = sub i8 %base, %offset
call void @use8(i8 %adjusted)
@@ -445,7 +446,8 @@ define i1 @t7_nonstrict_logical(i8 %base, i8 %offset) {
; CHECK-NEXT: call void @use1(i1 [[UNDERFLOW]])
; CHECK-NEXT: [[NULL:%.*]] = icmp eq i8 [[ADJUSTED]], 0
; CHECK-NEXT: call void @use1(i1 [[NULL]])
-; CHECK-NEXT: ret i1 [[UNDERFLOW]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NULL]], i1 true, i1 [[UNDERFLOW]]
+; CHECK-NEXT: ret i1 [[R]]
;
%adjusted = sub i8 %base, %offset
call void @use8(i8 %adjusted)
@@ -489,7 +491,7 @@ define i1 @t8_logical(i8 %base, i8 %offset) {
; CHECK-NEXT: [[UNDERFLOW:%.*]] = extractvalue { i8, i1 } [[AGG]], 1
; CHECK-NEXT: call void @use1(i1 [[UNDERFLOW]])
; CHECK-NEXT: [[NULL:%.*]] = icmp eq i8 [[ADJUSTED]], 0
-; CHECK-NEXT: [[R:%.*]] = or i1 [[NULL]], [[UNDERFLOW]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NULL]], i1 true, i1 [[UNDERFLOW]]
; CHECK-NEXT: ret i1 [[R]]
;
%agg = call {i8, i1} @llvm.usub.with.overflow(i8 %base, i8 %offset)
@@ -534,8 +536,8 @@ define i1 @t9_commutative_logical(i8 %base, i8 %offset) {
; CHECK-NEXT: call void @use1(i1 [[UNDERFLOW]])
; CHECK-NEXT: [[NULL:%.*]] = icmp eq i8 [[ADJUSTED]], 0
; CHECK-NEXT: call void @use1(i1 [[NULL]])
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ule i8 [[BASE]], [[OFFSET]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NULL]], i1 true, i1 [[UNDERFLOW]]
+; CHECK-NEXT: ret i1 [[R]]
;
%adjusted = sub i8 %base, %offset
call void @use8(i8 %adjusted)
@@ -582,8 +584,8 @@ define i1 @t10_logical(i64 %base, i64* nonnull %offsetptr) {
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i64 [[ADJUSTED]], 0
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[OFFSET]], [[BASE]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_NULL]], i1 [[NO_UNDERFLOW]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%offset = ptrtoint i64* %offsetptr to i64
@@ -629,8 +631,8 @@ define i1 @t11_commutative_logical(i64 %base, i64* nonnull %offsetptr) {
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i64 [[ADJUSTED]], 0
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[OFFSET]], [[BASE]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_NULL]], i1 [[NO_UNDERFLOW]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%offset = ptrtoint i64* %offsetptr to i64
@@ -677,8 +679,8 @@ define i1 @t12_logical(i64 %base, i64* nonnull %offsetptr) {
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp eq i64 [[ADJUSTED]], 0
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
-; CHECK-NEXT: [[TMP1:%.*]] = icmp uge i64 [[OFFSET]], [[BASE]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_NULL]], i1 true, i1 [[NO_UNDERFLOW]]
+; CHECK-NEXT: ret i1 [[R]]
;
%offset = ptrtoint i64* %offsetptr to i64
@@ -724,8 +726,8 @@ define i1 @t13_logical(i64 %base, i64* nonnull %offsetptr) {
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp eq i64 [[ADJUSTED]], 0
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
-; CHECK-NEXT: [[TMP1:%.*]] = icmp uge i64 [[OFFSET]], [[BASE]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_NULL]], i1 true, i1 [[NO_UNDERFLOW]]
+; CHECK-NEXT: ret i1 [[R]]
;
%offset = ptrtoint i64* %offsetptr to i64
@@ -768,7 +770,7 @@ define i1 @t14_bad_logical(i64 %base, i64 %offset) {
; CHECK-NEXT: call void @use1(i1 [[NO_UNDERFLOW]])
; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i64 [[ADJUSTED]], 0
; CHECK-NEXT: call void @use1(i1 [[NOT_NULL]])
-; CHECK-NEXT: [[R:%.*]] = and i1 [[NOT_NULL]], [[NO_UNDERFLOW]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_NULL]], i1 [[NO_UNDERFLOW]], i1 false
; CHECK-NEXT: ret i1 [[R]]
;
%adjusted = sub i64 %base, %offset
@@ -800,8 +802,10 @@ define i1 @base_ult_offset_logical(i8 %base, i8 %offset) {
; CHECK-LABEL: @base_ult_offset_logical(
; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i8 [[BASE]], [[OFFSET]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp ne i8 [[ADJUSTED]], 0
+; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ule i8 [[BASE]], [[OFFSET]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NO_UNDERFLOW]], i1 [[NOT_NULL]], i1 false
+; CHECK-NEXT: ret i1 [[R]]
;
%adjusted = sub i8 %base, %offset
call void @use8(i8 %adjusted)
@@ -829,8 +833,10 @@ define i1 @base_uge_offset_logical(i8 %base, i8 %offset) {
; CHECK-LABEL: @base_uge_offset_logical(
; CHECK-NEXT: [[ADJUSTED:%.*]] = sub i8 [[BASE:%.*]], [[OFFSET:%.*]]
; CHECK-NEXT: call void @use8(i8 [[ADJUSTED]])
-; CHECK-NEXT: [[TMP1:%.*]] = icmp uge i8 [[BASE]], [[OFFSET]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[NOT_NULL:%.*]] = icmp eq i8 [[ADJUSTED]], 0
+; CHECK-NEXT: [[NO_UNDERFLOW:%.*]] = icmp ugt i8 [[BASE]], [[OFFSET]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NO_UNDERFLOW]], i1 true, i1 [[NOT_NULL]]
+; CHECK-NEXT: ret i1 [[R]]
;
%adjusted = sub i8 %base, %offset
call void @use8(i8 %adjusted)
diff --git llvm/test/Transforms/InstCombine/select-bitext.ll llvm/test/Transforms/InstCombine/select-bitext.ll
index 1e156e248d74..cb8cdb79bc8d 100644
--- llvm/test/Transforms/InstCombine/select-bitext.ll
+++ llvm/test/Transforms/InstCombine/select-bitext.ll
@@ -319,7 +319,7 @@ define <2 x float> @trunc_sel_equal_fpext_vec(<2 x float> %a, <2 x i1> %cmp) {
define i32 @test_sext1(i1 %cca, i1 %ccb) {
; CHECK-LABEL: @test_sext1(
-; CHECK-NEXT: [[NARROW:%.*]] = and i1 [[CCB:%.*]], [[CCA:%.*]]
+; CHECK-NEXT: [[NARROW:%.*]] = select i1 [[CCB:%.*]], i1 [[CCA:%.*]], i1 false
; CHECK-NEXT: [[R:%.*]] = sext i1 [[NARROW]] to i32
; CHECK-NEXT: ret i32 [[R]]
;
@@ -330,7 +330,7 @@ define i32 @test_sext1(i1 %cca, i1 %ccb) {
define i32 @test_sext2(i1 %cca, i1 %ccb) {
; CHECK-LABEL: @test_sext2(
-; CHECK-NEXT: [[NARROW:%.*]] = or i1 [[CCB:%.*]], [[CCA:%.*]]
+; CHECK-NEXT: [[NARROW:%.*]] = select i1 [[CCB:%.*]], i1 true, i1 [[CCA:%.*]]
; CHECK-NEXT: [[R:%.*]] = sext i1 [[NARROW]] to i32
; CHECK-NEXT: ret i32 [[R]]
;
@@ -342,7 +342,7 @@ define i32 @test_sext2(i1 %cca, i1 %ccb) {
define i32 @test_sext3(i1 %cca, i1 %ccb) {
; CHECK-LABEL: @test_sext3(
; CHECK-NEXT: [[NOT_CCB:%.*]] = xor i1 [[CCB:%.*]], true
-; CHECK-NEXT: [[NARROW:%.*]] = and i1 [[NOT_CCB]], [[CCA:%.*]]
+; CHECK-NEXT: [[NARROW:%.*]] = select i1 [[NOT_CCB]], i1 [[CCA:%.*]], i1 false
; CHECK-NEXT: [[R:%.*]] = sext i1 [[NARROW]] to i32
; CHECK-NEXT: ret i32 [[R]]
;
@@ -354,7 +354,7 @@ define i32 @test_sext3(i1 %cca, i1 %ccb) {
define i32 @test_sext4(i1 %cca, i1 %ccb) {
; CHECK-LABEL: @test_sext4(
; CHECK-NEXT: [[NOT_CCB:%.*]] = xor i1 [[CCB:%.*]], true
-; CHECK-NEXT: [[NARROW:%.*]] = or i1 [[NOT_CCB]], [[CCA:%.*]]
+; CHECK-NEXT: [[NARROW:%.*]] = select i1 [[NOT_CCB]], i1 true, i1 [[CCA:%.*]]
; CHECK-NEXT: [[R:%.*]] = sext i1 [[NARROW]] to i32
; CHECK-NEXT: ret i32 [[R]]
;
@@ -365,7 +365,7 @@ define i32 @test_sext4(i1 %cca, i1 %ccb) {
define i32 @test_zext1(i1 %cca, i1 %ccb) {
; CHECK-LABEL: @test_zext1(
-; CHECK-NEXT: [[NARROW:%.*]] = and i1 [[CCB:%.*]], [[CCA:%.*]]
+; CHECK-NEXT: [[NARROW:%.*]] = select i1 [[CCB:%.*]], i1 [[CCA:%.*]], i1 false
; CHECK-NEXT: [[R:%.*]] = zext i1 [[NARROW]] to i32
; CHECK-NEXT: ret i32 [[R]]
;
@@ -376,7 +376,7 @@ define i32 @test_zext1(i1 %cca, i1 %ccb) {
define i32 @test_zext2(i1 %cca, i1 %ccb) {
; CHECK-LABEL: @test_zext2(
-; CHECK-NEXT: [[NARROW:%.*]] = or i1 [[CCB:%.*]], [[CCA:%.*]]
+; CHECK-NEXT: [[NARROW:%.*]] = select i1 [[CCB:%.*]], i1 true, i1 [[CCA:%.*]]
; CHECK-NEXT: [[R:%.*]] = zext i1 [[NARROW]] to i32
; CHECK-NEXT: ret i32 [[R]]
;
@@ -388,7 +388,7 @@ define i32 @test_zext2(i1 %cca, i1 %ccb) {
define i32 @test_zext3(i1 %cca, i1 %ccb) {
; CHECK-LABEL: @test_zext3(
; CHECK-NEXT: [[NOT_CCB:%.*]] = xor i1 [[CCB:%.*]], true
-; CHECK-NEXT: [[NARROW:%.*]] = and i1 [[NOT_CCB]], [[CCA:%.*]]
+; CHECK-NEXT: [[NARROW:%.*]] = select i1 [[NOT_CCB]], i1 [[CCA:%.*]], i1 false
; CHECK-NEXT: [[R:%.*]] = zext i1 [[NARROW]] to i32
; CHECK-NEXT: ret i32 [[R]]
;
@@ -400,7 +400,7 @@ define i32 @test_zext3(i1 %cca, i1 %ccb) {
define i32 @test_zext4(i1 %cca, i1 %ccb) {
; CHECK-LABEL: @test_zext4(
; CHECK-NEXT: [[NOT_CCB:%.*]] = xor i1 [[CCB:%.*]], true
-; CHECK-NEXT: [[NARROW:%.*]] = or i1 [[NOT_CCB]], [[CCA:%.*]]
+; CHECK-NEXT: [[NARROW:%.*]] = select i1 [[NOT_CCB]], i1 true, i1 [[CCA:%.*]]
; CHECK-NEXT: [[R:%.*]] = zext i1 [[NARROW]] to i32
; CHECK-NEXT: ret i32 [[R]]
;
@@ -503,7 +503,7 @@ define i32 @test_op_op(i32 %a, i32 %b, i32 %c) {
define <2 x i32> @test_vectors_sext(<2 x i1> %cca, <2 x i1> %ccb) {
; CHECK-LABEL: @test_vectors_sext(
-; CHECK-NEXT: [[NARROW:%.*]] = and <2 x i1> [[CCB:%.*]], [[CCA:%.*]]
+; CHECK-NEXT: [[NARROW:%.*]] = select <2 x i1> [[CCB:%.*]], <2 x i1> [[CCA:%.*]], <2 x i1> zeroinitializer
; CHECK-NEXT: [[R:%.*]] = sext <2 x i1> [[NARROW]] to <2 x i32>
; CHECK-NEXT: ret <2 x i32> [[R]]
;
@@ -525,7 +525,7 @@ define <2 x i32> @test_vectors_sext_nonsplat(<2 x i1> %cca, <2 x i1> %ccb) {
define <2 x i32> @test_vectors_zext(<2 x i1> %cca, <2 x i1> %ccb) {
; CHECK-LABEL: @test_vectors_zext(
-; CHECK-NEXT: [[NARROW:%.*]] = and <2 x i1> [[CCB:%.*]], [[CCA:%.*]]
+; CHECK-NEXT: [[NARROW:%.*]] = select <2 x i1> [[CCB:%.*]], <2 x i1> [[CCA:%.*]], <2 x i1> zeroinitializer
; CHECK-NEXT: [[R:%.*]] = zext <2 x i1> [[NARROW]] to <2 x i32>
; CHECK-NEXT: ret <2 x i32> [[R]]
;
diff --git llvm/test/Transforms/InstCombine/select-cmp-br.ll llvm/test/Transforms/InstCombine/select-cmp-br.ll
index 52bbaf3bc763..f34df20e7c92 100644
--- llvm/test/Transforms/InstCombine/select-cmp-br.ll
+++ llvm/test/Transforms/InstCombine/select-cmp-br.ll
@@ -17,7 +17,7 @@ define void @test1(%C* %arg) {
; CHECK-NEXT: [[N:%.*]] = load i64*, i64** [[TMP1]], align 8
; CHECK-NEXT: [[TMP5:%.*]] = icmp ne i64* [[M]], [[N]]
; CHECK-NEXT: [[TMP71:%.*]] = icmp eq %C* [[ARG]], null
-; CHECK-NEXT: [[TMP7:%.*]] = or i1 [[TMP5]], [[TMP71]]
+; CHECK-NEXT: [[TMP7:%.*]] = select i1 [[TMP5]], i1 true, i1 [[TMP71]]
; CHECK-NEXT: br i1 [[TMP7]], label [[BB10:%.*]], label [[BB8:%.*]]
; CHECK: bb:
; CHECK-NEXT: ret void
@@ -67,7 +67,7 @@ define void @test2(%C* %arg) {
; CHECK-NEXT: [[N:%.*]] = load i64*, i64** [[TMP1]], align 8
; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64* [[M]], [[N]]
; CHECK-NEXT: [[TMP71:%.*]] = icmp eq %C* [[ARG]], null
-; CHECK-NEXT: [[TMP7:%.*]] = or i1 [[TMP5]], [[TMP71]]
+; CHECK-NEXT: [[TMP7:%.*]] = select i1 [[TMP5]], i1 true, i1 [[TMP71]]
; CHECK-NEXT: br i1 [[TMP7]], label [[BB10:%.*]], label [[BB8:%.*]]
; CHECK: bb:
; CHECK-NEXT: ret void
@@ -116,9 +116,9 @@ define void @test3(%C* %arg) {
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[C]], %C* [[ARG]], i64 1, i32 0, i32 0
; CHECK-NEXT: [[N:%.*]] = load i64*, i64** [[TMP1]], align 8
; CHECK-NEXT: [[TMP5:%.*]] = icmp ne i64* [[M]], [[N]]
-; CHECK-NEXT: [[TMP71:%.*]] = icmp eq %C* [[ARG]], null
-; CHECK-NEXT: [[TMP7:%.*]] = or i1 [[TMP5]], [[TMP71]]
-; CHECK-NEXT: br i1 [[TMP7]], label [[BB10:%.*]], label [[BB8:%.*]]
+; CHECK-NEXT: [[TMP7_NOT1:%.*]] = icmp eq %C* [[ARG]], null
+; CHECK-NEXT: [[TMP7_NOT:%.*]] = select i1 [[TMP5]], i1 true, i1 [[TMP7_NOT1]]
+; CHECK-NEXT: br i1 [[TMP7_NOT]], label [[BB10:%.*]], label [[BB8:%.*]]
; CHECK: bb:
; CHECK-NEXT: ret void
; CHECK: bb8:
@@ -166,9 +166,9 @@ define void @test4(%C* %arg) {
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[C]], %C* [[ARG]], i64 1, i32 0, i32 0
; CHECK-NEXT: [[N:%.*]] = load i64*, i64** [[TMP1]], align 8
; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64* [[M]], [[N]]
-; CHECK-NEXT: [[TMP71:%.*]] = icmp eq %C* [[ARG]], null
-; CHECK-NEXT: [[TMP7:%.*]] = or i1 [[TMP5]], [[TMP71]]
-; CHECK-NEXT: br i1 [[TMP7]], label [[BB10:%.*]], label [[BB8:%.*]]
+; CHECK-NEXT: [[TMP7_NOT1:%.*]] = icmp eq %C* [[ARG]], null
+; CHECK-NEXT: [[TMP7_NOT:%.*]] = select i1 [[TMP5]], i1 true, i1 [[TMP7_NOT1]]
+; CHECK-NEXT: br i1 [[TMP7_NOT]], label [[BB10:%.*]], label [[BB8:%.*]]
; CHECK: bb:
; CHECK-NEXT: ret void
; CHECK: bb8:
@@ -211,9 +211,9 @@ bb10: ; preds = %entry
define void @test5(%C* %arg, i1 %arg1) {
; CHECK-LABEL: @test5(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP21:%.*]] = icmp eq %C* [[ARG:%.*]], null
-; CHECK-NEXT: [[TMP2:%.*]] = or i1 [[TMP21]], [[ARG1:%.*]]
-; CHECK-NEXT: br i1 [[TMP2]], label [[BB5:%.*]], label [[BB3:%.*]]
+; CHECK-NEXT: [[TMP2_NOT1:%.*]] = icmp eq %C* [[ARG:%.*]], null
+; CHECK-NEXT: [[TMP2_NOT:%.*]] = select i1 [[ARG1:%.*]], i1 true, i1 [[TMP2_NOT1]]
+; CHECK-NEXT: br i1 [[TMP2_NOT]], label [[BB5:%.*]], label [[BB3:%.*]]
; CHECK: bb:
; CHECK-NEXT: ret void
; CHECK: bb3:
diff --git llvm/test/Transforms/InstCombine/select.ll llvm/test/Transforms/InstCombine/select.ll
index d603de371ba0..ca115b3040d3 100644
--- llvm/test/Transforms/InstCombine/select.ll
+++ llvm/test/Transforms/InstCombine/select.ll
@@ -25,7 +25,7 @@ define i32 @test6(i1 %C) {
define i1 @trueval_is_true(i1 %C, i1 %X) {
; CHECK-LABEL: @trueval_is_true(
-; CHECK-NEXT: [[R:%.*]] = or i1 [[C:%.*]], [[X:%.*]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[C:%.*]], i1 true, i1 [[X:%.*]]
; CHECK-NEXT: ret i1 [[R]]
;
%R = select i1 %C, i1 true, i1 %X
@@ -34,7 +34,7 @@ define i1 @trueval_is_true(i1 %C, i1 %X) {
define <2 x i1> @trueval_is_true_vec(<2 x i1> %C, <2 x i1> %X) {
; CHECK-LABEL: @trueval_is_true_vec(
-; CHECK-NEXT: [[R:%.*]] = or <2 x i1> [[C:%.*]], [[X:%.*]]
+; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[C:%.*]], <2 x i1> <i1 true, i1 true>, <2 x i1> [[X:%.*]]
; CHECK-NEXT: ret <2 x i1> [[R]]
;
%R = select <2 x i1> %C, <2 x i1> <i1 true, i1 true>, <2 x i1> %X
@@ -43,7 +43,7 @@ define <2 x i1> @trueval_is_true_vec(<2 x i1> %C, <2 x i1> %X) {
define <2 x i1> @trueval_is_true_vec_undef_elt(<2 x i1> %C, <2 x i1> %X) {
; CHECK-LABEL: @trueval_is_true_vec_undef_elt(
-; CHECK-NEXT: [[R:%.*]] = or <2 x i1> [[C:%.*]], [[X:%.*]]
+; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[C:%.*]], <2 x i1> <i1 undef, i1 true>, <2 x i1> [[X:%.*]]
; CHECK-NEXT: ret <2 x i1> [[R]]
;
%R = select <2 x i1> %C, <2 x i1> <i1 undef, i1 true>, <2 x i1> %X
@@ -52,7 +52,7 @@ define <2 x i1> @trueval_is_true_vec_undef_elt(<2 x i1> %C, <2 x i1> %X) {
define i1 @test8(i1 %C, i1 %X) {
; CHECK-LABEL: @test8(
-; CHECK-NEXT: [[R:%.*]] = and i1 [[C:%.*]], [[X:%.*]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[C:%.*]], i1 [[X:%.*]], i1 false
; CHECK-NEXT: ret i1 [[R]]
;
%R = select i1 %C, i1 %X, i1 false
@@ -61,7 +61,7 @@ define i1 @test8(i1 %C, i1 %X) {
define <2 x i1> @test8vec(<2 x i1> %C, <2 x i1> %X) {
; CHECK-LABEL: @test8vec(
-; CHECK-NEXT: [[R:%.*]] = and <2 x i1> [[C:%.*]], [[X:%.*]]
+; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[C:%.*]], <2 x i1> [[X:%.*]], <2 x i1> zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[R]]
;
%R = select <2 x i1> %C, <2 x i1> %X, <2 x i1> <i1 false, i1 false>
@@ -70,7 +70,7 @@ define <2 x i1> @test8vec(<2 x i1> %C, <2 x i1> %X) {
define <vscale x 2 x i1> @test8vvec(<vscale x 2 x i1> %C, <vscale x 2 x i1> %X) {
; CHECK-LABEL: @test8vvec(
-; CHECK-NEXT: [[R:%.*]] = and <vscale x 2 x i1> [[C:%.*]], [[X:%.*]]
+; CHECK-NEXT: [[R:%.*]] = select <vscale x 2 x i1> [[C:%.*]], <vscale x 2 x i1> [[X:%.*]], <vscale x 2 x i1> zeroinitializer
; CHECK-NEXT: ret <vscale x 2 x i1> [[R]]
;
%R = select <vscale x 2 x i1> %C, <vscale x 2 x i1> %X, <vscale x 2 x i1> zeroinitializer
@@ -80,7 +80,7 @@ define <vscale x 2 x i1> @test8vvec(<vscale x 2 x i1> %C, <vscale x 2 x i1> %X)
define i1 @test9(i1 %C, i1 %X) {
; CHECK-LABEL: @test9(
; CHECK-NEXT: [[NOT_C:%.*]] = xor i1 [[C:%.*]], true
-; CHECK-NEXT: [[R:%.*]] = and i1 [[NOT_C]], [[X:%.*]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_C]], i1 [[X:%.*]], i1 false
; CHECK-NEXT: ret i1 [[R]]
;
%R = select i1 %C, i1 false, i1 %X
@@ -90,7 +90,7 @@ define i1 @test9(i1 %C, i1 %X) {
define <2 x i1> @test9vec(<2 x i1> %C, <2 x i1> %X) {
; CHECK-LABEL: @test9vec(
; CHECK-NEXT: [[NOT_C:%.*]] = xor <2 x i1> [[C:%.*]], <i1 true, i1 true>
-; CHECK-NEXT: [[R:%.*]] = and <2 x i1> [[NOT_C]], [[X:%.*]]
+; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[NOT_C]], <2 x i1> [[X:%.*]], <2 x i1> zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[R]]
;
%R = select <2 x i1> %C, <2 x i1> <i1 false, i1 false>, <2 x i1> %X
@@ -100,7 +100,7 @@ define <2 x i1> @test9vec(<2 x i1> %C, <2 x i1> %X) {
define <vscale x 2 x i1> @test9vvec(<vscale x 2 x i1> %C, <vscale x 2 x i1> %X) {
; CHECK-LABEL: @test9vvec(
; CHECK-NEXT: [[NOT_C:%.*]] = xor <vscale x 2 x i1> [[C:%.*]], shufflevector (<vscale x 2 x i1> insertelement (<vscale x 2 x i1> undef, i1 true, i32 0), <vscale x 2 x i1> undef, <vscale x 2 x i32> zeroinitializer)
-; CHECK-NEXT: [[R:%.*]] = and <vscale x 2 x i1> [[NOT_C]], [[X:%.*]]
+; CHECK-NEXT: [[R:%.*]] = select <vscale x 2 x i1> [[NOT_C]], <vscale x 2 x i1> [[X:%.*]], <vscale x 2 x i1> zeroinitializer
; CHECK-NEXT: ret <vscale x 2 x i1> [[R]]
;
%R = select <vscale x 2 x i1> %C, <vscale x 2 x i1> zeroinitializer, <vscale x 2 x i1> %X
@@ -110,7 +110,7 @@ define <vscale x 2 x i1> @test9vvec(<vscale x 2 x i1> %C, <vscale x 2 x i1> %X)
define i1 @test10(i1 %C, i1 %X) {
; CHECK-LABEL: @test10(
; CHECK-NEXT: [[NOT_C:%.*]] = xor i1 [[C:%.*]], true
-; CHECK-NEXT: [[R:%.*]] = or i1 [[NOT_C]], [[X:%.*]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_C]], i1 true, i1 [[X:%.*]]
; CHECK-NEXT: ret i1 [[R]]
;
%R = select i1 %C, i1 %X, i1 true
@@ -120,7 +120,7 @@ define i1 @test10(i1 %C, i1 %X) {
define <2 x i1> @test10vec(<2 x i1> %C, <2 x i1> %X) {
; CHECK-LABEL: @test10vec(
; CHECK-NEXT: [[NOT_C:%.*]] = xor <2 x i1> [[C:%.*]], <i1 true, i1 true>
-; CHECK-NEXT: [[R:%.*]] = or <2 x i1> [[NOT_C]], [[X:%.*]]
+; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[NOT_C]], <2 x i1> <i1 true, i1 true>, <2 x i1> [[X:%.*]]
; CHECK-NEXT: ret <2 x i1> [[R]]
;
%R = select <2 x i1> %C, <2 x i1> %X, <2 x i1> <i1 true, i1 true>
@@ -129,7 +129,7 @@ define <2 x i1> @test10vec(<2 x i1> %C, <2 x i1> %X) {
define i1 @test23(i1 %a, i1 %b) {
; CHECK-LABEL: @test23(
-; CHECK-NEXT: [[C:%.*]] = and i1 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[C:%.*]] = select i1 [[A:%.*]], i1 [[B:%.*]], i1 false
; CHECK-NEXT: ret i1 [[C]]
;
%c = select i1 %a, i1 %b, i1 %a
@@ -138,7 +138,7 @@ define i1 @test23(i1 %a, i1 %b) {
define <2 x i1> @test23vec(<2 x i1> %a, <2 x i1> %b) {
; CHECK-LABEL: @test23vec(
-; CHECK-NEXT: [[C:%.*]] = and <2 x i1> [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[C:%.*]] = select <2 x i1> [[A:%.*]], <2 x i1> [[B:%.*]], <2 x i1> zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[C]]
;
%c = select <2 x i1> %a, <2 x i1> %b, <2 x i1> %a
@@ -147,7 +147,7 @@ define <2 x i1> @test23vec(<2 x i1> %a, <2 x i1> %b) {
define i1 @test24(i1 %a, i1 %b) {
; CHECK-LABEL: @test24(
-; CHECK-NEXT: [[C:%.*]] = or i1 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[C:%.*]] = select i1 [[A:%.*]], i1 true, i1 [[B:%.*]]
; CHECK-NEXT: ret i1 [[C]]
;
%c = select i1 %a, i1 %a, i1 %b
@@ -156,7 +156,7 @@ define i1 @test24(i1 %a, i1 %b) {
define <2 x i1> @test24vec(<2 x i1> %a, <2 x i1> %b) {
; CHECK-LABEL: @test24vec(
-; CHECK-NEXT: [[C:%.*]] = or <2 x i1> [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT: [[C:%.*]] = select <2 x i1> [[A:%.*]], <2 x i1> <i1 true, i1 true>, <2 x i1> [[B:%.*]]
; CHECK-NEXT: ret <2 x i1> [[C]]
;
%c = select <2 x i1> %a, <2 x i1> %a, <2 x i1> %b
@@ -166,7 +166,7 @@ define <2 x i1> @test24vec(<2 x i1> %a, <2 x i1> %b) {
define i1 @test62(i1 %A, i1 %B) {
; CHECK-LABEL: @test62(
; CHECK-NEXT: [[NOT:%.*]] = xor i1 [[A:%.*]], true
-; CHECK-NEXT: [[C:%.*]] = and i1 [[NOT]], [[B:%.*]]
+; CHECK-NEXT: [[C:%.*]] = select i1 [[NOT]], i1 [[B:%.*]], i1 false
; CHECK-NEXT: ret i1 [[C]]
;
%not = xor i1 %A, true
@@ -177,7 +177,7 @@ define i1 @test62(i1 %A, i1 %B) {
define <2 x i1> @test62vec(<2 x i1> %A, <2 x i1> %B) {
; CHECK-LABEL: @test62vec(
; CHECK-NEXT: [[NOT:%.*]] = xor <2 x i1> [[A:%.*]], <i1 true, i1 true>
-; CHECK-NEXT: [[C:%.*]] = and <2 x i1> [[NOT]], [[B:%.*]]
+; CHECK-NEXT: [[C:%.*]] = select <2 x i1> [[NOT]], <2 x i1> [[B:%.*]], <2 x i1> zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[C]]
;
%not = xor <2 x i1> %A, <i1 true, i1 true>
@@ -188,7 +188,7 @@ define <2 x i1> @test62vec(<2 x i1> %A, <2 x i1> %B) {
define i1 @test63(i1 %A, i1 %B) {
; CHECK-LABEL: @test63(
; CHECK-NEXT: [[NOT:%.*]] = xor i1 [[A:%.*]], true
-; CHECK-NEXT: [[C:%.*]] = or i1 [[NOT]], [[B:%.*]]
+; CHECK-NEXT: [[C:%.*]] = select i1 [[NOT]], i1 true, i1 [[B:%.*]]
; CHECK-NEXT: ret i1 [[C]]
;
%not = xor i1 %A, true
@@ -199,7 +199,7 @@ define i1 @test63(i1 %A, i1 %B) {
define <2 x i1> @test63vec(<2 x i1> %A, <2 x i1> %B) {
; CHECK-LABEL: @test63vec(
; CHECK-NEXT: [[NOT:%.*]] = xor <2 x i1> [[A:%.*]], <i1 true, i1 true>
-; CHECK-NEXT: [[C:%.*]] = or <2 x i1> [[NOT]], [[B:%.*]]
+; CHECK-NEXT: [[C:%.*]] = select <2 x i1> [[NOT]], <2 x i1> <i1 true, i1 true>, <2 x i1> [[B:%.*]]
; CHECK-NEXT: ret <2 x i1> [[C]]
;
%not = xor <2 x i1> %A, <i1 true, i1 true>
@@ -317,7 +317,7 @@ define i1 @test14a(i1 %C, i32 %X) {
; CHECK-LABEL: @test14a(
; CHECK-NEXT: [[R1:%.*]] = icmp slt i32 [[X:%.*]], 1
; CHECK-NEXT: [[NOT_C:%.*]] = xor i1 [[C:%.*]], true
-; CHECK-NEXT: [[R:%.*]] = or i1 [[R1]], [[NOT_C]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[NOT_C]], i1 true, i1 [[R1]]
; CHECK-NEXT: ret i1 [[R]]
;
%V = select i1 %C, i32 %X, i32 0
@@ -329,7 +329,7 @@ define i1 @test14a(i1 %C, i32 %X) {
define i1 @test14b(i1 %C, i32 %X) {
; CHECK-LABEL: @test14b(
; CHECK-NEXT: [[R1:%.*]] = icmp slt i32 [[X:%.*]], 1
-; CHECK-NEXT: [[R:%.*]] = or i1 [[R1]], [[C:%.*]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[C:%.*]], i1 true, i1 [[R1]]
; CHECK-NEXT: ret i1 [[R]]
;
%V = select i1 %C, i32 0, i32 %X
@@ -400,7 +400,7 @@ define i1 @test17(i32* %X, i1 %C) {
; CHECK-LABEL: @test17(
; CHECK-NEXT: [[RV1:%.*]] = icmp eq i32* [[X:%.*]], null
; CHECK-NEXT: [[NOT_C:%.*]] = xor i1 [[C:%.*]], true
-; CHECK-NEXT: [[RV:%.*]] = or i1 [[RV1]], [[NOT_C]]
+; CHECK-NEXT: [[RV:%.*]] = select i1 [[NOT_C]], i1 true, i1 [[RV1]]
; CHECK-NEXT: ret i1 [[RV]]
;
%R = select i1 %C, i32* %X, i32* null
diff --git llvm/test/Transforms/InstCombine/sign-test-and-or.ll llvm/test/Transforms/InstCombine/sign-test-and-or.ll
index a71cb54b9fc2..cb813743f17f 100644
--- llvm/test/Transforms/InstCombine/sign-test-and-or.ll
+++ llvm/test/Transforms/InstCombine/sign-test-and-or.ll
@@ -17,9 +17,10 @@ define i1 @test1(i32 %a, i32 %b) {
define i1 @test1_logical(i32 %a, i32 %b) {
; CHECK-LABEL: @test1_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP1]], 0
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[A:%.*]], 0
+; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[B:%.*]], 0
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TMP1]], i1 true, i1 [[TMP2]]
+; CHECK-NEXT: ret i1 [[OR_COND]]
;
%1 = icmp slt i32 %a, 0
%2 = icmp slt i32 %b, 0
@@ -41,9 +42,10 @@ define i1 @test2(i32 %a, i32 %b) {
define i1 @test2_logical(i32 %a, i32 %b) {
; CHECK-LABEL: @test2_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[TMP1]], -1
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[A:%.*]], -1
+; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[B:%.*]], -1
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TMP1]], i1 true, i1 [[TMP2]]
+; CHECK-NEXT: ret i1 [[OR_COND]]
;
%1 = icmp sgt i32 %a, -1
%2 = icmp sgt i32 %b, -1
@@ -65,9 +67,10 @@ define i1 @test3(i32 %a, i32 %b) {
define i1 @test3_logical(i32 %a, i32 %b) {
; CHECK-LABEL: @test3_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP1]], 0
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[A:%.*]], 0
+; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[B:%.*]], 0
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TMP1]], i1 [[TMP2]], i1 false
+; CHECK-NEXT: ret i1 [[OR_COND]]
;
%1 = icmp slt i32 %a, 0
%2 = icmp slt i32 %b, 0
@@ -89,9 +92,10 @@ define i1 @test4(i32 %a, i32 %b) {
define i1 @test4_logical(i32 %a, i32 %b) {
; CHECK-LABEL: @test4_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[TMP1]], -1
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[A:%.*]], -1
+; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[B:%.*]], -1
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TMP1]], i1 [[TMP2]], i1 false
+; CHECK-NEXT: ret i1 [[OR_COND]]
;
%1 = icmp sgt i32 %a, -1
%2 = icmp sgt i32 %b, -1
@@ -127,9 +131,11 @@ if.end:
define void @test5_logical(i32 %a) {
; CHECK-LABEL: @test5_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], -2013265920
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0
-; CHECK-NEXT: br i1 [[TMP2]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[A:%.*]], 134217728
+; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[AND]], 0
+; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[A]], -1
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TMP1]], i1 [[TMP2]], i1 false
+; CHECK-NEXT: br i1 [[OR_COND]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; CHECK: if.then:
; CHECK-NEXT: tail call void @foo() [[ATTR0]]
; CHECK-NEXT: ret void
@@ -231,9 +237,11 @@ if.end:
define void @test7_logical(i32 %a) {
; CHECK-LABEL: @test7_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], -2013265920
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP1]], 0
-; CHECK-NEXT: br i1 [[DOTNOT]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[A:%.*]], 134217728
+; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i32 [[AND]], 0
+; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[A]], 0
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TMP1]], i1 true, i1 [[TMP2]]
+; CHECK-NEXT: br i1 [[OR_COND]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; CHECK: if.then:
; CHECK-NEXT: tail call void @foo() [[ATTR0]]
; CHECK-NEXT: ret void
@@ -322,9 +330,11 @@ define i1 @test9(i32 %a) {
define i1 @test9_logical(i32 %a) {
; CHECK-LABEL: @test9_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], -1073741824
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 1073741824
-; CHECK-NEXT: ret i1 [[TMP2]]
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 1073741824
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
+; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[A]], -1
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TMP2]], i1 [[TMP3]], i1 false
+; CHECK-NEXT: ret i1 [[OR_COND]]
;
%1 = and i32 %a, 1073741824
%2 = icmp ne i32 %1, 0
@@ -347,8 +357,11 @@ define i1 @test10(i32 %a) {
define i1 @test10_logical(i32 %a) {
; CHECK-LABEL: @test10_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[A:%.*]], 2
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 2
+; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0
+; CHECK-NEXT: [[TMP3:%.*]] = icmp ult i32 [[A]], 4
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TMP2]], i1 [[TMP3]], i1 false
+; CHECK-NEXT: ret i1 [[OR_COND]]
;
%1 = and i32 %a, 2
%2 = icmp eq i32 %1, 0
@@ -371,8 +384,11 @@ define i1 @test11(i32 %a) {
define i1 @test11_logical(i32 %a) {
; CHECK-LABEL: @test11_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[A:%.*]], 1
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 2
+; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i32 [[TMP1]], 0
+; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt i32 [[A]], 3
+; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TMP2]], i1 true, i1 [[TMP3]]
+; CHECK-NEXT: ret i1 [[OR_COND]]
;
%1 = and i32 %a, 2
%2 = icmp ne i32 %1, 0
diff --git llvm/test/Transforms/InstCombine/signed-truncation-check.ll llvm/test/Transforms/InstCombine/signed-truncation-check.ll
index 62a62b97e90d..27718b06d864 100644
--- llvm/test/Transforms/InstCombine/signed-truncation-check.ll
+++ llvm/test/Transforms/InstCombine/signed-truncation-check.ll
@@ -75,8 +75,12 @@ define i1 @positive_with_mask(i32 %arg) {
define i1 @positive_with_mask_logical(i32 %arg) {
; CHECK-LABEL: @positive_with_mask_logical(
-; CHECK-NEXT: [[T5_SIMPLIFIED:%.*]] = icmp ult i32 [[ARG:%.*]], 128
-; CHECK-NEXT: ret i1 [[T5_SIMPLIFIED]]
+; CHECK-NEXT: [[T1:%.*]] = and i32 [[ARG:%.*]], 1107296256
+; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
+; CHECK-NEXT: [[T3:%.*]] = add i32 [[ARG]], 128
+; CHECK-NEXT: [[T4:%.*]] = icmp ult i32 [[T3]], 256
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %arg, 1107296256
%t2 = icmp eq i32 %t1, 0
@@ -155,9 +159,9 @@ define i1 @positive_with_extra_and(i32 %arg, i1 %z) {
define i1 @positive_with_extra_and_logical(i32 %arg, i1 %z) {
; CHECK-LABEL: @positive_with_extra_and_logical(
-; CHECK-NEXT: [[T5_SIMPLIFIED:%.*]] = icmp ult i32 [[ARG:%.*]], 128
-; CHECK-NEXT: [[TMP1:%.*]] = and i1 [[T5_SIMPLIFIED]], [[Z:%.*]]
-; CHECK-NEXT: ret i1 [[TMP1]]
+; CHECK-NEXT: [[DOTSIMPLIFIED:%.*]] = icmp ult i32 [[ARG:%.*]], 128
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[DOTSIMPLIFIED]], i1 [[Z:%.*]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = icmp sgt i32 %arg, -1
%t2 = add i32 %arg, 128
@@ -326,8 +330,11 @@ define i1 @commutative() {
define i1 @commutative_logical() {
; CHECK-LABEL: @commutative_logical(
; CHECK-NEXT: [[ARG:%.*]] = call i32 @gen32()
-; CHECK-NEXT: [[T4_SIMPLIFIED:%.*]] = icmp ult i32 [[ARG]], 128
-; CHECK-NEXT: ret i1 [[T4_SIMPLIFIED]]
+; CHECK-NEXT: [[T1:%.*]] = icmp sgt i32 [[ARG]], -1
+; CHECK-NEXT: [[T2:%.*]] = add i32 [[ARG]], 128
+; CHECK-NEXT: [[T3:%.*]] = icmp ult i32 [[T2]], 256
+; CHECK-NEXT: [[T4:%.*]] = select i1 [[T3]], i1 [[T1]], i1 false
+; CHECK-NEXT: ret i1 [[T4]]
;
%arg = call i32 @gen32()
%t1 = icmp sgt i32 %arg, -1
@@ -354,8 +361,11 @@ define i1 @commutative_with_icmp() {
define i1 @commutative_with_icmp_logical() {
; CHECK-LABEL: @commutative_with_icmp_logical(
; CHECK-NEXT: [[ARG:%.*]] = call i32 @gen32()
-; CHECK-NEXT: [[T4_SIMPLIFIED:%.*]] = icmp ult i32 [[ARG]], 128
-; CHECK-NEXT: ret i1 [[T4_SIMPLIFIED]]
+; CHECK-NEXT: [[T1:%.*]] = icmp ult i32 [[ARG]], 512
+; CHECK-NEXT: [[T2:%.*]] = add i32 [[ARG]], 128
+; CHECK-NEXT: [[T3:%.*]] = icmp ult i32 [[T2]], 256
+; CHECK-NEXT: [[T4:%.*]] = select i1 [[T3]], i1 [[T1]], i1 false
+; CHECK-NEXT: ret i1 [[T4]]
;
%arg = call i32 @gen32()
%t1 = icmp ult i32 %arg, 512
@@ -384,8 +394,12 @@ define i1 @positive_trunc_signbit(i32 %arg) {
define i1 @positive_trunc_signbit_logical(i32 %arg) {
; CHECK-LABEL: @positive_trunc_signbit_logical(
-; CHECK-NEXT: [[T5_SIMPLIFIED:%.*]] = icmp ult i32 [[ARG:%.*]], 128
-; CHECK-NEXT: ret i1 [[T5_SIMPLIFIED]]
+; CHECK-NEXT: [[T1:%.*]] = trunc i32 [[ARG:%.*]] to i8
+; CHECK-NEXT: [[T2:%.*]] = icmp sgt i8 [[T1]], -1
+; CHECK-NEXT: [[T3:%.*]] = add i32 [[ARG]], 128
+; CHECK-NEXT: [[T4:%.*]] = icmp ult i32 [[T3]], 256
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = trunc i32 %arg to i8
%t2 = icmp sgt i8 %t1, -1
@@ -449,7 +463,7 @@ define i1 @positive_different_trunc_both_logical(i32 %arg) {
; CHECK-NEXT: [[T3:%.*]] = trunc i32 [[ARG]] to i16
; CHECK-NEXT: [[T4:%.*]] = add i16 [[T3]], 128
; CHECK-NEXT: [[T5:%.*]] = icmp ult i16 [[T4]], 256
-; CHECK-NEXT: [[T6:%.*]] = and i1 [[T2]], [[T5]]
+; CHECK-NEXT: [[T6:%.*]] = select i1 [[T2]], i1 [[T5]], i1 false
; CHECK-NEXT: ret i1 [[T6]]
;
%t1 = trunc i32 %arg to i15
@@ -550,8 +564,8 @@ define i1 @oneuse_with_mask_logical(i32 %arg) {
; CHECK-NEXT: call void @use32(i32 [[T3]])
; CHECK-NEXT: [[T4:%.*]] = icmp ult i32 [[T3]], 256
; CHECK-NEXT: call void @use1(i1 [[T4]])
-; CHECK-NEXT: [[T5_SIMPLIFIED:%.*]] = icmp ult i32 [[ARG]], 128
-; CHECK-NEXT: ret i1 [[T5_SIMPLIFIED]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
+; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %arg, 603979776 ; some bit within the target 4294967168 mask.
call void @use32(i32 %t1)
@@ -606,7 +620,7 @@ define i1 @oneuse_shl_ashr_logical(i32 %arg) {
; CHECK-NEXT: call void @use32(i32 [[T4]])
; CHECK-NEXT: [[T5:%.*]] = icmp eq i32 [[T4]], [[ARG]]
; CHECK-NEXT: call void @use1(i1 [[T5]])
-; CHECK-NEXT: [[T6:%.*]] = and i1 [[T2]], [[T5]]
+; CHECK-NEXT: [[T6:%.*]] = select i1 [[T2]], i1 [[T5]], i1 false
; CHECK-NEXT: ret i1 [[T6]]
;
%t1 = trunc i32 %arg to i8
@@ -664,7 +678,7 @@ define zeroext i1 @oneuse_trunc_sext_logical(i32 %arg) {
; CHECK-NEXT: call void @use32(i32 [[T4]])
; CHECK-NEXT: [[T5:%.*]] = icmp eq i32 [[T4]], [[ARG]]
; CHECK-NEXT: call void @use1(i1 [[T5]])
-; CHECK-NEXT: [[T6:%.*]] = and i1 [[T2]], [[T5]]
+; CHECK-NEXT: [[T6:%.*]] = select i1 [[T2]], i1 [[T5]], i1 false
; CHECK-NEXT: ret i1 [[T6]]
;
%t1 = trunc i32 %arg to i8
@@ -705,7 +719,7 @@ define i1 @negative_not_arg_logical(i32 %arg, i32 %arg2) {
; CHECK-NEXT: [[T1:%.*]] = icmp sgt i32 [[ARG:%.*]], -1
; CHECK-NEXT: [[T2:%.*]] = add i32 [[ARG2:%.*]], 128
; CHECK-NEXT: [[T3:%.*]] = icmp ult i32 [[T2]], 256
-; CHECK-NEXT: [[T4:%.*]] = and i1 [[T1]], [[T3]]
+; CHECK-NEXT: [[T4:%.*]] = select i1 [[T1]], i1 [[T3]], i1 false
; CHECK-NEXT: ret i1 [[T4]]
;
%t1 = icmp sgt i32 %arg, -1
@@ -738,7 +752,7 @@ define i1 @negative_trunc_not_arg_logical(i32 %arg, i32 %arg2) {
; CHECK-NEXT: [[T2:%.*]] = icmp sgt i8 [[T1]], -1
; CHECK-NEXT: [[T3:%.*]] = add i32 [[ARG2:%.*]], 128
; CHECK-NEXT: [[T4:%.*]] = icmp ult i32 [[T3]], 256
-; CHECK-NEXT: [[T5:%.*]] = and i1 [[T2]], [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = trunc i32 %arg to i8
@@ -772,7 +786,7 @@ define i1 @positive_with_mask_not_arg_logical(i32 %arg, i32 %arg2) {
; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = add i32 [[ARG2:%.*]], 128
; CHECK-NEXT: [[T4:%.*]] = icmp ult i32 [[T3]], 256
-; CHECK-NEXT: [[T5:%.*]] = and i1 [[T2]], [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %arg, 1140850688
@@ -806,7 +820,7 @@ define i1 @negative_with_nonuniform_bad_mask_logical(i32 %arg) {
; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = add i32 [[ARG]], 128
; CHECK-NEXT: [[T4:%.*]] = icmp ult i32 [[T3]], 256
-; CHECK-NEXT: [[T5:%.*]] = and i1 [[T2]], [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %arg, 1711276033 ; lowest bit is set
@@ -840,7 +854,7 @@ define i1 @negative_with_uniform_bad_mask_logical(i32 %arg) {
; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = add i32 [[ARG]], 128
; CHECK-NEXT: [[T4:%.*]] = icmp ult i32 [[T3]], 256
-; CHECK-NEXT: [[T5:%.*]] = and i1 [[T2]], [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %arg, 4278190144 ; 7'th bit is set
@@ -874,7 +888,7 @@ define i1 @negative_with_wrong_mask_logical(i32 %arg) {
; CHECK-NEXT: [[T2:%.*]] = icmp eq i32 [[T1]], 0
; CHECK-NEXT: [[T3:%.*]] = add i32 [[ARG]], 128
; CHECK-NEXT: [[T4:%.*]] = icmp ult i32 [[T3]], 256
-; CHECK-NEXT: [[T5:%.*]] = and i1 [[T2]], [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = and i32 %arg, 1 ; not even checking the right mask
@@ -991,7 +1005,7 @@ define i1 @two_signed_truncation_checks_logical(i32 %arg) {
; CHECK-NEXT: [[T2:%.*]] = icmp ult i32 [[T1]], 1024
; CHECK-NEXT: [[T3:%.*]] = add i32 [[ARG]], 128
; CHECK-NEXT: [[T4:%.*]] = icmp ult i32 [[T3]], 256
-; CHECK-NEXT: [[T5:%.*]] = and i1 [[T2]], [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T2]], i1 [[T4]], i1 false
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = add i32 %arg, 512
@@ -1025,7 +1039,7 @@ define i1 @bad_trunc_stc_logical(i32 %arg) {
; CHECK-NEXT: [[T2:%.*]] = trunc i32 [[ARG]] to i16
; CHECK-NEXT: [[T3:%.*]] = add i16 [[T2]], 128
; CHECK-NEXT: [[T4:%.*]] = icmp ult i16 [[T3]], 256
-; CHECK-NEXT: [[T5:%.*]] = and i1 [[T1]], [[T4]]
+; CHECK-NEXT: [[T5:%.*]] = select i1 [[T1]], i1 [[T4]], i1 false
; CHECK-NEXT: ret i1 [[T5]]
;
%t1 = icmp sgt i32 %arg, -1 ; checks a bit outside of the i16
diff --git llvm/test/Transforms/InstCombine/umul-sign-check.ll llvm/test/Transforms/InstCombine/umul-sign-check.ll
index 8fa659396f2e..352474c1b202 100644
--- llvm/test/Transforms/InstCombine/umul-sign-check.ll
+++ llvm/test/Transforms/InstCombine/umul-sign-check.ll
@@ -32,10 +32,11 @@ define i1 @test1(i64 %a, i64 %b, i64* %ptr) {
define i1 @test1_logical(i64 %a, i64 %b, i64* %ptr) {
; CHECK-LABEL: @test1_logical(
-; CHECK-NEXT: [[MUL:%.*]] = mul i64 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[A]], 0
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i64 [[B]], 0
-; CHECK-NEXT: [[OVERFLOW_1:%.*]] = and i1 [[TMP1]], [[TMP2]]
+; CHECK-NEXT: [[RES:%.*]] = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[A:%.*]], i64 [[B:%.*]])
+; CHECK-NEXT: [[OVERFLOW:%.*]] = extractvalue { i64, i1 } [[RES]], 1
+; CHECK-NEXT: [[MUL:%.*]] = extractvalue { i64, i1 } [[RES]], 0
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne i64 [[MUL]], 0
+; CHECK-NEXT: [[OVERFLOW_1:%.*]] = select i1 [[OVERFLOW]], i1 true, i1 [[CMP]]
; CHECK-NEXT: store i64 [[MUL]], i64* [[PTR:%.*]], align 8
; CHECK-NEXT: ret i1 [[OVERFLOW_1]]
;
@@ -71,10 +72,11 @@ define i1 @test1_or_ops_swapped(i64 %a, i64 %b, i64* %ptr) {
define i1 @test1_or_ops_swapped_logical(i64 %a, i64 %b, i64* %ptr) {
; CHECK-LABEL: @test1_or_ops_swapped_logical(
-; CHECK-NEXT: [[MUL:%.*]] = mul i64 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[A]], 0
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i64 [[B]], 0
-; CHECK-NEXT: [[OVERFLOW_1:%.*]] = and i1 [[TMP1]], [[TMP2]]
+; CHECK-NEXT: [[RES:%.*]] = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[A:%.*]], i64 [[B:%.*]])
+; CHECK-NEXT: [[OVERFLOW:%.*]] = extractvalue { i64, i1 } [[RES]], 1
+; CHECK-NEXT: [[MUL:%.*]] = extractvalue { i64, i1 } [[RES]], 0
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne i64 [[MUL]], 0
+; CHECK-NEXT: [[OVERFLOW_1:%.*]] = select i1 [[CMP]], i1 true, i1 [[OVERFLOW]]
; CHECK-NEXT: store i64 [[MUL]], i64* [[PTR:%.*]], align 8
; CHECK-NEXT: ret i1 [[OVERFLOW_1]]
;
@@ -112,10 +114,11 @@ define i1 @test2(i64 %a, i64 %b, i64* %ptr) {
define i1 @test2_logical(i64 %a, i64 %b, i64* %ptr) {
; CHECK-LABEL: @test2_logical(
-; CHECK-NEXT: [[MUL:%.*]] = mul i64 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[A]], 0
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i64 [[B]], 0
-; CHECK-NEXT: [[OVERFLOW_1:%.*]] = and i1 [[TMP1]], [[TMP2]]
+; CHECK-NEXT: [[RES:%.*]] = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[A:%.*]], i64 [[B:%.*]])
+; CHECK-NEXT: [[OVERFLOW:%.*]] = extractvalue { i64, i1 } [[RES]], 1
+; CHECK-NEXT: [[MUL:%.*]] = extractvalue { i64, i1 } [[RES]], 0
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne i64 [[MUL]], 0
+; CHECK-NEXT: [[OVERFLOW_1:%.*]] = select i1 [[OVERFLOW]], i1 true, i1 [[CMP]]
; CHECK-NEXT: [[NEG:%.*]] = sub i64 0, [[MUL]]
; CHECK-NEXT: store i64 [[NEG]], i64* [[PTR:%.*]], align 8
; CHECK-NEXT: ret i1 [[OVERFLOW_1]]
@@ -156,9 +159,9 @@ define i1 @test3_multiple_overflow_users_logical(i64 %a, i64 %b, i64* %ptr) {
; CHECK-LABEL: @test3_multiple_overflow_users_logical(
; CHECK-NEXT: [[RES:%.*]] = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[A:%.*]], i64 [[B:%.*]])
; CHECK-NEXT: [[OVERFLOW:%.*]] = extractvalue { i64, i1 } [[RES]], 1
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[A]], 0
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i64 [[B]], 0
-; CHECK-NEXT: [[OVERFLOW_1:%.*]] = and i1 [[TMP1]], [[TMP2]]
+; CHECK-NEXT: [[MUL:%.*]] = extractvalue { i64, i1 } [[RES]], 0
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne i64 [[MUL]], 0
+; CHECK-NEXT: [[OVERFLOW_1:%.*]] = select i1 [[OVERFLOW]], i1 true, i1 [[CMP]]
; CHECK-NEXT: call void @use(i1 [[OVERFLOW]])
; CHECK-NEXT: ret i1 [[OVERFLOW_1]]
;
@@ -201,7 +204,7 @@ define i1 @test3_multiple_overflow_and_mul_users_logical(i64 %a, i64 %b, i64* %p
; CHECK-NEXT: [[OVERFLOW:%.*]] = extractvalue { i64, i1 } [[RES]], 1
; CHECK-NEXT: [[MUL:%.*]] = extractvalue { i64, i1 } [[RES]], 0
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i64 [[MUL]], 0
-; CHECK-NEXT: [[OVERFLOW_1:%.*]] = or i1 [[OVERFLOW]], [[CMP]]
+; CHECK-NEXT: [[OVERFLOW_1:%.*]] = select i1 [[OVERFLOW]], i1 true, i1 [[CMP]]
; CHECK-NEXT: [[NEG:%.*]] = sub i64 0, [[MUL]]
; CHECK-NEXT: store i64 [[NEG]], i64* [[PTR:%.*]], align 8
; CHECK-NEXT: call void @use(i1 [[OVERFLOW]])
@@ -246,10 +249,10 @@ define i1 @test3_multiple_res_users(i64 %a, i64 %b, i64* %ptr) {
define i1 @test3_multiple_res_users_logical(i64 %a, i64 %b, i64* %ptr) {
; CHECK-LABEL: @test3_multiple_res_users_logical(
; CHECK-NEXT: [[RES:%.*]] = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[A:%.*]], i64 [[B:%.*]])
+; CHECK-NEXT: [[OVERFLOW:%.*]] = extractvalue { i64, i1 } [[RES]], 1
; CHECK-NEXT: [[MUL:%.*]] = extractvalue { i64, i1 } [[RES]], 0
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[A]], 0
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i64 [[B]], 0
-; CHECK-NEXT: [[OVERFLOW_1:%.*]] = and i1 [[TMP1]], [[TMP2]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne i64 [[MUL]], 0
+; CHECK-NEXT: [[OVERFLOW_1:%.*]] = select i1 [[OVERFLOW]], i1 true, i1 [[CMP]]
; CHECK-NEXT: [[NEG:%.*]] = sub i64 0, [[MUL]]
; CHECK-NEXT: store i64 [[NEG]], i64* [[PTR:%.*]], align 8
; CHECK-NEXT: call void @use.2({ i64, i1 } [[RES]])
@@ -294,10 +297,11 @@ define i1 @test3_multiple_mul_users(i64 %a, i64 %b, i64* %ptr) {
define i1 @test3_multiple_mul_users_logical(i64 %a, i64 %b, i64* %ptr) {
; CHECK-LABEL: @test3_multiple_mul_users_logical(
-; CHECK-NEXT: [[MUL:%.*]] = mul i64 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[A]], 0
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i64 [[B]], 0
-; CHECK-NEXT: [[OVERFLOW_1:%.*]] = and i1 [[TMP1]], [[TMP2]]
+; CHECK-NEXT: [[RES:%.*]] = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[A:%.*]], i64 [[B:%.*]])
+; CHECK-NEXT: [[OVERFLOW:%.*]] = extractvalue { i64, i1 } [[RES]], 1
+; CHECK-NEXT: [[MUL:%.*]] = extractvalue { i64, i1 } [[RES]], 0
+; CHECK-NEXT: [[CMP:%.*]] = icmp ne i64 [[MUL]], 0
+; CHECK-NEXT: [[OVERFLOW_1:%.*]] = select i1 [[OVERFLOW]], i1 true, i1 [[CMP]]
; CHECK-NEXT: [[NEG:%.*]] = sub i64 0, [[MUL]]
; CHECK-NEXT: store i64 [[NEG]], i64* [[PTR:%.*]], align 8
; CHECK-NEXT: call void @use.3(i64 [[MUL]])
@@ -344,7 +348,7 @@ define i1 @test4_no_icmp_ne_logical(i64 %a, i64 %b, i64* %ptr) {
; CHECK-NEXT: [[OVERFLOW:%.*]] = extractvalue { i64, i1 } [[RES]], 1
; CHECK-NEXT: [[MUL:%.*]] = extractvalue { i64, i1 } [[RES]], 0
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[MUL]], 0
-; CHECK-NEXT: [[OVERFLOW_1:%.*]] = or i1 [[OVERFLOW]], [[CMP]]
+; CHECK-NEXT: [[OVERFLOW_1:%.*]] = select i1 [[OVERFLOW]], i1 true, i1 [[CMP]]
; CHECK-NEXT: [[NEG:%.*]] = sub i64 0, [[MUL]]
; CHECK-NEXT: store i64 [[NEG]], i64* [[PTR:%.*]], align 8
; CHECK-NEXT: ret i1 [[OVERFLOW_1]]
diff --git llvm/test/Transforms/InstCombine/usub-overflow-known-by-implied-cond.ll llvm/test/Transforms/InstCombine/usub-overflow-known-by-implied-cond.ll
index abe6e682761f..40d65b4f8c21 100644
--- llvm/test/Transforms/InstCombine/usub-overflow-known-by-implied-cond.ll
+++ llvm/test/Transforms/InstCombine/usub-overflow-known-by-implied-cond.ll
@@ -264,7 +264,7 @@ bb3:
define i32 @test9_logical(i32 %a, i32 %b, i1 %cond2) {
; CHECK-LABEL: @test9_logical(
; CHECK-NEXT: [[COND:%.*]] = icmp ugt i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[AND:%.*]] = and i1 [[COND]], [[COND2:%.*]]
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[COND]], i1 [[COND2:%.*]], i1 false
; CHECK-NEXT: br i1 [[AND]], label [[BB1:%.*]], label [[BB3:%.*]]
; CHECK: bb1:
; CHECK-NEXT: br i1 false, label [[BB3]], label [[BB2:%.*]]
@@ -326,7 +326,7 @@ bb3:
define i32 @test10_logical(i32 %a, i32 %b, i1 %cond2) {
; CHECK-LABEL: @test10_logical(
; CHECK-NEXT: [[COND:%.*]] = icmp ugt i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[AND:%.*]] = and i1 [[COND]], [[COND2:%.*]]
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[COND]], i1 [[COND2:%.*]], i1 false
; CHECK-NEXT: br i1 [[AND]], label [[BB3:%.*]], label [[BB1:%.*]]
; CHECK: bb1:
; CHECK-NEXT: [[SUB1:%.*]] = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 [[A]], i32 [[B]])
@@ -390,7 +390,7 @@ bb3:
define i32 @test11_logical(i32 %a, i32 %b, i1 %cond2) {
; CHECK-LABEL: @test11_logical(
; CHECK-NEXT: [[COND:%.*]] = icmp ugt i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[OR:%.*]] = or i1 [[COND]], [[COND2:%.*]]
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[COND]], i1 true, i1 [[COND2:%.*]]
; CHECK-NEXT: br i1 [[OR]], label [[BB1:%.*]], label [[BB3:%.*]]
; CHECK: bb1:
; CHECK-NEXT: [[SUB1:%.*]] = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 [[A]], i32 [[B]])
@@ -454,7 +454,7 @@ bb3:
define i32 @test12_logical(i32 %a, i32 %b, i1 %cond2) {
; CHECK-LABEL: @test12_logical(
; CHECK-NEXT: [[COND:%.*]] = icmp ugt i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[OR:%.*]] = or i1 [[COND]], [[COND2:%.*]]
+; CHECK-NEXT: [[OR:%.*]] = select i1 [[COND]], i1 true, i1 [[COND2:%.*]]
; CHECK-NEXT: br i1 [[OR]], label [[BB3:%.*]], label [[BB1:%.*]]
; CHECK: bb1:
; CHECK-NEXT: [[SUB1:%.*]] = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 [[A]], i32 [[B]])
diff --git llvm/test/Transforms/InstCombine/widenable-conditions.ll llvm/test/Transforms/InstCombine/widenable-conditions.ll
index 31aa98ff998b..54e4f95a4ee1 100644
--- llvm/test/Transforms/InstCombine/widenable-conditions.ll
+++ llvm/test/Transforms/InstCombine/widenable-conditions.ll
@@ -20,8 +20,8 @@ define i1 @test1(i1 %a, i1 %b) {
define i1 @test1_logical(i1 %a, i1 %b) {
; CHECK-LABEL: @test1_logical(
; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
-; CHECK-NEXT: [[LHS:%.*]] = and i1 [[WC]], [[B:%.*]]
-; CHECK-NEXT: [[AND:%.*]] = and i1 [[LHS]], [[A:%.*]]
+; CHECK-NEXT: [[LHS:%.*]] = select i1 [[B:%.*]], i1 [[WC]], i1 false
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[LHS]], i1 [[A:%.*]], i1 false
; CHECK-NEXT: ret i1 [[AND]]
;
%wc = call i1 @llvm.experimental.widenable.condition()
@@ -49,9 +49,9 @@ define i1 @test1b(i1 %a, i1 %b) {
define i1 @test1b_logical(i1 %a, i1 %b) {
; CHECK-LABEL: @test1b_logical(
; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
-; CHECK-NEXT: [[LHS:%.*]] = and i1 [[WC]], [[B:%.*]]
+; CHECK-NEXT: [[LHS:%.*]] = select i1 [[B:%.*]], i1 [[WC]], i1 false
; CHECK-NEXT: call void @use(i1 [[LHS]])
-; CHECK-NEXT: [[AND:%.*]] = and i1 [[LHS]], [[A:%.*]]
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[LHS]], i1 [[A:%.*]], i1 false
; CHECK-NEXT: ret i1 [[AND]]
;
%wc = call i1 @llvm.experimental.widenable.condition()
@@ -87,8 +87,8 @@ define i1 @test1c_logical(i1 %a, i1 %b) {
; CHECK-NEXT: call void @use(i1 [[B:%.*]])
; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
; CHECK-NEXT: call void @use(i1 [[WC]])
-; CHECK-NEXT: [[LHS:%.*]] = and i1 [[WC]], [[B]]
-; CHECK-NEXT: [[AND:%.*]] = and i1 [[LHS]], [[A]]
+; CHECK-NEXT: [[LHS:%.*]] = select i1 [[B]], i1 [[WC]], i1 false
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[LHS]], i1 [[A]], i1 false
; CHECK-NEXT: ret i1 [[AND]]
;
call void @use(i1 %a)
@@ -116,8 +116,8 @@ define i1 @test2(i1 %a, i1 %b) {
define i1 @test2_logical(i1 %a, i1 %b) {
; CHECK-LABEL: @test2_logical(
; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
-; CHECK-NEXT: [[LHS:%.*]] = and i1 [[WC]], [[B:%.*]]
-; CHECK-NEXT: [[AND:%.*]] = and i1 [[LHS]], [[A:%.*]]
+; CHECK-NEXT: [[LHS:%.*]] = select i1 [[WC]], i1 [[B:%.*]], i1 false
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[LHS]], i1 [[A:%.*]], i1 false
; CHECK-NEXT: ret i1 [[AND]]
;
%wc = call i1 @llvm.experimental.widenable.condition()
@@ -146,9 +146,9 @@ define i1 @test3(i1 %a, i1 %b, i1 %c) {
define i1 @test3_logical(i1 %a, i1 %b, i1 %c) {
; CHECK-LABEL: @test3_logical(
; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
-; CHECK-NEXT: [[LHS:%.*]] = and i1 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[RHS:%.*]] = and i1 [[WC]], [[C:%.*]]
-; CHECK-NEXT: [[AND:%.*]] = and i1 [[LHS]], [[RHS]]
+; CHECK-NEXT: [[LHS:%.*]] = select i1 [[A:%.*]], i1 [[B:%.*]], i1 false
+; CHECK-NEXT: [[TMP1:%.*]] = and i1 [[LHS]], [[C:%.*]]
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[TMP1]], i1 [[WC]], i1 false
; CHECK-NEXT: ret i1 [[AND]]
;
%wc = call i1 @llvm.experimental.widenable.condition()
@@ -176,9 +176,9 @@ define i1 @test4(i1 %a, i1 %b, i1 %c) {
define i1 @test4_logical(i1 %a, i1 %b, i1 %c) {
; CHECK-LABEL: @test4_logical(
; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
-; CHECK-NEXT: [[LHS:%.*]] = and i1 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[RHS:%.*]] = and i1 [[WC]], [[C:%.*]]
-; CHECK-NEXT: [[AND:%.*]] = and i1 [[LHS]], [[RHS]]
+; CHECK-NEXT: [[LHS:%.*]] = select i1 [[A:%.*]], i1 [[B:%.*]], i1 false
+; CHECK-NEXT: [[TMP1:%.*]] = and i1 [[LHS]], [[WC]]
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[TMP1]], i1 [[C:%.*]], i1 false
; CHECK-NEXT: ret i1 [[AND]]
;
%wc = call i1 @llvm.experimental.widenable.condition()
@@ -225,7 +225,7 @@ define i1 @test6_logical(i1 %a, i1 %b) {
; CHECK-LABEL: @test6_logical(
; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
; CHECK-NEXT: [[WC2:%.*]] = call i1 @llvm.experimental.widenable.condition()
-; CHECK-NEXT: [[AND:%.*]] = and i1 [[WC]], [[WC2]]
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[WC]], i1 [[WC2]], i1 false
; CHECK-NEXT: ret i1 [[AND]]
;
%wc = call i1 @llvm.experimental.widenable.condition()
@@ -254,7 +254,7 @@ define i1 @test7_logical(i1 %a, i1 %b) {
; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
; CHECK-NEXT: call void @use(i1 [[WC]])
; CHECK-NEXT: [[WC2:%.*]] = call i1 @llvm.experimental.widenable.condition()
-; CHECK-NEXT: [[AND:%.*]] = and i1 [[WC]], [[WC2]]
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[WC]], i1 [[WC2]], i1 false
; CHECK-NEXT: ret i1 [[AND]]
;
%wc = call i1 @llvm.experimental.widenable.condition()
@@ -284,7 +284,7 @@ define i1 @test8_logical(i1 %a, i1 %b) {
; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
; CHECK-NEXT: [[WC2:%.*]] = call i1 @llvm.experimental.widenable.condition()
; CHECK-NEXT: call void @use(i1 [[WC2]])
-; CHECK-NEXT: [[AND:%.*]] = and i1 [[WC]], [[WC2]]
+; CHECK-NEXT: [[AND:%.*]] = select i1 [[WC]], i1 [[WC2]], i1 false
; CHECK-NEXT: ret i1 [[AND]]
;
%wc = call i1 @llvm.experimental.widenable.condition()
diff --git llvm/test/Transforms/InstCombine/zext-or-icmp.ll llvm/test/Transforms/InstCombine/zext-or-icmp.ll
index a77aa7ac7ebd..03a38ca321bf 100644
--- llvm/test/Transforms/InstCombine/zext-or-icmp.ll
+++ llvm/test/Transforms/InstCombine/zext-or-icmp.ll
@@ -23,11 +23,11 @@ define i8 @zext_or_icmp_icmp(i8 %a, i8 %b) {
define i8 @zext_or_icmp_icmp_logical(i8 %a, i8 %b) {
; CHECK-LABEL: @zext_or_icmp_icmp_logical(
; CHECK-NEXT: [[MASK:%.*]] = and i8 [[A:%.*]], 1
+; CHECK-NEXT: [[TOBOOL1:%.*]] = icmp eq i8 [[MASK]], 0
; CHECK-NEXT: [[TOBOOL2:%.*]] = icmp eq i8 [[B:%.*]], 0
-; CHECK-NEXT: [[TOBOOL22:%.*]] = zext i1 [[TOBOOL2]] to i8
-; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[MASK]], 1
-; CHECK-NEXT: [[ZEXT3:%.*]] = or i8 [[TMP1]], [[TOBOOL22]]
-; CHECK-NEXT: ret i8 [[ZEXT3]]
+; CHECK-NEXT: [[BOTHCOND:%.*]] = select i1 [[TOBOOL1]], i1 true, i1 [[TOBOOL2]]
+; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[BOTHCOND]] to i8
+; CHECK-NEXT: ret i8 [[ZEXT]]
;
%mask = and i8 %a, 1
%toBool1 = icmp eq i8 %mask, 0
@@ -86,7 +86,7 @@ define i32 @dont_widen_undef_logical() {
; CHECK-NEXT: [[M_1_OP:%.*]] = lshr i32 1, [[M_011]]
; CHECK-NEXT: [[SEXT_MASK:%.*]] = and i32 [[M_1_OP]], 65535
; CHECK-NEXT: [[CMP115:%.*]] = icmp ne i32 [[SEXT_MASK]], 0
-; CHECK-NEXT: [[CMP1:%.*]] = or i1 [[CMP_I]], [[CMP115]]
+; CHECK-NEXT: [[CMP1:%.*]] = select i1 [[CMP_I]], i1 true, i1 [[CMP115]]
; CHECK-NEXT: [[CONV2:%.*]] = zext i1 [[CMP1]] to i32
; CHECK-NEXT: ret i32 [[CONV2]]
;
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