test.ll

; ModuleID = '<stdin>'
source_filename = "ravif.93fe5ed2d8241d2f-cgu.13"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@0 = external hidden unnamed_addr constant <{ ptr, [16 x i8] }>, align 8
@1 = external hidden unnamed_addr constant <{ ptr, [16 x i8] }>, align 8
@2 = external hidden unnamed_addr constant <{ ptr, [16 x i8] }>, align 8
@3 = external hidden unnamed_addr constant <{ ptr, [16 x i8] }>, align 8
@4 = external hidden unnamed_addr constant <{ ptr, [16 x i8] }>, align 8
@5 = external hidden unnamed_addr constant <{ ptr, [16 x i8] }>, align 8
@6 = external hidden unnamed_addr constant <{ ptr, [16 x i8] }>, align 8
@7 = external hidden unnamed_addr constant <{ ptr, [16 x i8] }>, align 8
@8 = external hidden unnamed_addr constant <{ ptr, [16 x i8] }>, align 8
@9 = external hidden unnamed_addr constant <{ ptr, [16 x i8] }>, align 8
@10 = external hidden unnamed_addr constant <{ ptr, [16 x i8] }>, align 8
@11 = external hidden unnamed_addr constant <{ ptr, [16 x i8] }>, align 8
@12 = external hidden unnamed_addr constant <{ ptr, [16 x i8] }>, align 8
@13 = external hidden unnamed_addr constant <{ ptr, [16 x i8] }>, align 8
@14 = external hidden unnamed_addr constant <{ ptr, [16 x i8] }>, align 8
@15 = external hidden unnamed_addr constant <{ ptr, [16 x i8] }>, align 8
@16 = external hidden unnamed_addr constant <{ ptr, [16 x i8] }>, align 8
@17 = external hidden unnamed_addr constant <{ ptr, [16 x i8] }>, align 8
@18 = external hidden unnamed_addr constant <{ ptr, [16 x i8] }>, align 8
@19 = external hidden unnamed_addr constant <{ ptr, [16 x i8] }>, align 8

; Function Attrs: alwaysinline nounwind nonlazybind
define hidden fastcc void @_ZN5rav1e3lrf4rust25sgrproj_box_f_r1_internal17h4895373499287a18E(ptr noalias nocapture noundef readonly align 8 dereferenceable(48) %0, ptr noalias nocapture noundef readonly align 8 dereferenceable(48) %1, ptr noalias nocapture noundef nonnull writeonly align 4 %2, i64 noundef %3, i64 noundef %4, i64 noundef %5, i64 noundef %6, ptr noalias noundef readonly align 8 dereferenceable(24) %7) unnamed_addr #0 {
  %9 = tail call { ptr, i64 } @"_ZN7v_frame5plane19PlaneSlice$LT$T$GT$3row17h2591b1d27e4c2829E"(ptr noalias noundef nonnull readonly align 8 dereferenceable(24) %7, i64 noundef %5) #3
  %10 = extractvalue { ptr, i64 } %9, 0
  %11 = extractvalue { ptr, i64 } %9, 1
  %12 = getelementptr inbounds { ptr, i64 }, ptr %0, i64 0, i32 1
  %13 = load i64, ptr %12, align 8
  %14 = load ptr, ptr %0, align 8, !nonnull !3, !align !4
  %15 = getelementptr inbounds [3 x { ptr, i64 }], ptr %0, i64 0, i64 2, i32 1
  %16 = load i64, ptr %15, align 8
  %17 = getelementptr inbounds [3 x { ptr, i64 }], ptr %0, i64 0, i64 2
  %18 = load ptr, ptr %17, align 8, !nonnull !3, !align !4
  %19 = getelementptr inbounds [3 x { ptr, i64 }], ptr %0, i64 0, i64 1, i32 1
  %20 = load i64, ptr %19, align 8
  %21 = getelementptr inbounds [3 x { ptr, i64 }], ptr %0, i64 0, i64 1
  %22 = load ptr, ptr %21, align 8, !nonnull !3, !align !4
  %23 = getelementptr inbounds { ptr, i64 }, ptr %1, i64 0, i32 1
  %24 = load i64, ptr %23, align 8
  %25 = load ptr, ptr %1, align 8, !nonnull !3, !align !4
  %26 = getelementptr inbounds [3 x { ptr, i64 }], ptr %1, i64 0, i64 2, i32 1
  %27 = load i64, ptr %26, align 8
  %28 = getelementptr inbounds [3 x { ptr, i64 }], ptr %1, i64 0, i64 2
  %29 = load ptr, ptr %28, align 8, !nonnull !3, !align !4
  %30 = getelementptr inbounds [3 x { ptr, i64 }], ptr %1, i64 0, i64 1, i32 1
  %31 = load i64, ptr %30, align 8
  %32 = getelementptr inbounds [3 x { ptr, i64 }], ptr %1, i64 0, i64 1
  %33 = load ptr, ptr %32, align 8, !nonnull !3, !align !4
  br label %34

34:                                               ; preds = %139, %8
  %.sroa.01.0 = phi i64 [ 0, %8 ], [ %38, %139 ]
  %35 = icmp ult i64 %.sroa.01.0, %6
  br i1 %35, label %37, label %36

36:                                               ; preds = %34
  ret void

37:                                               ; preds = %34
  %38 = add nuw i64 %.sroa.01.0, 1
  %39 = icmp ult i64 %.sroa.01.0, %13
  br i1 %39, label %40, label %42, !prof !5

40:                                               ; preds = %37
  %41 = icmp ult i64 %.sroa.01.0, %16
  br i1 %41, label %43, label %46, !prof !5

42:                                               ; preds = %37
  %.lcssa = phi i64 [ %13, %37 ]
  %.sroa.01.0.lcssa1 = phi i64 [ %.sroa.01.0, %37 ]
  tail call void @_ZN4core9panicking18panic_bounds_check17hfa2a7f0168fa7dcaE(i64 noundef %.sroa.01.0.lcssa1, i64 noundef %.lcssa, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @0) #4
  unreachable

43:                                               ; preds = %40
  %44 = add i64 %.sroa.01.0, 2
  %45 = icmp ult i64 %44, %13
  br i1 %45, label %47, label %49, !prof !5

46:                                               ; preds = %40
  %.lcssa40 = phi i64 [ %16, %40 ]
  %.sroa.01.0.lcssa2 = phi i64 [ %.sroa.01.0, %40 ]
  tail call void @_ZN4core9panicking18panic_bounds_check17hfa2a7f0168fa7dcaE(i64 noundef %.sroa.01.0.lcssa2, i64 noundef %.lcssa40, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @1) #4
  unreachable

47:                                               ; preds = %43
  %48 = icmp ult i64 %44, %16
  br i1 %48, label %50, label %64, !prof !5

49:                                               ; preds = %43
  %.lcssa59 = phi i64 [ %44, %43 ]
  %.lcssa22 = phi i64 [ %13, %43 ]
  tail call void @_ZN4core9panicking18panic_bounds_check17hfa2a7f0168fa7dcaE(i64 noundef %.lcssa59, i64 noundef %.lcssa22, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @2) #4
  unreachable

50:                                               ; preds = %47
  %51 = getelementptr inbounds [0 x i32], ptr %14, i64 0, i64 %.sroa.01.0
  %52 = load i32, ptr %51, align 4, !noundef !3
  %53 = getelementptr inbounds [0 x i32], ptr %18, i64 0, i64 %.sroa.01.0
  %54 = load i32, ptr %53, align 4, !noundef !3
  %55 = add i32 %54, %52
  %56 = getelementptr inbounds [0 x i32], ptr %14, i64 0, i64 %44
  %57 = load i32, ptr %56, align 4, !noundef !3
  %58 = add i32 %55, %57
  %59 = getelementptr inbounds [0 x i32], ptr %18, i64 0, i64 %44
  %60 = load i32, ptr %59, align 4, !noundef !3
  %61 = add i32 %58, %60
  %62 = mul i32 %61, 3
  %63 = icmp ult i64 %.sroa.01.0, %20
  br i1 %63, label %65, label %68, !prof !5

64:                                               ; preds = %47
  %.lcssa60 = phi i64 [ %44, %47 ]
  %.lcssa42 = phi i64 [ %16, %47 ]
  tail call void @_ZN4core9panicking18panic_bounds_check17hfa2a7f0168fa7dcaE(i64 noundef %.lcssa60, i64 noundef %.lcssa42, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @3) #4
  unreachable

65:                                               ; preds = %50
  %66 = add nuw i64 %.sroa.01.0, 1
  %67 = icmp ult i64 %66, %13
  br i1 %67, label %69, label %71, !prof !5

68:                                               ; preds = %50
  %.lcssa77 = phi i64 [ %20, %50 ]
  %.sroa.01.0.lcssa5 = phi i64 [ %.sroa.01.0, %50 ]
  tail call void @_ZN4core9panicking18panic_bounds_check17hfa2a7f0168fa7dcaE(i64 noundef %.sroa.01.0.lcssa5, i64 noundef %.lcssa77, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @4) #4
  unreachable

69:                                               ; preds = %65
  %70 = icmp ult i64 %66, %20
  br i1 %70, label %72, label %74, !prof !5

71:                                               ; preds = %65
  %.lcssa93 = phi i64 [ %66, %65 ]
  %.lcssa25 = phi i64 [ %13, %65 ]
  tail call void @_ZN4core9panicking18panic_bounds_check17hfa2a7f0168fa7dcaE(i64 noundef %.lcssa93, i64 noundef %.lcssa25, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @5) #4
  unreachable

72:                                               ; preds = %69
  %73 = icmp ult i64 %66, %16
  br i1 %73, label %75, label %77, !prof !5

74:                                               ; preds = %69
  %.lcssa94 = phi i64 [ %66, %69 ]
  %.lcssa79 = phi i64 [ %20, %69 ]
  tail call void @_ZN4core9panicking18panic_bounds_check17hfa2a7f0168fa7dcaE(i64 noundef %.lcssa94, i64 noundef %.lcssa79, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @6) #4
  unreachable

75:                                               ; preds = %72
  %76 = icmp ult i64 %44, %20
  br i1 %76, label %78, label %96, !prof !5

77:                                               ; preds = %72
  %.lcssa95 = phi i64 [ %66, %72 ]
  %.lcssa46 = phi i64 [ %16, %72 ]
  tail call void @_ZN4core9panicking18panic_bounds_check17hfa2a7f0168fa7dcaE(i64 noundef %.lcssa95, i64 noundef %.lcssa46, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @7) #4
  unreachable

78:                                               ; preds = %75
  %79 = getelementptr inbounds [0 x i32], ptr %22, i64 0, i64 %.sroa.01.0
  %80 = load i32, ptr %79, align 4, !noundef !3
  %81 = getelementptr inbounds [0 x i32], ptr %14, i64 0, i64 %66
  %82 = load i32, ptr %81, align 4, !noundef !3
  %83 = add i32 %82, %80
  %84 = getelementptr inbounds [0 x i32], ptr %22, i64 0, i64 %66
  %85 = load i32, ptr %84, align 4, !noundef !3
  %86 = add i32 %83, %85
  %87 = getelementptr inbounds [0 x i32], ptr %18, i64 0, i64 %66
  %88 = load i32, ptr %87, align 4, !noundef !3
  %89 = add i32 %86, %88
  %90 = getelementptr inbounds [0 x i32], ptr %22, i64 0, i64 %44
  %91 = load i32, ptr %90, align 4, !noundef !3
  %92 = add i32 %89, %91
  %93 = mul i32 %92, 4
  %94 = add i32 %93, %62
  %95 = icmp ult i64 %.sroa.01.0, %24
  br i1 %95, label %97, label %99, !prof !5

96:                                               ; preds = %75
  %.lcssa81 = phi i64 [ %20, %75 ]
  %.lcssa65 = phi i64 [ %44, %75 ]
  tail call void @_ZN4core9panicking18panic_bounds_check17hfa2a7f0168fa7dcaE(i64 noundef %.lcssa65, i64 noundef %.lcssa81, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @8) #4
  unreachable

97:                                               ; preds = %78
  %98 = icmp ult i64 %.sroa.01.0, %27
  br i1 %98, label %100, label %102, !prof !5

99:                                               ; preds = %78
  %.lcssa108 = phi i64 [ %24, %78 ]
  %.sroa.01.0.lcssa10 = phi i64 [ %.sroa.01.0, %78 ]
  tail call void @_ZN4core9panicking18panic_bounds_check17hfa2a7f0168fa7dcaE(i64 noundef %.sroa.01.0.lcssa10, i64 noundef %.lcssa108, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @9) #4
  unreachable

100:                                              ; preds = %97
  %101 = icmp ult i64 %44, %24
  br i1 %101, label %103, label %105, !prof !5

102:                                              ; preds = %97
  %.lcssa119 = phi i64 [ %27, %97 ]
  %.sroa.01.0.lcssa11 = phi i64 [ %.sroa.01.0, %97 ]
  tail call void @_ZN4core9panicking18panic_bounds_check17hfa2a7f0168fa7dcaE(i64 noundef %.sroa.01.0.lcssa11, i64 noundef %.lcssa119, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @10) #4
  unreachable

103:                                              ; preds = %100
  %104 = icmp ult i64 %44, %27
  br i1 %104, label %106, label %120, !prof !5

105:                                              ; preds = %100
  %.lcssa110 = phi i64 [ %24, %100 ]
  %.lcssa68 = phi i64 [ %44, %100 ]
  tail call void @_ZN4core9panicking18panic_bounds_check17hfa2a7f0168fa7dcaE(i64 noundef %.lcssa68, i64 noundef %.lcssa110, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @11) #4
  unreachable

106:                                              ; preds = %103
  %107 = getelementptr inbounds [0 x i32], ptr %25, i64 0, i64 %.sroa.01.0
  %108 = load i32, ptr %107, align 4, !noundef !3
  %109 = getelementptr inbounds [0 x i32], ptr %29, i64 0, i64 %.sroa.01.0
  %110 = load i32, ptr %109, align 4, !noundef !3
  %111 = add i32 %110, %108
  %112 = getelementptr inbounds [0 x i32], ptr %25, i64 0, i64 %44
  %113 = load i32, ptr %112, align 4, !noundef !3
  %114 = add i32 %111, %113
  %115 = getelementptr inbounds [0 x i32], ptr %29, i64 0, i64 %44
  %116 = load i32, ptr %115, align 4, !noundef !3
  %117 = add i32 %114, %116
  %118 = mul i32 %117, 3
  %119 = icmp ult i64 %.sroa.01.0, %31
  br i1 %119, label %121, label %123, !prof !5

120:                                              ; preds = %103
  %.lcssa121 = phi i64 [ %27, %103 ]
  %.lcssa69 = phi i64 [ %44, %103 ]
  tail call void @_ZN4core9panicking18panic_bounds_check17hfa2a7f0168fa7dcaE(i64 noundef %.lcssa69, i64 noundef %.lcssa121, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @12) #4
  unreachable

121:                                              ; preds = %106
  %122 = icmp ult i64 %66, %24
  br i1 %122, label %124, label %126, !prof !5

123:                                              ; preds = %106
  %.lcssa129 = phi i64 [ %31, %106 ]
  %.sroa.01.0.lcssa14 = phi i64 [ %.sroa.01.0, %106 ]
  tail call void @_ZN4core9panicking18panic_bounds_check17hfa2a7f0168fa7dcaE(i64 noundef %.sroa.01.0.lcssa14, i64 noundef %.lcssa129, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @13) #4
  unreachable

124:                                              ; preds = %121
  %125 = icmp ult i64 %66, %31
  br i1 %125, label %127, label %129, !prof !5

126:                                              ; preds = %121
  %.lcssa113 = phi i64 [ %24, %121 ]
  %.lcssa102 = phi i64 [ %66, %121 ]
  tail call void @_ZN4core9panicking18panic_bounds_check17hfa2a7f0168fa7dcaE(i64 noundef %.lcssa102, i64 noundef %.lcssa113, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @14) #4
  unreachable

127:                                              ; preds = %124
  %128 = icmp ult i64 %66, %27
  br i1 %128, label %130, label %132, !prof !5

129:                                              ; preds = %124
  %.lcssa131 = phi i64 [ %31, %124 ]
  %.lcssa103 = phi i64 [ %66, %124 ]
  tail call void @_ZN4core9panicking18panic_bounds_check17hfa2a7f0168fa7dcaE(i64 noundef %.lcssa103, i64 noundef %.lcssa131, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @15) #4
  unreachable

130:                                              ; preds = %127
  %131 = icmp ult i64 %44, %31
  br i1 %131, label %133, label %135, !prof !5

132:                                              ; preds = %127
  %.lcssa125 = phi i64 [ %27, %127 ]
  %.lcssa104 = phi i64 [ %66, %127 ]
  tail call void @_ZN4core9panicking18panic_bounds_check17hfa2a7f0168fa7dcaE(i64 noundef %.lcssa104, i64 noundef %.lcssa125, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @16) #4
  unreachable

133:                                              ; preds = %130
  %134 = icmp ult i64 %.sroa.01.0, %11
  br i1 %134, label %136, label %138, !prof !5

135:                                              ; preds = %130
  %.lcssa133 = phi i64 [ %31, %130 ]
  %.lcssa74 = phi i64 [ %44, %130 ]
  tail call void @_ZN4core9panicking18panic_bounds_check17hfa2a7f0168fa7dcaE(i64 noundef %.lcssa74, i64 noundef %.lcssa133, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @17) #4
  unreachable

136:                                              ; preds = %133
  %137 = icmp ult i64 %.sroa.01.0, 384
  br i1 %137, label %139, label %164, !prof !5

138:                                              ; preds = %133
  %.sroa.01.0.lcssa19 = phi i64 [ %.sroa.01.0, %133 ]
  tail call void @_ZN4core9panicking18panic_bounds_check17hfa2a7f0168fa7dcaE(i64 noundef %.sroa.01.0.lcssa19, i64 noundef %11, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @18) #4
  unreachable

139:                                              ; preds = %136
  %140 = getelementptr inbounds [0 x i8], ptr %10, i64 0, i64 %.sroa.01.0
  %141 = load i8, ptr %140, align 1, !noundef !3
  %142 = zext i8 %141 to i32
  %143 = getelementptr inbounds [0 x i32], ptr %33, i64 0, i64 %44
  %144 = load i32, ptr %143, align 4, !noundef !3
  %145 = getelementptr inbounds [0 x i32], ptr %29, i64 0, i64 %66
  %146 = load i32, ptr %145, align 4, !noundef !3
  %147 = getelementptr inbounds [0 x i32], ptr %33, i64 0, i64 %66
  %148 = load i32, ptr %147, align 4, !noundef !3
  %149 = getelementptr inbounds [0 x i32], ptr %25, i64 0, i64 %66
  %150 = load i32, ptr %149, align 4, !noundef !3
  %151 = getelementptr inbounds [0 x i32], ptr %33, i64 0, i64 %.sroa.01.0
  %152 = load i32, ptr %151, align 4, !noundef !3
  %153 = mul i32 %142, %94
  %154 = add i32 %146, %144
  %155 = add i32 %154, %148
  %156 = add i32 %155, %150
  %157 = add i32 %156, %152
  %158 = mul i32 %157, 4
  %159 = add i32 %118, 256
  %160 = add i32 %159, %153
  %161 = add i32 %160, %158
  %162 = getelementptr inbounds [0 x i32], ptr %2, i64 0, i64 %.sroa.01.0
  %163 = lshr i32 %161, 9
  store i32 %163, ptr %162, align 4
  br label %34

164:                                              ; preds = %136
  %.sroa.01.0.lcssa20 = phi i64 [ %.sroa.01.0, %136 ]
  tail call void @_ZN4core9panicking18panic_bounds_check17hfa2a7f0168fa7dcaE(i64 noundef %.sroa.01.0.lcssa20, i64 noundef 384, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @19) #4
  unreachable
}

; Function Attrs: cold noinline noreturn nounwind nonlazybind
declare void @_ZN4core9panicking18panic_bounds_check17hfa2a7f0168fa7dcaE(i64 noundef, i64 noundef, ptr noalias noundef readonly align 8 dereferenceable(24)) unnamed_addr #1

; Function Attrs: nounwind nonlazybind
declare hidden { ptr, i64 } @"_ZN7v_frame5plane19PlaneSlice$LT$T$GT$3row17h2591b1d27e4c2829E"(ptr noalias noundef readonly align 8 dereferenceable(24), i64 noundef) unnamed_addr #2

attributes #0 = { alwaysinline nounwind nonlazybind "probe-stack"="inline-asm" "target-cpu"="x86-64" }
attributes #1 = { cold noinline noreturn nounwind nonlazybind "probe-stack"="inline-asm" "target-cpu"="x86-64" }
attributes #2 = { nounwind nonlazybind "probe-stack"="inline-asm" "target-cpu"="x86-64" }
attributes #3 = { nounwind }
attributes #4 = { noreturn nounwind }

!llvm.module.flags = !{!0, !1}
!llvm.ident = !{!2}

!0 = !{i32 8, !"PIC Level", i32 2}
!1 = !{i32 2, !"RtLibUseGOT", i32 1}
!2 = !{!"rustc version 1.74.0-nightly (ef85656a1 2023-08-21)"}
!3 = !{}
!4 = !{i64 4}
!5 = !{!"branch_weights", i32 2000, i32 1}