instcombine.patch

commit 5751f9ee428b168f1a852ef5eaf54461e48c1d34
Author: Nikita Popov <npopov@redhat.com>
Date:   Tue Sep 20 18:14:36 2022 +0200

    wip

diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
index fc1a43535e35..c01d4734b8b0 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
@@ -2764,15 +2764,6 @@ Instruction *InstCombinerImpl::visitSelectInst(SelectInst &SI) {
       return BinaryOperator::CreateAnd(FalseVal, Builder.CreateOr(C, TrueVal));
     }
 
-    if (!SelType->isVectorTy()) {
-      if (Value *S = simplifyWithOpReplaced(TrueVal, CondVal, One, SQ,
-                                            /* AllowRefinement */ true))
-        return replaceOperand(SI, 1, S);
-      if (Value *S = simplifyWithOpReplaced(FalseVal, CondVal, Zero, SQ,
-                                            /* AllowRefinement */ true))
-        return replaceOperand(SI, 2, S);
-    }
-
     if (match(FalseVal, m_Zero()) || match(TrueVal, m_One())) {
       Use *Y = nullptr;
       bool IsAnd = match(FalseVal, m_Zero()) ? true : false;
@@ -2840,6 +2831,18 @@ Instruction *InstCombinerImpl::visitSelectInst(SelectInst &SI) {
     }
   }
 
+  Type *CondTy = CondVal->getType();
+  if (!CondTy->isVectorTy()) {
+    if (Value *S = simplifyWithOpReplaced(TrueVal, CondVal,
+                                          ConstantInt::getTrue(CondTy), SQ,
+                                          /* AllowRefinement */ true))
+      return replaceOperand(SI, 1, S);
+    if (Value *S = simplifyWithOpReplaced(FalseVal, CondVal,
+                                          ConstantInt::getFalse(CondTy), SQ,
+                                          /* AllowRefinement */ true))
+      return replaceOperand(SI, 2, S);
+  }
+
   // Selecting between two integer or vector splat integer constants?
   //
   // Note that we don't handle a scalar select of vectors:
diff --git a/llvm/test/Transforms/InstCombine/select.ll b/llvm/test/Transforms/InstCombine/select.ll
index 0558138b8491..e30081131124 100644
--- a/llvm/test/Transforms/InstCombine/select.ll
+++ b/llvm/test/Transforms/InstCombine/select.ll
@@ -3213,8 +3213,7 @@ declare i32 @llvm.cttz.i32(i32, i1 immarg)
 
 define i32 @select_cond_zext_cond(i1 %cond, i32 %b) {
 ; CHECK-LABEL: @select_cond_zext_cond(
-; CHECK-NEXT:    [[ZEXT:%.*]] = zext i1 [[COND:%.*]] to i32
-; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND]], i32 [[ZEXT]], i32 [[B:%.*]]
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND:%.*]], i32 1, i32 [[B:%.*]]
 ; CHECK-NEXT:    ret i32 [[SEL]]
 ;
   %zext = zext i1 %cond to i32
@@ -3235,8 +3234,7 @@ define <2 x i32> @select_cond_zext_cond_vec(<2 x i1> %cond, <2 x i32> %b) {
 
 define i32 @select_cond_sext_cond(i1 %cond, i32 %b) {
 ; CHECK-LABEL: @select_cond_sext_cond(
-; CHECK-NEXT:    [[SEXT:%.*]] = sext i1 [[COND:%.*]] to i32
-; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND]], i32 [[SEXT]], i32 [[B:%.*]]
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND:%.*]], i32 -1, i32 [[B:%.*]]
 ; CHECK-NEXT:    ret i32 [[SEL]]
 ;
   %sext = sext i1 %cond to i32
@@ -3257,8 +3255,7 @@ define <2 x i32> @select_cond_sext_cond_vec(<2 x i1> %cond, <2 x i32> %b) {
 
 define i32 @select_cond_val_zext_cond(i1 %cond, i32 %b) {
 ; CHECK-LABEL: @select_cond_val_zext_cond(
-; CHECK-NEXT:    [[ZEXT:%.*]] = zext i1 [[COND:%.*]] to i32
-; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND]], i32 [[B:%.*]], i32 [[ZEXT]]
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND:%.*]], i32 [[B:%.*]], i32 0
 ; CHECK-NEXT:    ret i32 [[SEL]]
 ;
   %zext = zext i1 %cond to i32
@@ -3279,8 +3276,7 @@ define <2 x i32> @select_cond_val_zext_cond_vec(<2 x i1> %cond, <2 x i32> %b) {
 
 define i32 @select_cond_val_sext_cond(i1 %cond, i32 %b) {
 ; CHECK-LABEL: @select_cond_val_sext_cond(
-; CHECK-NEXT:    [[SEXT:%.*]] = sext i1 [[COND:%.*]] to i32
-; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND]], i32 [[B:%.*]], i32 [[SEXT]]
+; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[COND:%.*]], i32 [[B:%.*]], i32 0
 ; CHECK-NEXT:    ret i32 [[SEL]]
 ;
   %sext = sext i1 %cond to i32
@@ -3343,11 +3339,7 @@ define i32 @select_cond_val_sext_not_cond(i1 %cond, i32 %b) {
 
 define i32 @select_cond_not_cond_cond1(i1 %cond) {
 ; CHECK-LABEL: @select_cond_not_cond_cond1(
-; CHECK-NEXT:    [[Z:%.*]] = zext i1 [[COND:%.*]] to i32
-; CHECK-NEXT:    [[NOT_COND:%.*]] = xor i1 [[COND]], true
-; CHECK-NEXT:    [[S:%.*]] = sext i1 [[NOT_COND]] to i32
-; CHECK-NEXT:    [[V:%.*]] = select i1 [[COND]], i32 [[S]], i32 [[Z]]
-; CHECK-NEXT:    ret i32 [[V]]
+; CHECK-NEXT:    ret i32 0
 ;
   %z = zext i1 %cond to i32
   %not_cond = xor i1 %cond, true
@@ -3358,11 +3350,7 @@ define i32 @select_cond_not_cond_cond1(i1 %cond) {
 
 define i32 @select_cond_not_cond_cond2(i1 %cond) {
 ; CHECK-LABEL: @select_cond_not_cond_cond2(
-; CHECK-NEXT:    [[Z:%.*]] = sext i1 [[COND:%.*]] to i32
-; CHECK-NEXT:    [[NOT_COND:%.*]] = xor i1 [[COND]], true
-; CHECK-NEXT:    [[S:%.*]] = zext i1 [[NOT_COND]] to i32
-; CHECK-NEXT:    [[V:%.*]] = select i1 [[COND]], i32 [[S]], i32 [[Z]]
-; CHECK-NEXT:    ret i32 [[V]]
+; CHECK-NEXT:    ret i32 0
 ;
   %z = sext i1 %cond to i32
   %not_cond = xor i1 %cond, true