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Created December 18, 2020 20:03
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minmax.patch
commit 833f96913305cdf3aaa3509ea369b5f43be4cc49
Author: Nikita Popov <nikita.ppv@gmail.com>
Date: Fri Dec 18 20:38:48 2020 +0100
wip
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
index e05fa4ffa403..b26aa19d430b 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
@@ -1047,28 +1047,55 @@ static Instruction *canonicalizeMinMaxWithConstant(SelectInst &Sel,
return &Sel;
}
-static Instruction *canonicalizeAbsNabs(SelectInst &Sel, ICmpInst &Cmp,
- InstCombinerImpl &IC) {
- if (!Cmp.hasOneUse() || !isa<Constant>(Cmp.getOperand(1)))
- return nullptr;
-
+static Instruction *canonicalizeSPF(SelectInst &Sel, ICmpInst &Cmp,
+ InstCombinerImpl &IC) {
Value *LHS, *RHS;
- SelectPatternFlavor SPF = matchSelectPattern(&Sel, LHS, RHS).Flavor;
- if (SPF != SelectPatternFlavor::SPF_ABS &&
- SPF != SelectPatternFlavor::SPF_NABS)
+ // TODO: What to do with pointer min/max patterns?
+ if (!Sel.getType()->isIntOrIntVectorTy())
return nullptr;
- bool IntMinIsPoison = match(RHS, m_NSWNeg(m_Specific(LHS)));
- Constant *IntMinIsPoisonC =
- ConstantInt::get(Type::getInt1Ty(Sel.getContext()), IntMinIsPoison);
- Instruction *Abs =
- IC.Builder.CreateBinaryIntrinsic(Intrinsic::abs, LHS, IntMinIsPoisonC);
-
- if (SPF == SelectPatternFlavor::SPF_NABS)
- return IntMinIsPoison ? BinaryOperator::CreateNSWNeg(Abs)
- : BinaryOperator::CreateNeg(Abs);
+ SelectPatternFlavor SPF = matchSelectPattern(&Sel, LHS, RHS).Flavor;
+ if (SPF == SelectPatternFlavor::SPF_ABS ||
+ SPF == SelectPatternFlavor::SPF_NABS) {
+ if (!Cmp.hasOneUse())
+ return nullptr; // TODO: Relax this restriction.
+
+ bool IntMinIsPoison = match(RHS, m_NSWNeg(m_Specific(LHS)));
+ Constant *IntMinIsPoisonC =
+ ConstantInt::get(Type::getInt1Ty(Sel.getContext()), IntMinIsPoison);
+ Instruction *Abs =
+ IC.Builder.CreateBinaryIntrinsic(Intrinsic::abs, LHS, IntMinIsPoisonC);
+
+ if (SPF == SelectPatternFlavor::SPF_NABS)
+ return IntMinIsPoison ? BinaryOperator::CreateNSWNeg(Abs)
+ : BinaryOperator::CreateNeg(Abs);
+
+ return IC.replaceInstUsesWith(Sel, Abs);
+ }
+
+ if (SelectPatternResult::isMinOrMax(SPF)) {
+ Intrinsic::ID IntrinsicID;
+ switch (SPF) {
+ case SelectPatternFlavor::SPF_UMIN:
+ IntrinsicID = Intrinsic::umin;
+ break;
+ case SelectPatternFlavor::SPF_UMAX:
+ IntrinsicID = Intrinsic::umax;
+ break;
+ case SelectPatternFlavor::SPF_SMIN:
+ IntrinsicID = Intrinsic::smin;
+ break;
+ case SelectPatternFlavor::SPF_SMAX:
+ IntrinsicID = Intrinsic::smax;
+ break;
+ default:
+ llvm_unreachable("Unexpected SPF");
+ }
+ return IC.replaceInstUsesWith(
+ Sel, IC.Builder.CreateBinaryIntrinsic(IntrinsicID, LHS, RHS));
+ }
- return IC.replaceInstUsesWith(Sel, Abs);
+ return nullptr;
}
/// If we have a select with an equality comparison, then we know the value in
@@ -1392,7 +1419,7 @@ Instruction *InstCombinerImpl::foldSelectInstWithICmp(SelectInst &SI,
if (Instruction *NewSel = canonicalizeMinMaxWithConstant(SI, *ICI, *this))
return NewSel;
- if (Instruction *NewAbs = canonicalizeAbsNabs(SI, *ICI, *this))
+ if (Instruction *NewAbs = canonicalizeSPF(SI, *ICI, *this))
return NewAbs;
if (Instruction *NewAbs = canonicalizeClampLike(SI, *ICI, Builder))
diff --git a/llvm/test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll b/llvm/test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll
index 62fb4132d5de..f02349387156 100644
--- a/llvm/test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll
+++ b/llvm/test/Transforms/InstCombine/2007-12-18-AddSelCmpSub.ll
@@ -4,9 +4,9 @@
define i32 @foo(i32 %a) {
; CHECK-LABEL: @foo(
; CHECK-NEXT: [[T15:%.*]] = sub i32 99, [[A:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[T15]], 0
-; CHECK-NEXT: [[A_OP:%.*]] = add i32 [[A]], 1
-; CHECK-NEXT: [[T13:%.*]] = select i1 [[TMP1]], i32 100, i32 [[A_OP]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[T15]], i32 0)
+; CHECK-NEXT: [[T12:%.*]] = add i32 [[TMP1]], [[A]]
+; CHECK-NEXT: [[T13:%.*]] = add i32 [[T12]], 1
; CHECK-NEXT: ret i32 [[T13]]
;
%t15 = sub i32 99, %a
@@ -20,8 +20,8 @@ define i32 @foo(i32 %a) {
define i32 @bar(i32 %a) {
; CHECK-LABEL: @bar(
; CHECK-NEXT: [[T15:%.*]] = sub i32 99, [[A:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[T15]], 0
-; CHECK-NEXT: [[T12:%.*]] = select i1 [[TMP1]], i32 99, i32 [[A]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[T15]], i32 0)
+; CHECK-NEXT: [[T12:%.*]] = add i32 [[TMP1]], [[A]]
; CHECK-NEXT: ret i32 [[T12]]
;
%t15 = sub i32 99, %a
diff --git a/llvm/test/Transforms/InstCombine/CPP_min_max.ll b/llvm/test/Transforms/InstCombine/CPP_min_max.ll
index cd65a4253de2..fa130d2a0f0e 100644
--- a/llvm/test/Transforms/InstCombine/CPP_min_max.ll
+++ b/llvm/test/Transforms/InstCombine/CPP_min_max.ll
@@ -13,9 +13,8 @@ define void @_Z5test1RiS_(i32* %x, i32* %y) {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP_1_I:%.*]] = load i32, i32* [[Y:%.*]], align 4
; CHECK-NEXT: [[TMP_3_I:%.*]] = load i32, i32* [[X:%.*]], align 4
-; CHECK-NEXT: [[TMP_4_I:%.*]] = icmp slt i32 [[TMP_1_I]], [[TMP_3_I]]
-; CHECK-NEXT: [[TMP_4:%.*]] = select i1 [[TMP_4_I]], i32 [[TMP_1_I]], i32 [[TMP_3_I]]
-; CHECK-NEXT: store i32 [[TMP_4]], i32* [[X]], align 4
+; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.smin.i32(i32 [[TMP_1_I]], i32 [[TMP_3_I]])
+; CHECK-NEXT: store i32 [[TMP0]], i32* [[X]], align 4
; CHECK-NEXT: ret void
;
entry:
@@ -33,9 +32,8 @@ define void @_Z5test2RiS_(i32* %x, i32* %y) {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP_2:%.*]] = load i32, i32* [[X:%.*]], align 4
; CHECK-NEXT: [[TMP_3_I:%.*]] = load i32, i32* [[Y:%.*]], align 4
-; CHECK-NEXT: [[TMP_4_I:%.*]] = icmp slt i32 [[TMP_2]], [[TMP_3_I]]
-; CHECK-NEXT: [[TMP_6:%.*]] = select i1 [[TMP_4_I]], i32 [[TMP_3_I]], i32 [[TMP_2]]
-; CHECK-NEXT: store i32 [[TMP_6]], i32* [[Y]], align 4
+; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP_2]], i32 [[TMP_3_I]])
+; CHECK-NEXT: store i32 [[TMP0]], i32* [[Y]], align 4
; CHECK-NEXT: ret void
;
entry:
diff --git a/llvm/test/Transforms/InstCombine/abs-1.ll b/llvm/test/Transforms/InstCombine/abs-1.ll
index fbc0fc1a835c..c3e9460762ee 100644
--- a/llvm/test/Transforms/InstCombine/abs-1.ll
+++ b/llvm/test/Transforms/InstCombine/abs-1.ll
@@ -363,9 +363,8 @@ define i8 @shifty_abs_commute0_nsw(i8 %x) {
; have produced all 1s. We partially optimize this.
define i8 @shifty_abs_commute0_nuw(i8 %x) {
; CHECK-LABEL: @shifty_abs_commute0_nuw(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i8 [[X:%.*]], 0
-; CHECK-NEXT: [[ABS:%.*]] = select i1 [[TMP1]], i8 [[X]], i8 0
-; CHECK-NEXT: ret i8 [[ABS]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.smax.i8(i8 [[X:%.*]], i8 0)
+; CHECK-NEXT: ret i8 [[TMP1]]
;
%signbit = ashr i8 %x, 7
%add = add nuw i8 %signbit, %x
@@ -457,9 +456,8 @@ define i8 @shifty_sub_nsw_commute(i8 %x) {
define <4 x i32> @shifty_sub_nuw_vec_commute(<4 x i32> %x) {
; CHECK-LABEL: @shifty_sub_nuw_vec_commute(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt <4 x i32> [[X:%.*]], zeroinitializer
-; CHECK-NEXT: [[R:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[X]], <4 x i32> zeroinitializer
-; CHECK-NEXT: ret <4 x i32> [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <4 x i32> @llvm.smax.v4i32(<4 x i32> [[X:%.*]], <4 x i32> zeroinitializer)
+; CHECK-NEXT: ret <4 x i32> [[TMP1]]
;
%sh = ashr <4 x i32> %x, <i32 31, i32 31, i32 31, i32 31>
%xor = xor <4 x i32> %sh, %x
@@ -469,9 +467,8 @@ define <4 x i32> @shifty_sub_nuw_vec_commute(<4 x i32> %x) {
define i12 @shifty_sub_nsw_nuw(i12 %x) {
; CHECK-LABEL: @shifty_sub_nsw_nuw(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i12 [[X:%.*]], 0
-; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP1]], i12 [[X]], i12 0
-; CHECK-NEXT: ret i12 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i12 @llvm.smax.i12(i12 [[X:%.*]], i12 0)
+; CHECK-NEXT: ret i12 [[TMP1]]
;
%sh = ashr i12 %x, 11
%xor = xor i12 %x, %sh
diff --git a/llvm/test/Transforms/InstCombine/adjust-for-minmax.ll b/llvm/test/Transforms/InstCombine/adjust-for-minmax.ll
index 9a5b1f5d5a0a..eb61ab23ca7e 100644
--- a/llvm/test/Transforms/InstCombine/adjust-for-minmax.ll
+++ b/llvm/test/Transforms/InstCombine/adjust-for-minmax.ll
@@ -7,9 +7,8 @@
define i32 @smax1(i32 %n) {
; CHECK-LABEL: @smax1(
-; CHECK-NEXT: [[T:%.*]] = icmp sgt i32 [[N:%.*]], 0
-; CHECK-NEXT: [[M:%.*]] = select i1 [[T]], i32 [[N]], i32 0
-; CHECK-NEXT: ret i32 [[M]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[N:%.*]], i32 0)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%t = icmp sgt i32 %n, 0
%m = select i1 %t, i32 %n, i32 0
@@ -20,9 +19,8 @@ define i32 @smax1(i32 %n) {
define i32 @smin1(i32 %n) {
; CHECK-LABEL: @smin1(
-; CHECK-NEXT: [[T:%.*]] = icmp slt i32 [[N:%.*]], 0
-; CHECK-NEXT: [[M:%.*]] = select i1 [[T]], i32 [[N]], i32 0
-; CHECK-NEXT: ret i32 [[M]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[N:%.*]], i32 0)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%t = icmp slt i32 %n, 0
%m = select i1 %t, i32 %n, i32 0
@@ -33,9 +31,8 @@ define i32 @smin1(i32 %n) {
define i32 @smax2(i32 %n) {
; CHECK-LABEL: @smax2(
-; CHECK-NEXT: [[T:%.*]] = icmp sgt i32 [[N:%.*]], 0
-; CHECK-NEXT: [[M:%.*]] = select i1 [[T]], i32 [[N]], i32 0
-; CHECK-NEXT: ret i32 [[M]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[N:%.*]], i32 0)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%t = icmp sge i32 %n, 1
%m = select i1 %t, i32 %n, i32 0
@@ -46,9 +43,8 @@ define i32 @smax2(i32 %n) {
define i32 @smin2(i32 %n) {
; CHECK-LABEL: @smin2(
-; CHECK-NEXT: [[T:%.*]] = icmp slt i32 [[N:%.*]], 0
-; CHECK-NEXT: [[M:%.*]] = select i1 [[T]], i32 [[N]], i32 0
-; CHECK-NEXT: ret i32 [[M]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[N:%.*]], i32 0)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%t = icmp sle i32 %n, -1
%m = select i1 %t, i32 %n, i32 0
@@ -59,9 +55,8 @@ define i32 @smin2(i32 %n) {
define i32 @smax3(i32 %n) {
; CHECK-LABEL: @smax3(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[N:%.*]], 0
-; CHECK-NEXT: [[M:%.*]] = select i1 [[TMP1]], i32 [[N]], i32 0
-; CHECK-NEXT: ret i32 [[M]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[N:%.*]], i32 0)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%t = icmp sgt i32 %n, -1
%m = select i1 %t, i32 %n, i32 0
@@ -72,9 +67,8 @@ define i32 @smax3(i32 %n) {
define <2 x i32> @smax3_vec(<2 x i32> %n) {
; CHECK-LABEL: @smax3_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt <2 x i32> [[N:%.*]], zeroinitializer
-; CHECK-NEXT: [[M:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[N]], <2 x i32> zeroinitializer
-; CHECK-NEXT: ret <2 x i32> [[M]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smax.v2i32(<2 x i32> [[N:%.*]], <2 x i32> zeroinitializer)
+; CHECK-NEXT: ret <2 x i32> [[TMP1]]
;
%t = icmp sgt <2 x i32> %n, <i32 -1, i32 -1>
%m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> zeroinitializer
@@ -85,9 +79,8 @@ define <2 x i32> @smax3_vec(<2 x i32> %n) {
define i32 @smin3(i32 %n) {
; CHECK-LABEL: @smin3(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[N:%.*]], 0
-; CHECK-NEXT: [[M:%.*]] = select i1 [[TMP1]], i32 [[N]], i32 0
-; CHECK-NEXT: ret i32 [[M]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[N:%.*]], i32 0)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%t = icmp slt i32 %n, 1
%m = select i1 %t, i32 %n, i32 0
@@ -98,9 +91,8 @@ define i32 @smin3(i32 %n) {
define <2 x i32> @smin3_vec(<2 x i32> %n) {
; CHECK-LABEL: @smin3_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i32> [[N:%.*]], zeroinitializer
-; CHECK-NEXT: [[M:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[N]], <2 x i32> zeroinitializer
-; CHECK-NEXT: ret <2 x i32> [[M]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[N:%.*]], <2 x i32> zeroinitializer)
+; CHECK-NEXT: ret <2 x i32> [[TMP1]]
;
%t = icmp slt <2 x i32> %n, <i32 1, i32 1>
%m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> zeroinitializer
@@ -111,9 +103,8 @@ define <2 x i32> @smin3_vec(<2 x i32> %n) {
define i32 @umax3(i32 %n) {
; CHECK-LABEL: @umax3(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[N:%.*]], 5
-; CHECK-NEXT: [[M:%.*]] = select i1 [[TMP1]], i32 [[N]], i32 5
-; CHECK-NEXT: ret i32 [[M]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[N:%.*]], i32 5)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%t = icmp ugt i32 %n, 4
%m = select i1 %t, i32 %n, i32 5
@@ -124,9 +115,8 @@ define i32 @umax3(i32 %n) {
define <2 x i32> @umax3_vec(<2 x i32> %n) {
; CHECK-LABEL: @umax3_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt <2 x i32> [[N:%.*]], <i32 5, i32 5>
-; CHECK-NEXT: [[M:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[N]], <2 x i32> <i32 5, i32 5>
-; CHECK-NEXT: ret <2 x i32> [[M]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.umax.v2i32(<2 x i32> [[N:%.*]], <2 x i32> <i32 5, i32 5>)
+; CHECK-NEXT: ret <2 x i32> [[TMP1]]
;
%t = icmp ugt <2 x i32> %n, <i32 4, i32 4>
%m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> <i32 5, i32 5>
@@ -137,9 +127,8 @@ define <2 x i32> @umax3_vec(<2 x i32> %n) {
define i32 @umin3(i32 %n) {
; CHECK-LABEL: @umin3(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[N:%.*]], 6
-; CHECK-NEXT: [[M:%.*]] = select i1 [[TMP1]], i32 [[N]], i32 6
-; CHECK-NEXT: ret i32 [[M]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[N:%.*]], i32 6)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%t = icmp ult i32 %n, 7
%m = select i1 %t, i32 %n, i32 6
@@ -150,9 +139,8 @@ define i32 @umin3(i32 %n) {
define <2 x i32> @umin3_vec(<2 x i32> %n) {
; CHECK-LABEL: @umin3_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult <2 x i32> [[N:%.*]], <i32 6, i32 6>
-; CHECK-NEXT: [[M:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[N]], <2 x i32> <i32 6, i32 6>
-; CHECK-NEXT: ret <2 x i32> [[M]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.umin.v2i32(<2 x i32> [[N:%.*]], <2 x i32> <i32 6, i32 6>)
+; CHECK-NEXT: ret <2 x i32> [[TMP1]]
;
%t = icmp ult <2 x i32> %n, <i32 7, i32 7>
%m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> <i32 6, i32 6>
@@ -163,9 +151,8 @@ define <2 x i32> @umin3_vec(<2 x i32> %n) {
define i32 @smax4(i32 %n) {
; CHECK-LABEL: @smax4(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[N:%.*]], 0
-; CHECK-NEXT: [[M:%.*]] = select i1 [[TMP1]], i32 [[N]], i32 0
-; CHECK-NEXT: ret i32 [[M]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[N:%.*]], i32 0)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%t = icmp sge i32 %n, 0
%m = select i1 %t, i32 %n, i32 0
@@ -176,9 +163,8 @@ define i32 @smax4(i32 %n) {
define <2 x i32> @smax4_vec(<2 x i32> %n) {
; CHECK-LABEL: @smax4_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt <2 x i32> [[N:%.*]], zeroinitializer
-; CHECK-NEXT: [[M:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[N]], <2 x i32> zeroinitializer
-; CHECK-NEXT: ret <2 x i32> [[M]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smax.v2i32(<2 x i32> [[N:%.*]], <2 x i32> zeroinitializer)
+; CHECK-NEXT: ret <2 x i32> [[TMP1]]
;
%t = icmp sge <2 x i32> %n, zeroinitializer
%m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> zeroinitializer
@@ -189,9 +175,8 @@ define <2 x i32> @smax4_vec(<2 x i32> %n) {
define i32 @smin4(i32 %n) {
; CHECK-LABEL: @smin4(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[N:%.*]], 0
-; CHECK-NEXT: [[M:%.*]] = select i1 [[TMP1]], i32 [[N]], i32 0
-; CHECK-NEXT: ret i32 [[M]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[N:%.*]], i32 0)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%t = icmp sle i32 %n, 0
%m = select i1 %t, i32 %n, i32 0
@@ -202,9 +187,8 @@ define i32 @smin4(i32 %n) {
define <2 x i32> @smin4_vec(<2 x i32> %n) {
; CHECK-LABEL: @smin4_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i32> [[N:%.*]], zeroinitializer
-; CHECK-NEXT: [[M:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[N]], <2 x i32> zeroinitializer
-; CHECK-NEXT: ret <2 x i32> [[M]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[N:%.*]], <2 x i32> zeroinitializer)
+; CHECK-NEXT: ret <2 x i32> [[TMP1]]
;
%t = icmp sle <2 x i32> %n, zeroinitializer
%m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> zeroinitializer
@@ -215,9 +199,8 @@ define <2 x i32> @smin4_vec(<2 x i32> %n) {
define i32 @umax4(i32 %n) {
; CHECK-LABEL: @umax4(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[N:%.*]], 8
-; CHECK-NEXT: [[M:%.*]] = select i1 [[TMP1]], i32 [[N]], i32 8
-; CHECK-NEXT: ret i32 [[M]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[N:%.*]], i32 8)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%t = icmp uge i32 %n, 8
%m = select i1 %t, i32 %n, i32 8
@@ -228,9 +211,8 @@ define i32 @umax4(i32 %n) {
define <2 x i32> @umax4_vec(<2 x i32> %n) {
; CHECK-LABEL: @umax4_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt <2 x i32> [[N:%.*]], <i32 8, i32 8>
-; CHECK-NEXT: [[M:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[N]], <2 x i32> <i32 8, i32 8>
-; CHECK-NEXT: ret <2 x i32> [[M]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.umax.v2i32(<2 x i32> [[N:%.*]], <2 x i32> <i32 8, i32 8>)
+; CHECK-NEXT: ret <2 x i32> [[TMP1]]
;
%t = icmp uge <2 x i32> %n, <i32 8, i32 8>
%m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> <i32 8, i32 8>
@@ -241,9 +223,8 @@ define <2 x i32> @umax4_vec(<2 x i32> %n) {
define i32 @umin4(i32 %n) {
; CHECK-LABEL: @umin4(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[N:%.*]], 9
-; CHECK-NEXT: [[M:%.*]] = select i1 [[TMP1]], i32 [[N]], i32 9
-; CHECK-NEXT: ret i32 [[M]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[N:%.*]], i32 9)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%t = icmp ule i32 %n, 9
%m = select i1 %t, i32 %n, i32 9
@@ -254,9 +235,8 @@ define i32 @umin4(i32 %n) {
define <2 x i32> @umin4_vec(<2 x i32> %n) {
; CHECK-LABEL: @umin4_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult <2 x i32> [[N:%.*]], <i32 9, i32 9>
-; CHECK-NEXT: [[M:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[N]], <2 x i32> <i32 9, i32 9>
-; CHECK-NEXT: ret <2 x i32> [[M]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.umin.v2i32(<2 x i32> [[N:%.*]], <2 x i32> <i32 9, i32 9>)
+; CHECK-NEXT: ret <2 x i32> [[TMP1]]
;
%t = icmp ule <2 x i32> %n, <i32 9, i32 9>
%m = select <2 x i1> %t, <2 x i32> %n, <2 x i32> <i32 9, i32 9>
@@ -266,9 +246,8 @@ define <2 x i32> @umin4_vec(<2 x i32> %n) {
define i64 @smax_sext(i32 %a) {
; CHECK-LABEL: @smax_sext(
; CHECK-NEXT: [[A_EXT:%.*]] = sext i32 [[A:%.*]] to i64
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i64 [[A_EXT]], 0
-; CHECK-NEXT: [[MAX:%.*]] = select i1 [[TMP1]], i64 [[A_EXT]], i64 0
-; CHECK-NEXT: ret i64 [[MAX]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.smax.i64(i64 [[A_EXT]], i64 0)
+; CHECK-NEXT: ret i64 [[TMP1]]
;
%a_ext = sext i32 %a to i64
%cmp = icmp sgt i32 %a, -1
@@ -279,9 +258,8 @@ define i64 @smax_sext(i32 %a) {
define <2 x i64> @smax_sext_vec(<2 x i32> %a) {
; CHECK-LABEL: @smax_sext_vec(
; CHECK-NEXT: [[A_EXT:%.*]] = sext <2 x i32> [[A:%.*]] to <2 x i64>
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt <2 x i64> [[A_EXT]], zeroinitializer
-; CHECK-NEXT: [[MAX:%.*]] = select <2 x i1> [[TMP1]], <2 x i64> [[A_EXT]], <2 x i64> zeroinitializer
-; CHECK-NEXT: ret <2 x i64> [[MAX]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i64> @llvm.smax.v2i64(<2 x i64> [[A_EXT]], <2 x i64> zeroinitializer)
+; CHECK-NEXT: ret <2 x i64> [[TMP1]]
;
%a_ext = sext <2 x i32> %a to <2 x i64>
%cmp = icmp sgt <2 x i32> %a, <i32 -1, i32 -1>
@@ -292,9 +270,8 @@ define <2 x i64> @smax_sext_vec(<2 x i32> %a) {
define i64 @smin_sext(i32 %a) {
; CHECK-LABEL: @smin_sext(
; CHECK-NEXT: [[A_EXT:%.*]] = sext i32 [[A:%.*]] to i64
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i64 [[A_EXT]], 0
-; CHECK-NEXT: [[MIN:%.*]] = select i1 [[TMP1]], i64 [[A_EXT]], i64 0
-; CHECK-NEXT: ret i64 [[MIN]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.smin.i64(i64 [[A_EXT]], i64 0)
+; CHECK-NEXT: ret i64 [[TMP1]]
;
%a_ext = sext i32 %a to i64
%cmp = icmp slt i32 %a, 1
@@ -305,9 +282,8 @@ define i64 @smin_sext(i32 %a) {
define <2 x i64>@smin_sext_vec(<2 x i32> %a) {
; CHECK-LABEL: @smin_sext_vec(
; CHECK-NEXT: [[A_EXT:%.*]] = sext <2 x i32> [[A:%.*]] to <2 x i64>
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i64> [[A_EXT]], zeroinitializer
-; CHECK-NEXT: [[MIN:%.*]] = select <2 x i1> [[TMP1]], <2 x i64> [[A_EXT]], <2 x i64> zeroinitializer
-; CHECK-NEXT: ret <2 x i64> [[MIN]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i64> @llvm.smin.v2i64(<2 x i64> [[A_EXT]], <2 x i64> zeroinitializer)
+; CHECK-NEXT: ret <2 x i64> [[TMP1]]
;
%a_ext = sext <2 x i32> %a to <2 x i64>
%cmp = icmp slt <2 x i32> %a, <i32 1, i32 1>
@@ -318,9 +294,8 @@ define <2 x i64>@smin_sext_vec(<2 x i32> %a) {
define i64 @umax_sext(i32 %a) {
; CHECK-LABEL: @umax_sext(
; CHECK-NEXT: [[A_EXT:%.*]] = sext i32 [[A:%.*]] to i64
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i64 [[A_EXT]], 3
-; CHECK-NEXT: [[MAX:%.*]] = select i1 [[TMP1]], i64 [[A_EXT]], i64 3
-; CHECK-NEXT: ret i64 [[MAX]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.umax.i64(i64 [[A_EXT]], i64 3)
+; CHECK-NEXT: ret i64 [[TMP1]]
;
%a_ext = sext i32 %a to i64
%cmp = icmp ugt i32 %a, 2
@@ -331,9 +306,8 @@ define i64 @umax_sext(i32 %a) {
define <2 x i64> @umax_sext_vec(<2 x i32> %a) {
; CHECK-LABEL: @umax_sext_vec(
; CHECK-NEXT: [[A_EXT:%.*]] = sext <2 x i32> [[A:%.*]] to <2 x i64>
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt <2 x i64> [[A_EXT]], <i64 3, i64 3>
-; CHECK-NEXT: [[MAX:%.*]] = select <2 x i1> [[TMP1]], <2 x i64> [[A_EXT]], <2 x i64> <i64 3, i64 3>
-; CHECK-NEXT: ret <2 x i64> [[MAX]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i64> @llvm.umax.v2i64(<2 x i64> [[A_EXT]], <2 x i64> <i64 3, i64 3>)
+; CHECK-NEXT: ret <2 x i64> [[TMP1]]
;
%a_ext = sext <2 x i32> %a to <2 x i64>
%cmp = icmp ugt <2 x i32> %a, <i32 2, i32 2>
@@ -344,9 +318,8 @@ define <2 x i64> @umax_sext_vec(<2 x i32> %a) {
define i64 @umin_sext(i32 %a) {
; CHECK-LABEL: @umin_sext(
; CHECK-NEXT: [[A_EXT:%.*]] = sext i32 [[A:%.*]] to i64
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[A_EXT]], 2
-; CHECK-NEXT: [[MIN:%.*]] = select i1 [[TMP1]], i64 [[A_EXT]], i64 2
-; CHECK-NEXT: ret i64 [[MIN]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.umin.i64(i64 [[A_EXT]], i64 2)
+; CHECK-NEXT: ret i64 [[TMP1]]
;
%a_ext = sext i32 %a to i64
%cmp = icmp ult i32 %a, 3
@@ -357,9 +330,8 @@ define i64 @umin_sext(i32 %a) {
define <2 x i64> @umin_sext_vec(<2 x i32> %a) {
; CHECK-LABEL: @umin_sext_vec(
; CHECK-NEXT: [[A_EXT:%.*]] = sext <2 x i32> [[A:%.*]] to <2 x i64>
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult <2 x i64> [[A_EXT]], <i64 2, i64 2>
-; CHECK-NEXT: [[MIN:%.*]] = select <2 x i1> [[TMP1]], <2 x i64> [[A_EXT]], <2 x i64> <i64 2, i64 2>
-; CHECK-NEXT: ret <2 x i64> [[MIN]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i64> @llvm.umin.v2i64(<2 x i64> [[A_EXT]], <2 x i64> <i64 2, i64 2>)
+; CHECK-NEXT: ret <2 x i64> [[TMP1]]
;
%a_ext = sext <2 x i32> %a to <2 x i64>
%cmp = icmp ult <2 x i32> %a, <i32 3, i32 3>
@@ -370,9 +342,8 @@ define <2 x i64> @umin_sext_vec(<2 x i32> %a) {
define i64 @umax_sext2(i32 %a) {
; CHECK-LABEL: @umax_sext2(
; CHECK-NEXT: [[A_EXT:%.*]] = sext i32 [[A:%.*]] to i64
-; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i64 [[A_EXT]], 2
-; CHECK-NEXT: [[MIN:%.*]] = select i1 [[CMP]], i64 [[A_EXT]], i64 2
-; CHECK-NEXT: ret i64 [[MIN]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.umax.i64(i64 [[A_EXT]], i64 2)
+; CHECK-NEXT: ret i64 [[TMP1]]
;
%a_ext = sext i32 %a to i64
%cmp = icmp ult i32 %a, 3
@@ -383,9 +354,8 @@ define i64 @umax_sext2(i32 %a) {
define <2 x i64> @umax_sext2_vec(<2 x i32> %a) {
; CHECK-LABEL: @umax_sext2_vec(
; CHECK-NEXT: [[A_EXT:%.*]] = sext <2 x i32> [[A:%.*]] to <2 x i64>
-; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i64> [[A_EXT]], <i64 2, i64 2>
-; CHECK-NEXT: [[MIN:%.*]] = select <2 x i1> [[CMP]], <2 x i64> [[A_EXT]], <2 x i64> <i64 2, i64 2>
-; CHECK-NEXT: ret <2 x i64> [[MIN]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i64> @llvm.umax.v2i64(<2 x i64> [[A_EXT]], <2 x i64> <i64 2, i64 2>)
+; CHECK-NEXT: ret <2 x i64> [[TMP1]]
;
%a_ext = sext <2 x i32> %a to <2 x i64>
%cmp = icmp ult <2 x i32> %a, <i32 3, i32 3>
@@ -396,9 +366,8 @@ define <2 x i64> @umax_sext2_vec(<2 x i32> %a) {
define i64 @umin_sext2(i32 %a) {
; CHECK-LABEL: @umin_sext2(
; CHECK-NEXT: [[A_EXT:%.*]] = sext i32 [[A:%.*]] to i64
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult i64 [[A_EXT]], 3
-; CHECK-NEXT: [[MIN:%.*]] = select i1 [[CMP]], i64 [[A_EXT]], i64 3
-; CHECK-NEXT: ret i64 [[MIN]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.umin.i64(i64 [[A_EXT]], i64 3)
+; CHECK-NEXT: ret i64 [[TMP1]]
;
%a_ext = sext i32 %a to i64
%cmp = icmp ugt i32 %a, 2
@@ -409,9 +378,8 @@ define i64 @umin_sext2(i32 %a) {
define <2 x i64> @umin_sext2_vec(<2 x i32> %a) {
; CHECK-LABEL: @umin_sext2_vec(
; CHECK-NEXT: [[A_EXT:%.*]] = sext <2 x i32> [[A:%.*]] to <2 x i64>
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i64> [[A_EXT]], <i64 3, i64 3>
-; CHECK-NEXT: [[MIN:%.*]] = select <2 x i1> [[CMP]], <2 x i64> [[A_EXT]], <2 x i64> <i64 3, i64 3>
-; CHECK-NEXT: ret <2 x i64> [[MIN]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i64> @llvm.umin.v2i64(<2 x i64> [[A_EXT]], <2 x i64> <i64 3, i64 3>)
+; CHECK-NEXT: ret <2 x i64> [[TMP1]]
;
%a_ext = sext <2 x i32> %a to <2 x i64>
%cmp = icmp ugt <2 x i32> %a, <i32 2, i32 2>
@@ -422,9 +390,8 @@ define <2 x i64> @umin_sext2_vec(<2 x i32> %a) {
define i64 @umax_zext(i32 %a) {
; CHECK-LABEL: @umax_zext(
; CHECK-NEXT: [[A_EXT:%.*]] = zext i32 [[A:%.*]] to i64
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i64 [[A_EXT]], 3
-; CHECK-NEXT: [[MAX:%.*]] = select i1 [[TMP1]], i64 [[A_EXT]], i64 3
-; CHECK-NEXT: ret i64 [[MAX]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.umax.i64(i64 [[A_EXT]], i64 3)
+; CHECK-NEXT: ret i64 [[TMP1]]
;
%a_ext = zext i32 %a to i64
%cmp = icmp ugt i32 %a, 2
@@ -435,9 +402,8 @@ define i64 @umax_zext(i32 %a) {
define <2 x i64> @umax_zext_vec(<2 x i32> %a) {
; CHECK-LABEL: @umax_zext_vec(
; CHECK-NEXT: [[A_EXT:%.*]] = zext <2 x i32> [[A:%.*]] to <2 x i64>
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt <2 x i64> [[A_EXT]], <i64 3, i64 3>
-; CHECK-NEXT: [[MAX:%.*]] = select <2 x i1> [[TMP1]], <2 x i64> [[A_EXT]], <2 x i64> <i64 3, i64 3>
-; CHECK-NEXT: ret <2 x i64> [[MAX]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i64> @llvm.umax.v2i64(<2 x i64> [[A_EXT]], <2 x i64> <i64 3, i64 3>)
+; CHECK-NEXT: ret <2 x i64> [[TMP1]]
;
%a_ext = zext <2 x i32> %a to <2 x i64>
%cmp = icmp ugt <2 x i32> %a, <i32 2, i32 2>
@@ -448,9 +414,8 @@ define <2 x i64> @umax_zext_vec(<2 x i32> %a) {
define i64 @umin_zext(i32 %a) {
; CHECK-LABEL: @umin_zext(
; CHECK-NEXT: [[A_EXT:%.*]] = zext i32 [[A:%.*]] to i64
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[A_EXT]], 2
-; CHECK-NEXT: [[MIN:%.*]] = select i1 [[TMP1]], i64 [[A_EXT]], i64 2
-; CHECK-NEXT: ret i64 [[MIN]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.umin.i64(i64 [[A_EXT]], i64 2)
+; CHECK-NEXT: ret i64 [[TMP1]]
;
%a_ext = zext i32 %a to i64
%cmp = icmp ult i32 %a, 3
@@ -461,9 +426,8 @@ define i64 @umin_zext(i32 %a) {
define <2 x i64> @umin_zext_vec(<2 x i32> %a) {
; CHECK-LABEL: @umin_zext_vec(
; CHECK-NEXT: [[A_EXT:%.*]] = zext <2 x i32> [[A:%.*]] to <2 x i64>
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult <2 x i64> [[A_EXT]], <i64 2, i64 2>
-; CHECK-NEXT: [[MIN:%.*]] = select <2 x i1> [[TMP1]], <2 x i64> [[A_EXT]], <2 x i64> <i64 2, i64 2>
-; CHECK-NEXT: ret <2 x i64> [[MIN]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i64> @llvm.umin.v2i64(<2 x i64> [[A_EXT]], <2 x i64> <i64 2, i64 2>)
+; CHECK-NEXT: ret <2 x i64> [[TMP1]]
;
%a_ext = zext <2 x i32> %a to <2 x i64>
%cmp = icmp ult <2 x i32> %a, <i32 3, i32 3>
diff --git a/llvm/test/Transforms/InstCombine/canonicalize-clamp-with-select-of-constant-threshold-pattern.ll b/llvm/test/Transforms/InstCombine/canonicalize-clamp-with-select-of-constant-threshold-pattern.ll
index 0156c9071a64..eb2308a2d973 100644
--- a/llvm/test/Transforms/InstCombine/canonicalize-clamp-with-select-of-constant-threshold-pattern.ll
+++ b/llvm/test/Transforms/InstCombine/canonicalize-clamp-with-select-of-constant-threshold-pattern.ll
@@ -7,11 +7,9 @@
define i32 @t0_select_cond_and_v0(i32 %X) {
; CHECK-LABEL: @t0_select_cond_and_v0(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[X:%.*]], -32768
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 -32768
-; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i32 [[TMP2]], 32767
-; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP3]], i32 [[TMP2]], i32 32767
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 -32768)
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smin.i32(i32 [[TMP1]], i32 32767)
+; CHECK-NEXT: ret i32 [[TMP2]]
;
%dont_need_to_clamp_positive = icmp sle i32 %X, 32767
%dont_need_to_clamp_negative = icmp sge i32 %X, -32768
@@ -22,11 +20,9 @@ define i32 @t0_select_cond_and_v0(i32 %X) {
}
define i32 @t1_select_cond_and_v1(i32 %X) {
; CHECK-LABEL: @t1_select_cond_and_v1(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[X:%.*]], -32768
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 -32768
-; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i32 [[TMP2]], 32767
-; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP3]], i32 [[TMP2]], i32 32767
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 -32768)
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smin.i32(i32 [[TMP1]], i32 32767)
+; CHECK-NEXT: ret i32 [[TMP2]]
;
%dont_need_to_clamp_positive = icmp sle i32 %X, 32767
%dont_need_to_clamp_negative = icmp sge i32 %X, -32768
@@ -40,11 +36,9 @@ define i32 @t1_select_cond_and_v1(i32 %X) {
define i32 @t2_select_cond_or_v0(i32 %X) {
; CHECK-LABEL: @t2_select_cond_or_v0(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[X:%.*]], -32768
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 -32768
-; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i32 [[TMP2]], 32767
-; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP3]], i32 [[TMP2]], i32 32767
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 -32768)
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smin.i32(i32 [[TMP1]], i32 32767)
+; CHECK-NEXT: ret i32 [[TMP2]]
;
%need_to_clamp_positive = icmp sgt i32 %X, 32767
%need_to_clamp_negative = icmp slt i32 %X, -32768
@@ -55,11 +49,9 @@ define i32 @t2_select_cond_or_v0(i32 %X) {
}
define i32 @t3_select_cond_or_v1(i32 %X) {
; CHECK-LABEL: @t3_select_cond_or_v1(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[X:%.*]], -32768
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 -32768
-; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i32 [[TMP2]], 32767
-; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP3]], i32 [[TMP2]], i32 32767
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 -32768)
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smin.i32(i32 [[TMP1]], i32 32767)
+; CHECK-NEXT: ret i32 [[TMP2]]
;
%need_to_clamp_positive = icmp sgt i32 %X, 32767
%need_to_clamp_negative = icmp slt i32 %X, -32768
@@ -73,11 +65,9 @@ define i32 @t3_select_cond_or_v1(i32 %X) {
define i32 @t4_select_cond_xor_v0(i32 %X) {
; CHECK-LABEL: @t4_select_cond_xor_v0(
-; CHECK-NEXT: [[DOTINV1:%.*]] = icmp sgt i32 [[X:%.*]], -32768
-; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[DOTINV1]], i32 [[X]], i32 -32768
-; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP1]], 32767
-; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP2]], i32 [[TMP1]], i32 32767
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 -32768)
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smin.i32(i32 [[TMP1]], i32 32767)
+; CHECK-NEXT: ret i32 [[TMP2]]
;
%need_to_clamp_positive = icmp sgt i32 %X, 32767
%dont_need_to_clamp_negative = icmp sgt i32 %X, -32768
@@ -88,11 +78,9 @@ define i32 @t4_select_cond_xor_v0(i32 %X) {
}
define i32 @t4_select_cond_xor_v1(i32 %X) {
; CHECK-LABEL: @t4_select_cond_xor_v1(
-; CHECK-NEXT: [[DOTINV1:%.*]] = icmp sgt i32 [[X:%.*]], -32768
-; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[DOTINV1]], i32 [[X]], i32 -32768
-; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP1]], 32767
-; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP2]], i32 [[TMP1]], i32 32767
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 -32768)
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smin.i32(i32 [[TMP1]], i32 32767)
+; CHECK-NEXT: ret i32 [[TMP2]]
;
%need_to_clamp_positive = icmp sgt i32 %X, 32767
%dont_need_to_clamp_negative = icmp sgt i32 %X, -32768
@@ -104,11 +92,9 @@ define i32 @t4_select_cond_xor_v1(i32 %X) {
define i32 @t5_select_cond_xor_v2(i32 %X) {
; CHECK-LABEL: @t5_select_cond_xor_v2(
-; CHECK-NEXT: [[DOTINV1:%.*]] = icmp sgt i32 [[X:%.*]], -32768
-; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[DOTINV1]], i32 [[X]], i32 -32768
-; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP1]], 32767
-; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP2]], i32 [[TMP1]], i32 32767
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 -32768)
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smin.i32(i32 [[TMP1]], i32 32767)
+; CHECK-NEXT: ret i32 [[TMP2]]
;
%dont_need_to_clamp_positive = icmp sle i32 %X, 32767
%need_to_clamp_negative = icmp sle i32 %X, -32768
@@ -119,11 +105,9 @@ define i32 @t5_select_cond_xor_v2(i32 %X) {
}
define i32 @t5_select_cond_xor_v3(i32 %X) {
; CHECK-LABEL: @t5_select_cond_xor_v3(
-; CHECK-NEXT: [[DOTINV1:%.*]] = icmp sgt i32 [[X:%.*]], -32768
-; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[DOTINV1]], i32 [[X]], i32 -32768
-; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP1]], 32767
-; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP2]], i32 [[TMP1]], i32 32767
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 -32768)
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smin.i32(i32 [[TMP1]], i32 32767)
+; CHECK-NEXT: ret i32 [[TMP2]]
;
%dont_need_to_clamp_positive = icmp sle i32 %X, 32767
%need_to_clamp_negative = icmp sle i32 %X, -32768
diff --git a/llvm/test/Transforms/InstCombine/clamp-to-minmax.ll b/llvm/test/Transforms/InstCombine/clamp-to-minmax.ll
index a872357aa686..2dd58414d6b1 100644
--- a/llvm/test/Transforms/InstCombine/clamp-to-minmax.ll
+++ b/llvm/test/Transforms/InstCombine/clamp-to-minmax.ll
@@ -471,9 +471,8 @@ define float @clamp_float_unordered_nonstrict_minmax2(float %x) {
define float @ui32_clamp_and_cast_to_float(i32 %x) {
; CHECK-LABEL: @ui32_clamp_and_cast_to_float(
; CHECK-NEXT: [[LO_CMP:%.*]] = icmp eq i32 [[X:%.*]], 0
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[X]], 255
-; CHECK-NEXT: [[MIN1:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 255
-; CHECK-NEXT: [[TMP2:%.*]] = uitofp i32 [[MIN1]] to float
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[X]], i32 255)
+; CHECK-NEXT: [[TMP2:%.*]] = uitofp i32 [[TMP1]] to float
; CHECK-NEXT: [[R:%.*]] = select i1 [[LO_CMP]], float 1.000000e+00, float [[TMP2]]
; CHECK-NEXT: ret float [[R]]
;
@@ -488,9 +487,8 @@ define float @ui32_clamp_and_cast_to_float(i32 %x) {
define float @ui64_clamp_and_cast_to_float(i64 %x) {
; CHECK-LABEL: @ui64_clamp_and_cast_to_float(
; CHECK-NEXT: [[LO_CMP:%.*]] = icmp eq i64 [[X:%.*]], 0
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i64 [[X]], 255
-; CHECK-NEXT: [[MIN1:%.*]] = select i1 [[TMP1]], i64 [[X]], i64 255
-; CHECK-NEXT: [[TMP2:%.*]] = uitofp i64 [[MIN1]] to float
+; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.umin.i64(i64 [[X]], i64 255)
+; CHECK-NEXT: [[TMP2:%.*]] = uitofp i64 [[TMP1]] to float
; CHECK-NEXT: [[R:%.*]] = select i1 [[LO_CMP]], float 1.000000e+00, float [[TMP2]]
; CHECK-NEXT: ret float [[R]]
;
@@ -504,11 +502,9 @@ define float @ui64_clamp_and_cast_to_float(i64 %x) {
define float @mixed_clamp_to_float_1(i32 %x) {
; CHECK-LABEL: @mixed_clamp_to_float_1(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], 255
-; CHECK-NEXT: [[SI_MIN:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 255
-; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[SI_MIN]], 1
-; CHECK-NEXT: [[R1:%.*]] = select i1 [[TMP2]], i32 [[SI_MIN]], i32 1
-; CHECK-NEXT: [[TMP3:%.*]] = sitofp i32 [[R1]] to float
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 255)
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP1]], i32 1)
+; CHECK-NEXT: [[TMP3:%.*]] = sitofp i32 [[TMP2]] to float
; CHECK-NEXT: ret float [[TMP3]]
;
%si_min_cmp = icmp sgt i32 %x, 255
@@ -541,11 +537,9 @@ define i32 @mixed_clamp_to_i32_1(float %x) {
define float @mixed_clamp_to_float_2(i32 %x) {
; CHECK-LABEL: @mixed_clamp_to_float_2(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], 255
-; CHECK-NEXT: [[SI_MIN:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 255
-; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[SI_MIN]], 1
-; CHECK-NEXT: [[R1:%.*]] = select i1 [[TMP2]], i32 [[SI_MIN]], i32 1
-; CHECK-NEXT: [[TMP3:%.*]] = sitofp i32 [[R1]] to float
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 255)
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP1]], i32 1)
+; CHECK-NEXT: [[TMP3:%.*]] = sitofp i32 [[TMP2]] to float
; CHECK-NEXT: ret float [[TMP3]]
;
%si_min_cmp = icmp sgt i32 %x, 255
diff --git a/llvm/test/Transforms/InstCombine/div-shift.ll b/llvm/test/Transforms/InstCombine/div-shift.ll
index 7d84fd6fdd3f..bbdee679a8e8 100644
--- a/llvm/test/Transforms/InstCombine/div-shift.ll
+++ b/llvm/test/Transforms/InstCombine/div-shift.ll
@@ -60,10 +60,10 @@ define i64 @t3(i64 %x, i32 %y) {
define i32 @t4(i32 %x, i32 %y) {
; CHECK-LABEL: @t4(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[Y:%.*]], 5
-; CHECK-NEXT: [[DOTV:%.*]] = select i1 [[TMP1]], i32 [[Y]], i32 5
-; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[X:%.*]], [[DOTV]]
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[TMP1:%.*]] = shl i32 1, [[Y:%.*]]
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umax.i32(i32 [[TMP1]], i32 32)
+; CHECK-NEXT: [[TMP3:%.*]] = udiv i32 [[X:%.*]], [[TMP2]]
+; CHECK-NEXT: ret i32 [[TMP3]]
;
%1 = shl i32 1, %y
%2 = icmp ult i32 %1, 32
diff --git a/llvm/test/Transforms/InstCombine/icmp.ll b/llvm/test/Transforms/InstCombine/icmp.ll
index b21077e2e2ef..42b125a31eef 100644
--- a/llvm/test/Transforms/InstCombine/icmp.ll
+++ b/llvm/test/Transforms/InstCombine/icmp.ll
@@ -701,9 +701,8 @@ define i1 @test37_extra_uses(i32 %x, i32 %y, i32 %z) {
define i32 @neg_max_s32(i32 %x, i32 %y) {
; CHECK-LABEL: @neg_max_s32(
-; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[Y:%.*]], [[X:%.*]]
-; CHECK-NEXT: [[S_V:%.*]] = select i1 [[C]], i32 [[Y]], i32 [[X]]
-; CHECK-NEXT: ret i32 [[S_V]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[Y:%.*]], i32 [[X:%.*]])
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%nx = sub nsw i32 0, %x
%ny = sub nsw i32 0, %y
@@ -715,9 +714,8 @@ define i32 @neg_max_s32(i32 %x, i32 %y) {
define <4 x i32> @neg_max_v4s32(<4 x i32> %x, <4 x i32> %y) {
; CHECK-LABEL: @neg_max_v4s32(
-; CHECK-NEXT: [[C:%.*]] = icmp sgt <4 x i32> [[Y:%.*]], [[X:%.*]]
-; CHECK-NEXT: [[S_V:%.*]] = select <4 x i1> [[C]], <4 x i32> [[X]], <4 x i32> [[Y]]
-; CHECK-NEXT: ret <4 x i32> [[S_V]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <4 x i32> @llvm.smin.v4i32(<4 x i32> [[Y:%.*]], <4 x i32> [[X:%.*]])
+; CHECK-NEXT: ret <4 x i32> [[TMP1]]
;
%nx = sub nsw <4 x i32> zeroinitializer, %x
%ny = sub nsw <4 x i32> zeroinitializer, %y
diff --git a/llvm/test/Transforms/InstCombine/max-of-nots.ll b/llvm/test/Transforms/InstCombine/max-of-nots.ll
index 1b551f9f9b51..a23c9a8067e8 100644
--- a/llvm/test/Transforms/InstCombine/max-of-nots.ll
+++ b/llvm/test/Transforms/InstCombine/max-of-nots.ll
@@ -3,10 +3,10 @@
define <2 x i32> @umin_of_nots(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @umin_of_nots(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt <2 x i32> [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[X]], <2 x i32> [[Y]]
-; CHECK-NEXT: [[MIN:%.*]] = xor <2 x i32> [[TMP2]], <i32 -1, i32 -1>
-; CHECK-NEXT: ret <2 x i32> [[MIN]]
+; CHECK-NEXT: [[NOTX:%.*]] = xor <2 x i32> [[X:%.*]], <i32 -1, i32 -1>
+; CHECK-NEXT: [[NOTY:%.*]] = xor <2 x i32> [[Y:%.*]], <i32 -1, i32 -1>
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.umin.v2i32(<2 x i32> [[NOTX]], <2 x i32> [[NOTY]])
+; CHECK-NEXT: ret <2 x i32> [[TMP1]]
;
%notx = xor <2 x i32> %x, <i32 -1, i32 -1>
%noty = xor <2 x i32> %y, <i32 -1, i32 -1>
@@ -17,10 +17,10 @@ define <2 x i32> @umin_of_nots(<2 x i32> %x, <2 x i32> %y) {
define <2 x i32> @smin_of_nots(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @smin_of_nots(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt <2 x i32> [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[X]], <2 x i32> [[Y]]
-; CHECK-NEXT: [[MIN:%.*]] = xor <2 x i32> [[TMP2]], <i32 -1, i32 -1>
-; CHECK-NEXT: ret <2 x i32> [[MIN]]
+; CHECK-NEXT: [[NOTX:%.*]] = xor <2 x i32> [[X:%.*]], <i32 -1, i32 -1>
+; CHECK-NEXT: [[NOTY:%.*]] = xor <2 x i32> [[Y:%.*]], <i32 -1, i32 -1>
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[NOTX]], <2 x i32> [[NOTY]])
+; CHECK-NEXT: ret <2 x i32> [[TMP1]]
;
%notx = xor <2 x i32> %x, <i32 -1, i32 -1>
%noty = xor <2 x i32> %y, <i32 -1, i32 -1>
@@ -31,9 +31,11 @@ define <2 x i32> @smin_of_nots(<2 x i32> %x, <2 x i32> %y) {
define i32 @compute_min_2(i32 %x, i32 %y) {
; CHECK-LABEL: @compute_min_2(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 [[Y]]
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[NOT_X:%.*]] = xor i32 [[X:%.*]], -1
+; CHECK-NEXT: [[NOT_Y:%.*]] = xor i32 [[Y:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[NOT_X]], i32 [[NOT_Y]])
+; CHECK-NEXT: [[MIN:%.*]] = xor i32 [[TMP1]], -1
+; CHECK-NEXT: ret i32 [[MIN]]
;
%not_x = sub i32 -1, %x
%not_y = sub i32 -1, %y
@@ -47,11 +49,10 @@ declare void @extra_use(i8)
define i8 @umin_not_1_extra_use(i8 %x, i8 %y) {
; CHECK-LABEL: @umin_not_1_extra_use(
; CHECK-NEXT: [[NX:%.*]] = xor i8 [[X:%.*]], -1
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[Y:%.*]], [[X]]
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i8 [[Y]], i8 [[X]]
-; CHECK-NEXT: [[MINXY:%.*]] = xor i8 [[TMP2]], -1
+; CHECK-NEXT: [[NY:%.*]] = xor i8 [[Y:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.umin.i8(i8 [[NX]], i8 [[NY]])
; CHECK-NEXT: call void @extra_use(i8 [[NX]])
-; CHECK-NEXT: ret i8 [[MINXY]]
+; CHECK-NEXT: ret i8 [[TMP1]]
;
%nx = xor i8 %x, -1
%ny = xor i8 %y, -1
@@ -65,11 +66,10 @@ define i8 @umin_not_2_extra_use(i8 %x, i8 %y) {
; CHECK-LABEL: @umin_not_2_extra_use(
; CHECK-NEXT: [[NX:%.*]] = xor i8 [[X:%.*]], -1
; CHECK-NEXT: [[NY:%.*]] = xor i8 [[Y:%.*]], -1
-; CHECK-NEXT: [[CMPXY:%.*]] = icmp ult i8 [[NX]], [[NY]]
-; CHECK-NEXT: [[MINXY:%.*]] = select i1 [[CMPXY]], i8 [[NX]], i8 [[NY]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.umin.i8(i8 [[NX]], i8 [[NY]])
; CHECK-NEXT: call void @extra_use(i8 [[NX]])
; CHECK-NEXT: call void @extra_use(i8 [[NY]])
-; CHECK-NEXT: ret i8 [[MINXY]]
+; CHECK-NEXT: ret i8 [[TMP1]]
;
%nx = xor i8 %x, -1
%ny = xor i8 %y, -1
@@ -84,11 +84,13 @@ define i8 @umin_not_2_extra_use(i8 %x, i8 %y) {
define i8 @umin3_not(i8 %x, i8 %y, i8 %z) {
; CHECK-LABEL: @umin3_not(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[X:%.*]], [[Z:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i8 [[X]], i8 [[Z]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt i8 [[TMP2]], [[Y:%.*]]
-; CHECK-NEXT: [[R_V:%.*]] = select i1 [[TMP3]], i8 [[TMP2]], i8 [[Y]]
-; CHECK-NEXT: [[R:%.*]] = xor i8 [[R_V]], -1
+; CHECK-NEXT: [[NX:%.*]] = xor i8 [[X:%.*]], -1
+; CHECK-NEXT: [[NY:%.*]] = xor i8 [[Y:%.*]], -1
+; CHECK-NEXT: [[NZ:%.*]] = xor i8 [[Z:%.*]], -1
+; CHECK-NEXT: [[CMPYX:%.*]] = icmp ult i8 [[Y]], [[X]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.umin.i8(i8 [[NX]], i8 [[NZ]])
+; CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.umin.i8(i8 [[NY]], i8 [[NZ]])
+; CHECK-NEXT: [[R:%.*]] = select i1 [[CMPYX]], i8 [[TMP1]], i8 [[TMP2]]
; CHECK-NEXT: ret i8 [[R]]
;
%nx = xor i8 %x, -1
@@ -109,11 +111,11 @@ define i8 @umin3_not_more_uses(i8 %x, i8 %y, i8 %z) {
; CHECK-LABEL: @umin3_not_more_uses(
; CHECK-NEXT: [[NX:%.*]] = xor i8 [[X:%.*]], -1
; CHECK-NEXT: [[NY:%.*]] = xor i8 [[Y:%.*]], -1
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[Z:%.*]], [[X]]
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i8 [[Z]], i8 [[X]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt i8 [[TMP2]], [[Y]]
-; CHECK-NEXT: [[TMP4:%.*]] = select i1 [[TMP3]], i8 [[TMP2]], i8 [[Y]]
-; CHECK-NEXT: [[R:%.*]] = xor i8 [[TMP4]], -1
+; CHECK-NEXT: [[NZ:%.*]] = xor i8 [[Z:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.umin.i8(i8 [[NX]], i8 [[NZ]])
+; CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.umin.i8(i8 [[NY]], i8 [[NZ]])
+; CHECK-NEXT: [[CMPYX:%.*]] = icmp ult i8 [[Y]], [[X]]
+; CHECK-NEXT: [[R:%.*]] = select i1 [[CMPYX]], i8 [[TMP1]], i8 [[TMP2]]
; CHECK-NEXT: call void @extra_use(i8 [[NX]])
; CHECK-NEXT: call void @extra_use(i8 [[NY]])
; CHECK-NEXT: ret i8 [[R]]
@@ -139,14 +141,12 @@ define i8 @umin3_not_all_ops_extra_uses(i8 %x, i8 %y, i8 %z) {
; CHECK-NEXT: [[XN:%.*]] = xor i8 [[X:%.*]], -1
; CHECK-NEXT: [[YN:%.*]] = xor i8 [[Y:%.*]], -1
; CHECK-NEXT: [[ZN:%.*]] = xor i8 [[Z:%.*]], -1
-; CHECK-NEXT: [[CMPXZ:%.*]] = icmp ult i8 [[XN]], [[ZN]]
-; CHECK-NEXT: [[MINXZ:%.*]] = select i1 [[CMPXZ]], i8 [[XN]], i8 [[ZN]]
-; CHECK-NEXT: [[CMPXYZ:%.*]] = icmp ult i8 [[MINXZ]], [[YN]]
-; CHECK-NEXT: [[MINXYZ:%.*]] = select i1 [[CMPXYZ]], i8 [[MINXZ]], i8 [[YN]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.umin.i8(i8 [[XN]], i8 [[ZN]])
+; CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.umin.i8(i8 [[TMP1]], i8 [[YN]])
; CHECK-NEXT: call void @use8(i8 [[XN]])
; CHECK-NEXT: call void @use8(i8 [[YN]])
; CHECK-NEXT: call void @use8(i8 [[ZN]])
-; CHECK-NEXT: ret i8 [[MINXYZ]]
+; CHECK-NEXT: ret i8 [[TMP2]]
;
%xn = xor i8 %x, -1
%yn = xor i8 %y, -1
@@ -163,11 +163,13 @@ define i8 @umin3_not_all_ops_extra_uses(i8 %x, i8 %y, i8 %z) {
define i32 @compute_min_3(i32 %x, i32 %y, i32 %z) {
; CHECK-LABEL: @compute_min_3(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 [[Y]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i32 [[TMP2]], [[Z:%.*]]
-; CHECK-NEXT: [[TMP4:%.*]] = select i1 [[TMP3]], i32 [[TMP2]], i32 [[Z]]
-; CHECK-NEXT: ret i32 [[TMP4]]
+; CHECK-NEXT: [[NOT_X:%.*]] = xor i32 [[X:%.*]], -1
+; CHECK-NEXT: [[NOT_Y:%.*]] = xor i32 [[Y:%.*]], -1
+; CHECK-NEXT: [[NOT_Z:%.*]] = xor i32 [[Z:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[NOT_X]], i32 [[NOT_Y]])
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP1]], i32 [[NOT_Z]])
+; CHECK-NEXT: [[MIN:%.*]] = xor i32 [[TMP2]], -1
+; CHECK-NEXT: ret i32 [[MIN]]
;
%not_x = sub i32 -1, %x
%not_y = sub i32 -1, %y
@@ -186,9 +188,8 @@ define i32 @compute_min_arithmetic(i32 %x, i32 %y) {
; CHECK-LABEL: @compute_min_arithmetic(
; CHECK-NEXT: [[NOT_VALUE:%.*]] = sub i32 3, [[X:%.*]]
; CHECK-NEXT: [[NOT_Y:%.*]] = xor i32 [[Y:%.*]], -1
-; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[NOT_VALUE]], [[NOT_Y]]
-; CHECK-NEXT: [[NOT_MIN:%.*]] = select i1 [[CMP]], i32 [[NOT_VALUE]], i32 [[NOT_Y]]
-; CHECK-NEXT: ret i32 [[NOT_MIN]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[NOT_VALUE]], i32 [[NOT_Y]])
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%not_value = sub i32 3, %x
%not_y = sub i32 -1, %y
@@ -203,9 +204,9 @@ define i32 @compute_min_pessimization(i32 %x, i32 %y) {
; CHECK-LABEL: @compute_min_pessimization(
; CHECK-NEXT: [[NOT_VALUE:%.*]] = sub i32 3, [[X:%.*]]
; CHECK-NEXT: call void @fake_use(i32 [[NOT_VALUE]])
-; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X]], -4
-; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP1]], [[Y:%.*]]
-; CHECK-NEXT: [[MIN:%.*]] = select i1 [[TMP2]], i32 [[TMP1]], i32 [[Y]]
+; CHECK-NEXT: [[NOT_Y:%.*]] = xor i32 [[Y:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[NOT_VALUE]], i32 [[NOT_Y]])
+; CHECK-NEXT: [[MIN:%.*]] = xor i32 [[TMP1]], -1
; CHECK-NEXT: ret i32 [[MIN]]
;
%not_value = sub i32 3, %x
@@ -219,12 +220,11 @@ define i32 @compute_min_pessimization(i32 %x, i32 %y) {
define i32 @max_of_nots(i32 %x, i32 %y) {
; CHECK-LABEL: @max_of_nots(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[Y:%.*]], 0
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[Y]], i32 0
-; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i32 [[TMP2]], [[X:%.*]]
-; CHECK-NEXT: [[TMP4:%.*]] = select i1 [[TMP3]], i32 [[TMP2]], i32 [[X]]
-; CHECK-NEXT: [[SMAX96:%.*]] = xor i32 [[TMP4]], -1
-; CHECK-NEXT: ret i32 [[SMAX96]]
+; CHECK-NEXT: [[XOR_Y:%.*]] = xor i32 [[Y:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[XOR_Y]], i32 -1)
+; CHECK-NEXT: [[XOR_X:%.*]] = xor i32 [[X:%.*]], -1
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP1]], i32 [[XOR_X]])
+; CHECK-NEXT: ret i32 [[TMP2]]
;
%c0 = icmp sgt i32 %y, 0
%xor_y = xor i32 %y, -1
@@ -240,10 +240,9 @@ define i32 @abs_of_min_of_not(i32 %x, i32 %y) {
; CHECK-LABEL: @abs_of_min_of_not(
; CHECK-NEXT: [[XORD:%.*]] = xor i32 [[X:%.*]], -1
; CHECK-NEXT: [[YADD:%.*]] = add i32 [[Y:%.*]], 2
-; CHECK-NEXT: [[COND_I_NOT:%.*]] = icmp slt i32 [[YADD]], [[XORD]]
-; CHECK-NEXT: [[MIN:%.*]] = select i1 [[COND_I_NOT]], i32 [[YADD]], i32 [[XORD]]
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[MIN]], i1 false)
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[YADD]], i32 [[XORD]])
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.abs.i32(i32 [[TMP1]], i1 false)
+; CHECK-NEXT: ret i32 [[TMP2]]
;
%xord = xor i32 %x, -1
@@ -258,12 +257,11 @@ define i32 @abs_of_min_of_not(i32 %x, i32 %y) {
define <2 x i32> @max_of_nots_vec(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @max_of_nots_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt <2 x i32> [[Y:%.*]], zeroinitializer
-; CHECK-NEXT: [[TMP2:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[Y]], <2 x i32> zeroinitializer
-; CHECK-NEXT: [[TMP3:%.*]] = icmp slt <2 x i32> [[TMP2]], [[X:%.*]]
-; CHECK-NEXT: [[TMP4:%.*]] = select <2 x i1> [[TMP3]], <2 x i32> [[TMP2]], <2 x i32> [[X]]
-; CHECK-NEXT: [[SMAX96:%.*]] = xor <2 x i32> [[TMP4]], <i32 -1, i32 -1>
-; CHECK-NEXT: ret <2 x i32> [[SMAX96]]
+; CHECK-NEXT: [[XOR_Y:%.*]] = xor <2 x i32> [[Y:%.*]], <i32 -1, i32 -1>
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[XOR_Y]], <2 x i32> <i32 -1, i32 -1>)
+; CHECK-NEXT: [[XOR_X:%.*]] = xor <2 x i32> [[X:%.*]], <i32 -1, i32 -1>
+; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i32> @llvm.smax.v2i32(<2 x i32> [[TMP1]], <2 x i32> [[XOR_X]])
+; CHECK-NEXT: ret <2 x i32> [[TMP2]]
;
%c0 = icmp sgt <2 x i32> %y, zeroinitializer
%xor_y = xor <2 x i32> %y, <i32 -1, i32 -1>
@@ -276,12 +274,11 @@ define <2 x i32> @max_of_nots_vec(<2 x i32> %x, <2 x i32> %y) {
define <2 x i37> @max_of_nots_weird_type_vec(<2 x i37> %x, <2 x i37> %y) {
; CHECK-LABEL: @max_of_nots_weird_type_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt <2 x i37> [[Y:%.*]], zeroinitializer
-; CHECK-NEXT: [[TMP2:%.*]] = select <2 x i1> [[TMP1]], <2 x i37> [[Y]], <2 x i37> zeroinitializer
-; CHECK-NEXT: [[TMP3:%.*]] = icmp slt <2 x i37> [[TMP2]], [[X:%.*]]
-; CHECK-NEXT: [[TMP4:%.*]] = select <2 x i1> [[TMP3]], <2 x i37> [[TMP2]], <2 x i37> [[X]]
-; CHECK-NEXT: [[SMAX96:%.*]] = xor <2 x i37> [[TMP4]], <i37 -1, i37 -1>
-; CHECK-NEXT: ret <2 x i37> [[SMAX96]]
+; CHECK-NEXT: [[XOR_Y:%.*]] = xor <2 x i37> [[Y:%.*]], <i37 -1, i37 -1>
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i37> @llvm.smin.v2i37(<2 x i37> [[XOR_Y]], <2 x i37> <i37 -1, i37 -1>)
+; CHECK-NEXT: [[XOR_X:%.*]] = xor <2 x i37> [[X:%.*]], <i37 -1, i37 -1>
+; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i37> @llvm.smax.v2i37(<2 x i37> [[TMP1]], <2 x i37> [[XOR_X]])
+; CHECK-NEXT: ret <2 x i37> [[TMP2]]
;
%c0 = icmp sgt <2 x i37> %y, zeroinitializer
%xor_y = xor <2 x i37> %y, <i37 -1, i37 -1>
@@ -360,15 +357,17 @@ declare void @use(i8, i8, i8, i8)
define void @cmyk(i8 %r, i8 %g, i8 %b) {
; CHECK-LABEL: @cmyk(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i8 [[R:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i8 [[R]], i8 [[B]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i8 [[TMP2]], [[G:%.*]]
-; CHECK-NEXT: [[TMP4:%.*]] = select i1 [[TMP3]], i8 [[TMP2]], i8 [[G]]
-; CHECK-NEXT: [[TMP5:%.*]] = xor i8 [[TMP4]], -1
-; CHECK-NEXT: [[CK:%.*]] = sub i8 [[TMP4]], [[R]]
-; CHECK-NEXT: [[MK:%.*]] = sub i8 [[TMP4]], [[G]]
-; CHECK-NEXT: [[YK:%.*]] = sub i8 [[TMP4]], [[B]]
-; CHECK-NEXT: call void @use(i8 [[CK]], i8 [[MK]], i8 [[YK]], i8 [[TMP5]])
+; CHECK-NEXT: [[NOTR:%.*]] = xor i8 [[R:%.*]], -1
+; CHECK-NEXT: [[NOTG:%.*]] = xor i8 [[G:%.*]], -1
+; CHECK-NEXT: [[NOTB:%.*]] = xor i8 [[B:%.*]], -1
+; CHECK-NEXT: [[CMP_GR:%.*]] = icmp slt i8 [[G]], [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.smin.i8(i8 [[NOTR]], i8 [[NOTB]])
+; CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.smin.i8(i8 [[NOTG]], i8 [[NOTB]])
+; CHECK-NEXT: [[K:%.*]] = select i1 [[CMP_GR]], i8 [[TMP1]], i8 [[TMP2]]
+; CHECK-NEXT: [[CK:%.*]] = sub i8 [[NOTR]], [[K]]
+; CHECK-NEXT: [[MK:%.*]] = sub i8 [[NOTG]], [[K]]
+; CHECK-NEXT: [[YK:%.*]] = sub i8 [[NOTB]], [[K]]
+; CHECK-NEXT: call void @use(i8 [[CK]], i8 [[MK]], i8 [[YK]], i8 [[K]])
; CHECK-NEXT: ret void
;
%notr = xor i8 %r, -1
@@ -389,14 +388,16 @@ define void @cmyk(i8 %r, i8 %g, i8 %b) {
define void @cmyk2(i8 %r, i8 %g, i8 %b) {
; CHECK-LABEL: @cmyk2(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i8 [[R:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i8 [[R]], i8 [[B]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i8 [[TMP2]], [[G:%.*]]
-; CHECK-NEXT: [[K_V:%.*]] = select i1 [[TMP3]], i8 [[TMP2]], i8 [[G]]
-; CHECK-NEXT: [[K:%.*]] = xor i8 [[K_V]], -1
-; CHECK-NEXT: [[CK:%.*]] = sub i8 [[K_V]], [[R]]
-; CHECK-NEXT: [[MK:%.*]] = sub i8 [[K_V]], [[G]]
-; CHECK-NEXT: [[YK:%.*]] = sub i8 [[K_V]], [[B]]
+; CHECK-NEXT: [[NOTR:%.*]] = xor i8 [[R:%.*]], -1
+; CHECK-NEXT: [[NOTG:%.*]] = xor i8 [[G:%.*]], -1
+; CHECK-NEXT: [[NOTB:%.*]] = xor i8 [[B:%.*]], -1
+; CHECK-NEXT: [[CMP_GR:%.*]] = icmp slt i8 [[G]], [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.smin.i8(i8 [[NOTR]], i8 [[NOTB]])
+; CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.smin.i8(i8 [[NOTG]], i8 [[NOTB]])
+; CHECK-NEXT: [[K:%.*]] = select i1 [[CMP_GR]], i8 [[TMP1]], i8 [[TMP2]]
+; CHECK-NEXT: [[CK:%.*]] = sub i8 [[NOTR]], [[K]]
+; CHECK-NEXT: [[MK:%.*]] = sub i8 [[NOTG]], [[K]]
+; CHECK-NEXT: [[YK:%.*]] = sub i8 [[NOTB]], [[K]]
; CHECK-NEXT: call void @use(i8 [[CK]], i8 [[MK]], i8 [[YK]], i8 [[K]])
; CHECK-NEXT: ret void
;
@@ -418,14 +419,16 @@ define void @cmyk2(i8 %r, i8 %g, i8 %b) {
define void @cmyk3(i8 %r, i8 %g, i8 %b) {
; CHECK-LABEL: @cmyk3(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i8 [[R:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i8 [[R]], i8 [[B]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i8 [[TMP2]], [[G:%.*]]
-; CHECK-NEXT: [[K_V:%.*]] = select i1 [[TMP3]], i8 [[TMP2]], i8 [[G]]
-; CHECK-NEXT: [[K:%.*]] = xor i8 [[K_V]], -1
-; CHECK-NEXT: [[CK:%.*]] = sub i8 [[K_V]], [[R]]
-; CHECK-NEXT: [[MK:%.*]] = sub i8 [[K_V]], [[G]]
-; CHECK-NEXT: [[YK:%.*]] = sub i8 [[K_V]], [[B]]
+; CHECK-NEXT: [[NOTR:%.*]] = xor i8 [[R:%.*]], -1
+; CHECK-NEXT: [[NOTG:%.*]] = xor i8 [[G:%.*]], -1
+; CHECK-NEXT: [[NOTB:%.*]] = xor i8 [[B:%.*]], -1
+; CHECK-NEXT: [[CMP_GR:%.*]] = icmp slt i8 [[G]], [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.smin.i8(i8 [[NOTR]], i8 [[NOTB]])
+; CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.smin.i8(i8 [[NOTG]], i8 [[NOTB]])
+; CHECK-NEXT: [[K:%.*]] = select i1 [[CMP_GR]], i8 [[TMP1]], i8 [[TMP2]]
+; CHECK-NEXT: [[CK:%.*]] = sub i8 [[NOTR]], [[K]]
+; CHECK-NEXT: [[MK:%.*]] = sub i8 [[NOTG]], [[K]]
+; CHECK-NEXT: [[YK:%.*]] = sub i8 [[NOTB]], [[K]]
; CHECK-NEXT: call void @use(i8 [[CK]], i8 [[MK]], i8 [[YK]], i8 [[K]])
; CHECK-NEXT: ret void
;
@@ -447,14 +450,16 @@ define void @cmyk3(i8 %r, i8 %g, i8 %b) {
define void @cmyk4(i8 %r, i8 %g, i8 %b) {
; CHECK-LABEL: @cmyk4(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i8 [[R:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i8 [[R]], i8 [[B]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i8 [[TMP2]], [[G:%.*]]
-; CHECK-NEXT: [[K_V:%.*]] = select i1 [[TMP3]], i8 [[TMP2]], i8 [[G]]
-; CHECK-NEXT: [[K:%.*]] = xor i8 [[K_V]], -1
-; CHECK-NEXT: [[CK:%.*]] = sub i8 [[K_V]], [[R]]
-; CHECK-NEXT: [[MK:%.*]] = sub i8 [[K_V]], [[G]]
-; CHECK-NEXT: [[YK:%.*]] = sub i8 [[K_V]], [[B]]
+; CHECK-NEXT: [[NOTR:%.*]] = xor i8 [[R:%.*]], -1
+; CHECK-NEXT: [[NOTG:%.*]] = xor i8 [[G:%.*]], -1
+; CHECK-NEXT: [[NOTB:%.*]] = xor i8 [[B:%.*]], -1
+; CHECK-NEXT: [[CMP_GR:%.*]] = icmp slt i8 [[G]], [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.smin.i8(i8 [[NOTR]], i8 [[NOTB]])
+; CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.smin.i8(i8 [[NOTG]], i8 [[NOTB]])
+; CHECK-NEXT: [[K:%.*]] = select i1 [[CMP_GR]], i8 [[TMP1]], i8 [[TMP2]]
+; CHECK-NEXT: [[CK:%.*]] = sub i8 [[NOTR]], [[K]]
+; CHECK-NEXT: [[MK:%.*]] = sub i8 [[NOTG]], [[K]]
+; CHECK-NEXT: [[YK:%.*]] = sub i8 [[NOTB]], [[K]]
; CHECK-NEXT: call void @use(i8 [[CK]], i8 [[MK]], i8 [[YK]], i8 [[K]])
; CHECK-NEXT: ret void
;
@@ -476,14 +481,16 @@ define void @cmyk4(i8 %r, i8 %g, i8 %b) {
define void @cmyk5(i8 %r, i8 %g, i8 %b) {
; CHECK-LABEL: @cmyk5(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i8 [[R:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i8 [[R]], i8 [[B]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i8 [[TMP2]], [[G:%.*]]
-; CHECK-NEXT: [[K_V:%.*]] = select i1 [[TMP3]], i8 [[TMP2]], i8 [[G]]
-; CHECK-NEXT: [[K:%.*]] = xor i8 [[K_V]], -1
-; CHECK-NEXT: [[CK:%.*]] = sub i8 [[K_V]], [[R]]
-; CHECK-NEXT: [[MK:%.*]] = sub i8 [[K_V]], [[G]]
-; CHECK-NEXT: [[YK:%.*]] = sub i8 [[K_V]], [[B]]
+; CHECK-NEXT: [[NOTR:%.*]] = xor i8 [[R:%.*]], -1
+; CHECK-NEXT: [[NOTG:%.*]] = xor i8 [[G:%.*]], -1
+; CHECK-NEXT: [[NOTB:%.*]] = xor i8 [[B:%.*]], -1
+; CHECK-NEXT: [[CMP_GR:%.*]] = icmp sgt i8 [[R]], [[G]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.smin.i8(i8 [[NOTR]], i8 [[NOTB]])
+; CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.smin.i8(i8 [[NOTG]], i8 [[NOTB]])
+; CHECK-NEXT: [[K:%.*]] = select i1 [[CMP_GR]], i8 [[TMP1]], i8 [[TMP2]]
+; CHECK-NEXT: [[CK:%.*]] = sub i8 [[NOTR]], [[K]]
+; CHECK-NEXT: [[MK:%.*]] = sub i8 [[NOTG]], [[K]]
+; CHECK-NEXT: [[YK:%.*]] = sub i8 [[NOTB]], [[K]]
; CHECK-NEXT: call void @use(i8 [[CK]], i8 [[MK]], i8 [[YK]], i8 [[K]])
; CHECK-NEXT: ret void
;
@@ -505,14 +512,16 @@ define void @cmyk5(i8 %r, i8 %g, i8 %b) {
define void @cmyk6(i8 %r, i8 %g, i8 %b) {
; CHECK-LABEL: @cmyk6(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[R:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i8 [[R]], i8 [[B]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt i8 [[TMP2]], [[G:%.*]]
-; CHECK-NEXT: [[K_V:%.*]] = select i1 [[TMP3]], i8 [[TMP2]], i8 [[G]]
-; CHECK-NEXT: [[K:%.*]] = xor i8 [[K_V]], -1
-; CHECK-NEXT: [[CK:%.*]] = sub i8 [[K_V]], [[R]]
-; CHECK-NEXT: [[MK:%.*]] = sub i8 [[K_V]], [[G]]
-; CHECK-NEXT: [[YK:%.*]] = sub i8 [[K_V]], [[B]]
+; CHECK-NEXT: [[NOTR:%.*]] = xor i8 [[R:%.*]], -1
+; CHECK-NEXT: [[NOTG:%.*]] = xor i8 [[G:%.*]], -1
+; CHECK-NEXT: [[NOTB:%.*]] = xor i8 [[B:%.*]], -1
+; CHECK-NEXT: [[CMP_GR:%.*]] = icmp ult i8 [[G]], [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.umin.i8(i8 [[NOTR]], i8 [[NOTB]])
+; CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.umin.i8(i8 [[NOTG]], i8 [[NOTB]])
+; CHECK-NEXT: [[K:%.*]] = select i1 [[CMP_GR]], i8 [[TMP1]], i8 [[TMP2]]
+; CHECK-NEXT: [[CK:%.*]] = sub i8 [[NOTR]], [[K]]
+; CHECK-NEXT: [[MK:%.*]] = sub i8 [[NOTG]], [[K]]
+; CHECK-NEXT: [[YK:%.*]] = sub i8 [[NOTB]], [[K]]
; CHECK-NEXT: tail call void @use(i8 [[CK]], i8 [[MK]], i8 [[YK]], i8 [[K]])
; CHECK-NEXT: ret void
;
diff --git a/llvm/test/Transforms/InstCombine/max_known_bits.ll b/llvm/test/Transforms/InstCombine/max_known_bits.ll
index 86c4d2530c37..016ffb84eafb 100644
--- a/llvm/test/Transforms/InstCombine/max_known_bits.ll
+++ b/llvm/test/Transforms/InstCombine/max_known_bits.ll
@@ -19,11 +19,9 @@ define i16 @foo(i16 %x) {
; By analyzing the clamp pattern, we can tell the add doesn't have signed overflow.
define i16 @min_max_clamp(i16 %x) {
; CHECK-LABEL: @min_max_clamp(
-; CHECK-NEXT: [[A:%.*]] = icmp sgt i16 [[X:%.*]], -2048
-; CHECK-NEXT: [[B:%.*]] = select i1 [[A]], i16 [[X]], i16 -2048
-; CHECK-NEXT: [[C:%.*]] = icmp slt i16 [[B]], 2047
-; CHECK-NEXT: [[D:%.*]] = select i1 [[C]], i16 [[B]], i16 2047
-; CHECK-NEXT: [[E:%.*]] = add nsw i16 [[D]], 1
+; CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.smax.i16(i16 [[X:%.*]], i16 -2048)
+; CHECK-NEXT: [[TMP2:%.*]] = call i16 @llvm.smin.i16(i16 [[TMP1]], i16 2047)
+; CHECK-NEXT: [[E:%.*]] = add nsw i16 [[TMP2]], 1
; CHECK-NEXT: ret i16 [[E]]
;
%a = icmp sgt i16 %x, -2048
@@ -37,11 +35,9 @@ define i16 @min_max_clamp(i16 %x) {
; Same as above with min/max reversed.
define i16 @min_max_clamp_2(i16 %x) {
; CHECK-LABEL: @min_max_clamp_2(
-; CHECK-NEXT: [[A:%.*]] = icmp slt i16 [[X:%.*]], 2047
-; CHECK-NEXT: [[B:%.*]] = select i1 [[A]], i16 [[X]], i16 2047
-; CHECK-NEXT: [[C:%.*]] = icmp sgt i16 [[B]], -2048
-; CHECK-NEXT: [[D:%.*]] = select i1 [[C]], i16 [[B]], i16 -2048
-; CHECK-NEXT: [[E:%.*]] = add nsw i16 [[D]], 1
+; CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.smin.i16(i16 [[X:%.*]], i16 2047)
+; CHECK-NEXT: [[TMP2:%.*]] = call i16 @llvm.smax.i16(i16 [[TMP1]], i16 -2048)
+; CHECK-NEXT: [[E:%.*]] = add i16 [[TMP2]], 1
; CHECK-NEXT: ret i16 [[E]]
;
%a = icmp slt i16 %x, 2047
@@ -57,12 +53,10 @@ define i16 @min_max_clamp_2(i16 %x) {
; overflow the original type and can be moved before the extend.
define i32 @min_max_clamp_3(i16 %x) {
; CHECK-LABEL: @min_max_clamp_3(
-; CHECK-NEXT: [[A:%.*]] = icmp sgt i16 [[X:%.*]], -2048
-; CHECK-NEXT: [[B:%.*]] = select i1 [[A]], i16 [[X]], i16 -2048
-; CHECK-NEXT: [[C:%.*]] = icmp slt i16 [[B]], 2047
-; CHECK-NEXT: [[D:%.*]] = select i1 [[C]], i16 [[B]], i16 2047
-; CHECK-NEXT: [[G:%.*]] = sext i16 [[D]] to i32
-; CHECK-NEXT: ret i32 [[G]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.smax.i16(i16 [[X:%.*]], i16 -2048)
+; CHECK-NEXT: [[TMP2:%.*]] = call i16 @llvm.smin.i16(i16 [[TMP1]], i16 2047)
+; CHECK-NEXT: [[TMP3:%.*]] = sext i16 [[TMP2]] to i32
+; CHECK-NEXT: ret i32 [[TMP3]]
;
%a = icmp sgt i16 %x, -2048
%b = select i1 %a, i16 %x, i16 -2048
@@ -77,11 +71,11 @@ define i32 @min_max_clamp_3(i16 %x) {
; Same as above with min/max order reversed
define i32 @min_max_clamp_4(i16 %x) {
; CHECK-LABEL: @min_max_clamp_4(
-; CHECK-NEXT: [[A:%.*]] = icmp slt i16 [[X:%.*]], 2047
-; CHECK-NEXT: [[B:%.*]] = select i1 [[A]], i16 [[X]], i16 2047
-; CHECK-NEXT: [[C:%.*]] = icmp sgt i16 [[B]], -2048
-; CHECK-NEXT: [[D:%.*]] = select i1 [[C]], i16 [[B]], i16 -2048
-; CHECK-NEXT: [[G:%.*]] = sext i16 [[D]] to i32
+; CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.smin.i16(i16 [[X:%.*]], i16 2047)
+; CHECK-NEXT: [[TMP2:%.*]] = call i16 @llvm.smax.i16(i16 [[TMP1]], i16 -2048)
+; CHECK-NEXT: [[E:%.*]] = add i16 [[TMP2]], 1
+; CHECK-NEXT: [[F:%.*]] = sext i16 [[E]] to i32
+; CHECK-NEXT: [[G:%.*]] = add nsw i32 [[F]], -1
; CHECK-NEXT: ret i32 [[G]]
;
%a = icmp slt i16 %x, 2047
diff --git a/llvm/test/Transforms/InstCombine/min-positive.ll b/llvm/test/Transforms/InstCombine/min-positive.ll
index 51f98bc00dc1..55d74105eb65 100644
--- a/llvm/test/Transforms/InstCombine/min-positive.ll
+++ b/llvm/test/Transforms/InstCombine/min-positive.ll
@@ -5,7 +5,9 @@
define i1 @smin(i32 %other) {
; CHECK-LABEL: @smin(
-; CHECK-NEXT: [[TEST:%.*]] = icmp sgt i32 [[OTHER:%.*]], 0
+; CHECK-NEXT: [[POSITIVE:%.*]] = load i32, i32* @g, align 4, [[RNG0:!range !.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[POSITIVE]], i32 [[OTHER:%.*]])
+; CHECK-NEXT: [[TEST:%.*]] = icmp sgt i32 [[TMP1]], 0
; CHECK-NEXT: ret i1 [[TEST]]
;
%positive = load i32, i32* @g, !range !{i32 1, i32 2048}
@@ -19,7 +21,10 @@ define i1 @smin(i32 %other) {
define <2 x i1> @smin_vec(<2 x i32> %x, <2 x i32> %other) {
; CHECK-LABEL: @smin_vec(
-; CHECK-NEXT: [[TEST:%.*]] = icmp sgt <2 x i32> [[OTHER:%.*]], zeroinitializer
+; CHECK-NEXT: [[NOTNEG:%.*]] = and <2 x i32> [[X:%.*]], <i32 6, i32 6>
+; CHECK-NEXT: [[POSITIVE:%.*]] = or <2 x i32> [[NOTNEG]], <i32 1, i32 1>
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[POSITIVE]], <2 x i32> [[OTHER:%.*]])
+; CHECK-NEXT: [[TEST:%.*]] = icmp sgt <2 x i32> [[TMP1]], zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[TEST]]
;
%notneg = and <2 x i32> %x, <i32 7, i32 7>
@@ -32,7 +37,9 @@ define <2 x i1> @smin_vec(<2 x i32> %x, <2 x i32> %other) {
define i1 @smin_commute(i32 %other) {
; CHECK-LABEL: @smin_commute(
-; CHECK-NEXT: [[TEST:%.*]] = icmp sgt i32 [[OTHER:%.*]], 0
+; CHECK-NEXT: [[POSITIVE:%.*]] = load i32, i32* @g, align 4, [[RNG0]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[POSITIVE]], i32 [[OTHER:%.*]])
+; CHECK-NEXT: [[TEST:%.*]] = icmp sgt i32 [[TMP1]], 0
; CHECK-NEXT: ret i1 [[TEST]]
;
%positive = load i32, i32* @g, !range !{i32 1, i32 2048}
@@ -44,7 +51,10 @@ define i1 @smin_commute(i32 %other) {
define <2 x i1> @smin_commute_vec(<2 x i32> %x, <2 x i32> %other) {
; CHECK-LABEL: @smin_commute_vec(
-; CHECK-NEXT: [[TEST:%.*]] = icmp sgt <2 x i32> [[OTHER:%.*]], zeroinitializer
+; CHECK-NEXT: [[NOTNEG:%.*]] = and <2 x i32> [[X:%.*]], <i32 6, i32 6>
+; CHECK-NEXT: [[POSITIVE:%.*]] = or <2 x i32> [[NOTNEG]], <i32 1, i32 1>
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[POSITIVE]], <2 x i32> [[OTHER:%.*]])
+; CHECK-NEXT: [[TEST:%.*]] = icmp sgt <2 x i32> [[TMP1]], zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[TEST]]
;
%notneg = and <2 x i32> %x, <i32 7, i32 7>
@@ -57,7 +67,10 @@ define <2 x i1> @smin_commute_vec(<2 x i32> %x, <2 x i32> %other) {
define <2 x i1> @smin_commute_vec_undef_elts(<2 x i32> %x, <2 x i32> %other) {
; CHECK-LABEL: @smin_commute_vec_undef_elts(
-; CHECK-NEXT: [[TEST:%.*]] = icmp sgt <2 x i32> [[OTHER:%.*]], <i32 0, i32 undef>
+; CHECK-NEXT: [[NOTNEG:%.*]] = and <2 x i32> [[X:%.*]], <i32 6, i32 6>
+; CHECK-NEXT: [[POSITIVE:%.*]] = or <2 x i32> [[NOTNEG]], <i32 1, i32 1>
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[POSITIVE]], <2 x i32> [[OTHER:%.*]])
+; CHECK-NEXT: [[TEST:%.*]] = icmp sgt <2 x i32> [[TMP1]], <i32 0, i32 undef>
; CHECK-NEXT: ret <2 x i1> [[TEST]]
;
%notneg = and <2 x i32> %x, <i32 7, i32 7>
@@ -71,10 +84,9 @@ define <2 x i1> @smin_commute_vec_undef_elts(<2 x i32> %x, <2 x i32> %other) {
define i1 @maybe_not_positive(i32 %other) {
; CHECK-LABEL: @maybe_not_positive(
-; CHECK-NEXT: [[POSITIVE:%.*]] = load i32, i32* @g, align 4, !range !0
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[POSITIVE]], [[OTHER:%.*]]
-; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 [[POSITIVE]], i32 [[OTHER]]
-; CHECK-NEXT: [[TEST:%.*]] = icmp sgt i32 [[SEL]], 0
+; CHECK-NEXT: [[POSITIVE:%.*]] = load i32, i32* @g, align 4, [[RNG1:!range !.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[POSITIVE]], i32 [[OTHER:%.*]])
+; CHECK-NEXT: [[TEST:%.*]] = icmp sgt i32 [[TMP1]], 0
; CHECK-NEXT: ret i1 [[TEST]]
;
%positive = load i32, i32* @g, !range !{i32 0, i32 2048}
@@ -87,9 +99,8 @@ define i1 @maybe_not_positive(i32 %other) {
define <2 x i1> @maybe_not_positive_vec(<2 x i32> %x, <2 x i32> %other) {
; CHECK-LABEL: @maybe_not_positive_vec(
; CHECK-NEXT: [[NOTNEG:%.*]] = and <2 x i32> [[X:%.*]], <i32 7, i32 7>
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt <2 x i32> [[NOTNEG]], [[OTHER:%.*]]
-; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[NOTNEG]], <2 x i32> [[OTHER]]
-; CHECK-NEXT: [[TEST:%.*]] = icmp sgt <2 x i32> [[SEL]], zeroinitializer
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[NOTNEG]], <2 x i32> [[OTHER:%.*]])
+; CHECK-NEXT: [[TEST:%.*]] = icmp sgt <2 x i32> [[TMP1]], zeroinitializer
; CHECK-NEXT: ret <2 x i1> [[TEST]]
;
%notneg = and <2 x i32> %x, <i32 7, i32 7>
diff --git a/llvm/test/Transforms/InstCombine/minmax-demandbits.ll b/llvm/test/Transforms/InstCombine/minmax-demandbits.ll
index 29a569663d21..3abf4f6aef30 100644
--- a/llvm/test/Transforms/InstCombine/minmax-demandbits.ll
+++ b/llvm/test/Transforms/InstCombine/minmax-demandbits.ll
@@ -4,7 +4,8 @@
define i32 @and_umax_less(i32 %A) {
; CHECK-LABEL: @and_umax_less(
-; CHECK-NEXT: [[X:%.*]] = and i32 [[A:%.*]], -32
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[A:%.*]], i32 31)
+; CHECK-NEXT: [[X:%.*]] = and i32 [[TMP1]], -32
; CHECK-NEXT: ret i32 [[X]]
;
%l0 = icmp ugt i32 31, %A
@@ -15,7 +16,8 @@ define i32 @and_umax_less(i32 %A) {
define i32 @and_umax_muchless(i32 %A) {
; CHECK-LABEL: @and_umax_muchless(
-; CHECK-NEXT: [[X:%.*]] = and i32 [[A:%.*]], -32
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[A:%.*]], i32 12)
+; CHECK-NEXT: [[X:%.*]] = and i32 [[TMP1]], -32
; CHECK-NEXT: ret i32 [[X]]
;
%l0 = icmp ugt i32 12, %A
@@ -26,9 +28,8 @@ define i32 @and_umax_muchless(i32 %A) {
define i32 @and_umax_more(i32 %A) {
; CHECK-LABEL: @and_umax_more(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[A:%.*]], 32
-; CHECK-NEXT: [[L1:%.*]] = select i1 [[TMP1]], i32 [[A]], i32 32
-; CHECK-NEXT: [[X:%.*]] = and i32 [[L1]], -32
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[A:%.*]], i32 32)
+; CHECK-NEXT: [[X:%.*]] = and i32 [[TMP1]], -32
; CHECK-NEXT: ret i32 [[X]]
;
%l0 = icmp ugt i32 32, %A
@@ -39,7 +40,8 @@ define i32 @and_umax_more(i32 %A) {
define i32 @shr_umax(i32 %A) {
; CHECK-LABEL: @shr_umax(
-; CHECK-NEXT: [[X:%.*]] = lshr i32 [[A:%.*]], 4
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[A:%.*]], i32 15)
+; CHECK-NEXT: [[X:%.*]] = lshr i32 [[TMP1]], 4
; CHECK-NEXT: ret i32 [[X]]
;
%l0 = icmp ugt i32 15, %A
@@ -74,7 +76,8 @@ define i8 @t_0_10(i8 %A) {
define i8 @t_1_10(i8 %A) {
; CHECK-LABEL: @t_1_10(
-; CHECK-NEXT: [[X:%.*]] = and i8 [[A:%.*]], 10
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.umax.i8(i8 [[A:%.*]], i8 1)
+; CHECK-NEXT: [[X:%.*]] = and i8 [[TMP1]], 10
; CHECK-NEXT: ret i8 [[X]]
;
%l2 = icmp ugt i8 %A, 1
@@ -85,7 +88,8 @@ define i8 @t_1_10(i8 %A) {
define i8 @t_2_4(i8 %A) {
; CHECK-LABEL: @t_2_4(
-; CHECK-NEXT: [[X:%.*]] = and i8 [[A:%.*]], 4
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.umax.i8(i8 [[A:%.*]], i8 2)
+; CHECK-NEXT: [[X:%.*]] = and i8 [[TMP1]], 4
; CHECK-NEXT: ret i8 [[X]]
;
%l2 = icmp ugt i8 %A, 2
@@ -96,7 +100,8 @@ define i8 @t_2_4(i8 %A) {
define i8 @t_2_192(i8 %A) {
; CHECK-LABEL: @t_2_192(
-; CHECK-NEXT: [[X:%.*]] = and i8 [[A:%.*]], -64
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.umax.i8(i8 [[A:%.*]], i8 2)
+; CHECK-NEXT: [[X:%.*]] = and i8 [[TMP1]], -64
; CHECK-NEXT: ret i8 [[X]]
;
%l2 = icmp ugt i8 %A, 2
@@ -107,7 +112,8 @@ define i8 @t_2_192(i8 %A) {
define i8 @t_2_63_or(i8 %A) {
; CHECK-LABEL: @t_2_63_or(
-; CHECK-NEXT: [[X:%.*]] = or i8 [[A:%.*]], 63
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.umax.i8(i8 [[A:%.*]], i8 2)
+; CHECK-NEXT: [[X:%.*]] = or i8 [[TMP1]], 63
; CHECK-NEXT: ret i8 [[X]]
;
%l2 = icmp ugt i8 %A, 2
@@ -118,9 +124,8 @@ define i8 @t_2_63_or(i8 %A) {
define i8 @f_1_1(i8 %A) {
; CHECK-LABEL: @f_1_1(
-; CHECK-NEXT: [[L2:%.*]] = icmp ugt i8 [[A:%.*]], 1
-; CHECK-NEXT: [[L1:%.*]] = select i1 [[L2]], i8 [[A]], i8 1
-; CHECK-NEXT: [[X:%.*]] = and i8 [[L1]], 1
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.umax.i8(i8 [[A:%.*]], i8 1)
+; CHECK-NEXT: [[X:%.*]] = and i8 [[TMP1]], 1
; CHECK-NEXT: ret i8 [[X]]
;
%l2 = icmp ugt i8 %A, 1
@@ -131,9 +136,8 @@ define i8 @f_1_1(i8 %A) {
define i8 @f_32_32(i8 %A) {
; CHECK-LABEL: @f_32_32(
-; CHECK-NEXT: [[L2:%.*]] = icmp ugt i8 [[A:%.*]], 32
-; CHECK-NEXT: [[L1:%.*]] = select i1 [[L2]], i8 [[A]], i8 32
-; CHECK-NEXT: [[X:%.*]] = and i8 [[L1]], -32
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.umax.i8(i8 [[A:%.*]], i8 32)
+; CHECK-NEXT: [[X:%.*]] = and i8 [[TMP1]], -32
; CHECK-NEXT: ret i8 [[X]]
;
%l2 = icmp ugt i8 %A, 32
@@ -144,9 +148,8 @@ define i8 @f_32_32(i8 %A) {
define i8 @f_191_192(i8 %A) {
; CHECK-LABEL: @f_191_192(
-; CHECK-NEXT: [[L2:%.*]] = icmp ugt i8 [[A:%.*]], -65
-; CHECK-NEXT: [[L1:%.*]] = select i1 [[L2]], i8 [[A]], i8 -65
-; CHECK-NEXT: [[X:%.*]] = and i8 [[L1]], -64
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.umax.i8(i8 [[A:%.*]], i8 -65)
+; CHECK-NEXT: [[X:%.*]] = and i8 [[TMP1]], -64
; CHECK-NEXT: ret i8 [[X]]
;
%l2 = icmp ugt i8 %A, 191
@@ -157,9 +160,8 @@ define i8 @f_191_192(i8 %A) {
define i8 @f_10_1(i8 %A) {
; CHECK-LABEL: @f_10_1(
-; CHECK-NEXT: [[L2:%.*]] = icmp ugt i8 [[A:%.*]], 10
-; CHECK-NEXT: [[L1:%.*]] = select i1 [[L2]], i8 [[A]], i8 10
-; CHECK-NEXT: [[X:%.*]] = and i8 [[L1]], 1
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.umax.i8(i8 [[A:%.*]], i8 10)
+; CHECK-NEXT: [[X:%.*]] = and i8 [[TMP1]], 1
; CHECK-NEXT: ret i8 [[X]]
;
%l2 = icmp ugt i8 %A, 10
@@ -190,7 +192,8 @@ define i32 @or_umin(i32 %A) {
define i8 @or_min_31_30(i8 %A) {
; CHECK-LABEL: @or_min_31_30(
-; CHECK-NEXT: [[R:%.*]] = or i8 [[A:%.*]], 31
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.umin.i8(i8 [[A:%.*]], i8 -30)
+; CHECK-NEXT: [[R:%.*]] = or i8 [[TMP1]], 31
; CHECK-NEXT: ret i8 [[R]]
;
%cmp = icmp ult i8 %A, -30
@@ -201,7 +204,8 @@ define i8 @or_min_31_30(i8 %A) {
define i8 @and_min_7_7(i8 %A) {
; CHECK-LABEL: @and_min_7_7(
-; CHECK-NEXT: [[R:%.*]] = and i8 [[A:%.*]], -8
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.umin.i8(i8 [[A:%.*]], i8 -7)
+; CHECK-NEXT: [[R:%.*]] = and i8 [[TMP1]], -8
; CHECK-NEXT: ret i8 [[R]]
;
%l2 = icmp ult i8 %A, -7
@@ -212,7 +216,8 @@ define i8 @and_min_7_7(i8 %A) {
define i8 @and_min_7_8(i8 %A) {
; CHECK-LABEL: @and_min_7_8(
-; CHECK-NEXT: [[R:%.*]] = and i8 [[A:%.*]], -8
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.umin.i8(i8 [[A:%.*]], i8 -8)
+; CHECK-NEXT: [[R:%.*]] = and i8 [[TMP1]], -8
; CHECK-NEXT: ret i8 [[R]]
;
%l2 = icmp ult i8 %A, -8
@@ -223,9 +228,8 @@ define i8 @and_min_7_8(i8 %A) {
define i8 @and_min_7_9(i8 %A) {
; CHECK-LABEL: @and_min_7_9(
-; CHECK-NEXT: [[L2:%.*]] = icmp ult i8 [[A:%.*]], -9
-; CHECK-NEXT: [[MIN:%.*]] = select i1 [[L2]], i8 [[A]], i8 -9
-; CHECK-NEXT: [[R:%.*]] = and i8 [[MIN]], -8
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.umin.i8(i8 [[A:%.*]], i8 -9)
+; CHECK-NEXT: [[R:%.*]] = and i8 [[TMP1]], -8
; CHECK-NEXT: ret i8 [[R]]
;
%l2 = icmp ult i8 %A, -9
diff --git a/llvm/test/Transforms/InstCombine/minmax-fold.ll b/llvm/test/Transforms/InstCombine/minmax-fold.ll
index dcf060c09613..babd9b392c98 100644
--- a/llvm/test/Transforms/InstCombine/minmax-fold.ll
+++ b/llvm/test/Transforms/InstCombine/minmax-fold.ll
@@ -4,10 +4,9 @@
; This is the canonical form for a type-changing min/max.
define i64 @t1(i32 %a) {
; CHECK-LABEL: @t1(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[A:%.*]], 5
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[A]], i32 5
-; CHECK-NEXT: [[TMP3:%.*]] = sext i32 [[TMP2]] to i64
-; CHECK-NEXT: ret i64 [[TMP3]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[A:%.*]], i32 5)
+; CHECK-NEXT: [[TMP2:%.*]] = sext i32 [[TMP1]] to i64
+; CHECK-NEXT: ret i64 [[TMP2]]
;
%1 = icmp slt i32 %a, 5
%2 = select i1 %1, i32 %a, i32 5
@@ -18,9 +17,8 @@ define i64 @t1(i32 %a) {
; Check this is converted into canonical form, as above.
define i64 @t2(i32 %a) {
; CHECK-LABEL: @t2(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[A:%.*]], 5
-; CHECK-NEXT: [[NARROW:%.*]] = select i1 [[TMP1]], i32 [[A]], i32 5
-; CHECK-NEXT: [[TMP2:%.*]] = sext i32 [[NARROW]] to i64
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[A:%.*]], i32 5)
+; CHECK-NEXT: [[TMP2:%.*]] = sext i32 [[TMP1]] to i64
; CHECK-NEXT: ret i64 [[TMP2]]
;
%1 = icmp slt i32 %a, 5
@@ -32,9 +30,8 @@ define i64 @t2(i32 %a) {
; Same as @t2, with flipped operands and zext instead of sext.
define i64 @t3(i32 %a) {
; CHECK-LABEL: @t3(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[A:%.*]], 5
-; CHECK-NEXT: [[NARROW:%.*]] = select i1 [[TMP1]], i32 [[A]], i32 5
-; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[NARROW]] to i64
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[A:%.*]], i32 5)
+; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
; CHECK-NEXT: ret i64 [[TMP2]]
;
%1 = icmp ult i32 %a, 5
@@ -46,10 +43,9 @@ define i64 @t3(i32 %a) {
; Same again, with trunc.
define i32 @t4(i64 %a) {
; CHECK-LABEL: @t4(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i64 [[A:%.*]], 5
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i64 [[A]], i64 5
-; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[TMP2]] to i32
-; CHECK-NEXT: ret i32 [[TMP3]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.smin.i64(i64 [[A:%.*]], i64 5)
+; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[TMP1]] to i32
+; CHECK-NEXT: ret i32 [[TMP2]]
;
%1 = icmp slt i64 %a, 5
%2 = trunc i64 %a to i32
@@ -60,9 +56,8 @@ define i32 @t4(i64 %a) {
; Same as @t3, but with mismatched signedness between icmp and zext.
define i64 @t5(i32 %a) {
; CHECK-LABEL: @t5(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[A:%.*]], 5
-; CHECK-NEXT: [[NARROW:%.*]] = select i1 [[TMP1]], i32 [[A]], i32 5
-; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[NARROW]] to i64
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[A:%.*]], i32 5)
+; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64
; CHECK-NEXT: ret i64 [[TMP2]]
;
%1 = icmp slt i32 %a, 5
@@ -73,10 +68,9 @@ define i64 @t5(i32 %a) {
define float @t6(i32 %a) {
; CHECK-LABEL: @t6(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[A:%.*]], 0
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[A]], i32 0
-; CHECK-NEXT: [[TMP3:%.*]] = sitofp i32 [[TMP2]] to float
-; CHECK-NEXT: ret float [[TMP3]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[A:%.*]], i32 0)
+; CHECK-NEXT: [[TMP2:%.*]] = sitofp i32 [[TMP1]] to float
+; CHECK-NEXT: ret float [[TMP2]]
;
%1 = icmp slt i32 %a, 0
%2 = select i1 %1, i32 %a, i32 0
@@ -86,10 +80,9 @@ define float @t6(i32 %a) {
define i16 @t7(i32 %a) {
; CHECK-LABEL: @t7(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[A:%.*]], -32768
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[A]], i32 -32768
-; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[TMP2]] to i16
-; CHECK-NEXT: ret i16 [[TMP3]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[A:%.*]], i32 -32768)
+; CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
+; CHECK-NEXT: ret i16 [[TMP2]]
;
%1 = icmp slt i32 %a, -32768
%2 = trunc i32 %a to i16
@@ -103,14 +96,13 @@ define i16 @t7(i32 %a) {
; parts of instcombine.
define i32 @t8(i64 %a, i32 %b) {
; CHECK-LABEL: @t8(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i64 [[A:%.*]], -32767
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i64 [[A]], i64 -32767
-; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[TMP2]] to i32
-; CHECK-NEXT: [[TMP4:%.*]] = icmp slt i32 [[B:%.*]], 42
-; CHECK-NEXT: [[TMP5:%.*]] = select i1 [[TMP4]], i32 42, i32 [[TMP3]]
-; CHECK-NEXT: [[TMP6:%.*]] = icmp ne i32 [[TMP5]], [[B]]
-; CHECK-NEXT: [[TMP7:%.*]] = zext i1 [[TMP6]] to i32
-; CHECK-NEXT: ret i32 [[TMP7]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.smin.i64(i64 [[A:%.*]], i64 -32767)
+; CHECK-NEXT: [[TMP2:%.*]] = trunc i64 [[TMP1]] to i32
+; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i32 [[B:%.*]], 42
+; CHECK-NEXT: [[TMP4:%.*]] = select i1 [[TMP3]], i32 42, i32 [[TMP2]]
+; CHECK-NEXT: [[TMP5:%.*]] = icmp ne i32 [[TMP4]], [[B]]
+; CHECK-NEXT: [[TMP6:%.*]] = zext i1 [[TMP5]] to i32
+; CHECK-NEXT: ret i32 [[TMP6]]
;
%1 = icmp slt i64 %a, -32767
%2 = select i1 %1, i64 %a, i64 -32767
@@ -138,9 +130,8 @@ define i64 @t9(i32 %a) {
define float @t10(i32 %x) {
; CHECK-LABEL: @t10(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[X:%.*]], 255
-; CHECK-NEXT: [[R1:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 255
-; CHECK-NEXT: [[TMP2:%.*]] = sitofp i32 [[R1]] to float
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 255)
+; CHECK-NEXT: [[TMP2:%.*]] = sitofp i32 [[TMP1]] to float
; CHECK-NEXT: ret float [[TMP2]]
;
%f_x = sitofp i32 %x to float
@@ -151,9 +142,8 @@ define float @t10(i32 %x) {
define float @t11(i64 %x) {
; CHECK-LABEL: @t11(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i64 [[X:%.*]], 255
-; CHECK-NEXT: [[R1:%.*]] = select i1 [[TMP1]], i64 [[X]], i64 255
-; CHECK-NEXT: [[TMP2:%.*]] = sitofp i64 [[R1]] to float
+; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.smax.i64(i64 [[X:%.*]], i64 255)
+; CHECK-NEXT: [[TMP2:%.*]] = sitofp i64 [[TMP1]] to float
; CHECK-NEXT: ret float [[TMP2]]
;
%f_x = sitofp i64 %x to float
@@ -208,8 +198,7 @@ define <4 x float> @bitcasts_icmp(<2 x i64> %a, <2 x i64> %b) {
; CHECK-LABEL: @bitcasts_icmp(
; CHECK-NEXT: [[T0:%.*]] = bitcast <2 x i64> [[A:%.*]] to <4 x i32>
; CHECK-NEXT: [[T1:%.*]] = bitcast <2 x i64> [[B:%.*]] to <4 x i32>
-; CHECK-NEXT: [[T2:%.*]] = icmp slt <4 x i32> [[T1]], [[T0]]
-; CHECK-NEXT: [[TMP1:%.*]] = select <4 x i1> [[T2]], <4 x i32> [[T0]], <4 x i32> [[T1]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <4 x i32> @llvm.smax.v4i32(<4 x i32> [[T1]], <4 x i32> [[T0]])
; CHECK-NEXT: [[T5:%.*]] = bitcast <4 x i32> [[TMP1]] to <4 x float>
; CHECK-NEXT: ret <4 x float> [[T5]]
;
@@ -225,9 +214,8 @@ define <4 x float> @bitcasts_icmp(<2 x i64> %a, <2 x i64> %b) {
; SMIN(SMIN(X, 11), 92) -> SMIN(X, 11)
define i32 @test68(i32 %x) {
; CHECK-LABEL: @test68(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], 11
-; CHECK-NEXT: [[COND:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 11
-; CHECK-NEXT: ret i32 [[COND]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 11)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%cmp = icmp slt i32 11, %x
%cond = select i1 %cmp, i32 11, i32 %x
@@ -238,9 +226,8 @@ define i32 @test68(i32 %x) {
define <2 x i32> @test68vec(<2 x i32> %x) {
; CHECK-LABEL: @test68vec(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i32> [[X:%.*]], <i32 11, i32 11>
-; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[X]], <2 x i32> <i32 11, i32 11>
-; CHECK-NEXT: ret <2 x i32> [[COND]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[X:%.*]], <2 x i32> <i32 11, i32 11>)
+; CHECK-NEXT: ret <2 x i32> [[TMP1]]
;
%cmp = icmp slt <2 x i32> <i32 11, i32 11>, %x
%cond = select <2 x i1> %cmp, <2 x i32> <i32 11, i32 11>, <2 x i32> %x
@@ -252,9 +239,8 @@ define <2 x i32> @test68vec(<2 x i32> %x) {
; MIN(MIN(X, 24), 83) -> MIN(X, 24)
define i32 @test69(i32 %x) {
; CHECK-LABEL: @test69(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[X:%.*]], 24
-; CHECK-NEXT: [[COND:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 24
-; CHECK-NEXT: ret i32 [[COND]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 24)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%cmp = icmp ult i32 24, %x
%cond = select i1 %cmp, i32 24, i32 %x
@@ -266,9 +252,8 @@ define i32 @test69(i32 %x) {
; SMAX(SMAX(X, 75), 36) -> SMAX(X, 75)
define i32 @test70(i32 %x) {
; CHECK-LABEL: @test70(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[X:%.*]], 75
-; CHECK-NEXT: [[COND:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 75
-; CHECK-NEXT: ret i32 [[COND]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 75)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%cmp = icmp slt i32 %x, 75
%cond = select i1 %cmp, i32 75, i32 %x
@@ -280,9 +265,8 @@ define i32 @test70(i32 %x) {
; MAX(MAX(X, 68), 47) -> MAX(X, 68)
define i32 @test71(i32 %x) {
; CHECK-LABEL: @test71(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[X:%.*]], 68
-; CHECK-NEXT: [[COND:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 68
-; CHECK-NEXT: ret i32 [[COND]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 68)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%cmp = icmp ult i32 %x, 68
%cond = select i1 %cmp, i32 68, i32 %x
@@ -294,9 +278,9 @@ define i32 @test71(i32 %x) {
; SMIN(SMIN(X, 92), 11) -> SMIN(X, 11)
define i32 @test72(i32 %x) {
; CHECK-LABEL: @test72(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], 11
-; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 11
-; CHECK-NEXT: ret i32 [[RETVAL]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 92)
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smin.i32(i32 [[TMP1]], i32 11)
+; CHECK-NEXT: ret i32 [[TMP2]]
;
%cmp = icmp sgt i32 %x, 92
%cond = select i1 %cmp, i32 92, i32 %x
@@ -307,9 +291,9 @@ define i32 @test72(i32 %x) {
define <2 x i32> @test72vec(<2 x i32> %x) {
; CHECK-LABEL: @test72vec(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i32> [[X:%.*]], <i32 11, i32 11>
-; CHECK-NEXT: [[RETVAL:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[X]], <2 x i32> <i32 11, i32 11>
-; CHECK-NEXT: ret <2 x i32> [[RETVAL]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[X:%.*]], <2 x i32> <i32 92, i32 92>)
+; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[TMP1]], <2 x i32> <i32 11, i32 11>)
+; CHECK-NEXT: ret <2 x i32> [[TMP2]]
;
%cmp = icmp sgt <2 x i32> %x, <i32 92, i32 92>
%cond = select <2 x i1> %cmp, <2 x i32> <i32 92, i32 92>, <2 x i32> %x
@@ -321,9 +305,9 @@ define <2 x i32> @test72vec(<2 x i32> %x) {
; MIN(MIN(X, 83), 24) -> MIN(X, 24)
define i32 @test73(i32 %x) {
; CHECK-LABEL: @test73(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[X:%.*]], 24
-; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 24
-; CHECK-NEXT: ret i32 [[RETVAL]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 83)
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP1]], i32 24)
+; CHECK-NEXT: ret i32 [[TMP2]]
;
%cmp = icmp ugt i32 %x, 83
%cond = select i1 %cmp, i32 83, i32 %x
@@ -335,9 +319,9 @@ define i32 @test73(i32 %x) {
; SMAX(SMAX(X, 36), 75) -> SMAX(X, 75)
define i32 @test74(i32 %x) {
; CHECK-LABEL: @test74(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[X:%.*]], 75
-; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 75
-; CHECK-NEXT: ret i32 [[RETVAL]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 36)
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umax.i32(i32 [[TMP1]], i32 75)
+; CHECK-NEXT: ret i32 [[TMP2]]
;
%cmp = icmp slt i32 %x, 36
%cond = select i1 %cmp, i32 36, i32 %x
@@ -349,9 +333,9 @@ define i32 @test74(i32 %x) {
; MAX(MAX(X, 47), 68) -> MAX(X, 68)
define i32 @test75(i32 %x) {
; CHECK-LABEL: @test75(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[X:%.*]], 68
-; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 68
-; CHECK-NEXT: ret i32 [[RETVAL]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 47)
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umax.i32(i32 [[TMP1]], i32 68)
+; CHECK-NEXT: ret i32 [[TMP2]]
;
%cmp = icmp ult i32 %x, 47
%cond = select i1 %cmp, i32 47, i32 %x
@@ -367,11 +351,9 @@ define i32 @test75(i32 %x) {
define i32 @clamp_signed1(i32 %x) {
; CHECK-LABEL: @clamp_signed1(
-; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[X:%.*]], 255
-; CHECK-NEXT: [[MIN:%.*]] = select i1 [[CMP2]], i32 [[X]], i32 255
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[MIN]], 15
-; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP1]], i32 [[MIN]], i32 15
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 255)
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP1]], i32 15)
+; CHECK-NEXT: ret i32 [[TMP2]]
;
%cmp2 = icmp slt i32 %x, 255
%min = select i1 %cmp2, i32 %x, i32 255
@@ -384,11 +366,9 @@ define i32 @clamp_signed1(i32 %x) {
define i32 @clamp_signed2(i32 %x) {
; CHECK-LABEL: @clamp_signed2(
-; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[X:%.*]], 15
-; CHECK-NEXT: [[MAX:%.*]] = select i1 [[CMP2]], i32 [[X]], i32 15
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[MAX]], 255
-; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP1]], i32 [[MAX]], i32 255
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 15)
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP1]], i32 255)
+; CHECK-NEXT: ret i32 [[TMP2]]
;
%cmp2 = icmp sgt i32 %x, 15
%max = select i1 %cmp2, i32 %x, i32 15
@@ -401,11 +381,9 @@ define i32 @clamp_signed2(i32 %x) {
define i32 @clamp_signed3(i32 %x) {
; CHECK-LABEL: @clamp_signed3(
-; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[X:%.*]], 255
-; CHECK-NEXT: [[MIN:%.*]] = select i1 [[CMP2]], i32 [[X]], i32 255
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[MIN]], 15
-; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP1]], i32 [[MIN]], i32 15
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 255)
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP1]], i32 15)
+; CHECK-NEXT: ret i32 [[TMP2]]
;
%cmp2 = icmp slt i32 %x, 255
%min = select i1 %cmp2, i32 %x, i32 255
@@ -418,11 +396,9 @@ define i32 @clamp_signed3(i32 %x) {
define i32 @clamp_signed4(i32 %x) {
; CHECK-LABEL: @clamp_signed4(
-; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[X:%.*]], 15
-; CHECK-NEXT: [[MAX:%.*]] = select i1 [[CMP2]], i32 [[X]], i32 15
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[MAX]], 255
-; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP1]], i32 [[MAX]], i32 255
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 15)
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP1]], i32 255)
+; CHECK-NEXT: ret i32 [[TMP2]]
;
%cmp2 = icmp sgt i32 %x, 15
%max = select i1 %cmp2, i32 %x, i32 15
@@ -435,11 +411,9 @@ define i32 @clamp_signed4(i32 %x) {
define i32 @clamp_unsigned1(i32 %x) {
; CHECK-LABEL: @clamp_unsigned1(
-; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[X:%.*]], 255
-; CHECK-NEXT: [[MIN:%.*]] = select i1 [[CMP2]], i32 [[X]], i32 255
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[MIN]], 15
-; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP1]], i32 [[MIN]], i32 15
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 255)
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umax.i32(i32 [[TMP1]], i32 15)
+; CHECK-NEXT: ret i32 [[TMP2]]
;
%cmp2 = icmp ult i32 %x, 255
%min = select i1 %cmp2, i32 %x, i32 255
@@ -452,11 +426,9 @@ define i32 @clamp_unsigned1(i32 %x) {
define i32 @clamp_unsigned2(i32 %x) {
; CHECK-LABEL: @clamp_unsigned2(
-; CHECK-NEXT: [[CMP2:%.*]] = icmp ugt i32 [[X:%.*]], 15
-; CHECK-NEXT: [[MAX:%.*]] = select i1 [[CMP2]], i32 [[X]], i32 15
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[MAX]], 255
-; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP1]], i32 [[MAX]], i32 255
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 15)
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP1]], i32 255)
+; CHECK-NEXT: ret i32 [[TMP2]]
;
%cmp2 = icmp ugt i32 %x, 15
%max = select i1 %cmp2, i32 %x, i32 15
@@ -469,11 +441,9 @@ define i32 @clamp_unsigned2(i32 %x) {
define i32 @clamp_unsigned3(i32 %x) {
; CHECK-LABEL: @clamp_unsigned3(
-; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[X:%.*]], 255
-; CHECK-NEXT: [[MIN:%.*]] = select i1 [[CMP2]], i32 [[X]], i32 255
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[MIN]], 15
-; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP1]], i32 [[MIN]], i32 15
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 255)
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umax.i32(i32 [[TMP1]], i32 15)
+; CHECK-NEXT: ret i32 [[TMP2]]
;
%cmp2 = icmp ult i32 %x, 255
%min = select i1 %cmp2, i32 %x, i32 255
@@ -486,11 +456,9 @@ define i32 @clamp_unsigned3(i32 %x) {
define i32 @clamp_unsigned4(i32 %x) {
; CHECK-LABEL: @clamp_unsigned4(
-; CHECK-NEXT: [[CMP2:%.*]] = icmp ugt i32 [[X:%.*]], 15
-; CHECK-NEXT: [[MAX:%.*]] = select i1 [[CMP2]], i32 [[X]], i32 15
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[MAX]], 255
-; CHECK-NEXT: [[R:%.*]] = select i1 [[TMP1]], i32 [[MAX]], i32 255
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 15)
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP1]], i32 255)
+; CHECK-NEXT: ret i32 [[TMP2]]
;
%cmp2 = icmp ugt i32 %x, 15
%max = select i1 %cmp2, i32 %x, i32 15
@@ -504,11 +472,9 @@ define i32 @clamp_unsigned4(i32 %x) {
; (icmp sgt smin(PositiveA, B) 0) -> (icmp sgt B 0)
define i32 @clamp_check_for_no_infinite_loop1(i32 %i) {
; CHECK-LABEL: @clamp_check_for_no_infinite_loop1(
-; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[I:%.*]], 255
-; CHECK-NEXT: [[SEL1:%.*]] = select i1 [[CMP1]], i32 [[I]], i32 255
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[SEL1]], 0
-; CHECK-NEXT: [[RES:%.*]] = select i1 [[TMP1]], i32 [[SEL1]], i32 0
-; CHECK-NEXT: ret i32 [[RES]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[I:%.*]], i32 255)
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP1]], i32 0)
+; CHECK-NEXT: ret i32 [[TMP2]]
;
%cmp1 = icmp slt i32 %i, 255
%sel1 = select i1 %cmp1, i32 %i, i32 255
@@ -520,11 +486,9 @@ define i32 @clamp_check_for_no_infinite_loop1(i32 %i) {
; (icmp slt smax(NegativeA, B) 0) -> (icmp slt B 0)
define i32 @clamp_check_for_no_infinite_loop2(i32 %i) {
; CHECK-LABEL: @clamp_check_for_no_infinite_loop2(
-; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[I:%.*]], -255
-; CHECK-NEXT: [[SEL1:%.*]] = select i1 [[CMP1]], i32 [[I]], i32 -255
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[SEL1]], 0
-; CHECK-NEXT: [[RES:%.*]] = select i1 [[TMP1]], i32 [[SEL1]], i32 0
-; CHECK-NEXT: ret i32 [[RES]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[I:%.*]], i32 -255)
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smin.i32(i32 [[TMP1]], i32 0)
+; CHECK-NEXT: ret i32 [[TMP2]]
;
%cmp1 = icmp sgt i32 %i, -255
%sel1 = select i1 %cmp1, i32 %i, i32 -255
@@ -537,13 +501,11 @@ define i32 @clamp_check_for_no_infinite_loop2(i32 %i) {
; (icmp slt smax(PositiveA, B) 2) -> (icmp eq B 1)
define i32 @clamp_check_for_no_infinite_loop3(i32 %i) {
; CHECK-LABEL: @clamp_check_for_no_infinite_loop3(
-; CHECK-NEXT: [[I2:%.*]] = icmp sgt i32 [[I:%.*]], 1
-; CHECK-NEXT: [[I3:%.*]] = select i1 [[I2]], i32 [[I]], i32 1
; CHECK-NEXT: br i1 true, label [[TRUELABEL:%.*]], label [[FALSELABEL:%.*]]
; CHECK: truelabel:
-; CHECK-NEXT: [[I5:%.*]] = icmp slt i32 [[I3]], 2
-; CHECK-NEXT: [[I6:%.*]] = select i1 [[I5]], i32 [[I3]], i32 2
-; CHECK-NEXT: [[I7:%.*]] = shl nuw nsw i32 [[I6]], 2
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[I:%.*]], i32 1)
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP1]], i32 2)
+; CHECK-NEXT: [[I7:%.*]] = shl nuw nsw i32 [[TMP2]], 2
; CHECK-NEXT: ret i32 [[I7]]
; CHECK: falselabel:
; CHECK-NEXT: ret i32 0
@@ -568,9 +530,8 @@ falselabel:
define double @PR31751_umin1(i32 %x) {
; CHECK-LABEL: @PR31751_umin1(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[X:%.*]], 2147483647
-; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 2147483647
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[SEL]] to double
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 2147483647)
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to double
; CHECK-NEXT: ret double [[CONV]]
;
%cmp = icmp slt i32 %x, 0
@@ -581,9 +542,8 @@ define double @PR31751_umin1(i32 %x) {
define double @PR31751_umin2(i32 %x) {
; CHECK-LABEL: @PR31751_umin2(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[X:%.*]], 2147483647
-; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 [[X]], i32 2147483647
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[SEL]] to double
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 2147483647)
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to double
; CHECK-NEXT: ret double [[CONV]]
;
%cmp = icmp ult i32 %x, 2147483647
@@ -594,9 +554,8 @@ define double @PR31751_umin2(i32 %x) {
define double @PR31751_umin3(i32 %x) {
; CHECK-LABEL: @PR31751_umin3(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[X:%.*]], 2147483647
-; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 2147483647
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[SEL]] to double
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 2147483647)
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to double
; CHECK-NEXT: ret double [[CONV]]
;
%cmp = icmp ugt i32 %x, 2147483647
@@ -609,9 +568,8 @@ define double @PR31751_umin3(i32 %x) {
define double @PR31751_umax1(i32 %x) {
; CHECK-LABEL: @PR31751_umax1(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[X:%.*]], -2147483648
-; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 -2147483648
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[SEL]] to double
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 -2147483648)
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to double
; CHECK-NEXT: ret double [[CONV]]
;
%cmp = icmp sgt i32 %x, -1
@@ -622,9 +580,8 @@ define double @PR31751_umax1(i32 %x) {
define double @PR31751_umax2(i32 %x) {
; CHECK-LABEL: @PR31751_umax2(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[X:%.*]], -2147483648
-; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 [[X]], i32 -2147483648
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[SEL]] to double
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 -2147483648)
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to double
; CHECK-NEXT: ret double [[CONV]]
;
%cmp = icmp ugt i32 %x, 2147483648
@@ -635,9 +592,8 @@ define double @PR31751_umax2(i32 %x) {
define double @PR31751_umax3(i32 %x) {
; CHECK-LABEL: @PR31751_umax3(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[X:%.*]], -2147483648
-; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 -2147483648
-; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[SEL]] to double
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 -2147483648)
+; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[TMP1]] to double
; CHECK-NEXT: ret double [[CONV]]
;
%cmp = icmp ult i32 %x, 2147483648
@@ -652,9 +608,8 @@ define float @bitcast_scalar_smax(float %x, float %y) {
; CHECK-LABEL: @bitcast_scalar_smax(
; CHECK-NEXT: [[BCX:%.*]] = bitcast float [[X:%.*]] to i32
; CHECK-NEXT: [[BCY:%.*]] = bitcast float [[Y:%.*]] to i32
-; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[BCX]], [[BCY]]
-; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 [[BCX]], i32 [[BCY]]
-; CHECK-NEXT: [[BCS:%.*]] = bitcast i32 [[SEL]] to float
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[BCX]], i32 [[BCY]])
+; CHECK-NEXT: [[BCS:%.*]] = bitcast i32 [[TMP1]] to float
; CHECK-NEXT: ret float [[BCS]]
;
%bcx = bitcast float %x to i32
@@ -689,9 +644,8 @@ define <8 x float> @bitcast_vector_smin(<8 x float> %x, <8 x float> %y) {
; CHECK-LABEL: @bitcast_vector_smin(
; CHECK-NEXT: [[BCX:%.*]] = bitcast <8 x float> [[X:%.*]] to <8 x i32>
; CHECK-NEXT: [[BCY:%.*]] = bitcast <8 x float> [[Y:%.*]] to <8 x i32>
-; CHECK-NEXT: [[CMP:%.*]] = icmp slt <8 x i32> [[BCX]], [[BCY]]
-; CHECK-NEXT: [[SEL:%.*]] = select <8 x i1> [[CMP]], <8 x i32> [[BCX]], <8 x i32> [[BCY]]
-; CHECK-NEXT: [[BCS:%.*]] = bitcast <8 x i32> [[SEL]] to <8 x float>
+; CHECK-NEXT: [[TMP1:%.*]] = call <8 x i32> @llvm.smin.v8i32(<8 x i32> [[BCX]], <8 x i32> [[BCY]])
+; CHECK-NEXT: [[BCS:%.*]] = bitcast <8 x i32> [[TMP1]] to <8 x float>
; CHECK-NEXT: ret <8 x float> [[BCS]]
;
%bcx = bitcast <8 x float> %x to <8 x i32>
@@ -723,9 +677,8 @@ define <8 x float> @bitcast_vector_umin(<8 x float> %x, <8 x float> %y) {
define zeroext i8 @look_through_cast1(i32 %x) {
; CHECK-LABEL: @look_through_cast1(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], 511
-; CHECK-NEXT: [[RES1:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 511
-; CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[RES1]] to i8
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 511)
+; CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i8
; CHECK-NEXT: ret i8 [[TMP2]]
;
%cmp1 = icmp slt i32 %x, 511
@@ -751,9 +704,8 @@ define zeroext i8 @look_through_cast2(i32 %x) {
define <2 x i8> @min_through_cast_vec1(<2 x i32> %x) {
; CHECK-LABEL: @min_through_cast_vec1(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i32> [[X:%.*]], <i32 510, i32 511>
-; CHECK-NEXT: [[RES1:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[X]], <2 x i32> <i32 510, i32 511>
-; CHECK-NEXT: [[TMP2:%.*]] = trunc <2 x i32> [[RES1]] to <2 x i8>
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[X:%.*]], <2 x i32> <i32 510, i32 511>)
+; CHECK-NEXT: [[TMP2:%.*]] = trunc <2 x i32> [[TMP1]] to <2 x i8>
; CHECK-NEXT: ret <2 x i8> [[TMP2]]
;
%cmp = icmp slt <2 x i32> %x, <i32 510, i32 511>
@@ -764,9 +716,8 @@ define <2 x i8> @min_through_cast_vec1(<2 x i32> %x) {
define <2 x i8> @min_through_cast_vec2(<2 x i32> %x) {
; CHECK-LABEL: @min_through_cast_vec2(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i32> [[X:%.*]], <i32 511, i32 511>
-; CHECK-NEXT: [[RES1:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[X]], <2 x i32> <i32 511, i32 511>
-; CHECK-NEXT: [[TMP2:%.*]] = trunc <2 x i32> [[RES1]] to <2 x i8>
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[X:%.*]], <2 x i32> <i32 511, i32 511>)
+; CHECK-NEXT: [[TMP2:%.*]] = trunc <2 x i32> [[TMP1]] to <2 x i8>
; CHECK-NEXT: ret <2 x i8> [[TMP2]]
;
%cmp = icmp slt <2 x i32> %x, <i32 511, i32 511>
@@ -782,11 +733,10 @@ define <2 x i8> @min_through_cast_vec2(<2 x i32> %x) {
define i32 @common_factor_smin(i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: @common_factor_smin(
-; CHECK-NEXT: [[CMP_AB:%.*]] = icmp slt i32 [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[MIN_AB:%.*]] = select i1 [[CMP_AB]], i32 [[A]], i32 [[B]]
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[MIN_AB]], [[C:%.*]]
-; CHECK-NEXT: [[MIN_ABC:%.*]] = select i1 [[TMP1]], i32 [[MIN_AB]], i32 [[C]]
-; CHECK-NEXT: ret i32 [[MIN_ABC]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[A:%.*]], i32 [[B:%.*]])
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smin.i32(i32 [[B]], i32 [[C:%.*]])
+; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.smin.i32(i32 [[TMP1]], i32 [[TMP2]])
+; CHECK-NEXT: ret i32 [[TMP3]]
;
%cmp_ab = icmp slt i32 %a, %b
%min_ab = select i1 %cmp_ab, i32 %a, i32 %b
@@ -801,11 +751,10 @@ define i32 @common_factor_smin(i32 %a, i32 %b, i32 %c) {
define <2 x i32> @common_factor_smax(<2 x i32> %a, <2 x i32> %b, <2 x i32> %c) {
; CHECK-LABEL: @common_factor_smax(
-; CHECK-NEXT: [[CMP_AB:%.*]] = icmp sgt <2 x i32> [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[MAX_AB:%.*]] = select <2 x i1> [[CMP_AB]], <2 x i32> [[A]], <2 x i32> [[B]]
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt <2 x i32> [[MAX_AB]], [[C:%.*]]
-; CHECK-NEXT: [[MAX_ABC:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[MAX_AB]], <2 x i32> [[C]]
-; CHECK-NEXT: ret <2 x i32> [[MAX_ABC]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smax.v2i32(<2 x i32> [[A:%.*]], <2 x i32> [[B:%.*]])
+; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i32> @llvm.smax.v2i32(<2 x i32> [[C:%.*]], <2 x i32> [[B]])
+; CHECK-NEXT: [[TMP3:%.*]] = call <2 x i32> @llvm.smax.v2i32(<2 x i32> [[TMP1]], <2 x i32> [[TMP2]])
+; CHECK-NEXT: ret <2 x i32> [[TMP3]]
;
%cmp_ab = icmp sgt <2 x i32> %a, %b
%max_ab = select <2 x i1> %cmp_ab, <2 x i32> %a, <2 x i32> %b
@@ -820,11 +769,10 @@ define <2 x i32> @common_factor_smax(<2 x i32> %a, <2 x i32> %b, <2 x i32> %c) {
define <2 x i32> @common_factor_umin(<2 x i32> %a, <2 x i32> %b, <2 x i32> %c) {
; CHECK-LABEL: @common_factor_umin(
-; CHECK-NEXT: [[CMP_BC:%.*]] = icmp ult <2 x i32> [[B:%.*]], [[C:%.*]]
-; CHECK-NEXT: [[MIN_BC:%.*]] = select <2 x i1> [[CMP_BC]], <2 x i32> [[B]], <2 x i32> [[C]]
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult <2 x i32> [[MIN_BC]], [[A:%.*]]
-; CHECK-NEXT: [[MIN_ABC:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[MIN_BC]], <2 x i32> [[A]]
-; CHECK-NEXT: ret <2 x i32> [[MIN_ABC]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.umin.v2i32(<2 x i32> [[B:%.*]], <2 x i32> [[C:%.*]])
+; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i32> @llvm.umin.v2i32(<2 x i32> [[A:%.*]], <2 x i32> [[B]])
+; CHECK-NEXT: [[TMP3:%.*]] = call <2 x i32> @llvm.umin.v2i32(<2 x i32> [[TMP1]], <2 x i32> [[TMP2]])
+; CHECK-NEXT: ret <2 x i32> [[TMP3]]
;
%cmp_bc = icmp ult <2 x i32> %b, %c
%min_bc = select <2 x i1> %cmp_bc, <2 x i32> %b, <2 x i32> %c
@@ -839,11 +787,10 @@ define <2 x i32> @common_factor_umin(<2 x i32> %a, <2 x i32> %b, <2 x i32> %c) {
define i32 @common_factor_umax(i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: @common_factor_umax(
-; CHECK-NEXT: [[CMP_BC:%.*]] = icmp ugt i32 [[B:%.*]], [[C:%.*]]
-; CHECK-NEXT: [[MAX_BC:%.*]] = select i1 [[CMP_BC]], i32 [[B]], i32 [[C]]
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[MAX_BC]], [[A:%.*]]
-; CHECK-NEXT: [[MAX_ABC:%.*]] = select i1 [[TMP1]], i32 [[MAX_BC]], i32 [[A]]
-; CHECK-NEXT: ret i32 [[MAX_ABC]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[B:%.*]], i32 [[C:%.*]])
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umax.i32(i32 [[B]], i32 [[A:%.*]])
+; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.umax.i32(i32 [[TMP1]], i32 [[TMP2]])
+; CHECK-NEXT: ret i32 [[TMP3]]
;
%cmp_bc = icmp ugt i32 %b, %c
%max_bc = select i1 %cmp_bc, i32 %b, i32 %c
@@ -858,12 +805,11 @@ declare void @extra_use(i32)
define i32 @common_factor_umax_extra_use_lhs(i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: @common_factor_umax_extra_use_lhs(
-; CHECK-NEXT: [[CMP_BC:%.*]] = icmp ugt i32 [[B:%.*]], [[C:%.*]]
-; CHECK-NEXT: [[MAX_BC:%.*]] = select i1 [[CMP_BC]], i32 [[B]], i32 [[C]]
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[MAX_BC]], [[A:%.*]]
-; CHECK-NEXT: [[MAX_ABC:%.*]] = select i1 [[TMP1]], i32 [[MAX_BC]], i32 [[A]]
-; CHECK-NEXT: call void @extra_use(i32 [[MAX_BC]])
-; CHECK-NEXT: ret i32 [[MAX_ABC]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[B:%.*]], i32 [[C:%.*]])
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umax.i32(i32 [[B]], i32 [[A:%.*]])
+; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.umax.i32(i32 [[TMP1]], i32 [[TMP2]])
+; CHECK-NEXT: call void @extra_use(i32 [[TMP1]])
+; CHECK-NEXT: ret i32 [[TMP3]]
;
%cmp_bc = icmp ugt i32 %b, %c
%max_bc = select i1 %cmp_bc, i32 %b, i32 %c
@@ -877,12 +823,11 @@ define i32 @common_factor_umax_extra_use_lhs(i32 %a, i32 %b, i32 %c) {
define i32 @common_factor_umax_extra_use_rhs(i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: @common_factor_umax_extra_use_rhs(
-; CHECK-NEXT: [[CMP_BA:%.*]] = icmp ugt i32 [[B:%.*]], [[A:%.*]]
-; CHECK-NEXT: [[MAX_BA:%.*]] = select i1 [[CMP_BA]], i32 [[B]], i32 [[A]]
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[MAX_BA]], [[C:%.*]]
-; CHECK-NEXT: [[MAX_ABC:%.*]] = select i1 [[TMP1]], i32 [[MAX_BA]], i32 [[C]]
-; CHECK-NEXT: call void @extra_use(i32 [[MAX_BA]])
-; CHECK-NEXT: ret i32 [[MAX_ABC]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[B:%.*]], i32 [[C:%.*]])
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umax.i32(i32 [[B]], i32 [[A:%.*]])
+; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.umax.i32(i32 [[TMP1]], i32 [[TMP2]])
+; CHECK-NEXT: call void @extra_use(i32 [[TMP2]])
+; CHECK-NEXT: ret i32 [[TMP3]]
;
%cmp_bc = icmp ugt i32 %b, %c
%max_bc = select i1 %cmp_bc, i32 %b, i32 %c
@@ -896,15 +841,12 @@ define i32 @common_factor_umax_extra_use_rhs(i32 %a, i32 %b, i32 %c) {
define i32 @common_factor_umax_extra_use_both(i32 %a, i32 %b, i32 %c) {
; CHECK-LABEL: @common_factor_umax_extra_use_both(
-; CHECK-NEXT: [[CMP_BC:%.*]] = icmp ugt i32 [[B:%.*]], [[C:%.*]]
-; CHECK-NEXT: [[MAX_BC:%.*]] = select i1 [[CMP_BC]], i32 [[B]], i32 [[C]]
-; CHECK-NEXT: [[CMP_BA:%.*]] = icmp ugt i32 [[B]], [[A:%.*]]
-; CHECK-NEXT: [[MAX_BA:%.*]] = select i1 [[CMP_BA]], i32 [[B]], i32 [[A]]
-; CHECK-NEXT: [[CMP_BC_BA:%.*]] = icmp ugt i32 [[MAX_BC]], [[MAX_BA]]
-; CHECK-NEXT: [[MAX_ABC:%.*]] = select i1 [[CMP_BC_BA]], i32 [[MAX_BC]], i32 [[MAX_BA]]
-; CHECK-NEXT: call void @extra_use(i32 [[MAX_BC]])
-; CHECK-NEXT: call void @extra_use(i32 [[MAX_BA]])
-; CHECK-NEXT: ret i32 [[MAX_ABC]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[B:%.*]], i32 [[C:%.*]])
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umax.i32(i32 [[B]], i32 [[A:%.*]])
+; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.umax.i32(i32 [[TMP1]], i32 [[TMP2]])
+; CHECK-NEXT: call void @extra_use(i32 [[TMP1]])
+; CHECK-NEXT: call void @extra_use(i32 [[TMP2]])
+; CHECK-NEXT: ret i32 [[TMP3]]
;
%cmp_bc = icmp ugt i32 %b, %c
%max_bc = select i1 %cmp_bc, i32 %b, i32 %c
@@ -940,10 +882,9 @@ define float @not_min_of_min(i8 %i, float %x) {
define i32 @add_umin(i32 %x) {
; CHECK-LABEL: @add_umin(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[X:%.*]], 27
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 27
-; CHECK-NEXT: [[R:%.*]] = add nuw nsw i32 [[TMP2]], 15
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[A:%.*]] = add nuw i32 [[X:%.*]], 15
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[A]], i32 42)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%a = add nuw i32 %x, 15
%c = icmp ult i32 %a, 42
@@ -953,9 +894,9 @@ define i32 @add_umin(i32 %x) {
define i32 @add_umin_constant_limit(i32 %x) {
; CHECK-LABEL: @add_umin_constant_limit(
-; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[X:%.*]], 0
-; CHECK-NEXT: [[R:%.*]] = select i1 [[DOTNOT]], i32 41, i32 42
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[A:%.*]] = add nuw i32 [[X:%.*]], 41
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[A]], i32 42)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%a = add nuw i32 %x, 41
%c = icmp ult i32 %a, 42
@@ -994,9 +935,8 @@ define i32 @add_umin_simplify2(i32 %x) {
define i32 @add_umin_wrong_pred(i32 %x) {
; CHECK-LABEL: @add_umin_wrong_pred(
; CHECK-NEXT: [[A:%.*]] = add nuw i32 [[X:%.*]], 15
-; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[A]], 42
-; CHECK-NEXT: [[R:%.*]] = select i1 [[C]], i32 [[A]], i32 42
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[A]], i32 42)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%a = add nuw i32 %x, 15
%c = icmp slt i32 %a, 42
@@ -1009,9 +949,8 @@ define i32 @add_umin_wrong_pred(i32 %x) {
define i32 @add_umin_wrong_wrap(i32 %x) {
; CHECK-LABEL: @add_umin_wrong_wrap(
; CHECK-NEXT: [[A:%.*]] = add nsw i32 [[X:%.*]], 15
-; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[A]], 42
-; CHECK-NEXT: [[R:%.*]] = select i1 [[C]], i32 [[A]], i32 42
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[A]], i32 42)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%a = add nsw i32 %x, 15
%c = icmp ult i32 %a, 42
@@ -1025,9 +964,8 @@ define i32 @add_umin_extra_use(i32 %x, i32* %p) {
; CHECK-LABEL: @add_umin_extra_use(
; CHECK-NEXT: [[A:%.*]] = add nuw i32 [[X:%.*]], 15
; CHECK-NEXT: store i32 [[A]], i32* [[P:%.*]], align 4
-; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[A]], 42
-; CHECK-NEXT: [[R:%.*]] = select i1 [[C]], i32 [[A]], i32 42
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[A]], i32 42)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%a = add nuw i32 %x, 15
store i32 %a, i32* %p
@@ -1038,10 +976,9 @@ define i32 @add_umin_extra_use(i32 %x, i32* %p) {
define <2 x i16> @add_umin_vec(<2 x i16> %x) {
; CHECK-LABEL: @add_umin_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult <2 x i16> [[X:%.*]], <i16 225, i16 225>
-; CHECK-NEXT: [[TMP2:%.*]] = select <2 x i1> [[TMP1]], <2 x i16> [[X]], <2 x i16> <i16 225, i16 225>
-; CHECK-NEXT: [[R:%.*]] = add nuw nsw <2 x i16> [[TMP2]], <i16 15, i16 15>
-; CHECK-NEXT: ret <2 x i16> [[R]]
+; CHECK-NEXT: [[A:%.*]] = add nuw <2 x i16> [[X:%.*]], <i16 15, i16 15>
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i16> @llvm.umin.v2i16(<2 x i16> [[A]], <2 x i16> <i16 240, i16 240>)
+; CHECK-NEXT: ret <2 x i16> [[TMP1]]
;
%a = add nuw <2 x i16> %x, <i16 15, i16 15>
%c = icmp ult <2 x i16> %a, <i16 240, i16 240>
@@ -1051,10 +988,9 @@ define <2 x i16> @add_umin_vec(<2 x i16> %x) {
define i37 @add_umax(i37 %x) {
; CHECK-LABEL: @add_umax(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i37 [[X:%.*]], 37
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i37 [[X]], i37 37
-; CHECK-NEXT: [[R:%.*]] = add nuw i37 [[TMP2]], 5
-; CHECK-NEXT: ret i37 [[R]]
+; CHECK-NEXT: [[A:%.*]] = add nuw i37 [[X:%.*]], 5
+; CHECK-NEXT: [[TMP1:%.*]] = call i37 @llvm.umax.i37(i37 [[A]], i37 42)
+; CHECK-NEXT: ret i37 [[TMP1]]
;
%a = add nuw i37 %x, 5
%c = icmp ugt i37 %a, 42
@@ -1064,10 +1000,9 @@ define i37 @add_umax(i37 %x) {
define i37 @add_umax_constant_limit(i37 %x) {
; CHECK-LABEL: @add_umax_constant_limit(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i37 [[X:%.*]], 1
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i37 [[X]], i37 1
-; CHECK-NEXT: [[R:%.*]] = add nuw i37 [[TMP2]], 81
-; CHECK-NEXT: ret i37 [[R]]
+; CHECK-NEXT: [[A:%.*]] = add nuw i37 [[X:%.*]], 81
+; CHECK-NEXT: [[TMP1:%.*]] = call i37 @llvm.umax.i37(i37 [[A]], i37 82)
+; CHECK-NEXT: ret i37 [[TMP1]]
;
%a = add nuw i37 %x, 81
%c = icmp ugt i37 %a, 82
@@ -1108,9 +1043,8 @@ define i32 @add_umax_simplify2(i32 %x) {
define i32 @add_umax_wrong_pred(i32 %x) {
; CHECK-LABEL: @add_umax_wrong_pred(
; CHECK-NEXT: [[A:%.*]] = add nuw i32 [[X:%.*]], 15
-; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[A]], 42
-; CHECK-NEXT: [[R:%.*]] = select i1 [[C]], i32 [[A]], i32 42
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[A]], i32 42)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%a = add nuw i32 %x, 15
%c = icmp sgt i32 %a, 42
@@ -1123,9 +1057,8 @@ define i32 @add_umax_wrong_pred(i32 %x) {
define i32 @add_umax_wrong_wrap(i32 %x) {
; CHECK-LABEL: @add_umax_wrong_wrap(
; CHECK-NEXT: [[A:%.*]] = add nsw i32 [[X:%.*]], 15
-; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[A]], 42
-; CHECK-NEXT: [[R:%.*]] = select i1 [[C]], i32 [[A]], i32 42
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[A]], i32 42)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%a = add nsw i32 %x, 15
%c = icmp ugt i32 %a, 42
@@ -1139,9 +1072,8 @@ define i32 @add_umax_extra_use(i32 %x, i32* %p) {
; CHECK-LABEL: @add_umax_extra_use(
; CHECK-NEXT: [[A:%.*]] = add nuw i32 [[X:%.*]], 15
; CHECK-NEXT: store i32 [[A]], i32* [[P:%.*]], align 4
-; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[A]], 42
-; CHECK-NEXT: [[R:%.*]] = select i1 [[C]], i32 [[A]], i32 42
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[A]], i32 42)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%a = add nuw i32 %x, 15
store i32 %a, i32* %p
@@ -1152,10 +1084,9 @@ define i32 @add_umax_extra_use(i32 %x, i32* %p) {
define <2 x i33> @add_umax_vec(<2 x i33> %x) {
; CHECK-LABEL: @add_umax_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt <2 x i33> [[X:%.*]], <i33 235, i33 235>
-; CHECK-NEXT: [[TMP2:%.*]] = select <2 x i1> [[TMP1]], <2 x i33> [[X]], <2 x i33> <i33 235, i33 235>
-; CHECK-NEXT: [[R:%.*]] = add nuw <2 x i33> [[TMP2]], <i33 5, i33 5>
-; CHECK-NEXT: ret <2 x i33> [[R]]
+; CHECK-NEXT: [[A:%.*]] = add nuw <2 x i33> [[X:%.*]], <i33 5, i33 5>
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i33> @llvm.umax.v2i33(<2 x i33> [[A]], <2 x i33> <i33 240, i33 240>)
+; CHECK-NEXT: ret <2 x i33> [[TMP1]]
;
%a = add nuw <2 x i33> %x, <i33 5, i33 5>
%c = icmp ugt <2 x i33> %a, <i33 240, i33 240>
@@ -1165,8 +1096,11 @@ define <2 x i33> @add_umax_vec(<2 x i33> %x) {
define i8 @PR14613_umin(i8 %x) {
; CHECK-LABEL: @PR14613_umin(
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.uadd.sat.i8(i8 [[X:%.*]], i8 15)
-; CHECK-NEXT: ret i8 [[TMP1]]
+; CHECK-NEXT: [[U4:%.*]] = zext i8 [[X:%.*]] to i32
+; CHECK-NEXT: [[U5:%.*]] = add nuw nsw i32 [[U4]], 15
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[U5]], i32 255)
+; CHECK-NEXT: [[R:%.*]] = trunc i32 [[TMP1]] to i8
+; CHECK-NEXT: ret i8 [[R]]
;
%u4 = zext i8 %x to i32
%u5 = add nuw nsw i32 %u4, 15
@@ -1178,10 +1112,11 @@ define i8 @PR14613_umin(i8 %x) {
define i8 @PR14613_umax(i8 %x) {
; CHECK-LABEL: @PR14613_umax(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[X:%.*]], -16
-; CHECK-NEXT: [[X_OP:%.*]] = add i8 [[X]], 15
-; CHECK-NEXT: [[U7:%.*]] = select i1 [[TMP1]], i8 [[X_OP]], i8 -1
-; CHECK-NEXT: ret i8 [[U7]]
+; CHECK-NEXT: [[U4:%.*]] = zext i8 [[X:%.*]] to i32
+; CHECK-NEXT: [[U5:%.*]] = add nuw nsw i32 [[U4]], 15
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[U5]], i32 255)
+; CHECK-NEXT: [[R:%.*]] = trunc i32 [[TMP1]] to i8
+; CHECK-NEXT: ret i8 [[R]]
;
%u4 = zext i8 %x to i32
%u5 = add nuw nsw i32 %u4, 15
@@ -1193,10 +1128,9 @@ define i8 @PR14613_umax(i8 %x) {
define i32 @add_smin(i32 %x) {
; CHECK-LABEL: @add_smin(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], 27
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 27
-; CHECK-NEXT: [[R:%.*]] = add nsw i32 [[TMP2]], 15
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[A:%.*]] = add nsw i32 [[X:%.*]], 15
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[A]], i32 42)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%a = add nsw i32 %x, 15
%c = icmp slt i32 %a, 42
@@ -1206,10 +1140,9 @@ define i32 @add_smin(i32 %x) {
define i32 @add_smin_constant_limit(i32 %x) {
; CHECK-LABEL: @add_smin_constant_limit(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], 2147483646
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 2147483646
-; CHECK-NEXT: [[R:%.*]] = add nsw i32 [[TMP2]], -3
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[A:%.*]] = add nsw i32 [[X:%.*]], -3
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[A]], i32 2147483643)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%a = add nsw i32 %x, -3
%c = icmp slt i32 %a, 2147483643
@@ -1222,8 +1155,8 @@ define i32 @add_smin_constant_limit(i32 %x) {
define i32 @add_smin_simplify(i32 %x) {
; CHECK-LABEL: @add_smin_simplify(
-; CHECK-NEXT: [[R:%.*]] = add nsw i32 [[X:%.*]], -3
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[A:%.*]] = add nsw i32 [[X:%.*]], -3
+; CHECK-NEXT: ret i32 [[A]]
;
%a = add nsw i32 %x, -3
%c = icmp slt i32 %a, 2147483644
@@ -1250,9 +1183,8 @@ define i32 @add_smin_simplify2(i32 %x) {
define i32 @add_smin_wrong_pred(i32 %x) {
; CHECK-LABEL: @add_smin_wrong_pred(
; CHECK-NEXT: [[A:%.*]] = add nsw i32 [[X:%.*]], 15
-; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[A]], 42
-; CHECK-NEXT: [[R:%.*]] = select i1 [[C]], i32 [[A]], i32 42
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[A]], i32 42)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%a = add nsw i32 %x, 15
%c = icmp ult i32 %a, 42
@@ -1265,9 +1197,8 @@ define i32 @add_smin_wrong_pred(i32 %x) {
define i32 @add_smin_wrong_wrap(i32 %x) {
; CHECK-LABEL: @add_smin_wrong_wrap(
; CHECK-NEXT: [[A:%.*]] = add nuw i32 [[X:%.*]], 15
-; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[A]], 42
-; CHECK-NEXT: [[R:%.*]] = select i1 [[C]], i32 [[A]], i32 42
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[A]], i32 42)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%a = add nuw i32 %x, 15
%c = icmp slt i32 %a, 42
@@ -1281,9 +1212,8 @@ define i32 @add_smin_extra_use(i32 %x, i32* %p) {
; CHECK-LABEL: @add_smin_extra_use(
; CHECK-NEXT: [[A:%.*]] = add nsw i32 [[X:%.*]], 15
; CHECK-NEXT: store i32 [[A]], i32* [[P:%.*]], align 4
-; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[A]], 42
-; CHECK-NEXT: [[R:%.*]] = select i1 [[C]], i32 [[A]], i32 42
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[A]], i32 42)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%a = add nsw i32 %x, 15
store i32 %a, i32* %p
@@ -1294,10 +1224,9 @@ define i32 @add_smin_extra_use(i32 %x, i32* %p) {
define <2 x i16> @add_smin_vec(<2 x i16> %x) {
; CHECK-LABEL: @add_smin_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i16> [[X:%.*]], <i16 225, i16 225>
-; CHECK-NEXT: [[TMP2:%.*]] = select <2 x i1> [[TMP1]], <2 x i16> [[X]], <2 x i16> <i16 225, i16 225>
-; CHECK-NEXT: [[R:%.*]] = add nsw <2 x i16> [[TMP2]], <i16 15, i16 15>
-; CHECK-NEXT: ret <2 x i16> [[R]]
+; CHECK-NEXT: [[A:%.*]] = add nsw <2 x i16> [[X:%.*]], <i16 15, i16 15>
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i16> @llvm.smin.v2i16(<2 x i16> [[A]], <2 x i16> <i16 240, i16 240>)
+; CHECK-NEXT: ret <2 x i16> [[TMP1]]
;
%a = add nsw <2 x i16> %x, <i16 15, i16 15>
%c = icmp slt <2 x i16> %a, <i16 240, i16 240>
@@ -1307,10 +1236,9 @@ define <2 x i16> @add_smin_vec(<2 x i16> %x) {
define i37 @add_smax(i37 %x) {
; CHECK-LABEL: @add_smax(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i37 [[X:%.*]], 37
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i37 [[X]], i37 37
-; CHECK-NEXT: [[R:%.*]] = add nuw nsw i37 [[TMP2]], 5
-; CHECK-NEXT: ret i37 [[R]]
+; CHECK-NEXT: [[A:%.*]] = add nsw i37 [[X:%.*]], 5
+; CHECK-NEXT: [[TMP1:%.*]] = call i37 @llvm.smax.i37(i37 [[A]], i37 42)
+; CHECK-NEXT: ret i37 [[TMP1]]
;
%a = add nsw i37 %x, 5
%c = icmp sgt i37 %a, 42
@@ -1320,10 +1248,9 @@ define i37 @add_smax(i37 %x) {
define i8 @add_smax_constant_limit(i8 %x) {
; CHECK-LABEL: @add_smax_constant_limit(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i8 [[X:%.*]], -127
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i8 [[X]], i8 -127
-; CHECK-NEXT: [[R:%.*]] = add nsw i8 [[TMP2]], 125
-; CHECK-NEXT: ret i8 [[R]]
+; CHECK-NEXT: [[A:%.*]] = add nsw i8 [[X:%.*]], 125
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.smax.i8(i8 [[A]], i8 -2)
+; CHECK-NEXT: ret i8 [[TMP1]]
;
%a = add nsw i8 %x, 125
%c = icmp sgt i8 %a, -2
@@ -1336,8 +1263,8 @@ define i8 @add_smax_constant_limit(i8 %x) {
define i8 @add_smax_simplify(i8 %x) {
; CHECK-LABEL: @add_smax_simplify(
-; CHECK-NEXT: [[R:%.*]] = add nsw i8 [[X:%.*]], 126
-; CHECK-NEXT: ret i8 [[R]]
+; CHECK-NEXT: [[A:%.*]] = add nsw i8 [[X:%.*]], 126
+; CHECK-NEXT: ret i8 [[A]]
;
%a = add nsw i8 %x, 126
%c = icmp sgt i8 %a, -2
@@ -1364,9 +1291,8 @@ define i8 @add_smax_simplify2(i8 %x) {
define i32 @add_smax_wrong_pred(i32 %x) {
; CHECK-LABEL: @add_smax_wrong_pred(
; CHECK-NEXT: [[A:%.*]] = add nsw i32 [[X:%.*]], 15
-; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[A]], 42
-; CHECK-NEXT: [[R:%.*]] = select i1 [[C]], i32 [[A]], i32 42
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[A]], i32 42)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%a = add nsw i32 %x, 15
%c = icmp ugt i32 %a, 42
@@ -1379,9 +1305,8 @@ define i32 @add_smax_wrong_pred(i32 %x) {
define i32 @add_smax_wrong_wrap(i32 %x) {
; CHECK-LABEL: @add_smax_wrong_wrap(
; CHECK-NEXT: [[A:%.*]] = add nuw i32 [[X:%.*]], 15
-; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[A]], 42
-; CHECK-NEXT: [[R:%.*]] = select i1 [[C]], i32 [[A]], i32 42
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[A]], i32 42)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%a = add nuw i32 %x, 15
%c = icmp sgt i32 %a, 42
@@ -1395,9 +1320,8 @@ define i32 @add_smax_extra_use(i32 %x, i32* %p) {
; CHECK-LABEL: @add_smax_extra_use(
; CHECK-NEXT: [[A:%.*]] = add nsw i32 [[X:%.*]], 15
; CHECK-NEXT: store i32 [[A]], i32* [[P:%.*]], align 4
-; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[A]], 42
-; CHECK-NEXT: [[R:%.*]] = select i1 [[C]], i32 [[A]], i32 42
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[A]], i32 42)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%a = add nsw i32 %x, 15
store i32 %a, i32* %p
@@ -1408,10 +1332,9 @@ define i32 @add_smax_extra_use(i32 %x, i32* %p) {
define <2 x i33> @add_smax_vec(<2 x i33> %x) {
; CHECK-LABEL: @add_smax_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt <2 x i33> [[X:%.*]], <i33 235, i33 235>
-; CHECK-NEXT: [[TMP2:%.*]] = select <2 x i1> [[TMP1]], <2 x i33> [[X]], <2 x i33> <i33 235, i33 235>
-; CHECK-NEXT: [[R:%.*]] = add nuw nsw <2 x i33> [[TMP2]], <i33 5, i33 5>
-; CHECK-NEXT: ret <2 x i33> [[R]]
+; CHECK-NEXT: [[A:%.*]] = add nsw <2 x i33> [[X:%.*]], <i33 5, i33 5>
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i33> @llvm.smax.v2i33(<2 x i33> [[A]], <2 x i33> <i33 240, i33 240>)
+; CHECK-NEXT: ret <2 x i33> [[TMP1]]
;
%a = add nsw <2 x i33> %x, <i33 5, i33 5>
%c = icmp sgt <2 x i33> %a, <i33 240, i33 240>
@@ -1421,10 +1344,11 @@ define <2 x i33> @add_smax_vec(<2 x i33> %x) {
define i8 @PR14613_smin(i8 %x) {
; CHECK-LABEL: @PR14613_smin(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i8 [[X:%.*]], 40
-; CHECK-NEXT: [[X_OP:%.*]] = add i8 [[X]], 15
-; CHECK-NEXT: [[U7:%.*]] = select i1 [[TMP1]], i8 [[X_OP]], i8 55
-; CHECK-NEXT: ret i8 [[U7]]
+; CHECK-NEXT: [[U4:%.*]] = sext i8 [[X:%.*]] to i32
+; CHECK-NEXT: [[U5:%.*]] = add nuw nsw i32 [[U4]], 15
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[U5]], i32 55)
+; CHECK-NEXT: [[R:%.*]] = trunc i32 [[TMP1]] to i8
+; CHECK-NEXT: ret i8 [[R]]
;
%u4 = sext i8 %x to i32
%u5 = add nuw nsw i32 %u4, 15
@@ -1436,10 +1360,11 @@ define i8 @PR14613_smin(i8 %x) {
define i8 @PR14613_smax(i8 %x) {
; CHECK-LABEL: @PR14613_smax(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i8 [[X:%.*]], 40
-; CHECK-NEXT: [[X_OP:%.*]] = add i8 [[X]], 15
-; CHECK-NEXT: [[U7:%.*]] = select i1 [[TMP1]], i8 [[X_OP]], i8 55
-; CHECK-NEXT: ret i8 [[U7]]
+; CHECK-NEXT: [[U4:%.*]] = sext i8 [[X:%.*]] to i32
+; CHECK-NEXT: [[U5:%.*]] = add nuw nsw i32 [[U4]], 15
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[U5]], i32 55)
+; CHECK-NEXT: [[R:%.*]] = trunc i32 [[TMP1]] to i8
+; CHECK-NEXT: ret i8 [[R]]
;
%u4 = sext i8 %x to i32
%u5 = add nuw nsw i32 %u4, 15
diff --git a/llvm/test/Transforms/InstCombine/minmax-fp.ll b/llvm/test/Transforms/InstCombine/minmax-fp.ll
index 680fca6d43b3..4fbc13703824 100644
--- a/llvm/test/Transforms/InstCombine/minmax-fp.ll
+++ b/llvm/test/Transforms/InstCombine/minmax-fp.ll
@@ -244,9 +244,8 @@ define double @t16(i32 %x) {
define double @t17(i32 %x) {
; CHECK-LABEL: @t17(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[X:%.*]], 2
-; CHECK-NEXT: [[SEL1:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 2
-; CHECK-NEXT: [[TMP2:%.*]] = sitofp i32 [[SEL1]] to double
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 2)
+; CHECK-NEXT: [[TMP2:%.*]] = sitofp i32 [[TMP1]] to double
; CHECK-NEXT: ret double [[TMP2]]
;
%cmp = icmp sgt i32 %x, 2
diff --git a/llvm/test/Transforms/InstCombine/minmax-of-minmax.ll b/llvm/test/Transforms/InstCombine/minmax-of-minmax.ll
index 58f2099e4367..b921685d53e8 100644
--- a/llvm/test/Transforms/InstCombine/minmax-of-minmax.ll
+++ b/llvm/test/Transforms/InstCombine/minmax-of-minmax.ll
@@ -3,9 +3,8 @@
define i32 @smax_of_smax_smin_commute0(i32 %x, i32 %y) {
; CHECK-LABEL: @smax_of_smax_smin_commute0(
-; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[Y:%.*]], [[X:%.*]]
-; CHECK-NEXT: [[MAX:%.*]] = select i1 [[CMP2]], i32 [[X]], i32 [[Y]]
-; CHECK-NEXT: ret i32 [[MAX]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[Y:%.*]], i32 [[X:%.*]])
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%cmp1 = icmp slt i32 %x, %y
%min = select i1 %cmp1, i32 %x, i32 %y
@@ -18,9 +17,8 @@ define i32 @smax_of_smax_smin_commute0(i32 %x, i32 %y) {
define i32 @smax_of_smax_smin_commute1(i32 %x, i32 %y) {
; CHECK-LABEL: @smax_of_smax_smin_commute1(
-; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[MAX:%.*]] = select i1 [[CMP2]], i32 [[X]], i32 [[Y]]
-; CHECK-NEXT: ret i32 [[MAX]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 [[Y:%.*]])
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%cmp1 = icmp sgt i32 %x, %y
%min = select i1 %cmp1, i32 %y, i32 %x
@@ -33,9 +31,8 @@ define i32 @smax_of_smax_smin_commute1(i32 %x, i32 %y) {
define i32 @smax_of_smax_smin_commute2(i32 %x, i32 %y) {
; CHECK-LABEL: @smax_of_smax_smin_commute2(
-; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[Y:%.*]], [[X:%.*]]
-; CHECK-NEXT: [[MAX:%.*]] = select i1 [[CMP2]], i32 [[X]], i32 [[Y]]
-; CHECK-NEXT: ret i32 [[MAX]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[Y:%.*]], i32 [[X:%.*]])
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%cmp1 = icmp slt i32 %x, %y
%min = select i1 %cmp1, i32 %x, i32 %y
@@ -48,9 +45,8 @@ define i32 @smax_of_smax_smin_commute2(i32 %x, i32 %y) {
define <2 x i32> @smax_of_smax_smin_commute3(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @smax_of_smax_smin_commute3(
-; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt <2 x i32> [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[MAX:%.*]] = select <2 x i1> [[CMP2]], <2 x i32> [[X]], <2 x i32> [[Y]]
-; CHECK-NEXT: ret <2 x i32> [[MAX]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smax.v2i32(<2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]])
+; CHECK-NEXT: ret <2 x i32> [[TMP1]]
;
%cmp1 = icmp sgt <2 x i32> %x, %y
%min = select <2 x i1> %cmp1, <2 x i32> %y, <2 x i32> %x
@@ -63,9 +59,8 @@ define <2 x i32> @smax_of_smax_smin_commute3(<2 x i32> %x, <2 x i32> %y) {
define i32 @smin_of_smin_smax_commute0(i32 %x, i32 %y) {
; CHECK-LABEL: @smin_of_smin_smax_commute0(
-; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[Y:%.*]], [[X:%.*]]
-; CHECK-NEXT: [[MIN:%.*]] = select i1 [[CMP2]], i32 [[X]], i32 [[Y]]
-; CHECK-NEXT: ret i32 [[MIN]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[Y:%.*]], i32 [[X:%.*]])
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%cmp1 = icmp sgt i32 %x, %y
%max = select i1 %cmp1, i32 %x, i32 %y
@@ -78,9 +73,8 @@ define i32 @smin_of_smin_smax_commute0(i32 %x, i32 %y) {
define i32 @smin_of_smin_smax_commute1(i32 %x, i32 %y) {
; CHECK-LABEL: @smin_of_smin_smax_commute1(
-; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[MIN:%.*]] = select i1 [[CMP2]], i32 [[X]], i32 [[Y]]
-; CHECK-NEXT: ret i32 [[MIN]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 [[Y:%.*]])
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%cmp1 = icmp slt i32 %x, %y
%max = select i1 %cmp1, i32 %y, i32 %x
@@ -93,9 +87,8 @@ define i32 @smin_of_smin_smax_commute1(i32 %x, i32 %y) {
define <2 x i32> @smin_of_smin_smax_commute2(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @smin_of_smin_smax_commute2(
-; CHECK-NEXT: [[CMP2:%.*]] = icmp slt <2 x i32> [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[MIN:%.*]] = select <2 x i1> [[CMP2]], <2 x i32> [[X]], <2 x i32> [[Y]]
-; CHECK-NEXT: ret <2 x i32> [[MIN]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]])
+; CHECK-NEXT: ret <2 x i32> [[TMP1]]
;
%cmp1 = icmp sgt <2 x i32> %x, %y
%max = select <2 x i1> %cmp1, <2 x i32> %x, <2 x i32> %y
@@ -108,9 +101,8 @@ define <2 x i32> @smin_of_smin_smax_commute2(<2 x i32> %x, <2 x i32> %y) {
define i32 @smin_of_smin_smax_commute3(i32 %x, i32 %y) {
; CHECK-LABEL: @smin_of_smin_smax_commute3(
-; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[Y:%.*]], [[X:%.*]]
-; CHECK-NEXT: [[MIN:%.*]] = select i1 [[CMP2]], i32 [[X]], i32 [[Y]]
-; CHECK-NEXT: ret i32 [[MIN]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[Y:%.*]], i32 [[X:%.*]])
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%cmp1 = icmp slt i32 %x, %y
%max = select i1 %cmp1, i32 %y, i32 %x
@@ -123,9 +115,8 @@ define i32 @smin_of_smin_smax_commute3(i32 %x, i32 %y) {
define i32 @umax_of_umax_umin_commute0(i32 %x, i32 %y) {
; CHECK-LABEL: @umax_of_umax_umin_commute0(
-; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[Y:%.*]], [[X:%.*]]
-; CHECK-NEXT: [[MAX:%.*]] = select i1 [[CMP2]], i32 [[X]], i32 [[Y]]
-; CHECK-NEXT: ret i32 [[MAX]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[Y:%.*]], i32 [[X:%.*]])
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%cmp1 = icmp ult i32 %x, %y
%min = select i1 %cmp1, i32 %x, i32 %y
@@ -138,9 +129,8 @@ define i32 @umax_of_umax_umin_commute0(i32 %x, i32 %y) {
define i32 @umax_of_umax_umin_commute1(i32 %x, i32 %y) {
; CHECK-LABEL: @umax_of_umax_umin_commute1(
-; CHECK-NEXT: [[CMP2:%.*]] = icmp ugt i32 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[MAX:%.*]] = select i1 [[CMP2]], i32 [[X]], i32 [[Y]]
-; CHECK-NEXT: ret i32 [[MAX]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 [[Y:%.*]])
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%cmp1 = icmp ugt i32 %x, %y
%min = select i1 %cmp1, i32 %y, i32 %x
@@ -153,9 +143,8 @@ define i32 @umax_of_umax_umin_commute1(i32 %x, i32 %y) {
define i32 @umax_of_umax_umin_commute2(i32 %x, i32 %y) {
; CHECK-LABEL: @umax_of_umax_umin_commute2(
-; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[Y:%.*]], [[X:%.*]]
-; CHECK-NEXT: [[MAX:%.*]] = select i1 [[CMP2]], i32 [[X]], i32 [[Y]]
-; CHECK-NEXT: ret i32 [[MAX]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[Y:%.*]], i32 [[X:%.*]])
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%cmp1 = icmp ult i32 %x, %y
%min = select i1 %cmp1, i32 %x, i32 %y
@@ -168,9 +157,8 @@ define i32 @umax_of_umax_umin_commute2(i32 %x, i32 %y) {
define <2 x i32> @umax_of_umax_umin_commute3(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @umax_of_umax_umin_commute3(
-; CHECK-NEXT: [[CMP2:%.*]] = icmp ugt <2 x i32> [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[MAX:%.*]] = select <2 x i1> [[CMP2]], <2 x i32> [[X]], <2 x i32> [[Y]]
-; CHECK-NEXT: ret <2 x i32> [[MAX]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.umax.v2i32(<2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]])
+; CHECK-NEXT: ret <2 x i32> [[TMP1]]
;
%cmp1 = icmp ugt <2 x i32> %x, %y
%min = select <2 x i1> %cmp1, <2 x i32> %y, <2 x i32> %x
@@ -183,9 +171,8 @@ define <2 x i32> @umax_of_umax_umin_commute3(<2 x i32> %x, <2 x i32> %y) {
define i32 @umin_of_umin_umax_commute0(i32 %x, i32 %y) {
; CHECK-LABEL: @umin_of_umin_umax_commute0(
-; CHECK-NEXT: [[CMP2:%.*]] = icmp ugt i32 [[Y:%.*]], [[X:%.*]]
-; CHECK-NEXT: [[MIN:%.*]] = select i1 [[CMP2]], i32 [[X]], i32 [[Y]]
-; CHECK-NEXT: ret i32 [[MIN]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[Y:%.*]], i32 [[X:%.*]])
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%cmp1 = icmp ugt i32 %x, %y
%max = select i1 %cmp1, i32 %x, i32 %y
@@ -198,9 +185,8 @@ define i32 @umin_of_umin_umax_commute0(i32 %x, i32 %y) {
define i32 @umin_of_umin_umax_commute1(i32 %x, i32 %y) {
; CHECK-LABEL: @umin_of_umin_umax_commute1(
-; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[MIN:%.*]] = select i1 [[CMP2]], i32 [[X]], i32 [[Y]]
-; CHECK-NEXT: ret i32 [[MIN]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 [[Y:%.*]])
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%cmp1 = icmp ult i32 %x, %y
%max = select i1 %cmp1, i32 %y, i32 %x
@@ -213,9 +199,8 @@ define i32 @umin_of_umin_umax_commute1(i32 %x, i32 %y) {
define <2 x i32> @umin_of_umin_umax_commute2(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @umin_of_umin_umax_commute2(
-; CHECK-NEXT: [[CMP2:%.*]] = icmp ult <2 x i32> [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[MIN:%.*]] = select <2 x i1> [[CMP2]], <2 x i32> [[X]], <2 x i32> [[Y]]
-; CHECK-NEXT: ret <2 x i32> [[MIN]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.umin.v2i32(<2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]])
+; CHECK-NEXT: ret <2 x i32> [[TMP1]]
;
%cmp1 = icmp ugt <2 x i32> %x, %y
%max = select <2 x i1> %cmp1, <2 x i32> %x, <2 x i32> %y
@@ -228,9 +213,8 @@ define <2 x i32> @umin_of_umin_umax_commute2(<2 x i32> %x, <2 x i32> %y) {
define i32 @umin_of_umin_umax_commute3(i32 %x, i32 %y) {
; CHECK-LABEL: @umin_of_umin_umax_commute3(
-; CHECK-NEXT: [[CMP2:%.*]] = icmp ugt i32 [[Y:%.*]], [[X:%.*]]
-; CHECK-NEXT: [[MIN:%.*]] = select i1 [[CMP2]], i32 [[X]], i32 [[Y]]
-; CHECK-NEXT: ret i32 [[MIN]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[Y:%.*]], i32 [[X:%.*]])
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%cmp1 = icmp ult i32 %x, %y
%max = select i1 %cmp1, i32 %y, i32 %x
@@ -245,13 +229,8 @@ define i32 @umin_of_umin_umax_commute3(i32 %x, i32 %y) {
define i32 @umin_of_smin_umax_wrong_pattern(i32 %x, i32 %y) {
; CHECK-LABEL: @umin_of_smin_umax_wrong_pattern(
-; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt i32 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[MAX:%.*]] = select i1 [[CMP1]], i32 [[X]], i32 [[Y]]
-; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[Y]], [[X]]
-; CHECK-NEXT: [[MIN:%.*]] = select i1 [[CMP2]], i32 [[X]], i32 [[Y]]
-; CHECK-NEXT: [[CMP3:%.*]] = icmp ugt i32 [[MAX]], [[MIN]]
-; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP3]], i32 [[MIN]], i32 [[MAX]]
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[Y:%.*]], i32 [[X:%.*]])
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%cmp1 = icmp ugt i32 %x, %y
%max = select i1 %cmp1, i32 %x, i32 %y
@@ -266,13 +245,10 @@ define i32 @umin_of_smin_umax_wrong_pattern(i32 %x, i32 %y) {
define i32 @smin_of_umin_umax_wrong_pattern2(i32 %x, i32 %y) {
; CHECK-LABEL: @smin_of_umin_umax_wrong_pattern2(
-; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[MAX:%.*]] = select i1 [[CMP1]], i32 [[Y]], i32 [[X]]
-; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[X]], [[Y]]
-; CHECK-NEXT: [[MIN:%.*]] = select i1 [[CMP2]], i32 [[X]], i32 [[Y]]
-; CHECK-NEXT: [[CMP3:%.*]] = icmp sgt i32 [[MAX]], [[MIN]]
-; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP3]], i32 [[MIN]], i32 [[MAX]]
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 [[Y:%.*]])
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umin.i32(i32 [[X]], i32 [[Y]])
+; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.smin.i32(i32 [[TMP1]], i32 [[TMP2]])
+; CHECK-NEXT: ret i32 [[TMP3]]
;
%cmp1 = icmp ult i32 %x, %y
%max = select i1 %cmp1, i32 %y, i32 %x
@@ -287,13 +263,8 @@ define i32 @smin_of_umin_umax_wrong_pattern2(i32 %x, i32 %y) {
define <2 x i32> @umin_of_umin_umax_wrong_operand(<2 x i32> %x, <2 x i32> %y, <2 x i32> %z) {
; CHECK-LABEL: @umin_of_umin_umax_wrong_operand(
-; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt <2 x i32> [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[MAX:%.*]] = select <2 x i1> [[CMP1]], <2 x i32> [[X]], <2 x i32> [[Y]]
-; CHECK-NEXT: [[CMP2:%.*]] = icmp ult <2 x i32> [[X]], [[Z:%.*]]
-; CHECK-NEXT: [[MIN:%.*]] = select <2 x i1> [[CMP2]], <2 x i32> [[X]], <2 x i32> [[Z]]
-; CHECK-NEXT: [[CMP3:%.*]] = icmp ult <2 x i32> [[MIN]], [[MAX]]
-; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[CMP3]], <2 x i32> [[MIN]], <2 x i32> [[MAX]]
-; CHECK-NEXT: ret <2 x i32> [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.umin.v2i32(<2 x i32> [[X:%.*]], <2 x i32> [[Z:%.*]])
+; CHECK-NEXT: ret <2 x i32> [[TMP1]]
;
%cmp1 = icmp ugt <2 x i32> %x, %y
%max = select <2 x i1> %cmp1, <2 x i32> %x, <2 x i32> %y
@@ -308,13 +279,8 @@ define <2 x i32> @umin_of_umin_umax_wrong_operand(<2 x i32> %x, <2 x i32> %y, <2
define i32 @umin_of_umin_umax_wrong_operand2(i32 %x, i32 %y, i32 %z) {
; CHECK-LABEL: @umin_of_umin_umax_wrong_operand2(
-; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[X:%.*]], [[Z:%.*]]
-; CHECK-NEXT: [[MAX:%.*]] = select i1 [[CMP1]], i32 [[Z]], i32 [[X]]
-; CHECK-NEXT: [[CMP2:%.*]] = icmp ugt i32 [[Y:%.*]], [[X]]
-; CHECK-NEXT: [[MIN:%.*]] = select i1 [[CMP2]], i32 [[X]], i32 [[Y]]
-; CHECK-NEXT: [[CMP3:%.*]] = icmp ult i32 [[MIN]], [[MAX]]
-; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP3]], i32 [[MIN]], i32 [[MAX]]
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[Y:%.*]], i32 [[X:%.*]])
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%cmp1 = icmp ult i32 %x, %z
%max = select i1 %cmp1, i32 %z, i32 %x
diff --git a/llvm/test/Transforms/InstCombine/pr21199.ll b/llvm/test/Transforms/InstCombine/pr21199.ll
index f9fdeb8881b8..282029262375 100644
--- a/llvm/test/Transforms/InstCombine/pr21199.ll
+++ b/llvm/test/Transforms/InstCombine/pr21199.ll
@@ -9,15 +9,14 @@ declare void @f(i32)
define void @test(i32 %len) {
; CHECK-LABEL: @test(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[LEN:%.*]], 8
-; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[LEN]], i32 8
-; CHECK-NEXT: [[CMP11_NOT:%.*]] = icmp eq i32 [[COND]], 0
+; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.umin.i32(i32 [[LEN:%.*]], i32 8)
+; CHECK-NEXT: [[CMP11_NOT:%.*]] = icmp eq i32 [[TMP0]], 0
; CHECK-NEXT: br i1 [[CMP11_NOT]], label [[FOR_END:%.*]], label [[FOR_BODY:%.*]]
; CHECK: for.body:
; CHECK-NEXT: [[I_02:%.*]] = phi i32 [ [[INC:%.*]], [[FOR_BODY]] ], [ 0, [[ENTRY:%.*]] ]
-; CHECK-NEXT: tail call void @f(i32 [[COND]])
+; CHECK-NEXT: tail call void @f(i32 [[TMP0]])
; CHECK-NEXT: [[INC]] = add i32 [[I_02]], 1
-; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[INC]], [[COND]]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[INC]], [[TMP0]]
; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_BODY]], label [[FOR_END]]
; CHECK: for.end:
; CHECK-NEXT: ret void
diff --git a/llvm/test/Transforms/InstCombine/pr27236.ll b/llvm/test/Transforms/InstCombine/pr27236.ll
index f55ee0bffd8d..34080757c072 100644
--- a/llvm/test/Transforms/InstCombine/pr27236.ll
+++ b/llvm/test/Transforms/InstCombine/pr27236.ll
@@ -3,10 +3,9 @@
define float @test1(i32 %scale) {
; CHECK-LABEL: @test1(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[SCALE:%.*]], 1
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[SCALE]], i32 1
-; CHECK-NEXT: [[TMP3:%.*]] = sitofp i32 [[TMP2]] to float
-; CHECK-NEXT: ret float [[TMP3]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[SCALE:%.*]], i32 1)
+; CHECK-NEXT: [[TMP2:%.*]] = sitofp i32 [[TMP1]] to float
+; CHECK-NEXT: ret float [[TMP2]]
;
%1 = icmp sgt i32 1, %scale
%2 = select i1 %1, i32 1, i32 %scale
diff --git a/llvm/test/Transforms/InstCombine/pr38897.ll b/llvm/test/Transforms/InstCombine/pr38897.ll
index 1eb2cb9a4677..608ecb437bfa 100644
--- a/llvm/test/Transforms/InstCombine/pr38897.ll
+++ b/llvm/test/Transforms/InstCombine/pr38897.ll
@@ -6,12 +6,11 @@ define i32 @sharpening(i32 %b340, i1 %c, i1 %d, i32 %e, i32 %f, i32 %g, i32 %h)
; CHECK-NEXT: entry:
; CHECK-NEXT: [[SMAX58:%.*]] = select i1 [[C:%.*]], i32 [[E:%.*]], i32 [[F:%.*]]
; CHECK-NEXT: [[SMAX59:%.*]] = select i1 [[D:%.*]], i32 [[G:%.*]], i32 [[H:%.*]]
-; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[SMAX59]], 1
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[TMP0]], -1
-; CHECK-NEXT: [[TMP12:%.*]] = select i1 [[TMP1]], i32 [[TMP0]], i32 -1
-; CHECK-NEXT: [[TMP13:%.*]] = icmp sgt i32 [[SMAX58]], [[TMP12]]
-; CHECK-NEXT: [[SMAX61:%.*]] = select i1 [[TMP13]], i32 [[SMAX58]], i32 [[TMP12]]
-; CHECK-NEXT: [[TMP14:%.*]] = xor i32 [[SMAX61]], -1
+; CHECK-NEXT: [[TMP10:%.*]] = sub i32 -2, [[SMAX59]]
+; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP10]], i32 0)
+; CHECK-NEXT: [[TMP12:%.*]] = xor i32 [[TMP0]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[SMAX58]], i32 [[TMP12]])
+; CHECK-NEXT: [[TMP14:%.*]] = xor i32 [[TMP1]], -1
; CHECK-NEXT: ret i32 [[TMP14]]
;
entry:
diff --git a/llvm/test/Transforms/InstCombine/pr38915.ll b/llvm/test/Transforms/InstCombine/pr38915.ll
index 22adb9eff775..fd98d663eb1e 100644
--- a/llvm/test/Transforms/InstCombine/pr38915.ll
+++ b/llvm/test/Transforms/InstCombine/pr38915.ll
@@ -3,13 +3,12 @@
define i32 @PR38915(i32 %x, i32 %y, i32 %z) {
; CHECK-LABEL: @PR38915(
-; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], -1
-; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[Y:%.*]], -1
-; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i32 [[TMP1]], [[TMP2]]
-; CHECK-NEXT: [[M1N:%.*]] = select i1 [[TMP3]], i32 [[TMP1]], i32 [[TMP2]]
-; CHECK-NEXT: [[C2:%.*]] = icmp sgt i32 [[M1N]], [[Z:%.*]]
-; CHECK-NEXT: [[M2:%.*]] = select i1 [[C2]], i32 [[M1N]], i32 [[Z]]
-; CHECK-NEXT: [[M2N:%.*]] = xor i32 [[M2]], -1
+; CHECK-NEXT: [[XN:%.*]] = sub i32 0, [[X:%.*]]
+; CHECK-NEXT: [[YN:%.*]] = sub i32 0, [[Y:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[XN]], i32 [[YN]])
+; CHECK-NEXT: [[M1N:%.*]] = xor i32 [[TMP1]], -1
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smax.i32(i32 [[M1N]], i32 [[Z:%.*]])
+; CHECK-NEXT: [[M2N:%.*]] = xor i32 [[TMP2]], -1
; CHECK-NEXT: ret i32 [[M2N]]
;
%xn = sub i32 0, %x
diff --git a/llvm/test/Transforms/InstCombine/pr44541.ll b/llvm/test/Transforms/InstCombine/pr44541.ll
index a009c62394ad..db57ea7acabd 100644
--- a/llvm/test/Transforms/InstCombine/pr44541.ll
+++ b/llvm/test/Transforms/InstCombine/pr44541.ll
@@ -13,9 +13,8 @@ define i16 @passthru(i16 returned %x) {
define i16 @test(i16 %arg) {
; CHECK-LABEL: @test(
; CHECK-NEXT: [[ZERO:%.*]] = call i16 @passthru(i16 0)
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i16 [[ARG:%.*]], 0
-; CHECK-NEXT: [[RET:%.*]] = select i1 [[TMP1]], i16 [[ARG]], i16 0
-; CHECK-NEXT: ret i16 [[RET]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.smax.i16(i16 [[ARG:%.*]], i16 0)
+; CHECK-NEXT: ret i16 [[TMP1]]
;
%zero = call i16 @passthru(i16 0)
%sub = sub nuw nsw i16 %arg, %zero
diff --git a/llvm/test/Transforms/InstCombine/pr44835.ll b/llvm/test/Transforms/InstCombine/pr44835.ll
index 46c9fca6bb7a..2081144aa8f5 100644
--- a/llvm/test/Transforms/InstCombine/pr44835.ll
+++ b/llvm/test/Transforms/InstCombine/pr44835.ll
@@ -8,8 +8,7 @@ define void @test(i32* %p, i32* %p2) {
; CHECK-LABEL: @test(
; CHECK-NEXT: [[V:%.*]] = load i32, i32* [[P:%.*]], align 4
; CHECK-NEXT: [[V2:%.*]] = load i32, i32* [[P2:%.*]], align 4
-; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[V2]], [[V]]
-; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[CMP]], i32 [[V2]], i32 [[V]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[V2]], i32 [[V]])
; CHECK-NEXT: store i32 [[TMP1]], i32* [[P]], align 4
; CHECK-NEXT: ret void
;
diff --git a/llvm/test/Transforms/InstCombine/preserve-sminmax.ll b/llvm/test/Transforms/InstCombine/preserve-sminmax.ll
index d04816e83711..3029e5223f61 100644
--- a/llvm/test/Transforms/InstCombine/preserve-sminmax.ll
+++ b/llvm/test/Transforms/InstCombine/preserve-sminmax.ll
@@ -10,9 +10,8 @@
define i32 @foo(i32 %h) {
; CHECK-LABEL: @foo(
; CHECK-NEXT: [[SD:%.*]] = sdiv i32 [[H:%.*]], 2
-; CHECK-NEXT: [[T:%.*]] = icmp slt i32 [[SD]], 1
-; CHECK-NEXT: [[R:%.*]] = select i1 [[T]], i32 [[SD]], i32 1
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[SD]], i32 1)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%sd = sdiv i32 %h, 2
%t = icmp slt i32 %sd, 1
@@ -23,9 +22,8 @@ define i32 @foo(i32 %h) {
define i32 @bar(i32 %h) {
; CHECK-LABEL: @bar(
; CHECK-NEXT: [[SD:%.*]] = sdiv i32 [[H:%.*]], 2
-; CHECK-NEXT: [[T:%.*]] = icmp sgt i32 [[SD]], 1
-; CHECK-NEXT: [[R:%.*]] = select i1 [[T]], i32 [[SD]], i32 1
-; CHECK-NEXT: ret i32 [[R]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[SD]], i32 1)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%sd = sdiv i32 %h, 2
%t = icmp sgt i32 %sd, 1
diff --git a/llvm/test/Transforms/InstCombine/sadd_sat.ll b/llvm/test/Transforms/InstCombine/sadd_sat.ll
index 04dd4f5c038d..388ab628e088 100644
--- a/llvm/test/Transforms/InstCombine/sadd_sat.ll
+++ b/llvm/test/Transforms/InstCombine/sadd_sat.ll
@@ -6,8 +6,13 @@ target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
define i32 @sadd_sat32(i32 %a, i32 %b) {
; CHECK-LABEL: @sadd_sat32(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[B:%.*]], i32 [[A:%.*]])
-; CHECK-NEXT: ret i32 [[TMP0]]
+; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[A:%.*]] to i64
+; CHECK-NEXT: [[CONV1:%.*]] = sext i32 [[B:%.*]] to i64
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[CONV1]], [[CONV]]
+; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.smin.i64(i64 [[ADD]], i64 2147483647)
+; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.smax.i64(i64 [[TMP0]], i64 -2147483648)
+; CHECK-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP1]] to i32
+; CHECK-NEXT: ret i32 [[CONV7]]
;
entry:
%conv = sext i32 %a to i64
@@ -24,8 +29,13 @@ entry:
define i32 @ssub_sat32(i32 %a, i32 %b) {
; CHECK-LABEL: @ssub_sat32(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.ssub.sat.i32(i32 [[A:%.*]], i32 [[B:%.*]])
-; CHECK-NEXT: ret i32 [[TMP0]]
+; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[A:%.*]] to i64
+; CHECK-NEXT: [[CONV1:%.*]] = sext i32 [[B:%.*]] to i64
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i64 [[CONV]], [[CONV1]]
+; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.smin.i64(i64 [[SUB]], i64 2147483647)
+; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.smax.i64(i64 [[TMP0]], i64 -2147483648)
+; CHECK-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP1]] to i32
+; CHECK-NEXT: ret i32 [[CONV7]]
;
entry:
%conv = sext i32 %a to i64
@@ -45,11 +55,9 @@ define i32 @smul_sat32(i32 %a, i32 %b) {
; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[A:%.*]] to i64
; CHECK-NEXT: [[CONV1:%.*]] = sext i32 [[B:%.*]] to i64
; CHECK-NEXT: [[ADD:%.*]] = mul nsw i64 [[CONV1]], [[CONV]]
-; CHECK-NEXT: [[TMP0:%.*]] = icmp slt i64 [[ADD]], 2147483647
-; CHECK-NEXT: [[SPEC_STORE_SELECT:%.*]] = select i1 [[TMP0]], i64 [[ADD]], i64 2147483647
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i64 [[SPEC_STORE_SELECT]], -2147483648
-; CHECK-NEXT: [[SPEC_STORE_SELECT8:%.*]] = select i1 [[TMP1]], i64 [[SPEC_STORE_SELECT]], i64 -2147483648
-; CHECK-NEXT: [[CONV7:%.*]] = trunc i64 [[SPEC_STORE_SELECT8]] to i32
+; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.smin.i64(i64 [[ADD]], i64 2147483647)
+; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.smax.i64(i64 [[TMP0]], i64 -2147483648)
+; CHECK-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP1]] to i32
; CHECK-NEXT: ret i32 [[CONV7]]
;
entry:
@@ -67,8 +75,13 @@ entry:
define signext i16 @sadd_sat16(i16 signext %a, i16 signext %b) {
; CHECK-LABEL: @sadd_sat16(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = call i16 @llvm.sadd.sat.i16(i16 [[B:%.*]], i16 [[A:%.*]])
-; CHECK-NEXT: ret i16 [[TMP0]]
+; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[A:%.*]] to i32
+; CHECK-NEXT: [[CONV1:%.*]] = sext i16 [[B:%.*]] to i32
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV1]], [[CONV]]
+; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.smin.i32(i32 [[ADD]], i32 32767)
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP0]], i32 -32768)
+; CHECK-NEXT: [[CONV9:%.*]] = trunc i32 [[TMP1]] to i16
+; CHECK-NEXT: ret i16 [[CONV9]]
;
entry:
%conv = sext i16 %a to i32
@@ -85,8 +98,13 @@ entry:
define signext i16 @ssub_sat16(i16 signext %a, i16 signext %b) {
; CHECK-LABEL: @ssub_sat16(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = call i16 @llvm.ssub.sat.i16(i16 [[A:%.*]], i16 [[B:%.*]])
-; CHECK-NEXT: ret i16 [[TMP0]]
+; CHECK-NEXT: [[CONV:%.*]] = sext i16 [[A:%.*]] to i32
+; CHECK-NEXT: [[CONV1:%.*]] = sext i16 [[B:%.*]] to i32
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[CONV]], [[CONV1]]
+; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.smin.i32(i32 [[SUB]], i32 32767)
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP0]], i32 -32768)
+; CHECK-NEXT: [[CONV9:%.*]] = trunc i32 [[TMP1]] to i16
+; CHECK-NEXT: ret i16 [[CONV9]]
;
entry:
%conv = sext i16 %a to i32
@@ -103,8 +121,13 @@ entry:
define signext i8 @sadd_sat8(i8 signext %a, i8 signext %b) {
; CHECK-LABEL: @sadd_sat8(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.sadd.sat.i8(i8 [[B:%.*]], i8 [[A:%.*]])
-; CHECK-NEXT: ret i8 [[TMP0]]
+; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[A:%.*]] to i32
+; CHECK-NEXT: [[CONV1:%.*]] = sext i8 [[B:%.*]] to i32
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV1]], [[CONV]]
+; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.smin.i32(i32 [[ADD]], i32 127)
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP0]], i32 -128)
+; CHECK-NEXT: [[CONV9:%.*]] = trunc i32 [[TMP1]] to i8
+; CHECK-NEXT: ret i8 [[CONV9]]
;
entry:
%conv = sext i8 %a to i32
@@ -121,8 +144,13 @@ entry:
define signext i8 @ssub_sat8(i8 signext %a, i8 signext %b) {
; CHECK-LABEL: @ssub_sat8(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.ssub.sat.i8(i8 [[A:%.*]], i8 [[B:%.*]])
-; CHECK-NEXT: ret i8 [[TMP0]]
+; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[A:%.*]] to i32
+; CHECK-NEXT: [[CONV1:%.*]] = sext i8 [[B:%.*]] to i32
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[CONV]], [[CONV1]]
+; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.smin.i32(i32 [[SUB]], i32 127)
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP0]], i32 -128)
+; CHECK-NEXT: [[CONV9:%.*]] = trunc i32 [[TMP1]] to i8
+; CHECK-NEXT: ret i8 [[CONV9]]
;
entry:
%conv = sext i8 %a to i32
@@ -139,8 +167,13 @@ entry:
define signext i64 @sadd_sat64(i64 signext %a, i64 signext %b) {
; CHECK-LABEL: @sadd_sat64(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.sadd.sat.i64(i64 [[B:%.*]], i64 [[A:%.*]])
-; CHECK-NEXT: ret i64 [[TMP0]]
+; CHECK-NEXT: [[CONV:%.*]] = sext i64 [[A:%.*]] to i65
+; CHECK-NEXT: [[CONV1:%.*]] = sext i64 [[B:%.*]] to i65
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i65 [[CONV1]], [[CONV]]
+; CHECK-NEXT: [[TMP0:%.*]] = call i65 @llvm.smin.i65(i65 [[ADD]], i65 9223372036854775807)
+; CHECK-NEXT: [[TMP1:%.*]] = call i65 @llvm.smax.i65(i65 [[TMP0]], i65 -9223372036854775808)
+; CHECK-NEXT: [[CONV9:%.*]] = trunc i65 [[TMP1]] to i64
+; CHECK-NEXT: ret i64 [[CONV9]]
;
entry:
%conv = sext i64 %a to i65
@@ -157,8 +190,13 @@ entry:
define signext i64 @ssub_sat64(i64 signext %a, i64 signext %b) {
; CHECK-LABEL: @ssub_sat64(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.ssub.sat.i64(i64 [[A:%.*]], i64 [[B:%.*]])
-; CHECK-NEXT: ret i64 [[TMP0]]
+; CHECK-NEXT: [[CONV:%.*]] = sext i64 [[A:%.*]] to i65
+; CHECK-NEXT: [[CONV1:%.*]] = sext i64 [[B:%.*]] to i65
+; CHECK-NEXT: [[SUB:%.*]] = sub nsw i65 [[CONV]], [[CONV1]]
+; CHECK-NEXT: [[TMP0:%.*]] = call i65 @llvm.smin.i65(i65 [[SUB]], i65 9223372036854775807)
+; CHECK-NEXT: [[TMP1:%.*]] = call i65 @llvm.smax.i65(i65 [[TMP0]], i65 -9223372036854775808)
+; CHECK-NEXT: [[CONV9:%.*]] = trunc i65 [[TMP1]] to i64
+; CHECK-NEXT: ret i64 [[CONV9]]
;
entry:
%conv = sext i64 %a to i65
@@ -178,11 +216,9 @@ define signext i4 @sadd_sat4(i4 signext %a, i4 signext %b) {
; CHECK-NEXT: [[CONV:%.*]] = sext i4 [[A:%.*]] to i32
; CHECK-NEXT: [[CONV1:%.*]] = sext i4 [[B:%.*]] to i32
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV1]], [[CONV]]
-; CHECK-NEXT: [[TMP0:%.*]] = icmp slt i32 [[ADD]], 7
-; CHECK-NEXT: [[SPEC_STORE_SELECT:%.*]] = select i1 [[TMP0]], i32 [[ADD]], i32 7
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[SPEC_STORE_SELECT]], -8
-; CHECK-NEXT: [[SPEC_STORE_SELECT10:%.*]] = select i1 [[TMP1]], i32 [[SPEC_STORE_SELECT]], i32 -8
-; CHECK-NEXT: [[CONV9:%.*]] = trunc i32 [[SPEC_STORE_SELECT10]] to i4
+; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.smin.i32(i32 [[ADD]], i32 7)
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP0]], i32 -8)
+; CHECK-NEXT: [[CONV9:%.*]] = trunc i32 [[TMP1]] to i4
; CHECK-NEXT: ret i4 [[CONV9]]
;
entry:
@@ -203,11 +239,9 @@ define signext i4 @ssub_sat4(i4 signext %a, i4 signext %b) {
; CHECK-NEXT: [[CONV:%.*]] = sext i4 [[A:%.*]] to i32
; CHECK-NEXT: [[CONV1:%.*]] = sext i4 [[B:%.*]] to i32
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[CONV]], [[CONV1]]
-; CHECK-NEXT: [[TMP0:%.*]] = icmp slt i32 [[SUB]], 7
-; CHECK-NEXT: [[SPEC_STORE_SELECT:%.*]] = select i1 [[TMP0]], i32 [[SUB]], i32 7
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[SPEC_STORE_SELECT]], -8
-; CHECK-NEXT: [[SPEC_STORE_SELECT10:%.*]] = select i1 [[TMP1]], i32 [[SPEC_STORE_SELECT]], i32 -8
-; CHECK-NEXT: [[CONV9:%.*]] = trunc i32 [[SPEC_STORE_SELECT10]] to i4
+; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.smin.i32(i32 [[SUB]], i32 7)
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP0]], i32 -8)
+; CHECK-NEXT: [[CONV9:%.*]] = trunc i32 [[TMP1]] to i4
; CHECK-NEXT: ret i4 [[CONV9]]
;
entry:
@@ -225,8 +259,13 @@ entry:
define <4 x i32> @sadd_satv4i32(<4 x i32> %a, <4 x i32> %b) {
; CHECK-LABEL: @sadd_satv4i32(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.sadd.sat.v4i32(<4 x i32> [[B:%.*]], <4 x i32> [[A:%.*]])
-; CHECK-NEXT: ret <4 x i32> [[TMP0]]
+; CHECK-NEXT: [[CONV:%.*]] = sext <4 x i32> [[A:%.*]] to <4 x i64>
+; CHECK-NEXT: [[CONV1:%.*]] = sext <4 x i32> [[B:%.*]] to <4 x i64>
+; CHECK-NEXT: [[ADD:%.*]] = add nsw <4 x i64> [[CONV1]], [[CONV]]
+; CHECK-NEXT: [[TMP0:%.*]] = call <4 x i64> @llvm.smin.v4i64(<4 x i64> [[ADD]], <4 x i64> <i64 2147483647, i64 2147483647, i64 2147483647, i64 2147483647>)
+; CHECK-NEXT: [[TMP1:%.*]] = call <4 x i64> @llvm.smax.v4i64(<4 x i64> [[TMP0]], <4 x i64> <i64 -2147483648, i64 -2147483648, i64 -2147483648, i64 -2147483648>)
+; CHECK-NEXT: [[CONV7:%.*]] = trunc <4 x i64> [[TMP1]] to <4 x i32>
+; CHECK-NEXT: ret <4 x i32> [[CONV7]]
;
entry:
%conv = sext <4 x i32> %a to <4 x i64>
@@ -243,8 +282,13 @@ entry:
define <4 x i32> @ssub_satv4i32(<4 x i32> %a, <4 x i32> %b) {
; CHECK-LABEL: @ssub_satv4i32(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.ssub.sat.v4i32(<4 x i32> [[B:%.*]], <4 x i32> [[A:%.*]])
-; CHECK-NEXT: ret <4 x i32> [[TMP0]]
+; CHECK-NEXT: [[CONV:%.*]] = sext <4 x i32> [[A:%.*]] to <4 x i64>
+; CHECK-NEXT: [[CONV1:%.*]] = sext <4 x i32> [[B:%.*]] to <4 x i64>
+; CHECK-NEXT: [[ADD:%.*]] = sub nsw <4 x i64> [[CONV1]], [[CONV]]
+; CHECK-NEXT: [[TMP0:%.*]] = call <4 x i64> @llvm.smin.v4i64(<4 x i64> [[ADD]], <4 x i64> <i64 2147483647, i64 2147483647, i64 2147483647, i64 2147483647>)
+; CHECK-NEXT: [[TMP1:%.*]] = call <4 x i64> @llvm.smax.v4i64(<4 x i64> [[TMP0]], <4 x i64> <i64 -2147483648, i64 -2147483648, i64 -2147483648, i64 -2147483648>)
+; CHECK-NEXT: [[CONV7:%.*]] = trunc <4 x i64> [[TMP1]] to <4 x i32>
+; CHECK-NEXT: ret <4 x i32> [[CONV7]]
;
entry:
%conv = sext <4 x i32> %a to <4 x i64>
@@ -262,11 +306,9 @@ define <4 x i32> @sadd_satv4i4(<4 x i32> %a, <4 x i32> %b) {
; CHECK-LABEL: @sadd_satv4i4(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ADD:%.*]] = add <4 x i32> [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[TMP0:%.*]] = icmp slt <4 x i32> [[ADD]], <i32 15, i32 15, i32 15, i32 15>
-; CHECK-NEXT: [[SPEC_STORE_SELECT:%.*]] = select <4 x i1> [[TMP0]], <4 x i32> [[ADD]], <4 x i32> <i32 15, i32 15, i32 15, i32 15>
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt <4 x i32> [[SPEC_STORE_SELECT]], <i32 -16, i32 -16, i32 -16, i32 -16>
-; CHECK-NEXT: [[SPEC_STORE_SELECT8:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[SPEC_STORE_SELECT]], <4 x i32> <i32 -16, i32 -16, i32 -16, i32 -16>
-; CHECK-NEXT: ret <4 x i32> [[SPEC_STORE_SELECT8]]
+; CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.smin.v4i32(<4 x i32> [[ADD]], <4 x i32> <i32 15, i32 15, i32 15, i32 15>)
+; CHECK-NEXT: [[TMP1:%.*]] = call <4 x i32> @llvm.smax.v4i32(<4 x i32> [[TMP0]], <4 x i32> <i32 -16, i32 -16, i32 -16, i32 -16>)
+; CHECK-NEXT: ret <4 x i32> [[TMP1]]
;
entry:
%add = add <4 x i32> %a, %b
@@ -281,11 +323,9 @@ define <4 x i32> @ssub_satv4i4(<4 x i32> %a, <4 x i32> %b) {
; CHECK-LABEL: @ssub_satv4i4(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ADD:%.*]] = sub <4 x i32> [[A:%.*]], [[B:%.*]]
-; CHECK-NEXT: [[TMP0:%.*]] = icmp slt <4 x i32> [[ADD]], <i32 15, i32 15, i32 15, i32 15>
-; CHECK-NEXT: [[SPEC_STORE_SELECT:%.*]] = select <4 x i1> [[TMP0]], <4 x i32> [[ADD]], <4 x i32> <i32 15, i32 15, i32 15, i32 15>
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt <4 x i32> [[SPEC_STORE_SELECT]], <i32 -16, i32 -16, i32 -16, i32 -16>
-; CHECK-NEXT: [[SPEC_STORE_SELECT8:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[SPEC_STORE_SELECT]], <4 x i32> <i32 -16, i32 -16, i32 -16, i32 -16>
-; CHECK-NEXT: ret <4 x i32> [[SPEC_STORE_SELECT8]]
+; CHECK-NEXT: [[TMP0:%.*]] = call <4 x i32> @llvm.smin.v4i32(<4 x i32> [[ADD]], <4 x i32> <i32 15, i32 15, i32 15, i32 15>)
+; CHECK-NEXT: [[TMP1:%.*]] = call <4 x i32> @llvm.smax.v4i32(<4 x i32> [[TMP0]], <4 x i32> <i32 -16, i32 -16, i32 -16, i32 -16>)
+; CHECK-NEXT: ret <4 x i32> [[TMP1]]
;
entry:
%add = sub <4 x i32> %a, %b
@@ -300,10 +340,14 @@ entry:
define i32 @sadd_sat32_extrause_1(i32 %a, i32 %b) {
; CHECK-LABEL: @sadd_sat32_extrause_1(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[B:%.*]], i32 [[A:%.*]])
-; CHECK-NEXT: [[SPEC_STORE_SELECT8:%.*]] = sext i32 [[TMP0]] to i64
-; CHECK-NEXT: call void @use64(i64 [[SPEC_STORE_SELECT8]])
-; CHECK-NEXT: ret i32 [[TMP0]]
+; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[A:%.*]] to i64
+; CHECK-NEXT: [[CONV1:%.*]] = sext i32 [[B:%.*]] to i64
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[CONV1]], [[CONV]]
+; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.smin.i64(i64 [[ADD]], i64 2147483647)
+; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.smax.i64(i64 [[TMP0]], i64 -2147483648)
+; CHECK-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP1]] to i32
+; CHECK-NEXT: call void @use64(i64 [[TMP1]])
+; CHECK-NEXT: ret i32 [[CONV7]]
;
entry:
%conv = sext i32 %a to i64
@@ -324,12 +368,10 @@ define i32 @sadd_sat32_extrause_2(i32 %a, i32 %b) {
; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[A:%.*]] to i64
; CHECK-NEXT: [[CONV1:%.*]] = sext i32 [[B:%.*]] to i64
; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[CONV1]], [[CONV]]
-; CHECK-NEXT: [[TMP0:%.*]] = icmp slt i64 [[ADD]], 2147483647
-; CHECK-NEXT: [[SPEC_STORE_SELECT:%.*]] = select i1 [[TMP0]], i64 [[ADD]], i64 2147483647
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i64 [[SPEC_STORE_SELECT]], -2147483648
-; CHECK-NEXT: [[SPEC_STORE_SELECT8:%.*]] = select i1 [[TMP1]], i64 [[SPEC_STORE_SELECT]], i64 -2147483648
-; CHECK-NEXT: [[CONV7:%.*]] = trunc i64 [[SPEC_STORE_SELECT8]] to i32
-; CHECK-NEXT: call void @use64(i64 [[SPEC_STORE_SELECT]])
+; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.smin.i64(i64 [[ADD]], i64 2147483647)
+; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.smax.i64(i64 [[TMP0]], i64 -2147483648)
+; CHECK-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP1]] to i32
+; CHECK-NEXT: call void @use64(i64 [[TMP0]])
; CHECK-NEXT: ret i32 [[CONV7]]
;
entry:
@@ -351,11 +393,9 @@ define i32 @sadd_sat32_extrause_3(i32 %a, i32 %b) {
; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[A:%.*]] to i64
; CHECK-NEXT: [[CONV1:%.*]] = sext i32 [[B:%.*]] to i64
; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[CONV1]], [[CONV]]
-; CHECK-NEXT: [[TMP0:%.*]] = icmp slt i64 [[ADD]], 2147483647
-; CHECK-NEXT: [[SPEC_STORE_SELECT:%.*]] = select i1 [[TMP0]], i64 [[ADD]], i64 2147483647
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i64 [[SPEC_STORE_SELECT]], -2147483648
-; CHECK-NEXT: [[SPEC_STORE_SELECT8:%.*]] = select i1 [[TMP1]], i64 [[SPEC_STORE_SELECT]], i64 -2147483648
-; CHECK-NEXT: [[CONV7:%.*]] = trunc i64 [[SPEC_STORE_SELECT8]] to i32
+; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.smin.i64(i64 [[ADD]], i64 2147483647)
+; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.smax.i64(i64 [[TMP0]], i64 -2147483648)
+; CHECK-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP1]] to i32
; CHECK-NEXT: call void @use64(i64 [[ADD]])
; CHECK-NEXT: ret i32 [[CONV7]]
;
@@ -378,11 +418,9 @@ define i32 @sadd_sat32_trunc(i32 %a, i32 %b) {
; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[A:%.*]] to i64
; CHECK-NEXT: [[CONV1:%.*]] = sext i32 [[B:%.*]] to i64
; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[CONV1]], [[CONV]]
-; CHECK-NEXT: [[TMP0:%.*]] = icmp slt i64 [[ADD]], 32767
-; CHECK-NEXT: [[SPEC_STORE_SELECT:%.*]] = select i1 [[TMP0]], i64 [[ADD]], i64 32767
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i64 [[SPEC_STORE_SELECT]], -32768
-; CHECK-NEXT: [[SPEC_STORE_SELECT8:%.*]] = select i1 [[TMP1]], i64 [[SPEC_STORE_SELECT]], i64 -32768
-; CHECK-NEXT: [[CONV7:%.*]] = trunc i64 [[SPEC_STORE_SELECT8]] to i32
+; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.smin.i64(i64 [[ADD]], i64 32767)
+; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.smax.i64(i64 [[TMP0]], i64 -32768)
+; CHECK-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP1]] to i32
; CHECK-NEXT: ret i32 [[CONV7]]
;
entry:
@@ -400,9 +438,13 @@ entry:
define i32 @sadd_sat32_ext16(i32 %a, i16 %b) {
; CHECK-LABEL: @sadd_sat32_ext16(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = sext i16 [[B:%.*]] to i32
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[TMP0]], i32 [[A:%.*]])
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[A:%.*]] to i64
+; CHECK-NEXT: [[CONV1:%.*]] = sext i16 [[B:%.*]] to i64
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[CONV1]], [[CONV]]
+; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.smin.i64(i64 [[ADD]], i64 2147483647)
+; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.smax.i64(i64 [[TMP0]], i64 -2147483648)
+; CHECK-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP1]] to i32
+; CHECK-NEXT: ret i32 [[CONV7]]
;
entry:
%conv = sext i32 %a to i64
@@ -422,11 +464,9 @@ define i8 @sadd_sat8_ext8(i8 %a, i16 %b) {
; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[A:%.*]] to i32
; CHECK-NEXT: [[CONV1:%.*]] = sext i16 [[B:%.*]] to i32
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[CONV1]], [[CONV]]
-; CHECK-NEXT: [[TMP0:%.*]] = icmp slt i32 [[ADD]], 127
-; CHECK-NEXT: [[SPEC_STORE_SELECT:%.*]] = select i1 [[TMP0]], i32 [[ADD]], i32 127
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[SPEC_STORE_SELECT]], -128
-; CHECK-NEXT: [[SPEC_STORE_SELECT8:%.*]] = select i1 [[TMP1]], i32 [[SPEC_STORE_SELECT]], i32 -128
-; CHECK-NEXT: [[CONV7:%.*]] = trunc i32 [[SPEC_STORE_SELECT8]] to i8
+; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.smin.i32(i32 [[ADD]], i32 127)
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP0]], i32 -128)
+; CHECK-NEXT: [[CONV7:%.*]] = trunc i32 [[TMP1]] to i8
; CHECK-NEXT: ret i8 [[CONV7]]
;
entry:
@@ -447,9 +487,8 @@ define i32 @sadd_sat32_zext(i32 %a, i32 %b) {
; CHECK-NEXT: [[CONV:%.*]] = zext i32 [[A:%.*]] to i64
; CHECK-NEXT: [[CONV1:%.*]] = zext i32 [[B:%.*]] to i64
; CHECK-NEXT: [[ADD:%.*]] = add nuw nsw i64 [[CONV1]], [[CONV]]
-; CHECK-NEXT: [[TMP0:%.*]] = icmp ult i64 [[ADD]], 2147483647
-; CHECK-NEXT: [[SPEC_STORE_SELECT:%.*]] = select i1 [[TMP0]], i64 [[ADD]], i64 2147483647
-; CHECK-NEXT: [[CONV7:%.*]] = trunc i64 [[SPEC_STORE_SELECT]] to i32
+; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.umin.i64(i64 [[ADD]], i64 2147483647)
+; CHECK-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP0]] to i32
; CHECK-NEXT: ret i32 [[CONV7]]
;
entry:
@@ -467,8 +506,13 @@ entry:
define i32 @sadd_sat32_maxmin(i32 %a, i32 %b) {
; CHECK-LABEL: @sadd_sat32_maxmin(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[B:%.*]], i32 [[A:%.*]])
-; CHECK-NEXT: ret i32 [[TMP0]]
+; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[A:%.*]] to i64
+; CHECK-NEXT: [[CONV1:%.*]] = sext i32 [[B:%.*]] to i64
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[CONV1]], [[CONV]]
+; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.smax.i64(i64 [[ADD]], i64 -2147483648)
+; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.smin.i64(i64 [[TMP0]], i64 2147483647)
+; CHECK-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP1]] to i32
+; CHECK-NEXT: ret i32 [[CONV7]]
;
entry:
%conv = sext i32 %a to i64
@@ -485,9 +529,12 @@ entry:
define i64 @sadd_sat32_notrunc(i32 %a, i32 %b) {
; CHECK-LABEL: @sadd_sat32_notrunc(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[B:%.*]], i32 [[A:%.*]])
-; CHECK-NEXT: [[SPEC_STORE_SELECT8:%.*]] = sext i32 [[TMP0]] to i64
-; CHECK-NEXT: ret i64 [[SPEC_STORE_SELECT8]]
+; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[A:%.*]] to i64
+; CHECK-NEXT: [[CONV1:%.*]] = sext i32 [[B:%.*]] to i64
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[CONV1]], [[CONV]]
+; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.smax.i64(i64 [[ADD]], i64 -2147483648)
+; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.smin.i64(i64 [[TMP0]], i64 2147483647)
+; CHECK-NEXT: ret i64 [[TMP1]]
;
entry:
%conv = sext i32 %a to i64
diff --git a/llvm/test/Transforms/InstCombine/saturating-add-sub.ll b/llvm/test/Transforms/InstCombine/saturating-add-sub.ll
index b132e0bdb400..58c4b7e9a1e5 100644
--- a/llvm/test/Transforms/InstCombine/saturating-add-sub.ll
+++ b/llvm/test/Transforms/InstCombine/saturating-add-sub.ll
@@ -1717,9 +1717,8 @@ define i32 @unsigned_sat_variable_using_wrong_min(i32 %x) {
; CHECK-LABEL: @unsigned_sat_variable_using_wrong_min(
; CHECK-NEXT: [[Y:%.*]] = call i32 @get_i32()
; CHECK-NEXT: [[NOTY:%.*]] = xor i32 [[Y]], -1
-; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[NOTY]], [[X:%.*]]
-; CHECK-NEXT: [[S:%.*]] = select i1 [[C]], i32 [[X]], i32 [[NOTY]]
-; CHECK-NEXT: [[R:%.*]] = add i32 [[Y]], [[S]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[NOTY]], i32 [[X:%.*]])
+; CHECK-NEXT: [[R:%.*]] = add i32 [[Y]], [[TMP1]]
; CHECK-NEXT: ret i32 [[R]]
;
%y = call i32 @get_i32() ; thwart complexity-based canonicalization
@@ -1736,9 +1735,8 @@ define i32 @unsigned_sat_variable_using_wrong_value(i32 %x, i32 %z) {
; CHECK-LABEL: @unsigned_sat_variable_using_wrong_value(
; CHECK-NEXT: [[Y:%.*]] = call i32 @get_i32()
; CHECK-NEXT: [[NOTY:%.*]] = xor i32 [[Y]], -1
-; CHECK-NEXT: [[C:%.*]] = icmp ugt i32 [[NOTY]], [[X:%.*]]
-; CHECK-NEXT: [[S:%.*]] = select i1 [[C]], i32 [[X]], i32 [[NOTY]]
-; CHECK-NEXT: [[R:%.*]] = add i32 [[S]], [[Z:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[NOTY]], i32 [[X:%.*]])
+; CHECK-NEXT: [[R:%.*]] = add i32 [[TMP1]], [[Z:%.*]]
; CHECK-NEXT: ret i32 [[R]]
;
%y = call i32 @get_i32() ; thwart complexity-based canonicalization
@@ -1777,9 +1775,8 @@ define <2 x i32> @unsigned_sat_constant_using_min_splat(<2 x i32> %x) {
define i32 @unsigned_sat_constant_using_min_wrong_constant(i32 %x) {
; CHECK-LABEL: @unsigned_sat_constant_using_min_wrong_constant(
-; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[X:%.*]], 42
-; CHECK-NEXT: [[S:%.*]] = select i1 [[C]], i32 [[X]], i32 42
-; CHECK-NEXT: [[R:%.*]] = add nsw i32 [[S]], -42
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 42)
+; CHECK-NEXT: [[R:%.*]] = add nsw i32 [[TMP1]], -42
; CHECK-NEXT: ret i32 [[R]]
;
%c = icmp ult i32 %x, 42
diff --git a/llvm/test/Transforms/InstCombine/select-gep.ll b/llvm/test/Transforms/InstCombine/select-gep.ll
index 72166b69e9f8..6180e9d9a124 100644
--- a/llvm/test/Transforms/InstCombine/select-gep.ll
+++ b/llvm/test/Transforms/InstCombine/select-gep.ll
@@ -59,9 +59,8 @@ define i32* @test1d(i32* %p, i32* %q) {
define i32* @test2(i32* %p, i64 %x, i64 %y) {
; CHECK-LABEL: @test2(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i64 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[SELECT_V:%.*]] = select i1 [[CMP]], i64 [[X]], i64 [[Y]]
-; CHECK-NEXT: [[SELECT:%.*]] = getelementptr inbounds i32, i32* [[P:%.*]], i64 [[SELECT_V]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.umax.i64(i64 [[X:%.*]], i64 [[Y:%.*]])
+; CHECK-NEXT: [[SELECT:%.*]] = getelementptr inbounds i32, i32* [[P:%.*]], i64 [[TMP1]]
; CHECK-NEXT: ret i32* [[SELECT]]
;
%gep1 = getelementptr inbounds i32, i32* %p, i64 %x
@@ -140,9 +139,9 @@ define i32* @test4(i32* %p, i32* %q, i64 %x, i64 %y) {
define <2 x i64*> @test5(i64* %p1, i64* %p2, <2 x i64> %idx, <2 x i1> %cc) {
; CHECK-LABEL: @test5(
-; CHECK-NEXT: [[GEP1:%.*]] = getelementptr i64, i64* %p1, <2 x i64> %idx
-; CHECK-NEXT: [[GEP2:%.*]] = getelementptr i64, i64* %p2, <2 x i64> %idx
-; CHECK-NEXT: [[SELECT:%.*]] = select <2 x i1> %cc, <2 x i64*> [[GEP1]], <2 x i64*> [[GEP2]]
+; CHECK-NEXT: [[GEP1:%.*]] = getelementptr i64, i64* [[P1:%.*]], <2 x i64> [[IDX:%.*]]
+; CHECK-NEXT: [[GEP2:%.*]] = getelementptr i64, i64* [[P2:%.*]], <2 x i64> [[IDX]]
+; CHECK-NEXT: [[SELECT:%.*]] = select <2 x i1> [[CC:%.*]], <2 x i64*> [[GEP1]], <2 x i64*> [[GEP2]]
; CHECK-NEXT: ret <2 x i64*> [[SELECT]]
;
%gep1 = getelementptr i64, i64* %p1, <2 x i64> %idx
diff --git a/llvm/test/Transforms/InstCombine/select-imm-canon.ll b/llvm/test/Transforms/InstCombine/select-imm-canon.ll
index 272d4a47ce68..f49ff6623e54 100644
--- a/llvm/test/Transforms/InstCombine/select-imm-canon.ll
+++ b/llvm/test/Transforms/InstCombine/select-imm-canon.ll
@@ -4,10 +4,9 @@
define i8 @single(i32 %A) {
; CHECK-LABEL: @single(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = icmp sgt i32 [[A:%.*]], -128
-; CHECK-NEXT: [[L2:%.*]] = select i1 [[TMP0]], i32 [[A]], i32 -128
-; CHECK-NEXT: [[CONV7:%.*]] = trunc i32 [[L2]] to i8
-; CHECK-NEXT: ret i8 [[CONV7]]
+; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.smax.i32(i32 [[A:%.*]], i32 -128)
+; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[TMP0]] to i8
+; CHECK-NEXT: ret i8 [[TMP1]]
;
entry:
%l1 = icmp slt i32 %A, -128
@@ -19,12 +18,10 @@ entry:
define i8 @double(i32 %A) {
; CHECK-LABEL: @double(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = icmp sgt i32 [[A:%.*]], -128
-; CHECK-NEXT: [[L2:%.*]] = select i1 [[TMP0]], i32 [[A]], i32 -128
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[L2]], 127
-; CHECK-NEXT: [[SPEC_SELECT_I:%.*]] = select i1 [[TMP1]], i32 [[L2]], i32 127
-; CHECK-NEXT: [[CONV7:%.*]] = trunc i32 [[SPEC_SELECT_I]] to i8
-; CHECK-NEXT: ret i8 [[CONV7]]
+; CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.smax.i32(i32 [[A:%.*]], i32 -128)
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[TMP0]], i32 127)
+; CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i8
+; CHECK-NEXT: ret i8 [[TMP2]]
;
entry:
%l1 = icmp slt i32 %A, -128
@@ -52,11 +49,9 @@ entry:
define i8 @original(i32 %A, i32 %B) {
; CHECK-LABEL: @original(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[A:%.*]], -128
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[A]], i32 -128
-; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i32 [[TMP2]], 127
-; CHECK-NEXT: [[SPEC_SELECT_I:%.*]] = select i1 [[TMP3]], i32 [[TMP2]], i32 127
-; CHECK-NEXT: [[CONV7:%.*]] = trunc i32 [[SPEC_SELECT_I]] to i8
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[A:%.*]], i32 -128)
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smin.i32(i32 [[TMP1]], i32 127)
+; CHECK-NEXT: [[CONV7:%.*]] = trunc i32 [[TMP2]] to i8
; CHECK-NEXT: ret i8 [[CONV7]]
;
%cmp4.i = icmp slt i32 127, %A
diff --git a/llvm/test/Transforms/InstCombine/select-pr39595.ll b/llvm/test/Transforms/InstCombine/select-pr39595.ll
index aefafbf4082f..f226579d9a41 100644
--- a/llvm/test/Transforms/InstCombine/select-pr39595.ll
+++ b/llvm/test/Transforms/InstCombine/select-pr39595.ll
@@ -1,12 +1,13 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -instcombine -S | FileCheck %s
define i32 @foo(i32 %x, i32 %y) {
-; CHECK-LABEL: foo
-; CHECK: [[TMP1:%.*]] = icmp ugt i32 %x, %y
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 %x, i32 %y, !prof ![[$MD0:[0-9]+]]
-; CHECK-NEXT: [[TMP3:%.*]] = xor i32 [[TMP2]], -1
-; CHECK-NEXT: ret i32 [[TMP3:%.*]]
-; CHECK-DAG: !0 = !{!"branch_weights", i32 6, i32 1}
+; CHECK-LABEL: @foo(
+; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X:%.*]], -1
+; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[Y:%.*]], -1
+; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP1]], i32 [[TMP2]])
+; CHECK-NEXT: ret i32 [[TMP3]]
+;
%1 = xor i32 %x, -1
%2 = xor i32 %y, -1
diff --git a/llvm/test/Transforms/InstCombine/select.ll b/llvm/test/Transforms/InstCombine/select.ll
index 819ac6dd3a82..24dbe7e4d51e 100644
--- a/llvm/test/Transforms/InstCombine/select.ll
+++ b/llvm/test/Transforms/InstCombine/select.ll
@@ -70,7 +70,7 @@ define <2 x i1> @test8vec(<2 x i1> %C, <2 x i1> %X) {
define <vscale x 2 x i1> @test8vvec(<vscale x 2 x i1> %C, <vscale x 2 x i1> %X) {
; CHECK-LABEL: @test8vvec(
-; CHECK-NEXT: [[R:%.*]] = and <vscale x 2 x i1> [[C:%.*]], [[X:%.*]]
+; CHECK-NEXT: [[R:%.*]] = and <vscale x 2 x i1> [[C:%.*]], [[X:%.*]]
; CHECK-NEXT: ret <vscale x 2 x i1> [[R]]
;
%R = select <vscale x 2 x i1> %C, <vscale x 2 x i1> %X, <vscale x 2 x i1> zeroinitializer
@@ -571,9 +571,8 @@ next:
; SMAX(SMAX(x, y), x) -> SMAX(x, y)
define i32 @test30(i32 %x, i32 %y) {
; CHECK-LABEL: @test30(
-; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[Y]]
-; CHECK-NEXT: ret i32 [[COND]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 [[Y:%.*]])
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%cmp = icmp sgt i32 %x, %y
%cond = select i1 %cmp, i32 %x, i32 %y
@@ -585,9 +584,8 @@ define i32 @test30(i32 %x, i32 %y) {
; UMAX(UMAX(x, y), x) -> UMAX(x, y)
define i32 @test31(i32 %x, i32 %y) {
; CHECK-LABEL: @test31(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[Y]]
-; CHECK-NEXT: ret i32 [[COND]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 [[Y:%.*]])
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%cmp = icmp ugt i32 %x, %y
%cond = select i1 %cmp, i32 %x, i32 %y
@@ -599,9 +597,8 @@ define i32 @test31(i32 %x, i32 %y) {
; SMIN(SMIN(x, y), x) -> SMIN(x, y)
define i32 @test32(i32 %x, i32 %y) {
; CHECK-LABEL: @test32(
-; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[X]]
-; CHECK-NEXT: ret i32 [[COND]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 [[Y:%.*]])
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%cmp = icmp sgt i32 %x, %y
%cond = select i1 %cmp, i32 %y, i32 %x
@@ -720,9 +717,9 @@ define i48 @test51(<3 x i1> %icmp, <3 x i16> %tmp) {
define <vscale x 4 x float> @bitcast_select_bitcast(<vscale x 4 x i1> %icmp, <vscale x 4 x i32> %a, <vscale x 4 x float> %b) {
; CHECK-LABEL: @bitcast_select_bitcast(
-; CHECK-NEXT: [[BC1:%.*]] = bitcast <vscale x 4 x i32> [[A:%.*]] to <vscale x 4 x float>
-; CHECK-NEXT: [[SELECT:%.*]] = select <vscale x 4 x i1> [[ICMP:%.*]], <vscale x 4 x float> [[B:%.*]], <vscale x 4 x float> [[BC1]]
-; CHECK-NEXT: ret <vscale x 4 x float> [[SELECT]]
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast <vscale x 4 x i32> [[A:%.*]] to <vscale x 4 x float>
+; CHECK-NEXT: [[BC2:%.*]] = select <vscale x 4 x i1> [[ICMP:%.*]], <vscale x 4 x float> [[B:%.*]], <vscale x 4 x float> [[TMP1]]
+; CHECK-NEXT: ret <vscale x 4 x float> [[BC2]]
;
%bc1 = bitcast <vscale x 4 x float> %b to <vscale x 4 x i32>
%select = select <vscale x 4 x i1> %icmp, <vscale x 4 x i32> %bc1, <vscale x 4 x i32> %a
@@ -1403,10 +1400,9 @@ define i32 @PR23757_ne_swapped(i32 %x, i1* %p) {
define i32 @PR27137(i32 %a) {
; CHECK-LABEL: @PR27137(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[A:%.*]], 0
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[A]], i32 0
-; CHECK-NEXT: [[S1:%.*]] = xor i32 [[TMP2]], -1
-; CHECK-NEXT: ret i32 [[S1]]
+; CHECK-NEXT: [[NOT_A:%.*]] = xor i32 [[A:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[NOT_A]], i32 -1)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%not_a = xor i32 %a, -1
%c0 = icmp slt i32 %a, 0
diff --git a/llvm/test/Transforms/InstCombine/select_meta.ll b/llvm/test/Transforms/InstCombine/select_meta.ll
index be9d8be857d8..d9f960c00f25 100644
--- a/llvm/test/Transforms/InstCombine/select_meta.ll
+++ b/llvm/test/Transforms/InstCombine/select_meta.ll
@@ -67,9 +67,8 @@ define i32 @foo2(i32, i32) local_unnamed_addr #0 {
define i64 @test43(i32 %a) nounwind {
; CHECK-LABEL: @test43(
; CHECK-NEXT: [[A_EXT:%.*]] = sext i32 [[A:%.*]] to i64
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i64 [[A_EXT]], 0
-; CHECK-NEXT: [[MAX:%.*]] = select i1 [[TMP1]], i64 [[A_EXT]], i64 0, !prof !0
-; CHECK-NEXT: ret i64 [[MAX]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.smax.i64(i64 [[A_EXT]], i64 0)
+; CHECK-NEXT: ret i64 [[TMP1]]
;
%a_ext = sext i32 %a to i64
%is_a_nonnegative = icmp sgt i32 %a, -1
@@ -91,10 +90,9 @@ define <2 x i32> @scalar_select_of_vectors_sext(<2 x i1> %cca, i1 %ccb) {
define i16 @t7(i32 %a) {
; CHECK-LABEL: @t7(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[A:%.*]], -32768
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[A]], i32 -32768, !prof !0
-; CHECK-NEXT: [[TMP3:%.*]] = trunc i32 [[TMP2]] to i16
-; CHECK-NEXT: ret i16 [[TMP3]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[A:%.*]], i32 -32768)
+; CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16
+; CHECK-NEXT: ret i16 [[TMP2]]
;
%1 = icmp slt i32 %a, -32768
%2 = trunc i32 %a to i16
@@ -135,9 +133,8 @@ define <2 x i32> @abs_nabs_x01_vec(<2 x i32> %x) {
; SMAX(SMAX(x, y), x) -> SMAX(x, y)
define i32 @test30(i32 %x, i32 %y) {
; CHECK-LABEL: @test30(
-; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i32 [[X]], i32 [[Y]], !prof !0
-; CHECK-NEXT: ret i32 [[COND]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 [[Y:%.*]])
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%cmp = icmp sgt i32 %x, %y
%cond = select i1 %cmp, i32 %x, i32 %y, !prof !1
@@ -149,9 +146,8 @@ define i32 @test30(i32 %x, i32 %y) {
; SMAX(SMAX(75, X), 36) -> SMAX(X, 75)
define i32 @test70(i32 %x) {
; CHECK-LABEL: @test70(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[X:%.*]], 75
-; CHECK-NEXT: [[COND:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 75, !prof !1
-; CHECK-NEXT: ret i32 [[COND]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 75)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%cmp = icmp slt i32 %x, 75
%cond = select i1 %cmp, i32 75, i32 %x, !prof !1
@@ -164,9 +160,9 @@ define i32 @test70(i32 %x) {
; SMIN(SMIN(X, 92), 11) -> SMIN(X, 11)
define i32 @test72(i32 %x) {
; CHECK-LABEL: @test72(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], 11
-; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 11, !prof !2
-; CHECK-NEXT: ret i32 [[RETVAL]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 92)
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smin.i32(i32 [[TMP1]], i32 11)
+; CHECK-NEXT: ret i32 [[TMP2]]
;
%cmp = icmp sgt i32 %x, 92
%cond = select i1 %cmp, i32 92, i32 %x, !prof !1
@@ -179,9 +175,9 @@ define i32 @test72(i32 %x) {
; SMAX(SMAX(X, 36), 75) -> SMAX(X, 75)
define i32 @test74(i32 %x) {
; CHECK-LABEL: @test74(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[X:%.*]], 75
-; CHECK-NEXT: [[RETVAL:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 75, !prof !2
-; CHECK-NEXT: ret i32 [[RETVAL]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 36)
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umax.i32(i32 [[TMP1]], i32 75)
+; CHECK-NEXT: ret i32 [[TMP2]]
;
%cmp = icmp slt i32 %x, 36
%cond = select i1 %cmp, i32 36, i32 %x, !prof !1
@@ -193,10 +189,9 @@ define i32 @test74(i32 %x) {
; The xor is moved after the select. The metadata remains the same because the select operands are not swapped only inverted.
define i32 @smin1(i32 %x) {
; CHECK-LABEL: @smin1(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[X:%.*]], 0
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 0, !prof !0
-; CHECK-NEXT: [[SEL:%.*]] = xor i32 [[TMP2]], -1
-; CHECK-NEXT: ret i32 [[SEL]]
+; CHECK-NEXT: [[NOT_X:%.*]] = xor i32 [[X:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[NOT_X]], i32 -1)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%not_x = xor i32 %x, -1
%cmp = icmp sgt i32 %x, 0
@@ -207,10 +202,9 @@ define i32 @smin1(i32 %x) {
; The compare should change, and the metadata is swapped because the select operands are swapped and inverted.
define i32 @smin2(i32 %x) {
; CHECK-LABEL: @smin2(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[X:%.*]], 0
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 0, !prof !1
-; CHECK-NEXT: [[SEL:%.*]] = xor i32 [[TMP2]], -1
-; CHECK-NEXT: ret i32 [[SEL]]
+; CHECK-NEXT: [[NOT_X:%.*]] = xor i32 [[X:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[NOT_X]], i32 -1)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%not_x = xor i32 %x, -1
%cmp = icmp slt i32 %x, 0
@@ -221,10 +215,9 @@ define i32 @smin2(i32 %x) {
; The xor is moved after the select. The metadata remains the same because the select operands are not swapped only inverted.
define i32 @smax1(i32 %x) {
; CHECK-LABEL: @smax1(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], 0
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 0, !prof !0
-; CHECK-NEXT: [[SEL:%.*]] = xor i32 [[TMP2]], -1
-; CHECK-NEXT: ret i32 [[SEL]]
+; CHECK-NEXT: [[NOT_X:%.*]] = xor i32 [[X:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[NOT_X]], i32 -1)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%not_x = xor i32 %x, -1
%cmp = icmp slt i32 %x, 0
@@ -235,10 +228,9 @@ define i32 @smax1(i32 %x) {
; The compare should change, and the metadata is swapped because the select operands are swapped and inverted.
define i32 @smax2(i32 %x) {
; CHECK-LABEL: @smax2(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], 0
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 0, !prof !1
-; CHECK-NEXT: [[SEL:%.*]] = xor i32 [[TMP2]], -1
-; CHECK-NEXT: ret i32 [[SEL]]
+; CHECK-NEXT: [[NOT_X:%.*]] = xor i32 [[X:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[NOT_X]], i32 -1)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%not_x = xor i32 %x, -1
%cmp = icmp sgt i32 %x, 0
@@ -249,9 +241,8 @@ define i32 @smax2(i32 %x) {
; The compare should change, but the metadata remains the same because the select operands are not swapped.
define i32 @umin1(i32 %x) {
; CHECK-LABEL: @umin1(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[X:%.*]], -2147483648
-; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 -2147483648, !prof !0
-; CHECK-NEXT: ret i32 [[SEL]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 -2147483648)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%cmp = icmp sgt i32 %x, -1
%sel = select i1 %cmp, i32 %x, i32 -2147483648, !prof !1
@@ -261,9 +252,8 @@ define i32 @umin1(i32 %x) {
; The compare should change, and the metadata is swapped because the select operands are swapped.
define i32 @umin2(i32 %x) {
; CHECK-LABEL: @umin2(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[X:%.*]], 2147483647
-; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 2147483647, !prof !1
-; CHECK-NEXT: ret i32 [[SEL]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 2147483647)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%cmp = icmp slt i32 %x, 0
%sel = select i1 %cmp, i32 2147483647, i32 %x, !prof !1
@@ -273,9 +263,8 @@ define i32 @umin2(i32 %x) {
; The compare should change, but the metadata remains the same because the select operands are not swapped.
define i32 @umax1(i32 %x) {
; CHECK-LABEL: @umax1(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[X:%.*]], 2147483647
-; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 2147483647, !prof !0
-; CHECK-NEXT: ret i32 [[SEL]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 2147483647)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%cmp = icmp slt i32 %x, 0
%sel = select i1 %cmp, i32 %x, i32 2147483647, !prof !1
@@ -285,9 +274,8 @@ define i32 @umax1(i32 %x) {
; The compare should change, and the metadata is swapped because the select operands are swapped.
define i32 @umax2(i32 %x) {
; CHECK-LABEL: @umax2(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[X:%.*]], -2147483648
-; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 -2147483648, !prof !1
-; CHECK-NEXT: ret i32 [[SEL]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 -2147483648)
+; CHECK-NEXT: ret i32 [[TMP1]]
;
%cmp = icmp sgt i32 %x, -1
%sel = select i1 %cmp, i32 -2147483648, i32 %x, !prof !1
@@ -337,5 +325,4 @@ define <2 x i32> @not_cond_vec_undef(<2 x i1> %c, <2 x i32> %tv, <2 x i32> %fv)
; CHECK: !0 = !{!"branch_weights", i32 2, i32 10}
; CHECK-NEXT: !1 = !{!"branch_weights", i32 10, i32 2}
-; CHECK-NEXT: !2 = !{!"branch_weights", i32 10, i32 3}
diff --git a/llvm/test/Transforms/InstCombine/sext.ll b/llvm/test/Transforms/InstCombine/sext.ll
index ebab23a19525..a9b9be1bb415 100644
--- a/llvm/test/Transforms/InstCombine/sext.ll
+++ b/llvm/test/Transforms/InstCombine/sext.ll
@@ -293,9 +293,8 @@ define i32 @test17(i1 %x) {
define i32 @test18(i16 %x) {
; CHECK-LABEL: @test18(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i16 [[X:%.*]], 0
-; CHECK-NEXT: [[SEL:%.*]] = select i1 [[TMP1]], i16 [[X]], i16 0
-; CHECK-NEXT: [[EXT:%.*]] = zext i16 [[SEL]] to i32
+; CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.smax.i16(i16 [[X:%.*]], i16 0)
+; CHECK-NEXT: [[EXT:%.*]] = zext i16 [[TMP1]] to i32
; CHECK-NEXT: ret i32 [[EXT]]
;
%cmp = icmp slt i16 %x, 0
diff --git a/llvm/test/Transforms/InstCombine/smax-icmp.ll b/llvm/test/Transforms/InstCombine/smax-icmp.ll
index 178487243dc3..aabb0a4c66ba 100644
--- a/llvm/test/Transforms/InstCombine/smax-icmp.ll
+++ b/llvm/test/Transforms/InstCombine/smax-icmp.ll
@@ -137,8 +137,8 @@ define i1 @ne_smax1(i32 %x, i32 %y) {
define i1 @ne_smax2(i32 %x, i32 %y) {
; CHECK-LABEL: @ne_smax2(
-; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[Y:%.*]], [[X:%.*]]
-; CHECK-NEXT: ret i1 [[CMP1]]
+; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: ret i1 [[CMP2]]
;
%cmp1 = icmp sgt i32 %y, %x
%sel = select i1 %cmp1, i32 %y, i32 %x
@@ -166,8 +166,8 @@ define i1 @ne_smax3(i32 %a, i32 %y) {
define i1 @ne_smax4(i32 %a, i32 %y) {
; CHECK-LABEL: @ne_smax4(
; CHECK-NEXT: [[X:%.*]] = add i32 [[A:%.*]], 3
-; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[X]], [[Y:%.*]]
-; CHECK-NEXT: ret i1 [[CMP1]]
+; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[X]], [[Y:%.*]]
+; CHECK-NEXT: ret i1 [[CMP2]]
;
%x = add i32 %a, 3 ; thwart complexity-based canonicalization
%cmp1 = icmp sgt i32 %y, %x
@@ -193,8 +193,8 @@ define i1 @sgt_smax1(i32 %x, i32 %y) {
define i1 @sgt_smax2(i32 %x, i32 %y) {
; CHECK-LABEL: @sgt_smax2(
-; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[Y:%.*]], [[X:%.*]]
-; CHECK-NEXT: ret i1 [[CMP1]]
+; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: ret i1 [[CMP2]]
;
%cmp1 = icmp sgt i32 %y, %x
%sel = select i1 %cmp1, i32 %y, i32 %x
@@ -222,8 +222,8 @@ define i1 @sgt_smax3(i32 %a, i32 %y) {
define i1 @sgt_smax4(i32 %a, i32 %y) {
; CHECK-LABEL: @sgt_smax4(
; CHECK-NEXT: [[X:%.*]] = add i32 [[A:%.*]], 3
-; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[X]], [[Y:%.*]]
-; CHECK-NEXT: ret i1 [[CMP1]]
+; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[X]], [[Y:%.*]]
+; CHECK-NEXT: ret i1 [[CMP2]]
;
%x = add i32 %a, 3 ; thwart complexity-based canonicalization
%cmp1 = icmp sgt i32 %y, %x
diff --git a/llvm/test/Transforms/InstCombine/smin-icmp.ll b/llvm/test/Transforms/InstCombine/smin-icmp.ll
index 19519ee24f40..29b0b3a00c67 100644
--- a/llvm/test/Transforms/InstCombine/smin-icmp.ll
+++ b/llvm/test/Transforms/InstCombine/smin-icmp.ll
@@ -136,8 +136,8 @@ define i1 @ne_smin1(i32 %x, i32 %y) {
define i1 @ne_smin2(i32 %x, i32 %y) {
; CHECK-LABEL: @ne_smin2(
-; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[Y:%.*]], [[X:%.*]]
-; CHECK-NEXT: ret i1 [[CMP1]]
+; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: ret i1 [[CMP2]]
;
%cmp1 = icmp slt i32 %y, %x
%sel = select i1 %cmp1, i32 %y, i32 %x
@@ -165,8 +165,8 @@ define i1 @ne_smin3(i32 %a, i32 %y) {
define i1 @ne_smin4(i32 %a, i32 %y) {
; CHECK-LABEL: @ne_smin4(
; CHECK-NEXT: [[X:%.*]] = add i32 [[A:%.*]], 3
-; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[X]], [[Y:%.*]]
-; CHECK-NEXT: ret i1 [[CMP1]]
+; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[X]], [[Y:%.*]]
+; CHECK-NEXT: ret i1 [[CMP2]]
;
%x = add i32 %a, 3 ; thwart complexity-based canonicalization
%cmp1 = icmp slt i32 %y, %x
@@ -192,8 +192,8 @@ define i1 @slt_smin1(i32 %x, i32 %y) {
define i1 @slt_smin2(i32 %x, i32 %y) {
; CHECK-LABEL: @slt_smin2(
-; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[Y:%.*]], [[X:%.*]]
-; CHECK-NEXT: ret i1 [[CMP1]]
+; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: ret i1 [[CMP2]]
;
%cmp1 = icmp slt i32 %y, %x
%sel = select i1 %cmp1, i32 %y, i32 %x
@@ -221,8 +221,8 @@ define i1 @slt_smin3(i32 %a, i32 %y) {
define i1 @slt_smin4(i32 %a, i32 %y) {
; CHECK-LABEL: @slt_smin4(
; CHECK-NEXT: [[X:%.*]] = add i32 [[A:%.*]], 3
-; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[X]], [[Y:%.*]]
-; CHECK-NEXT: ret i1 [[CMP1]]
+; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[X]], [[Y:%.*]]
+; CHECK-NEXT: ret i1 [[CMP2]]
;
%x = add i32 %a, 3 ; thwart complexity-based canonicalization
%cmp1 = icmp slt i32 %y, %x
diff --git a/llvm/test/Transforms/InstCombine/sub-ashr-or-to-icmp-select.ll b/llvm/test/Transforms/InstCombine/sub-ashr-or-to-icmp-select.ll
index fa5a8f693819..1b5eb7f05ef4 100644
--- a/llvm/test/Transforms/InstCombine/sub-ashr-or-to-icmp-select.ll
+++ b/llvm/test/Transforms/InstCombine/sub-ashr-or-to-icmp-select.ll
@@ -12,9 +12,8 @@
define i32 @clamp255_i32(i32 %x) {
; CHECK-LABEL: @clamp255_i32(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], 255
-; CHECK-NEXT: [[OR:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 255
-; CHECK-NEXT: [[AND:%.*]] = and i32 [[OR]], 255
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 255)
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[TMP1]], 255
; CHECK-NEXT: ret i32 [[AND]]
;
%sub = sub nsw i32 255, %x
diff --git a/llvm/test/Transforms/InstCombine/sub-minmax.ll b/llvm/test/Transforms/InstCombine/sub-minmax.ll
index 63a884aba5c3..7d4c1124359f 100644
--- a/llvm/test/Transforms/InstCombine/sub-minmax.ll
+++ b/llvm/test/Transforms/InstCombine/sub-minmax.ll
@@ -4,9 +4,9 @@
define i32 @max_na_b_minux_na(i32 %A, i32 %B) {
; CHECK-LABEL: @max_na_b_minux_na(
; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[A:%.*]], -1
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[NOT]], i32 [[B:%.*]])
-; CHECK-NEXT: [[TMP2:%.*]] = sub i32 0, [[TMP1]]
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[NOT]], i32 [[B:%.*]])
+; CHECK-NEXT: [[X:%.*]] = sub i32 [[TMP1]], [[NOT]]
+; CHECK-NEXT: ret i32 [[X]]
;
%not = xor i32 %A, -1
%l0 = icmp ult i32 %not, %B
@@ -18,8 +18,9 @@ define i32 @max_na_b_minux_na(i32 %A, i32 %B) {
define i32 @na_minus_max_na_b(i32 %A, i32 %B) {
; CHECK-LABEL: @na_minus_max_na_b(
; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[A:%.*]], -1
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[NOT]], i32 [[B:%.*]])
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[NOT]], i32 [[B:%.*]])
+; CHECK-NEXT: [[X:%.*]] = sub i32 [[NOT]], [[TMP1]]
+; CHECK-NEXT: ret i32 [[X]]
;
%not = xor i32 %A, -1
%l0 = icmp ult i32 %not, %B
@@ -31,9 +32,9 @@ define i32 @na_minus_max_na_b(i32 %A, i32 %B) {
define i32 @max_b_na_minus_na(i32 %A, i32 %B) {
; CHECK-LABEL: @max_b_na_minus_na(
; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[A:%.*]], -1
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[NOT]], i32 [[B:%.*]])
-; CHECK-NEXT: [[TMP2:%.*]] = sub i32 0, [[TMP1]]
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[NOT]], i32 [[B:%.*]])
+; CHECK-NEXT: [[X:%.*]] = sub i32 [[TMP1]], [[NOT]]
+; CHECK-NEXT: ret i32 [[X]]
;
%not = xor i32 %A, -1
%l0 = icmp ugt i32 %not, %B
@@ -45,8 +46,9 @@ define i32 @max_b_na_minus_na(i32 %A, i32 %B) {
define i32 @na_minus_max_b_na(i32 %A, i32 %B) {
; CHECK-LABEL: @na_minus_max_b_na(
; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[A:%.*]], -1
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[NOT]], i32 [[B:%.*]])
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[NOT]], i32 [[B:%.*]])
+; CHECK-NEXT: [[X:%.*]] = sub i32 [[NOT]], [[TMP1]]
+; CHECK-NEXT: ret i32 [[X]]
;
%not = xor i32 %A, -1
%l0 = icmp ugt i32 %not, %B
@@ -58,9 +60,11 @@ define i32 @na_minus_max_b_na(i32 %A, i32 %B) {
define i32 @max_na_bi_minux_na(i32 %A, i32 %Bi) {
; CHECK-LABEL: @max_na_bi_minux_na(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[BI:%.*]], i32 [[A:%.*]])
-; CHECK-NEXT: [[TMP2:%.*]] = sub i32 0, [[TMP1]]
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[B:%.*]] = xor i32 [[BI:%.*]], -1
+; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[A:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[NOT]], i32 [[B]])
+; CHECK-NEXT: [[X:%.*]] = sub i32 [[TMP1]], [[NOT]]
+; CHECK-NEXT: ret i32 [[X]]
;
%B = xor i32 %Bi, -1
%not = xor i32 %A, -1
@@ -72,8 +76,11 @@ define i32 @max_na_bi_minux_na(i32 %A, i32 %Bi) {
define i32 @na_minus_max_na_bi(i32 %A, i32 %Bi) {
; CHECK-LABEL: @na_minus_max_na_bi(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[BI:%.*]], i32 [[A:%.*]])
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[B:%.*]] = xor i32 [[BI:%.*]], -1
+; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[A:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[NOT]], i32 [[B]])
+; CHECK-NEXT: [[X:%.*]] = sub i32 [[NOT]], [[TMP1]]
+; CHECK-NEXT: ret i32 [[X]]
;
%B = xor i32 %Bi, -1
%not = xor i32 %A, -1
@@ -85,9 +92,11 @@ define i32 @na_minus_max_na_bi(i32 %A, i32 %Bi) {
define i32 @max_bi_na_minus_na(i32 %A, i32 %Bi) {
; CHECK-LABEL: @max_bi_na_minus_na(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[BI:%.*]], i32 [[A:%.*]])
-; CHECK-NEXT: [[TMP2:%.*]] = sub i32 0, [[TMP1]]
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[B:%.*]] = xor i32 [[BI:%.*]], -1
+; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[A:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[NOT]], i32 [[B]])
+; CHECK-NEXT: [[X:%.*]] = sub i32 [[TMP1]], [[NOT]]
+; CHECK-NEXT: ret i32 [[X]]
;
%B = xor i32 %Bi, -1
%not = xor i32 %A, -1
@@ -99,8 +108,11 @@ define i32 @max_bi_na_minus_na(i32 %A, i32 %Bi) {
define i32 @na_minus_max_bi_na(i32 %A, i32 %Bi) {
; CHECK-LABEL: @na_minus_max_bi_na(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[BI:%.*]], i32 [[A:%.*]])
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[B:%.*]] = xor i32 [[BI:%.*]], -1
+; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[A:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[NOT]], i32 [[B]])
+; CHECK-NEXT: [[X:%.*]] = sub i32 [[NOT]], [[TMP1]]
+; CHECK-NEXT: ret i32 [[X]]
;
%B = xor i32 %Bi, -1
%not = xor i32 %A, -1
@@ -113,11 +125,10 @@ define i32 @na_minus_max_bi_na(i32 %A, i32 %Bi) {
define i32 @max_na_bi_minux_na_use(i32 %A, i32 %Bi) {
; CHECK-LABEL: @max_na_bi_minux_na_use(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[A:%.*]], -32
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[A]], i32 -32
-; CHECK-NEXT: [[L1:%.*]] = xor i32 [[TMP2]], -1
-; CHECK-NEXT: [[X:%.*]] = sub i32 [[A]], [[TMP2]]
-; CHECK-NEXT: call void @use32(i32 [[L1]])
+; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[A:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[NOT]], i32 31)
+; CHECK-NEXT: [[X:%.*]] = sub i32 [[TMP1]], [[NOT]]
+; CHECK-NEXT: call void @use32(i32 [[TMP1]])
; CHECK-NEXT: ret i32 [[X]]
;
%not = xor i32 %A, -1
@@ -130,11 +141,10 @@ define i32 @max_na_bi_minux_na_use(i32 %A, i32 %Bi) {
define i32 @na_minus_max_na_bi_use(i32 %A, i32 %Bi) {
; CHECK-LABEL: @na_minus_max_na_bi_use(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[A:%.*]], -32
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[A]], i32 -32
-; CHECK-NEXT: [[L1:%.*]] = xor i32 [[TMP2]], -1
-; CHECK-NEXT: [[X:%.*]] = sub i32 [[TMP2]], [[A]]
-; CHECK-NEXT: call void @use32(i32 [[L1]])
+; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[A:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[NOT]], i32 31)
+; CHECK-NEXT: [[X:%.*]] = sub i32 [[NOT]], [[TMP1]]
+; CHECK-NEXT: call void @use32(i32 [[TMP1]])
; CHECK-NEXT: ret i32 [[X]]
;
%not = xor i32 %A, -1
@@ -147,11 +157,11 @@ define i32 @na_minus_max_na_bi_use(i32 %A, i32 %Bi) {
define i32 @max_bi_na_minus_na_use(i32 %A, i32 %Bi) {
; CHECK-LABEL: @max_bi_na_minus_na_use(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[BI:%.*]], [[A:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[BI]], i32 [[A]]
-; CHECK-NEXT: [[L1:%.*]] = xor i32 [[TMP2]], -1
-; CHECK-NEXT: [[X:%.*]] = sub i32 [[A]], [[TMP2]]
-; CHECK-NEXT: call void @use32(i32 [[L1]])
+; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[A:%.*]], -1
+; CHECK-NEXT: [[B:%.*]] = xor i32 [[BI:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[B]], i32 [[NOT]])
+; CHECK-NEXT: [[X:%.*]] = sub i32 [[TMP1]], [[NOT]]
+; CHECK-NEXT: call void @use32(i32 [[TMP1]])
; CHECK-NEXT: ret i32 [[X]]
;
%not = xor i32 %A, -1
@@ -165,11 +175,11 @@ define i32 @max_bi_na_minus_na_use(i32 %A, i32 %Bi) {
define i32 @na_minus_max_bi_na_use(i32 %A, i32 %Bi) {
; CHECK-LABEL: @na_minus_max_bi_na_use(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[BI:%.*]], [[A:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[BI]], i32 [[A]]
-; CHECK-NEXT: [[L1:%.*]] = xor i32 [[TMP2]], -1
-; CHECK-NEXT: [[X:%.*]] = sub i32 [[TMP2]], [[A]]
-; CHECK-NEXT: call void @use32(i32 [[L1]])
+; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[A:%.*]], -1
+; CHECK-NEXT: [[B:%.*]] = xor i32 [[BI:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[B]], i32 [[NOT]])
+; CHECK-NEXT: [[X:%.*]] = sub i32 [[NOT]], [[TMP1]]
+; CHECK-NEXT: call void @use32(i32 [[TMP1]])
; CHECK-NEXT: ret i32 [[X]]
;
%not = xor i32 %A, -1
@@ -185,10 +195,9 @@ define i32 @na_minus_max_bi_na_use(i32 %A, i32 %Bi) {
define i32 @max_na_bi_minux_na_use2(i32 %A, i32 %Bi) {
; CHECK-LABEL: @max_na_bi_minux_na_use2(
; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[A:%.*]], -1
-; CHECK-NEXT: [[L0:%.*]] = icmp ult i32 [[NOT]], 31
-; CHECK-NEXT: [[L1:%.*]] = select i1 [[L0]], i32 [[NOT]], i32 31
-; CHECK-NEXT: [[X:%.*]] = sub i32 [[L1]], [[NOT]]
-; CHECK-NEXT: call void @use32(i32 [[L1]])
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[NOT]], i32 31)
+; CHECK-NEXT: [[X:%.*]] = sub i32 [[TMP1]], [[NOT]]
+; CHECK-NEXT: call void @use32(i32 [[TMP1]])
; CHECK-NEXT: call void @use32(i32 [[NOT]])
; CHECK-NEXT: ret i32 [[X]]
;
@@ -204,10 +213,9 @@ define i32 @max_na_bi_minux_na_use2(i32 %A, i32 %Bi) {
define i32 @na_minus_max_na_bi_use2(i32 %A, i32 %Bi) {
; CHECK-LABEL: @na_minus_max_na_bi_use2(
; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[A:%.*]], -1
-; CHECK-NEXT: [[L0:%.*]] = icmp ult i32 [[NOT]], 31
-; CHECK-NEXT: [[L1:%.*]] = select i1 [[L0]], i32 [[NOT]], i32 31
-; CHECK-NEXT: [[X:%.*]] = sub i32 [[NOT]], [[L1]]
-; CHECK-NEXT: call void @use32(i32 [[L1]])
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[NOT]], i32 31)
+; CHECK-NEXT: [[X:%.*]] = sub i32 [[NOT]], [[TMP1]]
+; CHECK-NEXT: call void @use32(i32 [[TMP1]])
; CHECK-NEXT: call void @use32(i32 [[NOT]])
; CHECK-NEXT: ret i32 [[X]]
;
@@ -223,11 +231,10 @@ define i32 @na_minus_max_na_bi_use2(i32 %A, i32 %Bi) {
define i32 @max_bi_na_minus_na_use2(i32 %A, i32 %Bi) {
; CHECK-LABEL: @max_bi_na_minus_na_use2(
; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[A:%.*]], -1
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[BI:%.*]], [[A]]
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[BI]], i32 [[A]]
-; CHECK-NEXT: [[L1:%.*]] = xor i32 [[TMP2]], -1
-; CHECK-NEXT: [[X:%.*]] = sub i32 [[A]], [[TMP2]]
-; CHECK-NEXT: call void @use32(i32 [[L1]])
+; CHECK-NEXT: [[B:%.*]] = xor i32 [[BI:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[B]], i32 [[NOT]])
+; CHECK-NEXT: [[X:%.*]] = sub i32 [[TMP1]], [[NOT]]
+; CHECK-NEXT: call void @use32(i32 [[TMP1]])
; CHECK-NEXT: call void @use32(i32 [[NOT]])
; CHECK-NEXT: ret i32 [[X]]
;
@@ -244,11 +251,10 @@ define i32 @max_bi_na_minus_na_use2(i32 %A, i32 %Bi) {
define i32 @na_minus_max_bi_na_use2(i32 %A, i32 %Bi) {
; CHECK-LABEL: @na_minus_max_bi_na_use2(
; CHECK-NEXT: [[NOT:%.*]] = xor i32 [[A:%.*]], -1
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[BI:%.*]], [[A]]
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[BI]], i32 [[A]]
-; CHECK-NEXT: [[L1:%.*]] = xor i32 [[TMP2]], -1
-; CHECK-NEXT: [[X:%.*]] = sub i32 [[TMP2]], [[A]]
-; CHECK-NEXT: call void @use32(i32 [[L1]])
+; CHECK-NEXT: [[B:%.*]] = xor i32 [[BI:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[B]], i32 [[NOT]])
+; CHECK-NEXT: [[X:%.*]] = sub i32 [[NOT]], [[TMP1]]
+; CHECK-NEXT: call void @use32(i32 [[TMP1]])
; CHECK-NEXT: call void @use32(i32 [[NOT]])
; CHECK-NEXT: ret i32 [[X]]
;
@@ -264,14 +270,14 @@ define i32 @na_minus_max_bi_na_use2(i32 %A, i32 %Bi) {
define i8 @umin_not_sub(i8 %x, i8 %y) {
; CHECK-LABEL: @umin_not_sub(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i8 [[X]], i8 [[Y]]
-; CHECK-NEXT: [[MINXY:%.*]] = xor i8 [[TMP2]], -1
-; CHECK-NEXT: [[SUBX:%.*]] = sub i8 [[TMP2]], [[X]]
-; CHECK-NEXT: [[SUBY:%.*]] = sub i8 [[TMP2]], [[Y]]
+; CHECK-NEXT: [[NX:%.*]] = xor i8 [[X:%.*]], -1
+; CHECK-NEXT: [[NY:%.*]] = xor i8 [[Y:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.umin.i8(i8 [[NX]], i8 [[NY]])
+; CHECK-NEXT: [[SUBX:%.*]] = sub i8 [[NX]], [[TMP1]]
+; CHECK-NEXT: [[SUBY:%.*]] = sub i8 [[NY]], [[TMP1]]
; CHECK-NEXT: call void @use8(i8 [[SUBX]])
; CHECK-NEXT: call void @use8(i8 [[SUBY]])
-; CHECK-NEXT: ret i8 [[MINXY]]
+; CHECK-NEXT: ret i8 [[TMP1]]
;
%nx = xor i8 %x, -1
%ny = xor i8 %y, -1
@@ -286,14 +292,14 @@ define i8 @umin_not_sub(i8 %x, i8 %y) {
define i8 @umin_not_sub_rev(i8 %x, i8 %y) {
; CHECK-LABEL: @umin_not_sub_rev(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[X:%.*]], [[Y:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i8 [[X]], i8 [[Y]]
-; CHECK-NEXT: [[MINXY:%.*]] = xor i8 [[TMP2]], -1
-; CHECK-NEXT: [[SUBX:%.*]] = sub i8 [[X]], [[TMP2]]
-; CHECK-NEXT: [[SUBY:%.*]] = sub i8 [[Y]], [[TMP2]]
+; CHECK-NEXT: [[NX:%.*]] = xor i8 [[X:%.*]], -1
+; CHECK-NEXT: [[NY:%.*]] = xor i8 [[Y:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.umin.i8(i8 [[NX]], i8 [[NY]])
+; CHECK-NEXT: [[SUBX:%.*]] = sub i8 [[TMP1]], [[NX]]
+; CHECK-NEXT: [[SUBY:%.*]] = sub i8 [[TMP1]], [[NY]]
; CHECK-NEXT: call void @use8(i8 [[SUBX]])
; CHECK-NEXT: call void @use8(i8 [[SUBY]])
-; CHECK-NEXT: ret i8 [[MINXY]]
+; CHECK-NEXT: ret i8 [[TMP1]]
;
%nx = xor i8 %x, -1
%ny = xor i8 %y, -1
@@ -308,15 +314,15 @@ define i8 @umin_not_sub_rev(i8 %x, i8 %y) {
define void @umin3_not_all_ops_extra_uses_invert_subs(i8 %x, i8 %y, i8 %z) {
; CHECK-LABEL: @umin3_not_all_ops_extra_uses_invert_subs(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i8 [[X:%.*]], [[Z:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i8 [[X]], i8 [[Z]]
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ugt i8 [[TMP2]], [[Y:%.*]]
-; CHECK-NEXT: [[TMP4:%.*]] = select i1 [[TMP3]], i8 [[TMP2]], i8 [[Y]]
-; CHECK-NEXT: [[TMP5:%.*]] = xor i8 [[TMP4]], -1
-; CHECK-NEXT: [[XMIN:%.*]] = sub i8 [[TMP4]], [[X]]
-; CHECK-NEXT: [[YMIN:%.*]] = sub i8 [[TMP4]], [[Y]]
-; CHECK-NEXT: [[ZMIN:%.*]] = sub i8 [[TMP4]], [[Z]]
-; CHECK-NEXT: call void @use8(i8 [[TMP5]])
+; CHECK-NEXT: [[XN:%.*]] = xor i8 [[X:%.*]], -1
+; CHECK-NEXT: [[YN:%.*]] = xor i8 [[Y:%.*]], -1
+; CHECK-NEXT: [[ZN:%.*]] = xor i8 [[Z:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.umin.i8(i8 [[XN]], i8 [[ZN]])
+; CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.umin.i8(i8 [[TMP1]], i8 [[YN]])
+; CHECK-NEXT: [[XMIN:%.*]] = sub i8 [[XN]], [[TMP2]]
+; CHECK-NEXT: [[YMIN:%.*]] = sub i8 [[YN]], [[TMP2]]
+; CHECK-NEXT: [[ZMIN:%.*]] = sub i8 [[ZN]], [[TMP2]]
+; CHECK-NEXT: call void @use8(i8 [[TMP2]])
; CHECK-NEXT: call void @use8(i8 [[XMIN]])
; CHECK-NEXT: call void @use8(i8 [[YMIN]])
; CHECK-NEXT: call void @use8(i8 [[ZMIN]])
diff --git a/llvm/test/Transforms/InstCombine/sub.ll b/llvm/test/Transforms/InstCombine/sub.ll
index 066085fc2535..49bfd43f38b6 100644
--- a/llvm/test/Transforms/InstCombine/sub.ll
+++ b/llvm/test/Transforms/InstCombine/sub.ll
@@ -1193,10 +1193,10 @@ define <2 x i32> @test63vec(<2 x i32> %A) {
define i32 @test64(i32 %x) {
; CHECK-LABEL: @test64(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], 255
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 255
-; CHECK-NEXT: [[DOTNEG:%.*]] = add nsw i32 [[TMP2]], 1
-; CHECK-NEXT: ret i32 [[DOTNEG]]
+; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X:%.*]], -1
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP1]], i32 -256)
+; CHECK-NEXT: [[RES:%.*]] = sub nsw i32 0, [[TMP2]]
+; CHECK-NEXT: ret i32 [[RES]]
;
%1 = xor i32 %x, -1
%2 = icmp sgt i32 %1, -256
@@ -1207,10 +1207,10 @@ define i32 @test64(i32 %x) {
define i32 @test65(i32 %x) {
; CHECK-LABEL: @test65(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[X:%.*]], -256
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 -256
-; CHECK-NEXT: [[DOTNEG:%.*]] = add i32 [[TMP2]], 1
-; CHECK-NEXT: ret i32 [[DOTNEG]]
+; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X:%.*]], -1
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smin.i32(i32 [[TMP1]], i32 255)
+; CHECK-NEXT: [[RES:%.*]] = sub i32 0, [[TMP2]]
+; CHECK-NEXT: ret i32 [[RES]]
;
%1 = xor i32 %x, -1
%2 = icmp slt i32 %1, 255
@@ -1221,10 +1221,10 @@ define i32 @test65(i32 %x) {
define i32 @test66(i32 %x) {
; CHECK-LABEL: @test66(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[X:%.*]], -101
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 -101
-; CHECK-NEXT: [[DOTNEG:%.*]] = add nuw i32 [[TMP2]], 1
-; CHECK-NEXT: ret i32 [[DOTNEG]]
+; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X:%.*]], -1
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umax.i32(i32 [[TMP1]], i32 100)
+; CHECK-NEXT: [[RES:%.*]] = sub i32 0, [[TMP2]]
+; CHECK-NEXT: ret i32 [[RES]]
;
%1 = xor i32 %x, -1
%2 = icmp ugt i32 %1, 100
@@ -1235,10 +1235,10 @@ define i32 @test66(i32 %x) {
define i32 @test67(i32 %x) {
; CHECK-LABEL: @test67(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[X:%.*]], 100
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 100
-; CHECK-NEXT: [[DOTNEG:%.*]] = add i32 [[TMP2]], 1
-; CHECK-NEXT: ret i32 [[DOTNEG]]
+; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X:%.*]], -1
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umin.i32(i32 [[TMP1]], i32 -101)
+; CHECK-NEXT: [[RES:%.*]] = sub i32 0, [[TMP2]]
+; CHECK-NEXT: ret i32 [[RES]]
;
%1 = xor i32 %x, -1
%2 = icmp ult i32 %1, -101
@@ -1250,10 +1250,10 @@ define i32 @test67(i32 %x) {
; Check splat vectors too
define <2 x i32> @test68(<2 x i32> %x) {
; CHECK-LABEL: @test68(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i32> [[X:%.*]], <i32 255, i32 255>
-; CHECK-NEXT: [[TMP2:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[X]], <2 x i32> <i32 255, i32 255>
-; CHECK-NEXT: [[DOTNEG:%.*]] = add nsw <2 x i32> [[TMP2]], <i32 1, i32 1>
-; CHECK-NEXT: ret <2 x i32> [[DOTNEG]]
+; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[X:%.*]], <i32 -1, i32 -1>
+; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i32> @llvm.smax.v2i32(<2 x i32> [[TMP1]], <2 x i32> <i32 -256, i32 -256>)
+; CHECK-NEXT: [[RES:%.*]] = sub nsw <2 x i32> zeroinitializer, [[TMP2]]
+; CHECK-NEXT: ret <2 x i32> [[RES]]
;
%1 = xor <2 x i32> %x, <i32 -1, i32 -1>
%2 = icmp sgt <2 x i32> %1, <i32 -256, i32 -256>
@@ -1265,10 +1265,10 @@ define <2 x i32> @test68(<2 x i32> %x) {
; And non-splat constant vectors.
define <2 x i32> @test69(<2 x i32> %x) {
; CHECK-LABEL: @test69(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <2 x i32> [[X:%.*]], <i32 255, i32 127>
-; CHECK-NEXT: [[TMP2:%.*]] = select <2 x i1> [[TMP1]], <2 x i32> [[X]], <2 x i32> <i32 255, i32 127>
-; CHECK-NEXT: [[DOTNEG:%.*]] = add <2 x i32> [[TMP2]], <i32 1, i32 1>
-; CHECK-NEXT: ret <2 x i32> [[DOTNEG]]
+; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[X:%.*]], <i32 -1, i32 -1>
+; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i32> @llvm.smax.v2i32(<2 x i32> [[TMP1]], <2 x i32> <i32 -256, i32 -128>)
+; CHECK-NEXT: [[RES:%.*]] = sub <2 x i32> zeroinitializer, [[TMP2]]
+; CHECK-NEXT: ret <2 x i32> [[RES]]
;
%1 = xor <2 x i32> %x, <i32 -1, i32 -1>
%2 = icmp sgt <2 x i32> %1, <i32 -256, i32 -128>
diff --git a/llvm/test/Transforms/InstCombine/umax-icmp.ll b/llvm/test/Transforms/InstCombine/umax-icmp.ll
index 91ed8594b997..e2fb0febe2f3 100644
--- a/llvm/test/Transforms/InstCombine/umax-icmp.ll
+++ b/llvm/test/Transforms/InstCombine/umax-icmp.ll
@@ -137,8 +137,8 @@ define i1 @ne_umax1(i32 %x, i32 %y) {
define i1 @ne_umax2(i32 %x, i32 %y) {
; CHECK-LABEL: @ne_umax2(
-; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt i32 [[Y:%.*]], [[X:%.*]]
-; CHECK-NEXT: ret i1 [[CMP1]]
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: ret i1 [[CMP2]]
;
%cmp1 = icmp ugt i32 %y, %x
%sel = select i1 %cmp1, i32 %y, i32 %x
@@ -166,8 +166,8 @@ define i1 @ne_umax3(i32 %a, i32 %y) {
define i1 @ne_umax4(i32 %a, i32 %y) {
; CHECK-LABEL: @ne_umax4(
; CHECK-NEXT: [[X:%.*]] = add i32 [[A:%.*]], 3
-; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[X]], [[Y:%.*]]
-; CHECK-NEXT: ret i1 [[CMP1]]
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[X]], [[Y:%.*]]
+; CHECK-NEXT: ret i1 [[CMP2]]
;
%x = add i32 %a, 3 ; thwart complexity-based canonicalization
%cmp1 = icmp ugt i32 %y, %x
@@ -193,8 +193,8 @@ define i1 @ugt_umax1(i32 %x, i32 %y) {
define i1 @ugt_umax2(i32 %x, i32 %y) {
; CHECK-LABEL: @ugt_umax2(
-; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt i32 [[Y:%.*]], [[X:%.*]]
-; CHECK-NEXT: ret i1 [[CMP1]]
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: ret i1 [[CMP2]]
;
%cmp1 = icmp ugt i32 %y, %x
%sel = select i1 %cmp1, i32 %y, i32 %x
@@ -222,8 +222,8 @@ define i1 @ugt_umax3(i32 %a, i32 %y) {
define i1 @ugt_umax4(i32 %a, i32 %y) {
; CHECK-LABEL: @ugt_umax4(
; CHECK-NEXT: [[X:%.*]] = add i32 [[A:%.*]], 3
-; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[X]], [[Y:%.*]]
-; CHECK-NEXT: ret i1 [[CMP1]]
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[X]], [[Y:%.*]]
+; CHECK-NEXT: ret i1 [[CMP2]]
;
%x = add i32 %a, 3 ; thwart complexity-based canonicalization
%cmp1 = icmp ugt i32 %y, %x
diff --git a/llvm/test/Transforms/InstCombine/umin-icmp.ll b/llvm/test/Transforms/InstCombine/umin-icmp.ll
index ef53d1635b22..f4888c7fccf7 100644
--- a/llvm/test/Transforms/InstCombine/umin-icmp.ll
+++ b/llvm/test/Transforms/InstCombine/umin-icmp.ll
@@ -137,8 +137,8 @@ define i1 @ne_umin1(i32 %x, i32 %y) {
define i1 @ne_umin2(i32 %x, i32 %y) {
; CHECK-LABEL: @ne_umin2(
-; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[Y:%.*]], [[X:%.*]]
-; CHECK-NEXT: ret i1 [[CMP1]]
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ugt i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: ret i1 [[CMP2]]
;
%cmp1 = icmp ult i32 %y, %x
%sel = select i1 %cmp1, i32 %y, i32 %x
@@ -166,8 +166,8 @@ define i1 @ne_umin3(i32 %a, i32 %y) {
define i1 @ne_umin4(i32 %a, i32 %y) {
; CHECK-LABEL: @ne_umin4(
; CHECK-NEXT: [[X:%.*]] = add i32 [[A:%.*]], 3
-; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt i32 [[X]], [[Y:%.*]]
-; CHECK-NEXT: ret i1 [[CMP1]]
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ugt i32 [[X]], [[Y:%.*]]
+; CHECK-NEXT: ret i1 [[CMP2]]
;
%x = add i32 %a, 3 ; thwart complexity-based canonicalization
%cmp1 = icmp ult i32 %y, %x
@@ -193,8 +193,8 @@ define i1 @ult_umin1(i32 %x, i32 %y) {
define i1 @ult_umin2(i32 %x, i32 %y) {
; CHECK-LABEL: @ult_umin2(
-; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[Y:%.*]], [[X:%.*]]
-; CHECK-NEXT: ret i1 [[CMP1]]
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ugt i32 [[X:%.*]], [[Y:%.*]]
+; CHECK-NEXT: ret i1 [[CMP2]]
;
%cmp1 = icmp ult i32 %y, %x
%sel = select i1 %cmp1, i32 %y, i32 %x
@@ -222,8 +222,8 @@ define i1 @ult_umin3(i32 %a, i32 %y) {
define i1 @ult_umin4(i32 %a, i32 %y) {
; CHECK-LABEL: @ult_umin4(
; CHECK-NEXT: [[X:%.*]] = add i32 [[A:%.*]], 3
-; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt i32 [[X]], [[Y:%.*]]
-; CHECK-NEXT: ret i1 [[CMP1]]
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ugt i32 [[X]], [[Y:%.*]]
+; CHECK-NEXT: ret i1 [[CMP2]]
;
%x = add i32 %a, 3 ; thwart complexity-based canonicalization
%cmp1 = icmp ult i32 %y, %x
diff --git a/llvm/test/Transforms/InstCombine/with_overflow.ll b/llvm/test/Transforms/InstCombine/with_overflow.ll
index 84b5042e6186..6d09548179aa 100644
--- a/llvm/test/Transforms/InstCombine/with_overflow.ll
+++ b/llvm/test/Transforms/InstCombine/with_overflow.ll
@@ -559,11 +559,10 @@ define { i8, i1 } @umul_always_overflow(i8 %x) nounwind {
define { i8, i1 } @sadd_always_overflow(i8 %x) nounwind {
; CHECK-LABEL: @sadd_always_overflow(
-; CHECK-NEXT: [[C:%.*]] = icmp sgt i8 [[X:%.*]], 100
-; CHECK-NEXT: [[Y:%.*]] = select i1 [[C]], i8 [[X]], i8 100
-; CHECK-NEXT: [[A:%.*]] = add nuw i8 [[Y]], 28
-; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i8, i1 } { i8 undef, i1 true }, i8 [[A]], 0
-; CHECK-NEXT: ret { i8, i1 } [[TMP1]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.smax.i8(i8 [[X:%.*]], i8 100)
+; CHECK-NEXT: [[A:%.*]] = add nuw i8 [[TMP1]], 28
+; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { i8, i1 } { i8 undef, i1 true }, i8 [[A]], 0
+; CHECK-NEXT: ret { i8, i1 } [[TMP2]]
;
%c = icmp sgt i8 %x, 100
%y = select i1 %c, i8 %x, i8 100
@@ -573,11 +572,10 @@ define { i8, i1 } @sadd_always_overflow(i8 %x) nounwind {
define { i8, i1 } @ssub_always_overflow(i8 %x) nounwind {
; CHECK-LABEL: @ssub_always_overflow(
-; CHECK-NEXT: [[C:%.*]] = icmp sgt i8 [[X:%.*]], 29
-; CHECK-NEXT: [[Y:%.*]] = select i1 [[C]], i8 [[X]], i8 29
-; CHECK-NEXT: [[A:%.*]] = sub nuw i8 -100, [[Y]]
-; CHECK-NEXT: [[TMP1:%.*]] = insertvalue { i8, i1 } { i8 undef, i1 true }, i8 [[A]], 0
-; CHECK-NEXT: ret { i8, i1 } [[TMP1]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.smax.i8(i8 [[X:%.*]], i8 29)
+; CHECK-NEXT: [[A:%.*]] = sub nuw i8 -100, [[TMP1]]
+; CHECK-NEXT: [[TMP2:%.*]] = insertvalue { i8, i1 } { i8 undef, i1 true }, i8 [[A]], 0
+; CHECK-NEXT: ret { i8, i1 } [[TMP2]]
;
%c = icmp sgt i8 %x, 29
%y = select i1 %c, i8 %x, i8 29
@@ -587,9 +585,8 @@ define { i8, i1 } @ssub_always_overflow(i8 %x) nounwind {
define { i8, i1 } @smul_always_overflow(i8 %x) nounwind {
; CHECK-LABEL: @smul_always_overflow(
-; CHECK-NEXT: [[C:%.*]] = icmp sgt i8 [[X:%.*]], 100
-; CHECK-NEXT: [[Y:%.*]] = select i1 [[C]], i8 [[X]], i8 100
-; CHECK-NEXT: [[A:%.*]] = call { i8, i1 } @llvm.smul.with.overflow.i8(i8 [[Y]], i8 2)
+; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.smax.i8(i8 [[X:%.*]], i8 100)
+; CHECK-NEXT: [[A:%.*]] = call { i8, i1 } @llvm.smul.with.overflow.i8(i8 [[TMP1]], i8 2)
; CHECK-NEXT: ret { i8, i1 } [[A]]
;
%c = icmp sgt i8 %x, 100
diff --git a/llvm/test/Transforms/InstCombine/xor.ll b/llvm/test/Transforms/InstCombine/xor.ll
index 569ca46145eb..71453516d30b 100644
--- a/llvm/test/Transforms/InstCombine/xor.ll
+++ b/llvm/test/Transforms/InstCombine/xor.ll
@@ -665,9 +665,10 @@ define i8 @xor_and_not_uses(i8 %x, i8* %p) {
define i32 @test39(i32 %x) {
; CHECK-LABEL: @test39(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt i32 [[X:%.*]], 255
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[X]], i32 255
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[X:%.*]], -1
+; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smax.i32(i32 [[TMP1]], i32 -256)
+; CHECK-NEXT: [[RES:%.*]] = xor i32 [[TMP2]], -1
+; CHECK-NEXT: ret i32 [[RES]]
;
%1 = xor i32 %x, -1
%2 = icmp sgt i32 %1, -256
@@ -678,9 +679,9 @@ define i32 @test39(i32 %x) {
define i32 @test40(i32 %x, i32 %y) {
; CHECK-LABEL: @test40(
-; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[Y:%.*]], -1
-; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[TMP1]], [[X:%.*]]
-; CHECK-NEXT: [[RES:%.*]] = select i1 [[TMP2]], i32 [[X]], i32 [[TMP1]]
+; CHECK-NEXT: [[NOTX:%.*]] = xor i32 [[X:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[NOTX]], i32 [[Y:%.*]])
+; CHECK-NEXT: [[RES:%.*]] = xor i32 [[TMP1]], -1
; CHECK-NEXT: ret i32 [[RES]]
;
%notx = xor i32 %x, -1
@@ -692,9 +693,9 @@ define i32 @test40(i32 %x, i32 %y) {
define i32 @test41(i32 %x, i32 %y) {
; CHECK-LABEL: @test41(
-; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[Y:%.*]], -1
-; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP1]], [[X:%.*]]
-; CHECK-NEXT: [[RES:%.*]] = select i1 [[TMP2]], i32 [[X]], i32 [[TMP1]]
+; CHECK-NEXT: [[NOTX:%.*]] = xor i32 [[X:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[NOTX]], i32 [[Y:%.*]])
+; CHECK-NEXT: [[RES:%.*]] = xor i32 [[TMP1]], -1
; CHECK-NEXT: ret i32 [[RES]]
;
%notx = xor i32 %x, -1
@@ -706,9 +707,9 @@ define i32 @test41(i32 %x, i32 %y) {
define i32 @test42(i32 %x, i32 %y) {
; CHECK-LABEL: @test42(
-; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[Y:%.*]], -1
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ugt i32 [[TMP1]], [[X:%.*]]
-; CHECK-NEXT: [[RES:%.*]] = select i1 [[TMP2]], i32 [[X]], i32 [[TMP1]]
+; CHECK-NEXT: [[NOTX:%.*]] = xor i32 [[X:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[NOTX]], i32 [[Y:%.*]])
+; CHECK-NEXT: [[RES:%.*]] = xor i32 [[TMP1]], -1
; CHECK-NEXT: ret i32 [[RES]]
;
%notx = xor i32 %x, -1
@@ -720,9 +721,9 @@ define i32 @test42(i32 %x, i32 %y) {
define i32 @test43(i32 %x, i32 %y) {
; CHECK-LABEL: @test43(
-; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[Y:%.*]], -1
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 [[TMP1]], [[X:%.*]]
-; CHECK-NEXT: [[RES:%.*]] = select i1 [[TMP2]], i32 [[X]], i32 [[TMP1]]
+; CHECK-NEXT: [[NOTX:%.*]] = xor i32 [[X:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[NOTX]], i32 [[Y:%.*]])
+; CHECK-NEXT: [[RES:%.*]] = xor i32 [[TMP1]], -1
; CHECK-NEXT: ret i32 [[RES]]
;
%notx = xor i32 %x, -1
@@ -734,9 +735,10 @@ define i32 @test43(i32 %x, i32 %y) {
define i32 @test44(i32 %x, i32 %y) {
; CHECK-LABEL: @test44(
-; CHECK-NEXT: [[TMP1:%.*]] = sub i32 -4, [[Y:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ugt i32 [[TMP1]], [[X:%.*]]
-; CHECK-NEXT: [[RES:%.*]] = select i1 [[TMP2]], i32 [[TMP1]], i32 [[X]]
+; CHECK-NEXT: [[Z:%.*]] = add i32 [[Y:%.*]], 3
+; CHECK-NEXT: [[NOTX:%.*]] = xor i32 [[X:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[Z]], i32 [[NOTX]])
+; CHECK-NEXT: [[RES:%.*]] = xor i32 [[TMP1]], -1
; CHECK-NEXT: ret i32 [[RES]]
;
%z = add i32 %y, 3 ; thwart complexity-based canonicalization
@@ -749,9 +751,11 @@ define i32 @test44(i32 %x, i32 %y) {
define i32 @test45(i32 %x, i32 %y) {
; CHECK-LABEL: @test45(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[Y:%.*]], [[X:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 [[Y]], i32 [[X]]
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[Z:%.*]] = xor i32 [[Y:%.*]], -1
+; CHECK-NEXT: [[NOTX:%.*]] = xor i32 [[X:%.*]], -1
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[Z]], i32 [[NOTX]])
+; CHECK-NEXT: [[RES:%.*]] = xor i32 [[TMP1]], -1
+; CHECK-NEXT: ret i32 [[RES]]
;
%z = xor i32 %y, -1
%notx = xor i32 %x, -1
@@ -764,9 +768,10 @@ define i32 @test45(i32 %x, i32 %y) {
; Check that we work with splat vectors also.
define <4 x i32> @test46(<4 x i32> %x) {
; CHECK-LABEL: @test46(
-; CHECK-NEXT: [[TMP1:%.*]] = icmp slt <4 x i32> [[X:%.*]], <i32 255, i32 255, i32 255, i32 255>
-; CHECK-NEXT: [[TMP2:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[X]], <4 x i32> <i32 255, i32 255, i32 255, i32 255>
-; CHECK-NEXT: ret <4 x i32> [[TMP2]]
+; CHECK-NEXT: [[TMP1:%.*]] = xor <4 x i32> [[X:%.*]], <i32 -1, i32 -1, i32 -1, i32 -1>
+; CHECK-NEXT: [[TMP2:%.*]] = call <4 x i32> @llvm.smax.v4i32(<4 x i32> [[TMP1]], <4 x i32> <i32 -256, i32 -256, i32 -256, i32 -256>)
+; CHECK-NEXT: [[TMP3:%.*]] = xor <4 x i32> [[TMP2]], <i32 -1, i32 -1, i32 -1, i32 -1>
+; CHECK-NEXT: ret <4 x i32> [[TMP3]]
;
%1 = xor <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1>
%2 = icmp sgt <4 x i32> %1, <i32 -256, i32 -256, i32 -256, i32 -256>
@@ -779,10 +784,9 @@ define <4 x i32> @test46(<4 x i32> %x) {
define i32 @test47(i32 %x, i32 %y, i32 %z) {
; CHECK-LABEL: @test47(
; CHECK-NEXT: [[NOTX:%.*]] = xor i32 [[X:%.*]], -1
-; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt i32 [[NOTX]], [[Y:%.*]]
-; CHECK-NEXT: [[UMAX:%.*]] = select i1 [[CMP1]], i32 [[NOTX]], i32 [[Y]]
-; CHECK-NEXT: [[UMIN:%.*]] = xor i32 [[UMAX]], -1
-; CHECK-NEXT: [[ADD:%.*]] = add i32 [[UMAX]], [[Z:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umax.i32(i32 [[NOTX]], i32 [[Y:%.*]])
+; CHECK-NEXT: [[UMIN:%.*]] = xor i32 [[TMP1]], -1
+; CHECK-NEXT: [[ADD:%.*]] = add i32 [[TMP1]], [[Z:%.*]]
; CHECK-NEXT: [[RES:%.*]] = mul i32 [[ADD]], [[UMIN]]
; CHECK-NEXT: ret i32 [[RES]]
;
@@ -797,9 +801,9 @@ define i32 @test47(i32 %x, i32 %y, i32 %z) {
define i32 @test48(i32 %x) {
; CHECK-LABEL: @test48(
-; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X:%.*]], 1
-; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP1]], -1
-; CHECK-NEXT: [[D:%.*]] = select i1 [[TMP2]], i32 [[TMP1]], i32 -1
+; CHECK-NEXT: [[A:%.*]] = sub i32 -2, [[X:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[A]], i32 0)
+; CHECK-NEXT: [[D:%.*]] = xor i32 [[TMP1]], -1
; CHECK-NEXT: ret i32 [[D]]
;
%a = sub i32 -2, %x
@@ -811,9 +815,9 @@ define i32 @test48(i32 %x) {
define <2 x i32> @test48vec(<2 x i32> %x) {
; CHECK-LABEL: @test48vec(
-; CHECK-NEXT: [[TMP1:%.*]] = add <2 x i32> [[X:%.*]], <i32 1, i32 1>
-; CHECK-NEXT: [[TMP2:%.*]] = icmp slt <2 x i32> [[TMP1]], <i32 -1, i32 -1>
-; CHECK-NEXT: [[D:%.*]] = select <2 x i1> [[TMP2]], <2 x i32> [[TMP1]], <2 x i32> <i32 -1, i32 -1>
+; CHECK-NEXT: [[A:%.*]] = sub <2 x i32> <i32 -2, i32 -2>, [[X:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smax.v2i32(<2 x i32> [[A]], <2 x i32> zeroinitializer)
+; CHECK-NEXT: [[D:%.*]] = xor <2 x i32> [[TMP1]], <i32 -1, i32 -1>
; CHECK-NEXT: ret <2 x i32> [[D]]
;
%a = sub <2 x i32> <i32 -2, i32 -2>, %x
@@ -825,9 +829,9 @@ define <2 x i32> @test48vec(<2 x i32> %x) {
define i32 @test49(i32 %x) {
; CHECK-LABEL: @test49(
-; CHECK-NEXT: [[TMP1:%.*]] = sub i32 1, [[X:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[TMP1]], 0
-; CHECK-NEXT: [[D:%.*]] = select i1 [[TMP2]], i32 [[TMP1]], i32 0
+; CHECK-NEXT: [[A:%.*]] = add i32 [[X:%.*]], -2
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[A]], i32 -1)
+; CHECK-NEXT: [[D:%.*]] = xor i32 [[TMP1]], -1
; CHECK-NEXT: ret i32 [[D]]
;
%a = add i32 %x, -2
@@ -839,9 +843,9 @@ define i32 @test49(i32 %x) {
define <2 x i32> @test49vec(<2 x i32> %x) {
; CHECK-LABEL: @test49vec(
-; CHECK-NEXT: [[TMP1:%.*]] = sub <2 x i32> <i32 1, i32 1>, [[X:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt <2 x i32> [[TMP1]], zeroinitializer
-; CHECK-NEXT: [[D:%.*]] = select <2 x i1> [[TMP2]], <2 x i32> [[TMP1]], <2 x i32> zeroinitializer
+; CHECK-NEXT: [[A:%.*]] = add <2 x i32> [[X:%.*]], <i32 -2, i32 -2>
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[A]], <2 x i32> <i32 -1, i32 -1>)
+; CHECK-NEXT: [[D:%.*]] = xor <2 x i32> [[TMP1]], <i32 -1, i32 -1>
; CHECK-NEXT: ret <2 x i32> [[D]]
;
%a = add <2 x i32> %x, <i32 -2, i32 -2>
@@ -853,10 +857,10 @@ define <2 x i32> @test49vec(<2 x i32> %x) {
define i32 @test50(i32 %x, i32 %y) {
; CHECK-LABEL: @test50(
-; CHECK-NEXT: [[TMP1:%.*]] = sub i32 1, [[X:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[Y:%.*]], 1
-; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[TMP1]], [[TMP2]]
-; CHECK-NEXT: [[E:%.*]] = select i1 [[TMP3]], i32 [[TMP1]], i32 [[TMP2]]
+; CHECK-NEXT: [[A:%.*]] = add i32 [[X:%.*]], -2
+; CHECK-NEXT: [[B:%.*]] = sub i32 -2, [[Y:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smin.i32(i32 [[A]], i32 [[B]])
+; CHECK-NEXT: [[E:%.*]] = xor i32 [[TMP1]], -1
; CHECK-NEXT: ret i32 [[E]]
;
%a = add i32 %x, -2
@@ -869,10 +873,10 @@ define i32 @test50(i32 %x, i32 %y) {
define <2 x i32> @test50vec(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @test50vec(
-; CHECK-NEXT: [[TMP1:%.*]] = sub <2 x i32> <i32 1, i32 1>, [[X:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = add <2 x i32> [[Y:%.*]], <i32 1, i32 1>
-; CHECK-NEXT: [[TMP3:%.*]] = icmp sgt <2 x i32> [[TMP1]], [[TMP2]]
-; CHECK-NEXT: [[E:%.*]] = select <2 x i1> [[TMP3]], <2 x i32> [[TMP1]], <2 x i32> [[TMP2]]
+; CHECK-NEXT: [[A:%.*]] = add <2 x i32> [[X:%.*]], <i32 -2, i32 -2>
+; CHECK-NEXT: [[B:%.*]] = sub <2 x i32> <i32 -2, i32 -2>, [[Y:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smin.v2i32(<2 x i32> [[A]], <2 x i32> [[B]])
+; CHECK-NEXT: [[E:%.*]] = xor <2 x i32> [[TMP1]], <i32 -1, i32 -1>
; CHECK-NEXT: ret <2 x i32> [[E]]
;
%a = add <2 x i32> %x, <i32 -2, i32 -2>
@@ -885,10 +889,10 @@ define <2 x i32> @test50vec(<2 x i32> %x, <2 x i32> %y) {
define i32 @test51(i32 %x, i32 %y) {
; CHECK-LABEL: @test51(
-; CHECK-NEXT: [[TMP1:%.*]] = sub i32 -3, [[X:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[Y:%.*]], -3
-; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i32 [[TMP1]], [[TMP2]]
-; CHECK-NEXT: [[E:%.*]] = select i1 [[TMP3]], i32 [[TMP1]], i32 [[TMP2]]
+; CHECK-NEXT: [[A:%.*]] = add i32 [[X:%.*]], 2
+; CHECK-NEXT: [[B:%.*]] = sub i32 2, [[Y:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.smax.i32(i32 [[A]], i32 [[B]])
+; CHECK-NEXT: [[E:%.*]] = xor i32 [[TMP1]], -1
; CHECK-NEXT: ret i32 [[E]]
;
%a = add i32 %x, 2
@@ -901,10 +905,10 @@ define i32 @test51(i32 %x, i32 %y) {
define <2 x i32> @test51vec(<2 x i32> %x, <2 x i32> %y) {
; CHECK-LABEL: @test51vec(
-; CHECK-NEXT: [[TMP1:%.*]] = sub <2 x i32> <i32 -3, i32 -3>, [[X:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = add <2 x i32> [[Y:%.*]], <i32 -3, i32 -3>
-; CHECK-NEXT: [[TMP3:%.*]] = icmp slt <2 x i32> [[TMP1]], [[TMP2]]
-; CHECK-NEXT: [[E:%.*]] = select <2 x i1> [[TMP3]], <2 x i32> [[TMP1]], <2 x i32> [[TMP2]]
+; CHECK-NEXT: [[A:%.*]] = add <2 x i32> [[X:%.*]], <i32 2, i32 2>
+; CHECK-NEXT: [[B:%.*]] = sub <2 x i32> <i32 2, i32 2>, [[Y:%.*]]
+; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.smax.v2i32(<2 x i32> [[A]], <2 x i32> [[B]])
+; CHECK-NEXT: [[E:%.*]] = xor <2 x i32> [[TMP1]], <i32 -1, i32 -1>
; CHECK-NEXT: ret <2 x i32> [[E]]
;
%a = add <2 x i32> %x, <i32 2, i32 2>
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