gistfile1.txt

From 0d3dedb229a0841499247f78098eee9d13cfff41 Mon Sep 17 00:00:00 2001
From: Jian Xiong <jian.xiong@seeed.cc>
Date: Mon, 12 Dec 2022 12:35:16 -0600
Subject: [PATCH 1/3] arm64: dts: ti: am625-weeping-coyote: Switch to
 gpio-regulator for sd-voltage

The LDO1 configuration in NVM is setup such that the gpio control of the
PMIC setsup the voltage of the LDO1_OUT voltage.

This implies that when the GPIO is high, the LDO1 regulator's VSET
register value is used as the output voltage, but when the GPIO goes
low, the voltage automatically switches over to 1.8V and VSET has no
further control of the voltage.

We can attempt to model this configuration in one of two ways:
a) Force a GPIO Hog and force the GPIO level to be high always and
   control the voltage via regulator driver, but this will require
   the default bypass configuration to be overriden in some form.
OR
b) Lets lock the VSET register to be 3.3v and model the GPIO control
   as a gpio-regulator with 2 voltage setting values to be selected
   on the fly as necessary.

This patch takes approach (b). As part of this change, The pinmux
configuration for the GPIO control is now done as part of the
regulator initialization.

Signed-off-by: Jian Xiong <jian.xiong@seeed.cc>
Signed-off-by: Nishanth Menon <nm@ti.com>
---
 .../arm64/boot/dts/ti/k3-am625-weeping-coyote.dts | 36 +++++++++++++------
 1 file changed, 26 insertions(+), 10 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am625-weeping-coyote.dts b/arch/arm64/boot/dts/ti/k3-am625-weeping-coyote.dts
index cb8f7d82a400..b896566b2b5f 100644
--- a/arch/arm64/boot/dts/ti/k3-am625-weeping-coyote.dts
+++ b/arch/arm64/boot/dts/ti/k3-am625-weeping-coyote.dts
@@ -157,6 +157,20 @@ vdd_3v3_sd: regulator-4 {
 		gpios = <&main_gpio1 19 GPIO_ACTIVE_HIGH>;
 	};
 
+	vdd_sd_dv: regulator-5 {
+		compatible = "regulator-gpio";
+		regulator-name = "sd_hs200_switch";
+		pinctrl-names = "default";
+		pinctrl-0 = <&vdd_sd_dv_pins_default>;
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+		vin-supply = <&vdd_3v3>;
+		gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>;
+		states = <1800000 0x0>,
+			 <3300000 0x1>;
+	};
+
 	leds {
 		compatible = "gpio-leds";
 
@@ -354,9 +368,9 @@ AM62X_IOPAD(0x00ac, PIN_INPUT, 7) /* (L21) GPMC0_CSn1.GPIO0_42 */
 		>;
 	};
 
-	gpio1_pins_default: gpio1-pins-default {
+	vdd_sd_dv_pins_default: vdd-sd-pins-default {
 		pinctrl-single,pins = <
-			AM62X_IOPAD(0x0244, PIN_INPUT, 7) /* (C17) MMC1_SDWP.GPIO1_49 */
+			AM62X_IOPAD(0x0244, PIN_OUTPUT, 7) /* (C17) MMC1_SDWP.GPIO1_49 */
 		>;
 	};
 
@@ -838,11 +852,6 @@ &main_gpio0 {
 	pinctrl-0 = <&gpio0_pins_default>;
 };
 
-&main_gpio1 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&gpio1_pins_default>;
-};
-
 &main_i2c0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&local_i2c_pins_default>;
@@ -908,10 +917,17 @@ buck3_reg: buck3 {
 			};
 
 			ldo1_reg: ldo1 {
-				regulator-name = "VDD_SD";
-				regulator-min-microvolt = <1800000>;
+				/*
+				 * Regulator is left as is unused, vdd_sd
+				 * is controlled via GPIO with bypass config
+				 * as per the NVM configuration
+				 */
+				regulator-name = "VDD_SD_3V3";
+				regulator-min-microvolt = <3300000>;
 				regulator-max-microvolt = <3300000>;
 				regulator-allow-bypass;
+				regulator-boot-on;
+				regulator-always-on;
 			};
 
 			ldo2_reg: ldo2 {
@@ -1044,7 +1060,7 @@ &sdhci1 {
 	pinctrl-0 = <&sd_pins_default>;
 
 	vmmc-supply = <&vdd_3v3_sd>;
-	vqmmc-supply = <&ldo1_reg>;
+	vqmmc-supply = <&vdd_sd_dv>;
 	ti,driver-strength-ohm = <50>;
 	no-1-8-v;
 	disable-wp;
-- 
2.31.1