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@nophead
Last active April 24, 2018 14:57
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ESP8266 HSPI interrupt handler for spying on a SPI bus
const int length = 12; // length of packet minus the first byte
uint8_t data[length]; // raw data received
volatile bool data_ready = false; // set by HSPI interrupt handler when data is received
void ICACHE_RAM_ATTR hspi_slave_isr_handler(void *) {
uint32_t istatus = SPIIR;
if(istatus & (1 << SPII1)) { //SPI1 ISR
uint32_t status = SPI1S;
SPI1S &= ~(0x3E0); //disable interrupts
SPI1S |= SPISSRES; //reset
SPI1S &= ~(0x1F); //clear interrupts
SPI1S |= (0x3E0); //enable interrupts
if(status & SPISWBIS) {
uint8_t *p = data;
for(int i = 0; i < length / 4; i++) {
uint32_t dword = SPI1W(i);
*p++ = dword;
*p++ = dword >> 8;
*p++ = dword >> 16;
*p++ = dword >> 24;
}
data_ready = true;
}
} else if(istatus & (1 << SPII0)) { //SPI0 ISR
SPI0S &= ~(0x3ff);//clear SPI ISR
} else if(istatus & (1 << SPII2)) {} //I2S ISR
}
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