HY SYN LAB 2-1

lab2-1.asm

.INCLUDE "m168def.inc"
.LIST
.CSEG
.ORG 0

jmp main

.DEF addr1 = R30
.DEF addr2 = R31
.DEF data = R29
.DEF opa3 = R16
.DEF opa2 = R17
.DEF opa1 = R18
.DEF opa0 = R19
.DEF opb3 = R20
.DEF opb2 = R21
.DEF opb1 = R22
.DEF opb0 = R23

; Read from addr(r30:r31) put into r29
read:
    ; Wait for completion of previous write
	sbic EECR, EEPE
	rjmp read
	; Set up address (r30:r31) in address register
	out EEARH, R30
	out EEARL, R31
	; Start eeprom read by setting EERE
	sbi EECR, EERE
	in R29, EEDR
	ret

; Write r29 to addr (r30:r31)
write:
	; Wait for completion of previous write
	sbic EECR, EEPE
	rjmp write
	; Set up address (r30:r31) in address register
	out EEARH, R30
	out EEARL, R31
	; Write data (r29) to register
	out EEDR, R29
	; Write logical one to EEMPE
	sbi EECR, EEMPE
	; Start eeprom write by setting EEPE
	sbi EECR, EEPE
	ret

main:
	ldi addr1, 0x00

	; EEPROM test case
	ldi data, 0x01
	ldi addr2, 0x00
	call write
	ldi data, 0x23
	ldi addr2, 0x01
	call write
	ldi data, 0x45
	ldi addr2, 0x02
	call write
	ldi data, 0x67
	ldi addr2, 0x03
	call write
	ldi data, 0x89
	ldi addr2, 0x04
	call write
	ldi data, 0xAB
	ldi addr2, 0x05
	call write
	ldi data, 0xCD
	ldi addr2, 0x06
	call write
	ldi data, 0xEF
	ldi addr2, 0x07
	call write

	; Load op A
	ldi addr2, 0x00
	call read
	mov opa3, data

	ldi addr2, 0x01
	call read
	mov opa2, data

	ldi addr2, 0x02
	call read
	mov opa1, data

	ldi addr2, 0x03
	call read
	mov opa0, data

	; Load op B
	ldi addr2, 0x04
	call read
	mov opb3, data

	ldi addr2, 0x05
	call read
	mov opb2, data

	ldi addr2, 0x06
	call read
	mov opb1, data

	ldi addr2, 0x07
	call read
	mov opb0, data

	; 32-bit add
	add opa0, opb0	
	adc opa1, opb1
	adc opa2, opb2
	adc opa3, opb3

	; write to EEPROM
	mov data, opa3
	ldi addr2, 0x10
	call write

	mov data, opa2
	ldi addr2, 0x11
	call write

	mov data, opa1
	ldi addr2, 0x12
	call write

	mov data, opa0
	ldi addr2, 0x13
	call write
	
	jmp loop
	

loop:
	NOP
	jmp loop