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@nzbr
Last active October 11, 2019 11:00
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Makefile that compiles .v and .c files into a single binary
V=v
CC=gcc
LD=gcc
LINKFLAGS=-lm -lpthread -ldl
BINARY=program.elf
OBJECTS=_vcode.o $(patsubst %.c,%.o,$(wildcard *.c))
all : $(BINARY)
_vcode.c : $(wildcard *.v)
@printf " V\t$@\n"
@$(V) -o $@ .
%.o : %.c
@printf " CC\t$@\n"
@$(CC) $(CFLAGS) --std=gnu11 -o $@ -c $<
$(BINARY) : $(OBJECTS)
@printf " LD\t$@\n"
@$(LD) $(LINKFLAGS) -o $@ $+
clean : _rm._vcode.c _rm.$(BINARY) $(patsubst %,_rm.%,$(OBJECTS))
_rm.% :
@printf " RM\t$(patsubst _rm.%,%,$@)\n"
@-rm -f $(patsubst _rm.%,%,$@)
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