-
-
Save oneoa/f37ffb2ad8ea600e760043e5764a84e2 to your computer and use it in GitHub Desktop.
AMD Ryzen 3 2200G - CoreFreq 1.87.4
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
# corefreq-cli -s | |
Processor [AMD Ryzen 3 2200G with Radeon Vega Graphics] | |
|- Architecture [Zen/Raven Ridge] | |
|- Vendor ID [AuthenticAMD] | |
|- Microcode [0x08101013] | |
|- Signature [ 8F_11] | |
|- Stepping [ 0] | |
|- Online CPU [ 4/ 4] | |
|- Base Clock [ 99.810] | |
|- Frequency (MHz) Ratio | |
Min 1596.96 < 16 > | |
Max 3493.36 < 35 > | |
|- Factory [100.000] | |
3500 [ 35 ] | |
|- Performance | |
|- P-State | |
TGT 3493.38 < 35 > | |
|- Turbo Boost [ UNLOCK] | |
XFR 3692.98 [ 37 ] | |
CPB 3692.98 [ 37 ] | |
1C 2295.64 < 23 > | |
2C 1596.96 < 16 > | |
|- Uncore [ LOCK] | |
Min 1497.15 [ 15 ] | |
Max 1497.15 [ 15 ] | |
|- TDP Level [ 0:0 ] | |
|- Programmable [ LOCK] | |
Instruction Set Extensions | |
|- 3DNow!/Ext [N/N] ADX [Y] AES [Y] AVX/AVX2 [Y/Y] | |
|- AVX512-F [N] AVX512-DQ [N] AVX512-IFMA [N] AVX512-PF [N] | |
|- AVX512-ER [N] AVX512-CD [N] AVX512-BW [N] AVX512-VL [N] | |
|- AVX512-VBMI [N] AVX512-VBMI2 [N] AVX512-VNMI [N] AVX512-ALG [N] | |
|- AVX512-VPOP [N] AVX512-VNNIW [N] AVX512-FMAPS [N] AVX512-VP2I [N] | |
|- AVX512-BF16 [N] BMI1/BMI2 [Y/Y] CLWB [N] CLFLUSH/O [Y/Y] | |
|- CLAC-STAC [Y] CMOV [Y] CMPXCHG8B [Y] CMPXCHG16B [Y] | |
|- F16C [Y] FPU [Y] FXSR [Y] LAHF-SAHF [Y] | |
|- MMX/Ext [Y/Y] MON/MWAITX [Y/Y] MOVBE [Y] PCLMULQDQ [Y] | |
|- POPCNT [Y] RDRAND [Y] RDSEED [Y] RDTSCP [Y] | |
|- SEP [Y] SHA [Y] SSE [Y] SSE2 [Y] | |
|- SSE3 [Y] SSSE3 [Y] SSE4.1/4A [Y/Y] SSE4.2 [Y] | |
|- SERIALIZE [N] SYSCALL [Y] RDPID [N] UMIP [N] | |
Features | |
|- 1 GB Pages Support 1GB-PAGES [Capable] | |
|- 100 MHz multiplier Control 100MHzSteps [Missing] | |
|- Advanced Configuration & Power Interface ACPI [Capable] | |
|- Advanced Programmable Interrupt Controller APIC [Capable] | |
|- Core Multi-Processing CMP Legacy [Capable] | |
|- L1 Data Cache Context ID CNXT-ID [Missing] | |
|- Collaborative Processor Performance Control CPPC [Missing] | |
|- Direct Cache Access DCA [Missing] | |
|- Debugging Extension DE [Capable] | |
|- Debug Store & Precise Event Based Sampling DS, PEBS [Missing] | |
|- CPL Qualified Debug Store DS-CPL [Missing] | |
|- 64-Bit Debug Store DTES64 [Missing] | |
|- Fast-String Operation Fast-Strings [Missing] | |
|- Fused Multiply Add FMA | FMA4 [Capable] | |
|- Hardware Lock Elision HLE [Missing] | |
|- Instruction Based Sampling IBS [Missing] | |
|- Instruction INVLPGB INVLPGB [Missing] | |
|- Long Mode 64 bits IA64 | LM [Capable] | |
|- LightWeight Profiling LWP [Missing] | |
|- Memory Bandwidth Enforcement MBE [Missing] | |
|- Machine-Check Architecture MCA [Capable] | |
|- Instruction MCOMMIT MCOMMIT [Missing] | |
|- Memory Protection Extensions MPX [Missing] | |
|- Model Specific Registers MSR [Capable] | |
|- Memory Type Range Registers MTRR [Capable] | |
|- No-Execute Page Protection NX [Capable] | |
|- OS-Enabled Ext. State Management OSXSAVE [Capable] | |
|- Physical Address Extension PAE [Capable] | |
|- Page Attribute Table PAT [Capable] | |
|- Pending Break Enable PBE [Missing] | |
|- Process Context Identifiers PCID [Missing] | |
|- Perfmon and Debug Capability PDCM [Missing] | |
|- Page Global Enable PGE [Capable] | |
|- Page Size Extension PSE [Capable] | |
|- 36-bit Page Size Extension PSE36 [Capable] | |
|- Processor Serial Number PSN [Missing] | |
|- Resource Director Technology/PQE RDT-A [Missing] | |
|- Resource Director Technology/PQM RDT-M [Missing] | |
|- Read Processor Register at User level RDPRU [Missing] | |
|- Restricted Transactional Memory RTM [Missing] | |
|- Safer Mode Extensions SMX [Missing] | |
|- Self-Snoop SS [Missing] | |
|- Supervisor-Mode Access Prevention SMAP [Capable] | |
|- Supervisor-Mode Execution Prevention SMEP [Capable] | |
|- Time Stamp Counter TSC [Invariant] | |
|- Time Stamp Counter Deadline TSC-DEADLINE [Missing] | |
|- TSX Force Abort MSR Register TSX-ABORT [Missing] | |
|- TSX Suspend Load Address Tracking TSX-LDTRK [Missing] | |
|- User-Mode Instruction Prevention UMIP [Missing] | |
|- Virtual Mode Extension VME [Capable] | |
|- Virtual Machine Extensions VMX [Missing] | |
|- Extended xAPIC Support x2APIC [ xAPIC] | |
|- XSAVE/XSTOR States XSAVE [Capable] | |
|- xTPR Update Control xTPR [Missing] | |
Mitigation mechanisms | |
|- Indirect Branch Restricted Speculation IBRS [Missing] | |
|- Indirect Branch Prediction Barrier IBPB [Capable] | |
|- Single Thread Indirect Branch Predictor STIBP [Missing] | |
|- Speculative Store Bypass Disable SSBD [Missing] | |
|- Architectural - Predictive Store Forwarding PSFD [Missing] | |
Technologies | |
|- Data Cache Unit | |
|- L1 Prefetcher L1 HW < ON> | |
|- L2 Prefetcher L2 HW < ON> | |
|- System Management Mode SMM-Lock [ ON] | |
|- Simultaneous Multithreading SMT [OFF] | |
|- PowerNow! CnQ [OFF] | |
|- Core C-States CCx [ ON] | |
|- Core Performance Boost CPB < ON> | |
|- Watchdog Timer WDT < ON> | |
|- Virtualization SVM [ ON] | |
|- I/O MMU AMD-V [ ON] | |
|- Version [ 0.1] | |
|- Hypervisor [OFF] | |
|- Vendor ID [ N/A] | |
Performance Monitoring | |
|- Version PM [N/A] | |
|- Counters: General Fixed | |
| 6 x 64 bits 3 x 64 bits | |
|- Enhanced Halt State C1E <OFF> | |
|- C2 UnDemotion C2U <OFF> | |
|- C3 UnDemotion C3U < ON> | |
|- Core C6 State CC6 < ON> | |
|- Package C6 State PC6 < ON> | |
|- Legacy Frequency ID control FID [OFF] | |
|- Legacy Voltage ID control VID [OFF] | |
|- P-State Hardware Coordination Feedback MPERF/APERF [ ON] | |
|- Hardware-Controlled Performance States HWP [ ON] | |
|- Core C-States | |
|- C-States Base Address BAR [ 0x413 ] | |
|- MONITOR/MWAIT | |
|- State index: #0 #1 #2 #3 #4 #5 #6 #7 | |
|- Sub C-State: 1 1 0 0 0 0 0 0 | |
|- Core Cycles [Capable] | |
|- Instructions Retired [Capable] | |
|- Reference Cycles [Capable] | |
|- Last Level Cache References [Capable] | |
|- Performance Time Stamp Counter [Missing] | |
|- Data Fabric Performance Counter [Capable] | |
|- Core Performance Counter [Capable] | |
Power, Current & Thermal | |
|- Junction Temperature TjMax [ 0: 0C] | |
|- Digital Thermal Sensor DTS [Capable] | |
|- Power Limit Notification PLN [Missing] | |
|- Package Thermal Management PTM [Missing] | |
|- Thermal Monitor 1 TTP [Capable] | |
|- Thermal Monitor 2 HTC [Capable] | |
|- Thermal Design Power TDP [Missing] | |
|- Minimum Power Min [Missing] | |
|- Maximum Power Max [Missing] | |
|- Thermal Design Power Package [Disable] | |
|- Power Limit PL1 [Missing] | |
|- Power Limit PL2 [Missing] | |
|- Thermal Design Power Core [Disable] | |
|- Power Limit PL1 [Missing] | |
|- Thermal Design Power Uncore [Disable] | |
|- Power Limit PL1 [Missing] | |
|- Thermal Design Power DRAM [Disable] | |
|- Power Limit PL1 [Missing] | |
|- Thermal Design Power Platform [Disable] | |
|- Power Limit PL1 [Missing] | |
|- Power Limit PL2 [Missing] | |
|- Package Power Tracking PPT [Missing] | |
|- Electrical Design Current EDC [Missing] | |
|- Thermal Design Current TDC [Missing] | |
|- Units | |
|- Power watt [ 0.125000000] | |
|- Energy joule [ 0.000015259] | |
|- Window second [ 0.000976562] |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
# corefreq-cli -M | |
Zen UMC [15EB] | |
Controller #0 Dual Channel | |
Bus Rate 1500 MT/s Bus Speed 1497 MHz DRAM Speed 2994 MHz | |
Cha CL RCDR RCDW RP RAS RC RRDS RRDL FAW WTRS WTRL WR clRR clWW | |
#0 16 18 18 18 36 70 6 8 32 4 12 24 5 5 | |
#1 16 18 18 18 36 70 6 8 32 4 12 24 5 5 | |
CWL RTP RdWr WrRd scWW sdWW ddWW scRR sdRR ddRR drRR drWW drWR drRRD | |
#0 16 12 7 4 1 6 6 1 4 4 0 0 0 0 | |
#1 16 12 7 3 1 6 6 1 4 4 0 0 0 0 | |
REFI RFC1 RFC2 RFC4 RCPB RPPB BGS:Alt Ban Page CKE CMD GDM ECC | |
#0 11695 312 192 132 0 0 ON OFF R1W1 0 8 1T ON 0 | |
#1 11695 312 192 132 0 0 ON OFF R1W1 0 8 1T ON 0 | |
MRD:PDA MOD:PDA STAG PDM RDDATA PHY [WRD WRL RDL] WRMPR | |
#0 8 16 24 24 8 0:P:0 11 2 11 24 24 | |
#1 8 16 24 24 8 0:P:0 11 2 11 24 24 | |
DIMM Geometry for channel #0 | |
Slot Bank Rank Rows Columns Memory Size (MB) | |
#0 | |
#1 16 1 65536 1024 8192 | |
DIMM Geometry for channel #1 | |
Slot Bank Rank Rows Columns Memory Size (MB) | |
#0 | |
#1 16 1 65536 1024 8192 |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
# corefreq-cli -R | |
CPU FLAG TF IF IOPL NT RF VM AC VIF VIP ID | |
#0 0 0 0 0 0 0 0 0 0 0 | |
#1 0 0 0 0 0 0 0 0 0 0 | |
#2 0 0 0 0 0 0 0 0 0 0 | |
#3 0 0 0 0 0 0 0 0 0 0 | |
CR0: PE MP EM TS ET NE WP AM NW CD PG CR3: PWT PCD | |
#0 1 1 0 0 1 1 1 1 0 0 1 0 0 | |
#1 1 1 0 0 1 1 1 1 0 0 1 0 0 | |
#2 1 1 0 0 1 1 1 1 0 0 1 0 0 | |
#3 1 1 0 0 1 1 1 1 0 0 1 0 0 | |
CR4: VME PVI TSD DE PSE PAE MCE PGE PCE FX XMM UMIP 5LP VMX SMX FS | |
#0 0 0 0 0 1 1 1 1 0 1 1 0 0 0 0 1 | |
#1 0 0 0 0 0 1 1 1 0 1 1 0 0 0 0 1 | |
#2 0 0 0 0 0 1 1 1 0 1 1 0 0 0 0 1 | |
#3 0 0 0 0 0 1 1 1 0 1 1 0 0 0 0 1 | |
CR4:PCID SAV KL SME SMA PKE CET PKS CR8: TPL | |
#0 0 1 0 1 1 0 0 0 0 | |
#1 0 1 0 1 1 0 0 0 0 | |
#2 0 1 0 1 1 0 0 0 0 | |
#3 0 1 0 1 1 0 0 0 0 | |
EFCR LCK VMX^SGX [SENTER] [ SGX ] LMC | |
#0 - - - - - - - - | |
#1 - - - - - - - - | |
#2 - - - - - - - - | |
#3 - - - - - - - - | |
EFER SCE LME LMA NXE SVM LMS FFX TCE MCM WBI | |
#0 1 1 1 1 0 0 0 0 0 0 | |
#1 1 1 1 1 0 0 0 0 0 0 | |
#2 1 1 1 1 0 0 0 0 0 0 | |
#3 1 1 1 1 0 0 0 0 0 0 |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
# corefreq-cli -m | |
CPU Pkg Apic Core/Thread Caches (w)rite-Back (i)nclusive | |
# ID ID CCD CCX ID/ID L1-Inst Way L1-Data Way L2 Way L3 Way | |
000:BSP 0 0 0 0 0 64 4 32 8 512 8 i 4096 16w | |
001: 0 1 0 0 1 0 64 4 32 8 512 8 i 4096 16w | |
002: 0 2 0 0 2 0 64 4 32 8 512 8 i 4096 16w | |
003: 0 3 0 0 3 0 64 4 32 8 512 8 i 4096 16w |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
# corefreq-cli -B | |
[ 0] American Megatrends Inc. | |
[ 1] F40 | |
[ 2] 06/14/2019 | |
[ 3] Gigabyte Technology Co., Ltd. | |
[ 4] AB350M-DS3H | |
[ 5] Default string | |
[ 6] D---u---s---n- | |
[ 7] Default string | |
[ 8] Default string | |
[ 9] Gigabyte Technology Co., Ltd. | |
[10] AB350M-DS3H-CF | |
[11] x.x | |
[12] D---u---s---n- |
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
# corefreq-cli -k | |
Linux: | |
|- Release [5.14.9-100.fc33.x86_64] | |
|- Version [#1 SMP Thu Sep 30 12:45:49 UTC 2021] | |
|- Machine [x86_64] | |
Memory: | |
|- Total RAM 14253492 KB | |
|- Shared RAM 623900 KB | |
|- Free RAM 933448 KB | |
|- Buffer RAM 349496 KB | |
|- Total High 0 KB | |
|- Free High 0 KB | |
CPU-Freq driver [ acpi-cpufreq] | |
Governor [ schedutil] | |
CPU-Idle driver [ acpi_idle] | |
|- Idle Limit [ C2] | |
|- State POLL C1 C2 | |
|- CPUIDLE ACPI FF ACPI IO | |
|- Power -1 0 0 | |
|- Latency 0 1 400 | |
|- Residency 0 2 800 |
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment