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onre/00_results.txt

Last active November 20, 2024 18:52
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rtl8xxxu firmware upload figure-out-a-thon
Raw
00_results.txt
# x_ms_ALL_pre_writeN.txt => x milliseconds delay was applied before every block write
# x_ms_FIRST_y_ms_REST_pre_writeN.txt => first write was delayed by x ms, after which y ms was applied for subsequent writes
# x_ms_FIRST_pre_writeN.txt => x milliseconds delay was applied to the first write only
#
# the numbers and #-signs are a histogram of which block failed to be written.
#
# as you can see, after a certain point I changed iterations to 3 instead of 10.
# this was because of impatience.
$ ./analyze.sh *.txt
10_ms_ALL_pre_writeN.txt
2/8 success/fail, distribution:
1100 #
1180 #
1200 ##
1580 #
1800 ##
1980 #
1_ms_ALL_pre_writeN.txt
0/10 success/fail, distribution:
1000 #########
1100 #
1_ms_FIRST_10_ms_REST_pre_writeN.txt
0/10 success/fail, distribution:
1000 ######
1080 #
1100 #
1600 #
1a80 #
1_ms_FIRST_1_ms_REST_pre_writeN.txt
0/10 success/fail, distribution:
1000 ######
1080 #
1100 #
1180 #
1580 #
1_ms_FIRST_2_ms_REST_pre_writeN.txt
0/10 success/fail, distribution:
1000 ########
1200 #
1400 ##
1_ms_FIRST_3_ms_REST_pre_writeN.txt
0/10 success/fail, distribution:
1000 #######
1500 #
1880 #
1b00 #
1_ms_FIRST_4_ms_REST_pre_writeN.txt
0/10 success/fail, distribution:
1000 ########
1100 ##
1700 #
1_ms_FIRST_5_ms_REST_pre_writeN.txt
0/10 success/fail, distribution:
1000 #######
1080 #
1180 ########
1e80 #
1_ms_FIRST_6_ms_REST_pre_writeN.txt
0/10 success/fail, distribution:
1000 #####
1100 #
1200 #
1300 #
1400 #
1500 #
1_ms_FIRST_7_ms_REST_pre_writeN.txt
0/10 success/fail, distribution:
1000 ###
1080 ##
1180 #
1280 ###
1400 #
1_ms_FIRST_8_ms_REST_pre_writeN.txt
0/10 success/fail, distribution:
1000 ########
1400 #
1680 #
1_ms_FIRST_9_ms_REST_pre_writeN.txt
0/10 success/fail, distribution:
1000 #####
1080 ##
1180 #
1a00 #
1e80 #
1_ms_FIRST_pre_writeN.txt
1/9 success/fail, distribution:
1000 #####
1600 #
1780 #
1800 #
1c80 #
2_ms_ALL_pre_writeN.txt
1/9 success/fail, distribution:
1000 ######
1180 #
1200 #
1280 #
2_ms_FIRST_10_ms_REST_pre_writeN.txt
0/3 success/fail, distribution:
1080 #
1300 #
1500 #
2_ms_FIRST_1_ms_REST_pre_writeN.txt
0/10 success/fail, distribution:
1000 ########
1100 #
1180 #
2_ms_FIRST_2_ms_REST_pre_writeN.txt
1/9 success/fail, distribution:
1000 #####
1100 #
1200 #
1400 #
1500 #
1800 #
2_ms_FIRST_3_ms_REST_pre_writeN.txt
0/10 success/fail, distribution:
1000 ###
1100 #
1400 #
1500 ##
1580 #
1880 #
1a80 #
2_ms_FIRST_4_ms_REST_pre_writeN.txt
0/3 success/fail, distribution:
1000 #
1100 #
1280 #
2_ms_FIRST_5_ms_REST_pre_writeN.txt
0/3 success/fail, distribution:
1200 #
1680 #
1800 #
2_ms_FIRST_6_ms_REST_pre_writeN.txt
0/3 success/fail, distribution:
1080 #
1280 #
1680 #
2_ms_FIRST_7_ms_REST_pre_writeN.txt
0/3 success/fail, distribution:
1100 #
1200 ##
1700 #
2_ms_FIRST_8_ms_REST_pre_writeN.txt
0/3 success/fail, distribution:
1080 #
1100 #
1580 #
2_ms_FIRST_9_ms_REST_pre_writeN.txt
0/3 success/fail, distribution:
1000 ##
1300 #
2_ms_FIRST_pre_writeN.txt
0/10 success/fail, distribution:
1000 #######
1080 #
1380 #
1800 #
3_ms_ALL_pre_writeN.txt
0/10 success/fail, distribution:
1000 ##
1080 #
1100 ##
1280 ##
1300 #
1780 ##
3_ms_FIRST_10_ms_REST_pre_writeN.txt
3/0 success/fail, distribution:
3_ms_FIRST_1_ms_REST_pre_writeN.txt
2/1 success/fail, distribution:
1280 #
3_ms_FIRST_2_ms_REST_pre_writeN.txt
3/0 success/fail, distribution:
3_ms_FIRST_3_ms_REST_pre_writeN.txt
3/0 success/fail, distribution:
3_ms_FIRST_4_ms_REST_pre_writeN.txt
2/1 success/fail, distribution:
1700 #
3_ms_FIRST_5_ms_REST_pre_writeN.txt
3/0 success/fail, distribution:
3_ms_FIRST_6_ms_REST_pre_writeN.txt
3/0 success/fail, distribution:
3_ms_FIRST_7_ms_REST_pre_writeN.txt
3/0 success/fail, distribution:
3_ms_FIRST_8_ms_REST_pre_writeN.txt
3/0 success/fail, distribution:
3_ms_FIRST_9_ms_REST_pre_writeN.txt
3/0 success/fail, distribution:
3_ms_FIRST_pre_writeN.txt
2/1 success/fail, distribution:
1100 #
4_ms_ALL_pre_writeN.txt
1/9 success/fail, distribution:
1000 #
1080 #
1280 #
1480 #
1580 #
1600 #
1c00 #
1c80 #
1d80 #
4_ms_FIRST_10_ms_REST_pre_writeN.txt
3/0 success/fail, distribution:
4_ms_FIRST_1_ms_REST_pre_writeN.txt
3/0 success/fail, distribution:
4_ms_FIRST_2_ms_REST_pre_writeN.txt
2/1 success/fail, distribution:
1f00 #
4_ms_FIRST_3_ms_REST_pre_writeN.txt
2/1 success/fail, distribution:
1d80 #
4_ms_FIRST_4_ms_REST_pre_writeN.txt
3/0 success/fail, distribution:
4_ms_FIRST_5_ms_REST_pre_writeN.txt
3/0 success/fail, distribution:
4_ms_FIRST_6_ms_REST_pre_writeN.txt
3/0 success/fail, distribution:
4_ms_FIRST_7_ms_REST_pre_writeN.txt
3/0 success/fail, distribution:
4_ms_FIRST_8_ms_REST_pre_writeN.txt
3/0 success/fail, distribution:
4_ms_FIRST_9_ms_REST_pre_writeN.txt
3/0 success/fail, distribution:
4_ms_FIRST_pre_writeN.txt
3/0 success/fail, distribution:
5_ms_ALL_pre_writeN.txt
2/8 success/fail, distribution:
1180 ##
1500 ##
1680 #
1900 #
1c80 #
1e00 #
5_ms_FIRST_1_ms_REST_pre_writeN.txt
3/0 success/fail, distribution:
5_ms_FIRST_2_ms_REST_pre_writeN.txt
3/0 success/fail, distribution:
5_ms_FIRST_3_ms_REST_pre_writeN.txt
3/0 success/fail, distribution:
5_ms_FIRST_4_ms_REST_pre_writeN.txt
3/0 success/fail, distribution:
5_ms_FIRST_5_ms_REST_pre_writeN.txt
3/0 success/fail, distribution:
5_ms_FIRST_6_ms_REST_pre_writeN.txt
3/0 success/fail, distribution:
5_ms_FIRST_pre_writeN.txt
3/0 success/fail, distribution:
6_ms_ALL_pre_writeN.txt
1/9 success/fail, distribution:
1100 ###
1180 #
1200 #
1280 #
1400 #
1680 #
1b80 #
7_ms_ALL_pre_writeN.txt
0/10 success/fail, distribution:
1000 #
1080 #
1100 #
1180 #
1480 #
1580 #
1780 #
1880 #
1c00 #
1f80 #
8_ms_ALL_pre_writeN.txt
1/9 success/fail, distribution:
1100 #
1180 #
1200 #
1400 #
1580 #
1600 #
1680 #
1700 #
1980 #
9_ms_ALL_pre_writeN.txt
2/8 success/fail, distribution:
1000 #
1200 #
1380 #
1480 #
1700 #
1b80 ##
1e00 #
no_delay.txt
2/8 success/fail, distribution:
1000 ####
1100 #
1a80 #
1c80 #
1d00 #
Raw
analyze.sh
#!/usr/bin/bash
for i in $*; do
echo
FAILADDRS=()
declare -A FAILADDRC
SUCCESS=$(grep -c 'Enabling HT_20_40' $i)
WFAIL=$(grep -c 'Failed to write' $i)
FAILADDRS=($(grep writeN $i |cut -c16-|cut -d' ' -f10|sort|uniq))
for f in ${FAILADDRS[@]}; do
HOWMANY=$(grep $f $i|wc -l)
FAILADDRC[${f}]=$HOWMANY
done
printf "%s\n%d/%d success/fail, distribution:\n" $i $SUCCESS $WFAIL
for j in ${!FAILADDRS[@]}; do
printf " %5s " "${FAILADDRS[${j}]}"
KEY=${FAILADDRS[${j}]}
N=${FAILADDRC[${KEY}]}
for xyz in $(seq $N); do
printf "#"
done
echo
done
done
Raw
core.c.diff
diff --git a/core.c b/core.c
index a7b96ef..104f607 100644
--- a/core.c
+++ b/core.c
@@ -14,6 +14,7 @@
*/
#include <linux/firmware.h>
+#include <linux/delay.h>
#include "regs.h"
#include "rtl8xxxu.h"
@@ -861,8 +862,8 @@ rtl8xxxu_writeN(struct rtl8xxxu_priv *priv, u16 addr, u8 *buf, u16 len)
write_error:
dev_info(&udev->dev,
- "%s: Failed to write block at addr: %04x size: %04x\n",
- __func__, addr, blocksize);
+ "%s: Failed to write block at addr: %04x size: %04x status %d\n",
+ __func__, addr, blocksize, ret);
return -EAGAIN;
}
@@ -2047,10 +2048,31 @@ static int rtl8xxxu_download_firmware(struct rtl8xxxu_priv *priv)
fwptr = priv->fw_data->data;
for (i = 0; i < pages; i++) {
+#ifdef FIRST_PRE_WRITEN_DELAY
+ static int first;
+#endif
val8 = rtl8xxxu_read8(priv, reg_mcu_fw_dl + 2) & 0xF8;
val8 |= i;
+
rtl8xxxu_write8(priv, reg_mcu_fw_dl + 2, val8);
+#if defined(FIRST_PRE_WRITEN_DELAY) && defined(PRE_WRITEN_DELAY)
+ if (!first)
+ mdelay(FIRST_PRE_WRITEN_DELAY);
+
+ else
+ mdelay(PRE_WRITEN_DELAY);
+#elif defined(FIRST_PRE_WRITEN_DELAY)
+ if (!first)
+ mdelay(FIRST_PRE_WRITEN_DELAY);
+#elif defined(PRE_WRITEN_DELAY)
+ mdelay(PRE_WRITEN_DELAY);
+#endif
+
+#ifdef FIRST_PRE_WRITEN_DELAY
+ first = 1;
+#endif
+
ret = rtl8xxxu_writeN(priv, reg_fw_start_address,
fwptr, RTL_FW_PAGE_SIZE);
if (ret != RTL_FW_PAGE_SIZE) {
Raw
iterate.sh
#!/usr/bin/bash
WHAT=$1
sudo dmesg --clear
for i in {1..3}; do
sudo modprobe -r rtl8xxxu_git
sleep 2
sudo modprobe rtl8xxxu_git
sleep 2
done
sudo dmesg >> ${WHAT}.txt
Raw
science.sh
#!/usr/bin/bash
make clean
make modules && sudo make install
./iterate.sh no_delay
rm -f core.o
for delay in $(seq 1 10); do
make CFLAGS_MODULE="-DPRE_WRITEN_DELAY=${delay}" modules && sudo make install
rm -f core.o
./iterate.sh ${delay}_ms_ALL_pre_writeN
done
for firstdelay in $(seq 1 10); do
make CFLAGS_MODULE="-DFIRST_PRE_WRITEN_DELAY=${firstdelay}" modules && sudo make install
rm -f core.o
./iterate.sh ${firstdelay}_ms_FIRST_pre_writeN
for delay in $(seq 1 10); do
make CFLAGS_MODULE="-DPRE_WRITEN_DELAY=${delay} -DFIRST_PRE_WRITEN_DELAY=${firstdelay}" modules && sudo make install
rm -f core.o
./iterate.sh ${firstdelay}_ms_FIRST_${delay}_ms_REST_pre_writeN
done
done
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