Results for efabless / openlane2#457 (Run 8819763945)

10-ALL.md

gf180mcuD/gf180mcu_fd_sc_mcu7t5v0/APU

Metric	Before	After	Delta
clock__skew__worst_hold	0.6478	0.7330	0.0852 (+13.1461%) ❗
design__max_fanout_violation__count	139	140	1 (+0.7194%) ❗
clock__skew__worst_hold__corner:max_ff_n40C_5v50	0.2374	0.2704	0.0329 (+13.8708%) ❗
design__max_fanout_violation__count__corner:max_ff_n40C_5v50	139	140	1 (+0.7194%) ❗
clock__skew__worst_hold__corner:max_ss_125C_4v50	0.6478	0.7330	0.0852 (+13.1461%) ❗
design__max_fanout_violation__count__corner:max_ss_125C_4v50	139	140	1 (+0.7194%) ❗
clock__skew__worst_hold__corner:max_tt_025C_5v00	0.3645	0.4134	0.0489 (+13.4129%) ❗
design__max_fanout_violation__count__corner:max_tt_025C_5v00	139	140	1 (+0.7194%) ❗
clock__skew__worst_hold__corner:min_ff_n40C_5v50	0.2258	0.2601	0.0343 (+15.2019%) ❗
design__max_fanout_violation__count__corner:min_ff_n40C_5v50	139	140	1 (+0.7194%) ❗
clock__skew__worst_hold__corner:min_ss_125C_4v50	0.6199	0.7087	0.0888 (+14.3204%) ❗
design__max_fanout_violation__count__corner:min_ss_125C_4v50	139	140	1 (+0.7194%) ❗
clock__skew__worst_hold__corner:min_tt_025C_5v00	0.3477	0.3987	0.0510 (+14.6591%) ❗
design__max_cap_violation__count__corner:min_tt_025C_5v00	6	7	1 (+16.6667%) ❗
design__max_fanout_violation__count__corner:min_tt_025C_5v00	139	140	1 (+0.7194%) ❗
clock__skew__worst_hold__corner:nom_ff_n40C_5v50	0.2312	0.2648	0.0336 (+14.5380%) ❗
design__max_cap_violation__count__corner:nom_ff_n40C_5v50	9	10	1 (+11.1111%) ❗
design__max_fanout_violation__count__corner:nom_ff_n40C_5v50	139	140	1 (+0.7194%) ❗
clock__skew__worst_hold__corner:nom_ss_125C_4v50	0.6329	0.7198	0.0868 (+13.7177%) ❗
design__max_fanout_violation__count__corner:nom_ss_125C_4v50	139	140	1 (+0.7194%) ❗
clock__skew__worst_hold__corner:nom_tt_025C_5v00	0.3557	0.4053	0.0496 (+13.9359%) ❗
design__max_fanout_violation__count__corner:nom_tt_025C_5v00	139	140	1 (+0.7194%) ❗
clock__skew__worst_setup	0.2258	0.2601	0.0343 (+15.2019%) ⭕
design__instance__area	108074	107602	-472 (-0.4367%) ⭕
ir__drop__avg	0.0002	0.0000	-0.0002 (-81.0000%) ⭕
ir__drop__worst	0.0016	0.0002	-0.0015 (-89.6319%) ⭕
power__internal__total	0.0091	0.0090	-0.0001 (-0.8393%) ⭕
power__leakage__total	0.0000	0.0000	-0.0000 (-0.6570%) ⭕
power__switching__total	0.0049	0.0048	-0.0000 (-0.3568%) ⭕
power__total	0.0140	0.0139	-0.0001 (-0.6715%) ⭕
clock__skew__worst_setup__corner:max_ff_n40C_5v50	0.2374	0.2704	0.0329 (+13.8708%) ⭕
clock__skew__worst_setup__corner:max_ss_125C_4v50	0.6478	0.7330	0.0852 (+13.1461%) ⭕
clock__skew__worst_setup__corner:max_tt_025C_5v00	0.3645	0.4134	0.0489 (+13.4129%) ⭕
clock__skew__worst_setup__corner:min_ff_n40C_5v50	0.2258	0.2601	0.0343 (+15.2019%) ⭕
clock__skew__worst_setup__corner:min_ss_125C_4v50	0.6199	0.7087	0.0888 (+14.3204%) ⭕
clock__skew__worst_setup__corner:min_tt_025C_5v00	0.3477	0.3987	0.0510 (+14.6591%) ⭕
clock__skew__worst_setup__corner:nom_ff_n40C_5v50	0.2312	0.2648	0.0336 (+14.5380%) ⭕
clock__skew__worst_setup__corner:nom_ss_125C_4v50	0.6329	0.7198	0.0868 (+13.7177%) ⭕
design__max_cap_violation__count__corner:nom_ss_125C_4v50	11	10	-1 (-9.0909%) ⭕
clock__skew__worst_setup__corner:nom_tt_025C_5v00	0.3557	0.4053	0.0496 (+13.9359%) ⭕
antenna__violating__nets	0	0	0 (0.0000%) ⭕
antenna__violating__pins	0	0	0 (0.0000%) ⭕
design__core__area	284217	284217	0 (0.0000%) ⭕
design__die__area	308622	308622	0 (0.0000%) ⭕
design__lint_error__count	0	0	0 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count	15	15	0 (0.0000%) ⭕
design__max_slew_violation__count	0	0	0 (0.0000%) ⭕
ir__voltage__worst	5	5	0 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕
timing__hold__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__hold_vio__count	0	0	0 (0.0000%) ⭕
timing__setup__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__setup_vio__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ff_n40C_5v50	13	13	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ss_125C_4v50	15	15	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ss_125C_4v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_tt_025C_5v00	13	13	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ff_n40C_5v50	6	6	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ss_125C_4v50	7	7	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ss_125C_4v50	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ss_125C_4v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_tt_025C_5v00	10	10	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕

gf180mcuD/gf180mcu_fd_sc_mcu7t5v0/blink

Metric	Before	After	Delta
clock__skew__worst_hold	-0.0037	-0.0036	0.0001 (-3.1029%) ❗
clock__skew__worst_hold__corner:max_ff_n40C_5v50	-0.0043	-0.0042	0.0001 (-3.2221%) ❗
clock__skew__worst_hold__corner:max_ss_125C_4v50	-0.0085	-0.0083	0.0002 (-2.5035%) ❗
clock__skew__worst_hold__corner:max_tt_025C_5v00	-0.0056	-0.0055	0.0002 (-2.8973%) ❗
clock__skew__worst_hold__corner:min_ff_n40C_5v50	-0.0037	-0.0036	0.0001 (-3.1029%) ❗
clock__skew__worst_hold__corner:min_ss_125C_4v50	-0.0074	-0.0072	0.0002 (-2.3337%) ❗
clock__skew__worst_hold__corner:min_tt_025C_5v00	-0.0048	-0.0047	0.0001 (-2.7513%) ❗
clock__skew__worst_hold__corner:nom_ff_n40C_5v50	-0.0040	-0.0038	0.0001 (-3.1706%) ❗
clock__skew__worst_hold__corner:nom_ss_125C_4v50	-0.0079	-0.0077	0.0002 (-2.4187%) ❗
clock__skew__worst_hold__corner:nom_tt_025C_5v00	-0.0052	-0.0051	0.0001 (-2.8253%) ❗
clock__skew__worst_setup	-0.0085	-0.0083	0.0002 (-2.5035%) ⭕
ir__drop__avg	0.0013	0.0003	-0.0011 (-80.6107%) ⭕
ir__drop__worst	0.0055	0.0006	-0.0049 (-88.5145%) ⭕
ir__voltage__worst	4	5	1 (+25.0000%) ⭕
power__internal__total	0.0028	0.0028	-0.0000 (-0.0036%) ⭕
power__switching__total	0.0006	0.0006	-0.0000 (-0.5915%) ⭕
power__total	0.0033	0.0033	-0.0000 (-0.1023%) ⭕
clock__skew__worst_setup__corner:max_ff_n40C_5v50	-0.0043	-0.0042	0.0001 (-3.2221%) ⭕
clock__skew__worst_setup__corner:max_ss_125C_4v50	-0.0085	-0.0083	0.0002 (-2.5035%) ⭕
clock__skew__worst_setup__corner:max_tt_025C_5v00	-0.0056	-0.0055	0.0002 (-2.8973%) ⭕
clock__skew__worst_setup__corner:min_ff_n40C_5v50	-0.0037	-0.0036	0.0001 (-3.1029%) ⭕
clock__skew__worst_setup__corner:min_ss_125C_4v50	-0.0074	-0.0072	0.0002 (-2.3337%) ⭕
clock__skew__worst_setup__corner:min_tt_025C_5v00	-0.0048	-0.0047	0.0001 (-2.7513%) ⭕
clock__skew__worst_setup__corner:nom_ff_n40C_5v50	-0.0040	-0.0038	0.0001 (-3.1706%) ⭕
clock__skew__worst_setup__corner:nom_ss_125C_4v50	-0.0079	-0.0077	0.0002 (-2.4187%) ⭕
clock__skew__worst_setup__corner:nom_tt_025C_5v00	-0.0052	-0.0051	0.0001 (-2.8253%) ⭕
antenna__violating__nets	0	0	0 (0.0000%) ⭕
antenna__violating__pins	0	0	0 (0.0000%) ⭕
design__core__area	6146.5600	6146.5600	0.0000 (0.0000%) ⭕
design__die__area	10108.6000	10108.6000	0.0000 (0.0000%) ⭕
design__instance__area	4151.1200	4151.1200	0.0000 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count	0	0	0 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
power__leakage__total	0.0000	0.0000	0.0000 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕
timing__hold__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__hold_vio__count	0	0	0 (0.0000%) ⭕
timing__setup__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__setup_vio__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ff_n40C_5v50	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ss_125C_4v50	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ss_125C_4v50	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ss_125C_4v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_tt_025C_5v00	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ff_n40C_5v50	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ss_125C_4v50	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ss_125C_4v50	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ss_125C_4v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_tt_025C_5v00	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ff_n40C_5v50	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ss_125C_4v50	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ss_125C_4v50	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ss_125C_4v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_tt_025C_5v00	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕

gf180mcuD/gf180mcu_fd_sc_mcu7t5v0/cell_inverter

Metric	Before	After	Delta
design__instance__area	8.7808	8.7808	0.0000 (0.0000%) ⭕
design__lint_error__count	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕

gf180mcuD/gf180mcu_fd_sc_mcu7t5v0/inverter

Metric	Before	After	Delta
antenna__violating__nets	0	0	0 (0.0000%) ⭕
antenna__violating__pins	0	0	0 (0.0000%) ⭕
design__core__area	570.7520	570.7520	0.0000 (0.0000%) ⭕
design__die__area	2500	2500	0 (0.0000%) ⭕
design__instance__area	57.0752	57.0752	0.0000 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕

gf180mcuD/gf180mcu_fd_sc_mcu7t5v0/latch_bad

Metric	Before	After	Delta
design__lint_error__count	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕

gf180mcuD/gf180mcu_fd_sc_mcu7t5v0/latch_good

Metric	Before	After	Delta
design__lint_error__count	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕

gf180mcuD/gf180mcu_fd_sc_mcu7t5v0/spm

Metric	Before	After	Delta
power__leakage__total	0.0000	0.0000	0.0000 (+0.5448%) ❗
clock__skew__worst_setup__corner:max_ff_n40C_5v50	0.0119	-0.0097	-0.0216 (-181.7464%) ❗
clock__skew__worst_hold__corner:max_ss_125C_4v50	-0.0299	-0.0262	0.0037 (-12.3892%) ❗
clock__skew__worst_hold__corner:max_tt_025C_5v00	-0.0170	-0.0148	0.0021 (-12.4904%) ❗
clock__skew__worst_hold__corner:min_ff_n40C_5v50	-0.0099	-0.0086	0.0013 (-13.0549%) ❗
clock__skew__worst_hold__corner:min_ss_125C_4v50	-0.0267	-0.0231	0.0037 (-13.7627%) ❗
clock__skew__worst_hold__corner:min_tt_025C_5v00	-0.0151	-0.0131	0.0020 (-13.2372%) ❗
clock__skew__worst_setup__corner:nom_ff_n40C_5v50	0.0108	-0.0091	-0.0199 (-184.3880%) ❗
clock__skew__worst_hold__corner:nom_ss_125C_4v50	-0.0280	-0.0245	0.0036 (-12.6729%) ❗
clock__skew__worst_hold__corner:nom_tt_025C_5v00	-0.0159	-0.0139	0.0020 (-12.7531%) ❗
clock__skew__worst_hold	0.0119	-0.0086	-0.0205 (-172.0235%) ⭕
clock__skew__worst_setup	-0.0299	-0.0262	0.0037 (-12.3892%) ⭕
design__instance__area	11634.6000	11621.4000	-13.2000 (-0.1135%) ⭕
ir__drop__avg	0.0023	0.0004	-0.0019 (-82.3009%) ⭕
ir__drop__worst	0.0103	0.0010	-0.0093 (-90.0000%) ⭕
ir__voltage__worst	4	5	1 (+25.0000%) ⭕
power__internal__total	0.0071	0.0071	-0.0000 (-0.0684%) ⭕
power__switching__total	0.0021	0.0021	-0.0000 (-1.0639%) ⭕
power__total	0.0093	0.0092	-0.0000 (-0.2955%) ⭕
clock__skew__worst_hold__corner:max_ff_n40C_5v50	0.0119	-0.0097	-0.0216 (-181.7464%) ⭕
clock__skew__worst_setup__corner:max_ss_125C_4v50	-0.0299	-0.0262	0.0037 (-12.3892%) ⭕
clock__skew__worst_setup__corner:max_tt_025C_5v00	-0.0170	-0.0148	0.0021 (-12.4904%) ⭕
clock__skew__worst_setup__corner:min_ff_n40C_5v50	-0.0099	-0.0086	0.0013 (-13.0549%) ⭕
clock__skew__worst_setup__corner:min_ss_125C_4v50	-0.0267	-0.0231	0.0037 (-13.7627%) ⭕
clock__skew__worst_setup__corner:min_tt_025C_5v00	-0.0151	-0.0131	0.0020 (-13.2372%) ⭕
clock__skew__worst_hold__corner:nom_ff_n40C_5v50	0.0108	-0.0091	-0.0199 (-184.3880%) ⭕
clock__skew__worst_setup__corner:nom_ss_125C_4v50	-0.0280	-0.0245	0.0036 (-12.6729%) ⭕
clock__skew__worst_setup__corner:nom_tt_025C_5v00	-0.0159	-0.0139	0.0020 (-12.7531%) ⭕
antenna__violating__nets	0	0	0 (0.0000%) ⭕
antenna__violating__pins	0	0	0 (0.0000%) ⭕
design__core__area	21280.3000	21280.3000	0.0000 (0.0000%) ⭕
design__die__area	28670.3000	28670.3000	0.0000 (0.0000%) ⭕
design__lint_error__count	0	0	0 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count	1	1	0 (0.0000%) ⭕
design__max_fanout_violation__count	9	9	0 (0.0000%) ⭕
design__max_slew_violation__count	0	0	0 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕
timing__hold__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__hold_vio__count	0	0	0 (0.0000%) ⭕
timing__setup__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__setup_vio__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ff_n40C_5v50	1	1	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ff_n40C_5v50	9	9	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ss_125C_4v50	1	1	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ss_125C_4v50	9	9	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ss_125C_4v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_tt_025C_5v00	1	1	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_tt_025C_5v00	9	9	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ff_n40C_5v50	1	1	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ff_n40C_5v50	9	9	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ss_125C_4v50	1	1	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ss_125C_4v50	9	9	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ss_125C_4v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_tt_025C_5v00	1	1	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_tt_025C_5v00	9	9	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ff_n40C_5v50	1	1	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ff_n40C_5v50	9	9	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ss_125C_4v50	1	1	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ss_125C_4v50	9	9	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ss_125C_4v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_tt_025C_5v00	1	1	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_tt_025C_5v00	9	9	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕

gf180mcuD/gf180mcu_fd_sc_mcu7t5v0/usb

Metric	Before	After	Delta
clock__skew__worst_hold	-0.0398	0.1113	0.1511 (-379.6508%) ❗
design__instance__area	31496.7000	31501.1000	4.4000 (+0.0140%) ❗
power__internal__total	0.0156	0.0156	0.0000 (+0.1158%) ❗
power__switching__total	0.0053	0.0054	0.0001 (+2.2504%) ❗
power__total	0.0209	0.0210	0.0001 (+0.6584%) ❗
clock__skew__worst_hold__corner:max_ff_n40C_5v50	-0.0430	-0.0428	0.0002 (-0.4423%) ❗
clock__skew__worst_hold__corner:max_ss_125C_4v50	-0.1121	0.1113	0.2234 (-199.3415%) ❗
clock__skew__worst_hold__corner:max_tt_025C_5v00	-0.0646	0.0642	0.1289 (-199.3549%) ❗
clock__skew__worst_hold__corner:min_ff_n40C_5v50	-0.0398	0.0396	0.0794 (-199.3720%) ❗
clock__skew__worst_hold__corner:min_ss_125C_4v50	-0.1046	0.1040	0.2086 (-199.4722%) ❗
clock__skew__worst_hold__corner:min_tt_025C_5v00	-0.0601	0.0597	0.1198 (-199.4026%) ❗
clock__skew__worst_hold__corner:nom_ff_n40C_5v50	-0.0412	-0.0409	0.0004 (-0.8921%) ❗
clock__skew__worst_hold__corner:nom_ss_125C_4v50	-0.1080	0.1071	0.2150 (-199.1268%) ❗
clock__skew__worst_hold__corner:nom_tt_025C_5v00	-0.0622	0.0616	0.1238 (-199.0896%) ❗
clock__skew__worst_setup	-0.1121	-0.0428	0.0693 (-61.8362%) ⭕
design__max_fanout_violation__count	13	12	-1 (-7.6923%) ⭕
ir__drop__avg	0.0014	0.0003	-0.0011 (-81.4493%) ⭕
ir__drop__worst	0.0064	0.0006	-0.0058 (-90.3762%) ⭕
ir__voltage__worst	4	5	1 (+25.0000%) ⭕
power__leakage__total	0.0000	0.0000	-0.0000 (-0.2072%) ⭕
clock__skew__worst_setup__corner:max_ff_n40C_5v50	-0.0430	-0.0428	0.0002 (-0.4423%) ⭕
design__max_fanout_violation__count__corner:max_ff_n40C_5v50	13	12	-1 (-7.6923%) ⭕
clock__skew__worst_setup__corner:max_ss_125C_4v50	-0.1121	0.1113	0.2234 (-199.3415%) ⭕
design__max_fanout_violation__count__corner:max_ss_125C_4v50	13	12	-1 (-7.6923%) ⭕
clock__skew__worst_setup__corner:max_tt_025C_5v00	-0.0646	0.0642	0.1289 (-199.3549%) ⭕
design__max_fanout_violation__count__corner:max_tt_025C_5v00	13	12	-1 (-7.6923%) ⭕
clock__skew__worst_setup__corner:min_ff_n40C_5v50	-0.0398	0.0396	0.0794 (-199.3720%) ⭕
design__max_fanout_violation__count__corner:min_ff_n40C_5v50	13	12	-1 (-7.6923%) ⭕
clock__skew__worst_setup__corner:min_ss_125C_4v50	-0.1046	0.1040	0.2086 (-199.4722%) ⭕
design__max_fanout_violation__count__corner:min_ss_125C_4v50	13	12	-1 (-7.6923%) ⭕
clock__skew__worst_setup__corner:min_tt_025C_5v00	-0.0601	0.0597	0.1198 (-199.4026%) ⭕
design__max_fanout_violation__count__corner:min_tt_025C_5v00	13	12	-1 (-7.6923%) ⭕
clock__skew__worst_setup__corner:nom_ff_n40C_5v50	-0.0412	-0.0409	0.0004 (-0.8921%) ⭕
design__max_fanout_violation__count__corner:nom_ff_n40C_5v50	13	12	-1 (-7.6923%) ⭕
clock__skew__worst_setup__corner:nom_ss_125C_4v50	-0.1080	0.1071	0.2150 (-199.1268%) ⭕
design__max_fanout_violation__count__corner:nom_ss_125C_4v50	13	12	-1 (-7.6923%) ⭕
clock__skew__worst_setup__corner:nom_tt_025C_5v00	-0.0622	0.0616	0.1238 (-199.0896%) ⭕
design__max_fanout_violation__count__corner:nom_tt_025C_5v00	13	12	-1 (-7.6923%) ⭕
antenna__violating__nets	0	0	0 (0.0000%) ⭕
antenna__violating__pins	0	0	0 (0.0000%) ⭕
design__core__area	59885.1000	59885.1000	0.0000 (0.0000%) ⭕
design__die__area	72420.7000	72420.7000	0.0000 (0.0000%) ⭕
design__lint_error__count	0	0	0 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count	1	1	0 (0.0000%) ⭕
design__max_slew_violation__count	0	0	0 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕
timing__hold__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__hold_vio__count	0	0	0 (0.0000%) ⭕
timing__setup__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__setup_vio__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ff_n40C_5v50	1	1	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ss_125C_4v50	1	1	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ss_125C_4v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_tt_025C_5v00	1	1	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ff_n40C_5v50	1	1	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ss_125C_4v50	1	1	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ss_125C_4v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_tt_025C_5v00	1	1	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ff_n40C_5v50	1	1	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ss_125C_4v50	1	1	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ss_125C_4v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_tt_025C_5v00	1	1	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕

gf180mcuD/gf180mcu_fd_sc_mcu7t5v0/usb_cdc_core

Metric	Before	After	Delta
timing__hold__tns	-0.0383	0.0000	0.0383 (-100.0000%) ‼️
timing__hold__wns	-0.0383	0.0000	0.0383 (-100.0000%) ‼️
timing__hold_vio__count	1	0	-1 (-100.0000%) ‼️
timing__setup__tns	-109.6923	-140.5281	-30.8358 (+28.1112%) ‼️
timing__setup__wns	-3.0334	-3.0528	-0.0194 (+0.6389%) ‼️
timing__setup_r2r_vio__count	245	307	62 (+25.3061%) ‼️
timing__setup_vio__count	278	340	62 (+22.3022%) ‼️
timing__hold__tns__corner:max_ss_125C_4v50	-0.0383	0.0000	0.0383 (-100.0000%) ‼️
timing__hold__wns__corner:max_ss_125C_4v50	-0.0383	0.0000	0.0383 (-100.0000%) ‼️
timing__hold_vio__count__corner:max_ss_125C_4v50	1	0	-1 (-100.0000%) ‼️
timing__setup__tns__corner:max_ss_125C_4v50	-109.6923	-140.5281	-30.8358 (+28.1112%) ‼️
timing__setup__wns__corner:max_ss_125C_4v50	-3.0334	-3.0528	-0.0194 (+0.6389%) ‼️
timing__setup_r2r_vio__count__corner:max_ss_125C_4v50	100	118	18 (+18.0000%) ‼️
timing__setup_vio__count__corner:max_ss_125C_4v50	111	129	18 (+16.2162%) ‼️
timing__setup__tns__corner:min_ss_125C_4v50	-80.0589	-103.8446	-23.7857 (+29.7102%) ‼️
timing__setup__wns__corner:min_ss_125C_4v50	-2.7811	-2.7181	0.0630 (-2.2643%) ‼️
timing__setup_r2r_vio__count__corner:min_ss_125C_4v50	63	81	18 (+28.5714%) ‼️
timing__setup_vio__count__corner:min_ss_125C_4v50	74	92	18 (+24.3243%) ‼️
timing__setup__tns__corner:nom_ss_125C_4v50	-91.6986	-119.3090	-27.6104 (+30.1099%) ‼️
timing__setup__wns__corner:nom_ss_125C_4v50	-2.8966	-2.8715	0.0251 (-0.8654%) ‼️
timing__setup_r2r_vio__count__corner:nom_ss_125C_4v50	82	108	26 (+31.7073%) ‼️
timing__setup_vio__count__corner:nom_ss_125C_4v50	93	119	26 (+27.9570%) ‼️
clock__skew__worst_hold	-0.1819	0.5254	0.7073 (-388.8592%) ❗
design__instance__area	73585.3000	73679.7000	94.4000 (+0.1283%) ❗
design__max_fanout_violation__count	82	83	1 (+1.2195%) ❗
power__leakage__total	0.0000	0.0000	0.0000 (+0.3697%) ❗
power__switching__total	0.0206	0.0206	0.0001 (+0.2581%) ❗
power__total	0.0762	0.0762	0.0000 (+0.0549%) ❗
clock__skew__worst_hold__corner:max_ff_n40C_5v50	-0.1868	0.1929	0.3797 (-203.2718%) ❗
design__max_fanout_violation__count__corner:max_ff_n40C_5v50	82	83	1 (+1.2195%) ❗
clock__skew__worst_hold__corner:max_ss_125C_4v50	-0.5147	0.5254	1.0401 (-202.0686%) ❗
design__max_fanout_violation__count__corner:max_ss_125C_4v50	82	83	1 (+1.2195%) ❗
clock__skew__worst_hold__corner:max_tt_025C_5v00	-0.2879	0.2953	0.5833 (-202.5754%) ❗
design__max_fanout_violation__count__corner:max_tt_025C_5v00	82	83	1 (+1.2195%) ❗
clock__skew__worst_hold__corner:min_ff_n40C_5v50	-0.1819	0.1867	0.3685 (-202.6281%) ❗
design__max_fanout_violation__count__corner:min_ff_n40C_5v50	82	83	1 (+1.2195%) ❗
clock__skew__worst_hold__corner:min_ss_125C_4v50	-0.5034	0.5114	1.0148 (-201.5938%) ❗
design__max_fanout_violation__count__corner:min_ss_125C_4v50	82	83	1 (+1.2195%) ❗
clock__skew__worst_hold__corner:min_tt_025C_5v00	-0.2808	0.2867	0.5675 (-202.0895%) ❗
design__max_fanout_violation__count__corner:min_tt_025C_5v00	82	83	1 (+1.2195%) ❗
clock__skew__worst_hold__corner:nom_ff_n40C_5v50	-0.1841	0.1895	0.3737 (-202.9369%) ❗
design__max_fanout_violation__count__corner:nom_ff_n40C_5v50	82	83	1 (+1.2195%) ❗
clock__skew__worst_hold__corner:nom_ss_125C_4v50	-0.5085	0.5178	1.0263 (-201.8187%) ❗
design__max_fanout_violation__count__corner:nom_ss_125C_4v50	82	83	1 (+1.2195%) ❗
clock__skew__worst_hold__corner:nom_tt_025C_5v00	-0.2842	0.2907	0.5748 (-202.2903%) ❗
design__max_fanout_violation__count__corner:nom_tt_025C_5v00	82	83	1 (+1.2195%) ❗
clock__skew__worst_setup	-0.5147	0.1867	0.7014 (-136.2637%) ⭕
ir__drop__avg	0.0020	0.0004	-0.0016 (-79.8974%) ⭕
ir__drop__worst	0.0143	0.0014	-0.0129 (-90.2797%) ⭕
ir__voltage__worst	4	5	1 (+25.0000%) ⭕
power__internal__total	0.0556	0.0556	-0.0000 (-0.0205%) ⭕
clock__skew__worst_setup__corner:max_ff_n40C_5v50	-0.1868	0.1929	0.3797 (-203.2718%) ⭕
clock__skew__worst_setup__corner:max_ss_125C_4v50	-0.5147	0.5254	1.0401 (-202.0686%) ⭕
clock__skew__worst_setup__corner:max_tt_025C_5v00	-0.2879	0.2953	0.5833 (-202.5754%) ⭕
clock__skew__worst_setup__corner:min_ff_n40C_5v50	-0.1819	0.1867	0.3685 (-202.6281%) ⭕
clock__skew__worst_setup__corner:min_ss_125C_4v50	-0.5034	0.5114	1.0148 (-201.5938%) ⭕
clock__skew__worst_setup__corner:min_tt_025C_5v00	-0.2808	0.2867	0.5675 (-202.0895%) ⭕
clock__skew__worst_setup__corner:nom_ff_n40C_5v50	-0.1841	0.1895	0.3737 (-202.9369%) ⭕
clock__skew__worst_setup__corner:nom_ss_125C_4v50	-0.5085	0.5178	1.0263 (-201.8187%) ⭕
clock__skew__worst_setup__corner:nom_tt_025C_5v00	-0.2842	0.2907	0.5748 (-202.2903%) ⭕
antenna__violating__nets	0	0	0 (0.0000%) ⭕
antenna__violating__pins	0	0	0 (0.0000%) ⭕
design__core__area	157640	157640	0 (0.0000%) ⭕
design__die__area	177207	177207	0 (0.0000%) ⭕
design__lint_error__count	0	0	0 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count	6	6	0 (0.0000%) ⭕
design__max_slew_violation__count	0	0	0 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ff_n40C_5v50	6	6	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ss_125C_4v50	6	6	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_125C_4v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_tt_025C_5v00	6	6	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ff_n40C_5v50	6	6	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ss_125C_4v50	6	6	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_125C_4v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_tt_025C_5v00	6	6	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ff_n40C_5v50	6	6	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ss_125C_4v50	6	6	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_125C_4v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_tt_025C_5v00	6	6	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕

gf180mcuD/gf180mcu_fd_sc_mcu7t5v0/wbqspiflash

Metric	Before	After	Delta
timing__setup__tns	-428.0901	-402.0797	26.0103 (-6.0759%) ‼️
timing__setup__wns	-4.2895	-3.8000	0.4895 (-11.4117%) ‼️
timing__setup_r2r_vio__count	444	448	4 (+0.9009%) ‼️
timing__setup_vio__count	446	451	5 (+1.1211%) ‼️
timing__setup__tns__corner:max_ss_125C_4v50	-428.0901	-402.0797	26.0103 (-6.0759%) ‼️
timing__setup__wns__corner:max_ss_125C_4v50	-4.2895	-3.8000	0.4895 (-11.4117%) ‼️
timing__setup_r2r_vio__count__corner:max_ss_125C_4v50	148	150	2 (+1.3514%) ‼️
timing__setup_vio__count__corner:max_ss_125C_4v50	149	151	2 (+1.3423%) ‼️
timing__setup__tns__corner:min_ss_125C_4v50	-340.7740	-325.1684	15.6056 (-4.5795%) ‼️
timing__setup__wns__corner:min_ss_125C_4v50	-3.4117	-2.9963	0.4154 (-12.1761%) ‼️
timing__setup_r2r_vio__count__corner:min_ss_125C_4v50	148	149	1 (+0.6757%) ‼️
timing__setup_vio__count__corner:min_ss_125C_4v50	148	150	2 (+1.3514%) ‼️
timing__setup__tns__corner:nom_ss_125C_4v50	-380.1234	-359.7891	20.3343 (-5.3494%) ‼️
timing__setup__wns__corner:nom_ss_125C_4v50	-3.8101	-3.3667	0.4434 (-11.6364%) ‼️
timing__setup_r2r_vio__count__corner:nom_ss_125C_4v50	148	149	1 (+0.6757%) ‼️
timing__setup_vio__count__corner:nom_ss_125C_4v50	149	150	1 (+0.6711%) ‼️
design__instance__area	67361.9000	67873.4000	511.5000 (+0.7593%) ❗
power__internal__total	0.1154	0.1169	0.0015 (+1.3187%) ❗
power__leakage__total	0.0000	0.0000	0.0000 (+0.1174%) ❗
power__switching__total	0.0852	0.0861	0.0009 (+1.0741%) ❗
power__total	0.2005	0.2030	0.0024 (+1.2148%) ❗
clock__skew__worst_hold__corner:max_ff_n40C_5v50	-0.1905	-0.1879	0.0027 (-1.4050%) ❗
clock__skew__worst_hold__corner:max_ss_125C_4v50	-0.5259	-0.5212	0.0046 (-0.8767%) ❗
clock__skew__worst_hold__corner:max_tt_025C_5v00	-0.2941	-0.2907	0.0034 (-1.1625%) ❗
clock__skew__worst_setup__corner:min_ff_n40C_5v50	0.1855	-0.1847	-0.3702 (-199.5908%) ❗
clock__skew__worst_setup__corner:min_ss_125C_4v50	0.5170	-0.5128	-1.0298 (-199.1901%) ❗
clock__skew__worst_setup__corner:min_tt_025C_5v00	0.2877	-0.2861	-0.5738 (-199.4356%) ❗
clock__skew__worst_hold__corner:nom_ff_n40C_5v50	-0.1872	-0.1862	0.0010 (-0.5427%) ❗
clock__skew__worst_setup__corner:nom_ss_125C_4v50	0.5209	-0.5172	-1.0380 (-199.2891%) ❗
clock__skew__worst_setup__corner:nom_tt_025C_5v00	0.2900	-0.2883	-0.5783 (-199.4107%) ❗
clock__skew__worst_hold	0.5209	-0.1847	-0.7056 (-135.4655%) ⭕
clock__skew__worst_setup	-0.5259	-0.5212	0.0046 (-0.8767%) ⭕
design__max_fanout_violation__count	1	0	-1 (-100.0000%) ⭕
ir__drop__avg	0.0131	0.0025	-0.0106 (-81.1450%) ⭕
ir__drop__worst	0.0452	0.0104	-0.0348 (-76.9912%) ⭕
ir__voltage__worst	4.9500	4.9900	0.0400 (+0.8081%) ⭕
clock__skew__worst_setup__corner:max_ff_n40C_5v50	-0.1905	-0.1879	0.0027 (-1.4050%) ⭕
design__max_fanout_violation__count__corner:max_ff_n40C_5v50	1	0	-1 (-100.0000%) ⭕
clock__skew__worst_setup__corner:max_ss_125C_4v50	-0.5259	-0.5212	0.0046 (-0.8767%) ⭕
design__max_fanout_violation__count__corner:max_ss_125C_4v50	1	0	-1 (-100.0000%) ⭕
clock__skew__worst_setup__corner:max_tt_025C_5v00	-0.2941	-0.2907	0.0034 (-1.1625%) ⭕
design__max_fanout_violation__count__corner:max_tt_025C_5v00	1	0	-1 (-100.0000%) ⭕
clock__skew__worst_hold__corner:min_ff_n40C_5v50	0.1855	-0.1847	-0.3702 (-199.5908%) ⭕
design__max_fanout_violation__count__corner:min_ff_n40C_5v50	1	0	-1 (-100.0000%) ⭕
clock__skew__worst_hold__corner:min_ss_125C_4v50	0.5170	-0.5128	-1.0298 (-199.1901%) ⭕
design__max_fanout_violation__count__corner:min_ss_125C_4v50	1	0	-1 (-100.0000%) ⭕
clock__skew__worst_hold__corner:min_tt_025C_5v00	0.2877	-0.2861	-0.5738 (-199.4356%) ⭕
design__max_fanout_violation__count__corner:min_tt_025C_5v00	1	0	-1 (-100.0000%) ⭕
clock__skew__worst_setup__corner:nom_ff_n40C_5v50	-0.1872	-0.1862	0.0010 (-0.5427%) ⭕
design__max_fanout_violation__count__corner:nom_ff_n40C_5v50	1	0	-1 (-100.0000%) ⭕
clock__skew__worst_hold__corner:nom_ss_125C_4v50	0.5209	-0.5172	-1.0380 (-199.2891%) ⭕
design__max_fanout_violation__count__corner:nom_ss_125C_4v50	1	0	-1 (-100.0000%) ⭕
clock__skew__worst_hold__corner:nom_tt_025C_5v00	0.2900	-0.2883	-0.5783 (-199.4107%) ⭕
design__max_fanout_violation__count__corner:nom_tt_025C_5v00	1	0	-1 (-100.0000%) ⭕
antenna__violating__nets	0	0	0 (0.0000%) ⭕
antenna__violating__pins	0	0	0 (0.0000%) ⭕
design__core__area	94345.3000	94345.3000	0.0000 (0.0000%) ⭕
design__die__area	109560	109560	0 (0.0000%) ⭕
design__lint_error__count	0	0	0 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count	1	1	0 (0.0000%) ⭕
design__max_slew_violation__count	0	0	0 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕
timing__hold__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__hold_vio__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ff_n40C_5v50	1	1	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ss_125C_4v50	1	1	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ss_125C_4v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_tt_025C_5v00	1	1	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ff_n40C_5v50	1	1	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ss_125C_4v50	1	1	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_125C_4v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_tt_025C_5v00	1	1	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ff_n40C_5v50	1	1	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ss_125C_4v50	1	1	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_125C_4v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_tt_025C_5v00	1	1	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕

gf180mcuD/gf180mcu_fd_sc_mcu7t5v0/zipdiv

Metric	Before	After	Delta
timing__setup__tns	-298.4356	-228.6117	69.8239 (-23.3966%) ‼️
timing__setup__wns	-6.7195	-5.0252	1.6943 (-25.2153%) ‼️
timing__setup_r2r_vio__count	202	186	-16 (-7.9208%) ‼️
timing__setup_vio__count	202	186	-16 (-7.9208%) ‼️
timing__setup__tns__corner:max_ss_125C_4v50	-298.4356	-228.6117	69.8239 (-23.3966%) ‼️
timing__setup__wns__corner:max_ss_125C_4v50	-6.7195	-5.0252	1.6943 (-25.2153%) ‼️
timing__setup_r2r_vio__count__corner:max_ss_125C_4v50	68	63	-5 (-7.3529%) ‼️
timing__setup_vio__count__corner:max_ss_125C_4v50	68	63	-5 (-7.3529%) ‼️
timing__setup__tns__corner:min_ss_125C_4v50	-277.6584	-208.5530	69.1053 (-24.8886%) ‼️
timing__setup__wns__corner:min_ss_125C_4v50	-6.4319	-4.4685	1.9634 (-30.5255%) ‼️
timing__setup_r2r_vio__count__corner:min_ss_125C_4v50	67	61	-6 (-8.9552%) ‼️
timing__setup_vio__count__corner:min_ss_125C_4v50	67	61	-6 (-8.9552%) ‼️
timing__setup__tns__corner:nom_ss_125C_4v50	-287.0650	-217.3473	69.7177 (-24.2864%) ‼️
timing__setup__wns__corner:nom_ss_125C_4v50	-6.5615	-4.7209	1.8406 (-28.0520%) ‼️
timing__setup_r2r_vio__count__corner:nom_ss_125C_4v50	67	62	-5 (-7.4627%) ‼️
timing__setup_vio__count__corner:nom_ss_125C_4v50	67	62	-5 (-7.4627%) ‼️
clock__skew__worst_setup	0.0461	0.0398	-0.0063 (-13.6778%) ❗
design__instance__area	35410	35841	431 (+1.2172%) ❗
power__internal__total	0.0195	0.0197	0.0001 (+0.7684%) ❗
power__leakage__total	0.0000	0.0000	0.0000 (+0.7504%) ❗
clock__skew__worst_setup__corner:max_ff_n40C_5v50	0.0517	0.0442	-0.0075 (-14.5491%) ❗
clock__skew__worst_setup__corner:max_ss_125C_4v50	0.1317	0.1158	-0.0159 (-12.0496%) ❗
clock__skew__worst_setup__corner:max_tt_025C_5v00	0.0767	0.0665	-0.0102 (-13.2869%) ❗
clock__skew__worst_setup__corner:min_ff_n40C_5v50	0.0461	0.0398	-0.0063 (-13.6778%) ❗
clock__skew__worst_setup__corner:min_ss_125C_4v50	0.1192	0.1055	-0.0137 (-11.4963%) ❗
clock__skew__worst_setup__corner:min_tt_025C_5v00	0.0689	0.0602	-0.0087 (-12.5983%) ❗
clock__skew__worst_setup__corner:nom_ff_n40C_5v50	0.0487	0.0418	-0.0069 (-14.1192%) ❗
clock__skew__worst_setup__corner:nom_ss_125C_4v50	0.1250	0.1103	-0.0147 (-11.7632%) ❗
clock__skew__worst_setup__corner:nom_tt_025C_5v00	0.0725	0.0631	-0.0094 (-12.9329%) ❗
clock__skew__worst_hold	0.1317	0.1158	-0.0159 (-12.0496%) ⭕
ir__drop__avg	0.0019	0.0004	-0.0015 (-80.4839%) ⭕
ir__drop__worst	0.0092	0.0015	-0.0077 (-83.4962%) ⭕
ir__voltage__worst	4	5	1 (+25.0000%) ⭕
power__switching__total	0.0105	0.0103	-0.0002 (-1.4611%) ⭕
power__total	0.0300	0.0300	-0.0000 (-0.0110%) ⭕
clock__skew__worst_hold__corner:max_ff_n40C_5v50	0.0517	0.0442	-0.0075 (-14.5491%) ⭕
clock__skew__worst_hold__corner:max_ss_125C_4v50	0.1317	0.1158	-0.0159 (-12.0496%) ⭕
clock__skew__worst_hold__corner:max_tt_025C_5v00	0.0767	0.0665	-0.0102 (-13.2869%) ⭕
clock__skew__worst_hold__corner:min_ff_n40C_5v50	0.0461	0.0398	-0.0063 (-13.6778%) ⭕
clock__skew__worst_hold__corner:min_ss_125C_4v50	0.1192	0.1055	-0.0137 (-11.4963%) ⭕
clock__skew__worst_hold__corner:min_tt_025C_5v00	0.0689	0.0602	-0.0087 (-12.5983%) ⭕
clock__skew__worst_hold__corner:nom_ff_n40C_5v50	0.0487	0.0418	-0.0069 (-14.1192%) ⭕
clock__skew__worst_hold__corner:nom_ss_125C_4v50	0.1250	0.1103	-0.0147 (-11.7632%) ⭕
clock__skew__worst_hold__corner:nom_tt_025C_5v00	0.0725	0.0631	-0.0094 (-12.9329%) ⭕
antenna__violating__nets	0	0	0 (0.0000%) ⭕
antenna__violating__pins	0	0	0 (0.0000%) ⭕
design__core__area	73310.9000	73310.9000	0.0000 (0.0000%) ⭕
design__die__area	86150	86150	0 (0.0000%) ⭕
design__lint_error__count	0	0	0 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count	1	1	0 (0.0000%) ⭕
design__max_fanout_violation__count	5	5	0 (0.0000%) ⭕
design__max_slew_violation__count	0	0	0 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕
timing__hold__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__hold_vio__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ff_n40C_5v50	1	1	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ff_n40C_5v50	5	5	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ss_125C_4v50	1	1	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ss_125C_4v50	5	5	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ss_125C_4v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_tt_025C_5v00	1	1	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_tt_025C_5v00	5	5	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_5v00	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ff_n40C_5v50	1	1	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ff_n40C_5v50	5	5	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ss_125C_4v50	1	1	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ss_125C_4v50	5	5	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_125C_4v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_tt_025C_5v00	1	1	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_tt_025C_5v00	5	5	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_5v00	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ff_n40C_5v50	1	1	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ff_n40C_5v50	5	5	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_5v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_5v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ss_125C_4v50	1	1	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ss_125C_4v50	5	5	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_125C_4v50	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_125C_4v50	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_125C_4v50	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_tt_025C_5v00	1	1	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_tt_025C_5v00	5	5	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_5v00	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_5v00	0	0	0 (0.0000%) ⭕

sky130A/sky130_fd_sc_hd/APU

Metric	Before	After	Delta
clock__skew__worst_setup	0.1399	0.1157	-0.0242 (-17.3144%) ❗
design__instance__area	32647.6000	32891.5000	243.9000 (+0.7471%) ❗
power__leakage__total	0.0000	0.0000	0.0000 (+0.3482%) ❗
power__switching__total	0.0012	0.0012	0.0000 (+0.0429%) ❗
clock__skew__worst_setup__corner:max_ff_n40C_1v95	0.1507	0.1207	-0.0300 (-19.8962%) ❗
clock__skew__worst_setup__corner:max_ss_100C_1v60	0.3672	0.3103	-0.0569 (-15.4962%) ❗
clock__skew__worst_setup__corner:max_tt_025C_1v80	0.2164	0.1787	-0.0377 (-17.4173%) ❗
clock__skew__worst_setup__corner:min_ff_n40C_1v95	0.1399	0.1157	-0.0242 (-17.3144%) ❗
clock__skew__worst_setup__corner:min_ss_100C_1v60	0.3477	0.2972	-0.0505 (-14.5212%) ❗
clock__skew__worst_setup__corner:min_tt_025C_1v80	0.2026	0.1711	-0.0316 (-15.5767%) ❗
clock__skew__worst_setup__corner:nom_ff_n40C_1v95	0.1443	0.1180	-0.0263 (-18.2061%) ❗
clock__skew__worst_setup__corner:nom_ss_100C_1v60	0.3559	0.3032	-0.0527 (-14.8174%) ❗
design__max_slew_violation__count__corner:nom_ss_100C_1v60	15	18	3 (+20.0000%) ❗
clock__skew__worst_setup__corner:nom_tt_025C_1v80	0.2084	0.1747	-0.0336 (-16.1454%) ❗
antenna__violating__nets	3	2	-1 (-33.3333%) ⭕
antenna__violating__pins	3	2	-1 (-33.3333%) ⭕
clock__skew__worst_hold	0.3672	0.3103	-0.0569 (-15.4962%) ⭕
design__max_fanout_violation__count	40	35	-5 (-12.5000%) ⭕
design__max_slew_violation__count	37	18	-19 (-51.3514%) ⭕
ir__drop__avg	0.0001	0.0001	-0.0000 (-32.5517%) ⭕
ir__drop__worst	0.0011	0.0004	-0.0007 (-61.8349%) ⭕
power__internal__total	0.0021	0.0021	-0.0000 (-0.6743%) ⭕
power__total	0.0033	0.0033	-0.0000 (-0.4233%) ⭕
clock__skew__worst_hold__corner:max_ff_n40C_1v95	0.1507	0.1207	-0.0300 (-19.8962%) ⭕
design__max_fanout_violation__count__corner:max_ff_n40C_1v95	40	35	-5 (-12.5000%) ⭕
clock__skew__worst_hold__corner:max_ss_100C_1v60	0.3672	0.3103	-0.0569 (-15.4962%) ⭕
design__max_fanout_violation__count__corner:max_ss_100C_1v60	40	35	-5 (-12.5000%) ⭕
design__max_slew_violation__count__corner:max_ss_100C_1v60	37	18	-19 (-51.3514%) ⭕
clock__skew__worst_hold__corner:max_tt_025C_1v80	0.2164	0.1787	-0.0377 (-17.4173%) ⭕
design__max_fanout_violation__count__corner:max_tt_025C_1v80	40	35	-5 (-12.5000%) ⭕
clock__skew__worst_hold__corner:min_ff_n40C_1v95	0.1399	0.1157	-0.0242 (-17.3144%) ⭕
design__max_fanout_violation__count__corner:min_ff_n40C_1v95	40	35	-5 (-12.5000%) ⭕
clock__skew__worst_hold__corner:min_ss_100C_1v60	0.3477	0.2972	-0.0505 (-14.5212%) ⭕
design__max_fanout_violation__count__corner:min_ss_100C_1v60	40	35	-5 (-12.5000%) ⭕
design__max_slew_violation__count__corner:min_ss_100C_1v60	15	11	-4 (-26.6667%) ⭕
clock__skew__worst_hold__corner:min_tt_025C_1v80	0.2026	0.1711	-0.0316 (-15.5767%) ⭕
design__max_fanout_violation__count__corner:min_tt_025C_1v80	40	35	-5 (-12.5000%) ⭕
clock__skew__worst_hold__corner:nom_ff_n40C_1v95	0.1443	0.1180	-0.0263 (-18.2061%) ⭕
design__max_fanout_violation__count__corner:nom_ff_n40C_1v95	40	35	-5 (-12.5000%) ⭕
clock__skew__worst_hold__corner:nom_ss_100C_1v60	0.3559	0.3032	-0.0527 (-14.8174%) ⭕
design__max_fanout_violation__count__corner:nom_ss_100C_1v60	40	35	-5 (-12.5000%) ⭕
clock__skew__worst_hold__corner:nom_tt_025C_1v80	0.2084	0.1747	-0.0336 (-16.1454%) ⭕
design__max_fanout_violation__count__corner:nom_tt_025C_1v80	40	35	-5 (-12.5000%) ⭕
design__core__area	83157.3000	83157.3000	0.0000 (0.0000%) ⭕
design__die__area	92941.4000	92941.4000	0.0000 (0.0000%) ⭕
design__lint_error__count	0	0	0 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count	0	0	0 (0.0000%) ⭕
ir__voltage__worst	1.8000	1.8000	0.0000 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕
timing__hold__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__hold_vio__count	0	0	0 (0.0000%) ⭕
timing__setup__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__setup_vio__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕

sky130A/sky130_fd_sc_hd/EF_GPIO

Metric	Before	After	Delta
clock__skew__worst_hold	-0.0027	-0.0024	0.0003 (-11.0075%) ❗
power__internal__total	0.0002	0.0002	0.0000 (+0.0052%) ❗
clock__skew__worst_hold__corner:max_ff_n40C_1v95	-0.0033	-0.0028	0.0005 (-15.1302%) ❗
clock__skew__worst_hold__corner:max_ss_100C_1v60	-0.0072	-0.0060	0.0011 (-15.7865%) ❗
clock__skew__worst_hold__corner:max_tt_025C_1v80	-0.0041	-0.0035	0.0006 (-15.2021%) ❗
clock__skew__worst_hold__corner:min_ff_n40C_1v95	-0.0027	-0.0024	0.0003 (-11.0075%) ❗
clock__skew__worst_hold__corner:min_ss_100C_1v60	-0.0061	-0.0054	0.0007 (-12.0255%) ❗
clock__skew__worst_hold__corner:min_tt_025C_1v80	-0.0034	-0.0030	0.0004 (-11.4178%) ❗
clock__skew__worst_hold__corner:nom_ff_n40C_1v95	-0.0029	-0.0025	0.0004 (-12.3379%) ❗
clock__skew__worst_hold__corner:nom_ss_100C_1v60	-0.0064	-0.0056	0.0009 (-13.3292%) ❗
clock__skew__worst_hold__corner:nom_tt_025C_1v80	-0.0036	-0.0032	0.0005 (-12.7228%) ❗
clock__skew__worst_setup	-0.0072	-0.0060	0.0011 (-15.7865%) ⭕
ir__drop__avg	0.0001	0.0000	-0.0000 (-43.1235%) ⭕
ir__drop__worst	0.0002	0.0001	-0.0001 (-50.4167%) ⭕
power__switching__total	0.0001	0.0001	-0.0000 (-0.0783%) ⭕
power__total	0.0003	0.0003	-0.0000 (-0.0201%) ⭕
clock__skew__worst_setup__corner:max_ff_n40C_1v95	-0.0033	-0.0028	0.0005 (-15.1302%) ⭕
clock__skew__worst_setup__corner:max_ss_100C_1v60	-0.0072	-0.0060	0.0011 (-15.7865%) ⭕
clock__skew__worst_setup__corner:max_tt_025C_1v80	-0.0041	-0.0035	0.0006 (-15.2021%) ⭕
clock__skew__worst_setup__corner:min_ff_n40C_1v95	-0.0027	-0.0024	0.0003 (-11.0075%) ⭕
clock__skew__worst_setup__corner:min_ss_100C_1v60	-0.0061	-0.0054	0.0007 (-12.0255%) ⭕
clock__skew__worst_setup__corner:min_tt_025C_1v80	-0.0034	-0.0030	0.0004 (-11.4178%) ⭕
clock__skew__worst_setup__corner:nom_ff_n40C_1v95	-0.0029	-0.0025	0.0004 (-12.3379%) ⭕
clock__skew__worst_setup__corner:nom_ss_100C_1v60	-0.0064	-0.0056	0.0009 (-13.3292%) ⭕
clock__skew__worst_setup__corner:nom_tt_025C_1v80	-0.0036	-0.0032	0.0005 (-12.7228%) ⭕
antenna__violating__nets	0	0	0 (0.0000%) ⭕
antenna__violating__pins	0	0	0 (0.0000%) ⭕
design__core__area	1670.3500	1670.3500	0.0000 (0.0000%) ⭕
design__die__area	2700.3500	2700.3500	0.0000 (0.0000%) ⭕
design__instance__area	1345.0400	1345.0400	0.0000 (0.0000%) ⭕
design__lint_error__count	0	0	0 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count	0	0	0 (0.0000%) ⭕
ir__voltage__worst	1.8000	1.8000	0.0000 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
power__leakage__total	0.0000	0.0000	0.0000 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕
timing__hold__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__hold_vio__count	0	0	0 (0.0000%) ⭕
timing__setup__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__setup_vio__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ff_n40C_1v95	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ss_100C_1v60	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_tt_025C_1v80	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ff_n40C_1v95	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ss_100C_1v60	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_tt_025C_1v80	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ff_n40C_1v95	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ss_100C_1v60	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_tt_025C_1v80	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕

sky130A/sky130_fd_sc_hd/EF_PSRAM_CTRL_V2

Metric	Before	After	Delta
timing__setup__tns	-4.7181	-0.0692	4.6489 (-98.5332%) ‼️
timing__setup__wns	-0.6874	-0.0692	0.6182 (-89.9326%) ‼️
timing__setup_vio__count	60	2	-58 (-96.6667%) ‼️
timing__setup__tns__corner:max_ss_100C_1v60	-4.7181	-0.0692	4.6489 (-98.5332%) ‼️
timing__setup__wns__corner:max_ss_100C_1v60	-0.6874	-0.0692	0.6182 (-89.9326%) ‼️
timing__setup_vio__count__corner:max_ss_100C_1v60	36	1	-35 (-97.2222%) ‼️
timing__setup__tns__corner:min_ss_100C_1v60	-1.3806	0.0000	1.3806 (-100.0000%) ‼️
timing__setup__wns__corner:min_ss_100C_1v60	-0.4679	0.0000	0.4679 (-100.0000%) ‼️
timing__setup_vio__count__corner:min_ss_100C_1v60	4	0	-4 (-100.0000%) ‼️
timing__setup__tns__corner:nom_ss_100C_1v60	-2.1405	-0.0032	2.1373 (-99.8484%) ‼️
timing__setup__wns__corner:nom_ss_100C_1v60	-0.5743	-0.0032	0.5711 (-99.4350%) ‼️
timing__setup_vio__count__corner:nom_ss_100C_1v60	20	1	-19 (-95.0000%) ‼️
clock__skew__worst_hold	-0.0139	-0.0133	0.0005 (-3.8971%) ❗
design__core__area	6794.0200	8051.4700	1257.4500 (+18.5082%) ❗
design__die__area	9934.3000	11313.5000	1379.2000 (+13.8832%) ❗
power__leakage__total	0.0000	0.0000	0.0000 (+1.6818%) ❗
clock__skew__worst_hold__corner:max_ff_n40C_1v95	-0.0164	-0.0153	0.0011 (-6.8827%) ❗
clock__skew__worst_hold__corner:max_ss_100C_1v60	-0.0331	-0.0304	0.0027 (-8.1953%) ❗
clock__skew__worst_hold__corner:max_tt_025C_1v80	-0.0207	-0.0190	0.0017 (-8.1841%) ❗
clock__skew__worst_hold__corner:min_ff_n40C_1v95	-0.0139	-0.0133	0.0005 (-3.8971%) ❗
clock__skew__worst_hold__corner:min_ss_100C_1v60	-0.0289	-0.0275	0.0014 (-4.9155%) ❗
clock__skew__worst_hold__corner:min_tt_025C_1v80	-0.0179	-0.0170	0.0009 (-5.1397%) ❗
clock__skew__worst_hold__corner:nom_ff_n40C_1v95	-0.0147	-0.0139	0.0008 (-5.4502%) ❗
clock__skew__worst_hold__corner:nom_ss_100C_1v60	-0.0307	-0.0287	0.0020 (-6.6285%) ❗
clock__skew__worst_hold__corner:nom_tt_025C_1v80	-0.0188	-0.0176	0.0013 (-6.8014%) ❗
clock__skew__worst_setup	-0.0331	-0.0304	0.0027 (-8.1953%) ⭕
design__instance__area	5751.7700	5614.1300	-137.6400 (-2.3930%) ⭕
ir__drop__avg	0.0006	0.0003	-0.0003 (-47.0383%) ⭕
ir__drop__worst	0.0024	0.0009	-0.0015 (-63.1557%) ⭕
power__internal__total	0.0011	0.0008	-0.0002 (-21.8920%) ⭕
power__switching__total	0.0012	0.0009	-0.0003 (-25.5833%) ⭕
power__total	0.0023	0.0018	-0.0006 (-23.8509%) ⭕
clock__skew__worst_setup__corner:max_ff_n40C_1v95	-0.0164	-0.0153	0.0011 (-6.8827%) ⭕
clock__skew__worst_setup__corner:max_ss_100C_1v60	-0.0331	-0.0304	0.0027 (-8.1953%) ⭕
clock__skew__worst_setup__corner:max_tt_025C_1v80	-0.0207	-0.0190	0.0017 (-8.1841%) ⭕
clock__skew__worst_setup__corner:min_ff_n40C_1v95	-0.0139	-0.0133	0.0005 (-3.8971%) ⭕
clock__skew__worst_setup__corner:min_ss_100C_1v60	-0.0289	-0.0275	0.0014 (-4.9155%) ⭕
clock__skew__worst_setup__corner:min_tt_025C_1v80	-0.0179	-0.0170	0.0009 (-5.1397%) ⭕
clock__skew__worst_setup__corner:nom_ff_n40C_1v95	-0.0147	-0.0139	0.0008 (-5.4502%) ⭕
clock__skew__worst_setup__corner:nom_ss_100C_1v60	-0.0307	-0.0287	0.0020 (-6.6285%) ⭕
clock__skew__worst_setup__corner:nom_tt_025C_1v80	-0.0188	-0.0176	0.0013 (-6.8014%) ⭕
antenna__violating__nets	0	0	0 (0.0000%) ⭕
antenna__violating__pins	0	0	0 (0.0000%) ⭕
design__lint_error__count	0	0	0 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count	0	0	0 (0.0000%) ⭕
ir__voltage__worst	1.8000	1.8000	0.0000 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕
timing__hold__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__hold_vio__count	0	0	0 (0.0000%) ⭕
timing__setup_r2r_vio__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ff_n40C_1v95	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ss_100C_1v60	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_tt_025C_1v80	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ff_n40C_1v95	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ss_100C_1v60	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_tt_025C_1v80	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ff_n40C_1v95	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ss_100C_1v60	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_tt_025C_1v80	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕

sky130A/sky130_fd_sc_hd/EF_TCC32

Metric	Before	After	Delta
antenna__violating__nets	0	1	1 ❗
antenna__violating__pins	0	1	1 ❗
clock__skew__worst_hold	0.0345	0.0365	0.0020 (+5.6574%) ❗
clock__skew__worst_setup	0.0160	-0.0226	-0.0386 (-241.3060%) ❗
power__internal__total	0.0012	0.0012	0.0000 (+0.1495%) ❗
power__switching__total	0.0009	0.0009	0.0000 (+0.1494%) ❗
power__total	0.0020	0.0020	0.0000 (+0.1494%) ❗
clock__skew__worst_setup__corner:max_ff_n40C_1v95	0.0172	-0.0184	-0.0357 (-206.9175%) ❗
clock__skew__worst_hold__corner:max_ss_100C_1v60	0.0345	0.0365	0.0020 (+5.6574%) ❗
clock__skew__worst_setup__corner:max_tt_025C_1v80	0.0220	-0.0226	-0.0446 (-202.5976%) ❗
clock__skew__worst_hold__corner:min_ff_n40C_1v95	0.0160	0.0166	0.0006 (+3.5214%) ❗
clock__skew__worst_hold__corner:min_ss_100C_1v60	0.0324	0.0346	0.0022 (+6.8136%) ❗
clock__skew__worst_hold__corner:min_tt_025C_1v80	0.0209	0.0217	0.0008 (+4.0498%) ❗
clock__skew__worst_hold__corner:nom_ff_n40C_1v95	0.0165	0.0169	0.0004 (+2.4729%) ❗
clock__skew__worst_hold__corner:nom_ss_100C_1v60	0.0335	0.0358	0.0023 (+6.7891%) ❗
clock__skew__worst_hold__corner:nom_tt_025C_1v80	0.0214	0.0221	0.0008 (+3.7089%) ❗
design__instance__area	9212.5900	9206.3300	-6.2600 (-0.0680%) ⭕
ir__drop__avg	0.0004	0.0003	-0.0001 (-24.0535%) ⭕
ir__drop__worst	0.0015	0.0009	-0.0006 (-40.1325%) ⭕
power__leakage__total	0.0000	0.0000	-0.0000 (-0.4788%) ⭕
clock__skew__worst_hold__corner:max_ff_n40C_1v95	0.0172	-0.0184	-0.0357 (-206.9175%) ⭕
clock__skew__worst_setup__corner:max_ss_100C_1v60	0.0345	0.0365	0.0020 (+5.6574%) ⭕
clock__skew__worst_hold__corner:max_tt_025C_1v80	0.0220	-0.0226	-0.0446 (-202.5976%) ⭕
clock__skew__worst_setup__corner:min_ff_n40C_1v95	0.0160	0.0166	0.0006 (+3.5214%) ⭕
clock__skew__worst_setup__corner:min_ss_100C_1v60	0.0324	0.0346	0.0022 (+6.8136%) ⭕
clock__skew__worst_setup__corner:min_tt_025C_1v80	0.0209	0.0217	0.0008 (+4.0498%) ⭕
clock__skew__worst_setup__corner:nom_ff_n40C_1v95	0.0165	0.0169	0.0004 (+2.4729%) ⭕
clock__skew__worst_setup__corner:nom_ss_100C_1v60	0.0335	0.0358	0.0023 (+6.7891%) ⭕
clock__skew__worst_setup__corner:nom_tt_025C_1v80	0.0214	0.0221	0.0008 (+3.7089%) ⭕
design__core__area	11369.7000	11369.7000	0.0000 (0.0000%) ⭕
design__die__area	15327.4000	15327.4000	0.0000 (0.0000%) ⭕
design__lint_error__count	0	0	0 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count	1	1	0 (0.0000%) ⭕
design__max_slew_violation__count	0	0	0 (0.0000%) ⭕
ir__voltage__worst	1.8000	1.8000	0.0000 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕
timing__hold__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__hold_vio__count	0	0	0 (0.0000%) ⭕
timing__setup__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__setup_vio__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ff_n40C_1v95	1	1	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ss_100C_1v60	1	1	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_tt_025C_1v80	1	1	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ff_n40C_1v95	1	1	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ss_100C_1v60	1	1	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_tt_025C_1v80	1	1	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ff_n40C_1v95	1	1	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ss_100C_1v60	1	1	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_tt_025C_1v80	1	1	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕

sky130A/sky130_fd_sc_hd/EF_UART

Metric	Before	After	Delta
antenna__violating__nets	3	6	3 (+100.0000%) ❗
antenna__violating__pins	3	6	3 (+100.0000%) ❗
clock__skew__worst_setup	0.0287	-0.0791	-0.1078 (-376.2250%) ❗
clock__skew__worst_setup__corner:max_ff_n40C_1v95	0.0365	-0.0417	-0.0782 (-214.1645%) ❗
clock__skew__worst_setup__corner:max_ss_100C_1v60	0.0737	-0.0791	-0.1529 (-207.3561%) ❗
clock__skew__worst_setup__corner:max_tt_025C_1v80	0.0455	-0.0547	-0.1002 (-220.2489%) ❗
clock__skew__worst_setup__corner:min_ff_n40C_1v95	0.0287	-0.0372	-0.0659 (-229.9246%) ❗
clock__skew__worst_setup__corner:min_ss_100C_1v60	0.0664	-0.0729	-0.1394 (-209.8497%) ❗
clock__skew__worst_setup__corner:min_tt_025C_1v80	0.0381	-0.0496	-0.0877 (-230.1522%) ❗
clock__skew__worst_setup__corner:nom_ff_n40C_1v95	0.0314	-0.0382	-0.0696 (-221.8450%) ❗
clock__skew__worst_setup__corner:nom_ss_100C_1v60	0.0683	-0.0738	-0.1421 (-208.0412%) ❗
clock__skew__worst_setup__corner:nom_tt_025C_1v80	0.0396	-0.0505	-0.0900 (-227.6007%) ❗
clock__skew__worst_hold	0.0737	-0.0372	-0.1109 (-150.4958%) ⭕
design__instance__area	19523.7000	19431.1000	-92.6000 (-0.4743%) ⭕
design__max_fanout_violation__count	20	19	-1 (-5.0000%) ⭕
ir__drop__avg	0.0010	0.0007	-0.0003 (-29.7679%) ⭕
ir__drop__worst	0.0039	0.0022	-0.0016 (-42.6357%) ⭕
power__internal__total	0.0031	0.0031	-0.0000 (-1.0778%) ⭕
power__leakage__total	0.0000	0.0000	-0.0000 (-0.6879%) ⭕
power__switching__total	0.0016	0.0016	-0.0000 (-1.0418%) ⭕
power__total	0.0047	0.0047	-0.0001 (-1.0655%) ⭕
clock__skew__worst_hold__corner:max_ff_n40C_1v95	0.0365	-0.0417	-0.0782 (-214.1645%) ⭕
design__max_fanout_violation__count__corner:max_ff_n40C_1v95	20	19	-1 (-5.0000%) ⭕
clock__skew__worst_hold__corner:max_ss_100C_1v60	0.0737	-0.0791	-0.1529 (-207.3561%) ⭕
design__max_fanout_violation__count__corner:max_ss_100C_1v60	20	19	-1 (-5.0000%) ⭕
clock__skew__worst_hold__corner:max_tt_025C_1v80	0.0455	-0.0547	-0.1002 (-220.2489%) ⭕
design__max_fanout_violation__count__corner:max_tt_025C_1v80	20	19	-1 (-5.0000%) ⭕
clock__skew__worst_hold__corner:min_ff_n40C_1v95	0.0287	-0.0372	-0.0659 (-229.9246%) ⭕
design__max_fanout_violation__count__corner:min_ff_n40C_1v95	20	19	-1 (-5.0000%) ⭕
clock__skew__worst_hold__corner:min_ss_100C_1v60	0.0664	-0.0729	-0.1394 (-209.8497%) ⭕
design__max_fanout_violation__count__corner:min_ss_100C_1v60	20	19	-1 (-5.0000%) ⭕
clock__skew__worst_hold__corner:min_tt_025C_1v80	0.0381	-0.0496	-0.0877 (-230.1522%) ⭕
design__max_fanout_violation__count__corner:min_tt_025C_1v80	20	19	-1 (-5.0000%) ⭕
clock__skew__worst_hold__corner:nom_ff_n40C_1v95	0.0314	-0.0382	-0.0696 (-221.8450%) ⭕
design__max_fanout_violation__count__corner:nom_ff_n40C_1v95	20	19	-1 (-5.0000%) ⭕
clock__skew__worst_hold__corner:nom_ss_100C_1v60	0.0683	-0.0738	-0.1421 (-208.0412%) ⭕
design__max_fanout_violation__count__corner:nom_ss_100C_1v60	20	19	-1 (-5.0000%) ⭕
clock__skew__worst_hold__corner:nom_tt_025C_1v80	0.0396	-0.0505	-0.0900 (-227.6007%) ⭕
design__max_fanout_violation__count__corner:nom_tt_025C_1v80	20	19	-1 (-5.0000%) ⭕
design__core__area	22502.8000	22502.8000	0.0000 (0.0000%) ⭕
design__die__area	27887	27887	0 (0.0000%) ⭕
design__lint_error__count	0	0	0 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count	0	0	0 (0.0000%) ⭕
ir__voltage__worst	1.8000	1.8000	0.0000 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕
timing__hold__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__hold_vio__count	0	0	0 (0.0000%) ⭕
timing__setup__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__setup_vio__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕

sky130A/sky130_fd_sc_hd/MS_CLK_RST

Metric	Before	After	Delta
clock__skew__worst_setup	-2.6726	-2.6779	-0.0054 (+0.2007%) ❗
power__leakage__total	0.0000	0.0000	0.0000 (+0.6016%) ❗
clock__skew__worst_setup__corner:max_ff_n40C_1v95	-0.7481	-0.7503	-0.0022 (+0.2941%) ❗
clock__skew__worst_setup__corner:max_ss_100C_1v60	-2.6726	-2.6779	-0.0054 (+0.2007%) ❗
clock__skew__worst_setup__corner:max_tt_025C_1v80	-1.4361	-1.4393	-0.0032 (+0.2228%) ❗
clock__skew__worst_setup__corner:min_ff_n40C_1v95	-0.7452	-0.7471	-0.0019 (+0.2490%) ❗
clock__skew__worst_setup__corner:min_ss_100C_1v60	-2.6472	-2.6518	-0.0046 (+0.1735%) ❗
clock__skew__worst_setup__corner:min_tt_025C_1v80	-1.4283	-1.4306	-0.0023 (+0.1641%) ❗
clock__skew__worst_setup__corner:nom_ff_n40C_1v95	-0.7501	-0.7520	-0.0019 (+0.2540%) ❗
clock__skew__worst_setup__corner:nom_ss_100C_1v60	-2.6639	-2.6688	-0.0049 (+0.1844%) ❗
clock__skew__worst_setup__corner:nom_tt_025C_1v80	-1.4354	-1.4385	-0.0031 (+0.2157%) ❗
clock__skew__worst_hold	-0.7515	-0.7534	-0.0019 (+0.2510%) ⭕
ir__drop__avg	0.0000	0.0000	-0.0000 (-37.9902%) ⭕
ir__drop__worst	0.0000	0.0000	-0.0000 (-60.4762%) ⭕
power__internal__total	0.0001	0.0001	-0.0000 (-0.0520%) ⭕
power__switching__total	0.0000	0.0000	-0.0000 (-0.0429%) ⭕
power__total	0.0001	0.0001	-0.0000 (-0.0493%) ⭕
clock__skew__worst_hold__corner:max_ff_n40C_1v95	-0.7544	-0.7567	-0.0023 (+0.3045%) ⭕
clock__skew__worst_hold__corner:max_ss_100C_1v60	-2.6775	-2.6829	-0.0053 (+0.1994%) ⭕
clock__skew__worst_hold__corner:max_tt_025C_1v80	-1.4388	-1.4421	-0.0032 (+0.2253%) ⭕
clock__skew__worst_hold__corner:min_ff_n40C_1v95	-0.7515	-0.7534	-0.0019 (+0.2510%) ⭕
clock__skew__worst_hold__corner:min_ss_100C_1v60	-2.6522	-2.6568	-0.0046 (+0.1737%) ⭕
clock__skew__worst_hold__corner:min_tt_025C_1v80	-1.4310	-1.4334	-0.0024 (+0.1658%) ⭕
clock__skew__worst_hold__corner:nom_ff_n40C_1v95	-0.7564	-0.7584	-0.0020 (+0.2644%) ⭕
clock__skew__worst_hold__corner:nom_ss_100C_1v60	-2.6688	-2.6738	-0.0049 (+0.1854%) ⭕
clock__skew__worst_hold__corner:nom_tt_025C_1v80	-1.4381	-1.4413	-0.0032 (+0.2213%) ⭕
antenna__violating__nets	0	0	0 (0.0000%) ⭕
antenna__violating__pins	0	0	0 (0.0000%) ⭕
design__core__area	9240.1100	9240.1100	0.0000 (0.0000%) ⭕
design__die__area	12880.8000	12880.8000	0.0000 (0.0000%) ⭕
design__instance__area	5172.4600	5172.4600	0.0000 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count	2	2	0 (0.0000%) ⭕
design__max_fanout_violation__count	4	4	0 (0.0000%) ⭕
design__max_slew_violation__count	132	132	0 (0.0000%) ⭕
ir__voltage__worst	1.8000	1.8000	0.0000 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕
timing__hold__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__hold_vio__count	0	0	0 (0.0000%) ⭕
timing__setup__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__setup_vio__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ff_n40C_1v95	4	4	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ss_100C_1v60	2	2	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ss_100C_1v60	4	4	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ss_100C_1v60	132	132	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_tt_025C_1v80	4	4	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ff_n40C_1v95	4	4	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ss_100C_1v60	2	2	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ss_100C_1v60	4	4	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ss_100C_1v60	132	132	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_tt_025C_1v80	4	4	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ff_n40C_1v95	4	4	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ss_100C_1v60	2	2	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ss_100C_1v60	4	4	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ss_100C_1v60	132	132	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_tt_025C_1v80	4	4	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕

sky130A/sky130_fd_sc_hd/MS_DMAC_AHBL

Metric	Before	After	Delta
timing__setup__tns	-75.8709	-78.8026	-2.9317 (+3.8640%) ‼️
timing__setup__wns	-4.0105	-4.0243	-0.0138 (+0.3438%) ‼️
timing__setup_vio__count	88	87	-1 (-1.1364%) ‼️
timing__setup__tns__corner:max_ss_100C_1v60	-75.8709	-78.8026	-2.9317 (+3.8640%) ‼️
timing__setup__wns__corner:max_ss_100C_1v60	-4.0105	-4.0243	-0.0138 (+0.3438%) ‼️
timing__setup__tns__corner:min_ss_100C_1v60	-67.4476	-69.3395	-1.8920 (+2.8051%) ‼️
timing__setup__wns__corner:min_ss_100C_1v60	-3.7031	-3.6372	0.0659 (-1.7802%) ‼️
timing__setup_vio__count__corner:min_ss_100C_1v60	29	28	-1 (-3.4483%) ‼️
timing__setup__tns__corner:nom_ss_100C_1v60	-71.2845	-73.9455	-2.6610 (+3.7329%) ‼️
timing__setup__wns__corner:nom_ss_100C_1v60	-3.8544	-3.8278	0.0266 (-0.6901%) ‼️
antenna__violating__nets	0	1	1 ❗
antenna__violating__pins	0	1	1 ❗
clock__skew__worst_hold	1.8263	1.8315	0.0053 (+0.2878%) ❗
clock__skew__worst_hold__corner:max_ss_100C_1v60	1.8263	1.8315	0.0053 (+0.2878%) ❗
clock__skew__worst_hold__corner:min_ss_100C_1v60	1.7639	1.7678	0.0039 (+0.2230%) ❗
clock__skew__worst_hold__corner:nom_ss_100C_1v60	1.7922	1.7999	0.0077 (+0.4304%) ❗
clock__skew__worst_setup	1.0386	1.0806	0.0420 (+4.0433%) ⭕
design__instance__area	15175	15117	-58 (-0.3822%) ⭕
design__max_fanout_violation__count	9	8	-1 (-11.1111%) ⭕
design__max_slew_violation__count	3	0	-3 (-100.0000%) ⭕
ir__drop__avg	0.0004	0.0003	-0.0001 (-25.6659%) ⭕
ir__drop__worst	0.0020	0.0011	-0.0009 (-46.4646%) ⭕
power__internal__total	0.0012	0.0012	-0.0000 (-0.3116%) ⭕
power__leakage__total	0.0000	0.0000	-0.0000 (-0.3086%) ⭕
power__switching__total	0.0005	0.0005	-0.0000 (-1.7994%) ⭕
power__total	0.0018	0.0018	-0.0000 (-0.7613%) ⭕
clock__skew__worst_hold__corner:max_ff_n40C_1v95	0.6081	0.6048	-0.0033 (-0.5463%) ⭕
clock__skew__worst_setup__corner:max_ff_n40C_1v95	1.0796	1.1144	0.0348 (+3.2242%) ⭕
design__max_fanout_violation__count__corner:max_ff_n40C_1v95	9	8	-1 (-11.1111%) ⭕
clock__skew__worst_setup__corner:max_ss_100C_1v60	3.2217	3.4109	0.1892 (+5.8725%) ⭕
design__max_fanout_violation__count__corner:max_ss_100C_1v60	9	8	-1 (-11.1111%) ⭕
design__max_slew_violation__count__corner:max_ss_100C_1v60	3	0	-3 (-100.0000%) ⭕
clock__skew__worst_hold__corner:max_tt_025C_1v80	0.9474	0.9452	-0.0022 (-0.2321%) ⭕
clock__skew__worst_setup__corner:max_tt_025C_1v80	1.6761	1.7391	0.0629 (+3.7550%) ⭕
design__max_fanout_violation__count__corner:max_tt_025C_1v80	9	8	-1 (-11.1111%) ⭕
clock__skew__worst_hold__corner:min_ff_n40C_1v95	0.5825	0.5804	-0.0021 (-0.3592%) ⭕
clock__skew__worst_setup__corner:min_ff_n40C_1v95	1.0386	1.0806	0.0420 (+4.0433%) ⭕
design__max_fanout_violation__count__corner:min_ff_n40C_1v95	9	8	-1 (-11.1111%) ⭕
clock__skew__worst_setup__corner:min_ss_100C_1v60	3.0996	3.3195	0.2199 (+7.0945%) ⭕
design__max_fanout_violation__count__corner:min_ss_100C_1v60	9	8	-1 (-11.1111%) ⭕
clock__skew__worst_hold__corner:min_tt_025C_1v80	0.9106	0.9090	-0.0016 (-0.1750%) ⭕
clock__skew__worst_setup__corner:min_tt_025C_1v80	1.6104	1.6861	0.0757 (+4.7008%) ⭕
design__max_fanout_violation__count__corner:min_tt_025C_1v80	9	8	-1 (-11.1111%) ⭕
clock__skew__worst_hold__corner:nom_ff_n40C_1v95	0.5942	0.5925	-0.0017 (-0.2925%) ⭕
clock__skew__worst_setup__corner:nom_ff_n40C_1v95	1.0587	1.0974	0.0387 (+3.6562%) ⭕
design__max_fanout_violation__count__corner:nom_ff_n40C_1v95	9	8	-1 (-11.1111%) ⭕
clock__skew__worst_setup__corner:nom_ss_100C_1v60	3.1668	3.3674	0.2006 (+6.3346%) ⭕
design__max_fanout_violation__count__corner:nom_ss_100C_1v60	9	8	-1 (-11.1111%) ⭕
design__max_slew_violation__count__corner:nom_ss_100C_1v60	3	0	-3 (-100.0000%) ⭕
clock__skew__worst_hold__corner:nom_tt_025C_1v80	0.9281	0.9271	-0.0011 (-0.1138%) ⭕
clock__skew__worst_setup__corner:nom_tt_025C_1v80	1.6431	1.7121	0.0691 (+4.2041%) ⭕
design__max_fanout_violation__count__corner:nom_tt_025C_1v80	9	8	-1 (-11.1111%) ⭕
design__core__area	19398.6000	19398.6000	0.0000 (0.0000%) ⭕
design__die__area	24435.4000	24435.4000	0.0000 (0.0000%) ⭕
design__lint_error__count	0	0	0 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count	0	0	0 (0.0000%) ⭕
ir__voltage__worst	1.8000	1.8000	0.0000 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕
timing__hold__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__hold_vio__count	0	0	0 (0.0000%) ⭕
timing__setup_r2r_vio__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ss_100C_1v60	30	30	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ss_100C_1v60	29	29	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕

sky130A/sky130_fd_sc_hd/MS_SPI_XIP_CACHE

Metric	Before	After	Delta
timing__hold__tns	0.0000	-3.1378	-3.1378 ‼️
timing__hold__wns	0.0000	-0.2455	-0.2455 ‼️
timing__hold_vio__count	0	59	59 ‼️
timing__setup__tns	-63.9409	-60.3551	3.5858 (-5.6080%) ‼️
timing__setup__wns	-2.6092	-2.3460	0.2632 (-10.0875%) ‼️
timing__hold__tns__corner:max_ss_100C_1v60	0.0000	-3.1378	-3.1378 ‼️
timing__hold__wns__corner:max_ss_100C_1v60	0.0000	-0.2455	-0.2455 ‼️
timing__hold_vio__count__corner:max_ss_100C_1v60	0	26	26 ‼️
timing__setup__tns__corner:max_ss_100C_1v60	-63.9409	-60.3551	3.5858 (-5.6080%) ‼️
timing__setup__wns__corner:max_ss_100C_1v60	-2.6092	-2.3460	0.2632 (-10.0875%) ‼️
timing__hold__tns__corner:min_ss_100C_1v60	0.0000	-0.2613	-0.2613 ‼️
timing__hold__wns__corner:min_ss_100C_1v60	0.0000	-0.0831	-0.0831 ‼️
timing__hold_vio__count__corner:min_ss_100C_1v60	0	15	15 ‼️
timing__setup__tns__corner:min_ss_100C_1v60	-39.4486	-37.6731	1.7755 (-4.5007%) ‼️
timing__setup__wns__corner:min_ss_100C_1v60	-1.8028	-1.6120	0.1908 (-10.5852%) ‼️
timing__hold__tns__corner:nom_ss_100C_1v60	0.0000	-1.5674	-1.5674 ‼️
timing__hold__wns__corner:nom_ss_100C_1v60	0.0000	-0.1601	-0.1601 ‼️
timing__hold_vio__count__corner:nom_ss_100C_1v60	0	18	18 ‼️
timing__setup__tns__corner:nom_ss_100C_1v60	-52.0311	-49.1408	2.8903 (-5.5550%) ‼️
timing__setup__wns__corner:nom_ss_100C_1v60	-2.2224	-1.9967	0.2258 (-10.1585%) ‼️
clock__skew__worst_hold	0.1450	0.2702	0.1252 (+86.3127%) ❗
design__core__area	175921	207279	31358 (+17.8250%) ❗
design__die__area	190438	223714	33276 (+17.4734%) ❗
design__instance__area	147036	147501	465 (+0.3162%) ❗
power__internal__total	0.0148	0.0149	0.0001 (+0.5928%) ❗
power__leakage__total	0.0000	0.0000	0.0000 (+1.3710%) ❗
power__switching__total	0.0066	0.0066	0.0000 (+0.6737%) ❗
power__total	0.0214	0.0215	0.0001 (+0.6177%) ❗
clock__skew__worst_hold__corner:max_ff_n40C_1v95	-0.0967	0.1157	0.2123 (-219.6462%) ❗
clock__skew__worst_hold__corner:max_ss_100C_1v60	-0.1591	0.2702	0.4294 (-269.8244%) ❗
clock__skew__worst_hold__corner:max_tt_025C_1v80	-0.1178	0.1656	0.2834 (-240.5302%) ❗
clock__skew__worst_hold__corner:min_ff_n40C_1v95	-0.0600	0.1032	0.1632 (-271.9863%) ❗
clock__skew__worst_hold__corner:min_ss_100C_1v60	0.1342	0.2408	0.1066 (+79.4016%) ❗
clock__skew__worst_hold__corner:min_tt_025C_1v80	0.0825	0.1454	0.0630 (+76.3581%) ❗
clock__skew__worst_hold__corner:nom_ff_n40C_1v95	-0.0730	0.1094	0.1824 (-249.7577%) ❗
clock__skew__worst_hold__corner:nom_ss_100C_1v60	0.1450	0.2547	0.1096 (+75.5902%) ❗
clock__skew__worst_hold__corner:nom_tt_025C_1v80	-0.0914	0.1559	0.2473 (-270.6349%) ❗
clock__skew__worst_setup	-0.1591	0.1032	0.2623 (-164.8345%) ⭕
design__max_cap_violation__count	29	21	-8 (-27.5862%) ⭕
design__max_fanout_violation__count	216	196	-20 (-9.2593%) ⭕
ir__drop__avg	0.0004	0.0003	-0.0001 (-28.2500%) ⭕
ir__drop__worst	0.0018	0.0016	-0.0002 (-10.8108%) ⭕
clock__skew__worst_setup__corner:max_ff_n40C_1v95	-0.0967	0.1157	0.2123 (-219.6462%) ⭕
design__max_cap_violation__count__corner:max_ff_n40C_1v95	29	21	-8 (-27.5862%) ⭕
design__max_fanout_violation__count__corner:max_ff_n40C_1v95	216	196	-20 (-9.2593%) ⭕
clock__skew__worst_setup__corner:max_ss_100C_1v60	-0.1591	0.2702	0.4294 (-269.8244%) ⭕
design__max_cap_violation__count__corner:max_ss_100C_1v60	29	21	-8 (-27.5862%) ⭕
design__max_fanout_violation__count__corner:max_ss_100C_1v60	216	196	-20 (-9.2593%) ⭕
clock__skew__worst_setup__corner:max_tt_025C_1v80	-0.1178	0.1656	0.2834 (-240.5302%) ⭕
design__max_cap_violation__count__corner:max_tt_025C_1v80	29	21	-8 (-27.5862%) ⭕
design__max_fanout_violation__count__corner:max_tt_025C_1v80	216	196	-20 (-9.2593%) ⭕
design__max_slew_violation__count__corner:max_tt_025C_1v80	85	28	-57 (-67.0588%) ⭕
clock__skew__worst_setup__corner:min_ff_n40C_1v95	-0.0600	0.1032	0.1632 (-271.9863%) ⭕
design__max_cap_violation__count__corner:min_ff_n40C_1v95	4	2	-2 (-50.0000%) ⭕
design__max_fanout_violation__count__corner:min_ff_n40C_1v95	216	196	-20 (-9.2593%) ⭕
clock__skew__worst_setup__corner:min_ss_100C_1v60	0.1342	0.2408	0.1066 (+79.4016%) ⭕
design__max_cap_violation__count__corner:min_ss_100C_1v60	4	3	-1 (-25.0000%) ⭕
design__max_fanout_violation__count__corner:min_ss_100C_1v60	216	196	-20 (-9.2593%) ⭕
design__max_slew_violation__count__corner:min_ss_100C_1v60	243	193	-50 (-20.5761%) ⭕
clock__skew__worst_setup__corner:min_tt_025C_1v80	0.0825	0.1454	0.0630 (+76.3581%) ⭕
design__max_cap_violation__count__corner:min_tt_025C_1v80	4	2	-2 (-50.0000%) ⭕
design__max_fanout_violation__count__corner:min_tt_025C_1v80	216	196	-20 (-9.2593%) ⭕
clock__skew__worst_setup__corner:nom_ff_n40C_1v95	-0.0730	0.1094	0.1824 (-249.7577%) ⭕
design__max_cap_violation__count__corner:nom_ff_n40C_1v95	15	12	-3 (-20.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ff_n40C_1v95	216	196	-20 (-9.2593%) ⭕
clock__skew__worst_setup__corner:nom_ss_100C_1v60	0.1450	0.2547	0.1096 (+75.5902%) ⭕
design__max_cap_violation__count__corner:nom_ss_100C_1v60	15	12	-3 (-20.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ss_100C_1v60	216	196	-20 (-9.2593%) ⭕
design__max_slew_violation__count__corner:nom_ss_100C_1v60	256	229	-27 (-10.5469%) ⭕
clock__skew__worst_setup__corner:nom_tt_025C_1v80	-0.0914	0.1559	0.2473 (-270.6349%) ⭕
design__max_cap_violation__count__corner:nom_tt_025C_1v80	15	12	-3 (-20.0000%) ⭕
design__max_fanout_violation__count__corner:nom_tt_025C_1v80	216	196	-20 (-9.2593%) ⭕
antenna__violating__nets	31	31	0 (0.0000%) ⭕
antenna__violating__pins	35	35	0 (0.0000%) ⭕
design__lint_error__count	0	0	0 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count	266	266	0 (0.0000%) ⭕
ir__voltage__worst	1.8000	1.8000	0.0000 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__setup_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__setup_vio__count	96	96	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ss_100C_1v60	266	266	0 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ss_100C_1v60	32	32	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ss_100C_1v60	32	32	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ss_100C_1v60	32	32	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕

sky130A/sky130_fd_sc_hd/aes_upw_new

Metric	Before	After	Delta
clock__skew__worst_setup	0.1992	0.1992	-0.0000 (-0.0005%) ❗
ir__voltage__worst	1	0	-1 (-100.0000%) ❗
clock__skew__worst_setup__corner:min_ff_n40C_1v95	0.1992	0.1992	-0.0000 (-0.0005%) ❗
clock__skew__worst_hold__corner:min_ss_100C_1v60	-3.5018	-3.5017	0.0001 (-0.0023%) ❗
clock__skew__worst_setup__corner:min_ss_100C_1v60	0.5148	0.5147	-0.0001 (-0.0157%) ❗
clock__skew__worst_hold__corner:nom_ss_100C_1v60	-3.5238	-3.5238	0.0000 (-0.0002%) ❗
clock__skew__worst_setup__corner:nom_ss_100C_1v60	0.5379	0.5379	-0.0000 (-0.0015%) ❗
power__internal__total	0.0094	0.0094	-0.0000 (-0.0002%) ⭕
power__switching__total	0.0033	0.0033	-0.0000 (-0.0016%) ⭕
power__total	0.0128	0.0128	-0.0000 (-0.0006%) ⭕
clock__skew__worst_setup__corner:max_ff_n40C_1v95	0.2206	0.2206	0.0000 (+0.0005%) ⭕
clock__skew__worst_hold__corner:max_ss_100C_1v60	-3.5492	-3.5492	-0.0000 (+0.0002%) ⭕
clock__skew__worst_setup__corner:max_ss_100C_1v60	0.5638	0.5638	0.0000 (+0.0007%) ⭕
clock__skew__worst_hold__corner:max_tt_025C_1v80	-3.3170	-3.3170	-0.0000 (+0.0001%) ⭕
clock__skew__worst_setup__corner:max_tt_025C_1v80	0.3268	0.3268	0.0000 (+0.0009%) ⭕
clock__skew__worst_hold__corner:min_tt_025C_1v80	-3.2862	-3.2863	-0.0000 (+0.0012%) ⭕
clock__skew__worst_setup__corner:min_tt_025C_1v80	0.2955	0.2956	0.0000 (+0.0139%) ⭕
clock__skew__worst_setup__corner:nom_ff_n40C_1v95	0.2085	0.2085	0.0000 (+0.0005%) ⭕
antenna__violating__nets	0	0	0 (0.0000%) ⭕
antenna__violating__pins	0	0	0 (0.0000%) ⭕
clock__skew__worst_hold	-3.1920	-3.1920	0.0000 (0.0000%) ⭕
design__core__area	10174000	10174000	0 (0.0000%) ⭕
design__die__area	10278400	10278400	0 (0.0000%) ⭕
design__instance__area	656000	656000	0 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count	987	987	0 (0.0000%) ⭕
design__max_slew_violation__count	0	0	0 (0.0000%) ⭕
ir__drop__avg	0	0	0 (0.0000%) ⭕
ir__drop__worst	0	0	0 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
power__leakage__total	0.0000	0.0000	0.0000 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	207	207	0 (0.0000%) ⭕
timing__hold__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__hold_vio__count	0	0	0 (0.0000%) ⭕
timing__setup__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__setup_vio__count	0	0	0 (0.0000%) ⭕
clock__skew__worst_hold__corner:max_ff_n40C_1v95	-3.2127	-3.2127	0.0000 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ff_n40C_1v95	987	987	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ss_100C_1v60	987	987	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_tt_025C_1v80	987	987	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
clock__skew__worst_hold__corner:min_ff_n40C_1v95	-3.1920	-3.1920	0.0000 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ff_n40C_1v95	987	987	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ss_100C_1v60	987	987	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_tt_025C_1v80	987	987	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
clock__skew__worst_hold__corner:nom_ff_n40C_1v95	-3.2007	-3.2007	0.0000 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ff_n40C_1v95	987	987	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ss_100C_1v60	987	987	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
clock__skew__worst_hold__corner:nom_tt_025C_1v80	-3.2998	-3.2998	0.0000 (0.0000%) ⭕
clock__skew__worst_setup__corner:nom_tt_025C_1v80	0.3097	0.3097	0.0000 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_tt_025C_1v80	987	987	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕

sky130A/sky130_fd_sc_hd/aes_upw_old

Metric	Before	After	Delta
clock__skew__worst_setup	0.1992	0.1992	-0.0000 (-0.0005%) ❗
ir__voltage__worst	1	0	-1 (-100.0000%) ❗
clock__skew__worst_setup__corner:min_ff_n40C_1v95	0.1992	0.1992	-0.0000 (-0.0005%) ❗
clock__skew__worst_hold__corner:min_ss_100C_1v60	-3.5018	-3.5017	0.0001 (-0.0023%) ❗
clock__skew__worst_setup__corner:min_ss_100C_1v60	0.5148	0.5147	-0.0001 (-0.0157%) ❗
clock__skew__worst_hold__corner:nom_ss_100C_1v60	-3.5238	-3.5238	0.0000 (-0.0002%) ❗
clock__skew__worst_setup__corner:nom_ss_100C_1v60	0.5379	0.5379	-0.0000 (-0.0015%) ❗
power__internal__total	0.0094	0.0094	-0.0000 (-0.0002%) ⭕
power__switching__total	0.0033	0.0033	-0.0000 (-0.0016%) ⭕
power__total	0.0128	0.0128	-0.0000 (-0.0006%) ⭕
clock__skew__worst_setup__corner:max_ff_n40C_1v95	0.2206	0.2206	0.0000 (+0.0005%) ⭕
clock__skew__worst_hold__corner:max_ss_100C_1v60	-3.5492	-3.5492	-0.0000 (+0.0002%) ⭕
clock__skew__worst_setup__corner:max_ss_100C_1v60	0.5638	0.5638	0.0000 (+0.0007%) ⭕
clock__skew__worst_hold__corner:max_tt_025C_1v80	-3.3170	-3.3170	-0.0000 (+0.0001%) ⭕
clock__skew__worst_setup__corner:max_tt_025C_1v80	0.3268	0.3268	0.0000 (+0.0009%) ⭕
clock__skew__worst_hold__corner:min_tt_025C_1v80	-3.2862	-3.2863	-0.0000 (+0.0012%) ⭕
clock__skew__worst_setup__corner:min_tt_025C_1v80	0.2955	0.2956	0.0000 (+0.0139%) ⭕
clock__skew__worst_setup__corner:nom_ff_n40C_1v95	0.2085	0.2085	0.0000 (+0.0005%) ⭕
antenna__violating__nets	0	0	0 (0.0000%) ⭕
antenna__violating__pins	0	0	0 (0.0000%) ⭕
clock__skew__worst_hold	-3.1920	-3.1920	0.0000 (0.0000%) ⭕
design__core__area	10174000	10174000	0 (0.0000%) ⭕
design__die__area	10278400	10278400	0 (0.0000%) ⭕
design__instance__area	656000	656000	0 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count	987	987	0 (0.0000%) ⭕
design__max_slew_violation__count	0	0	0 (0.0000%) ⭕
ir__drop__avg	0	0	0 (0.0000%) ⭕
ir__drop__worst	0	0	0 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
power__leakage__total	0.0000	0.0000	0.0000 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	207	207	0 (0.0000%) ⭕
timing__hold__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__hold_vio__count	0	0	0 (0.0000%) ⭕
timing__setup__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__setup_vio__count	0	0	0 (0.0000%) ⭕
clock__skew__worst_hold__corner:max_ff_n40C_1v95	-3.2127	-3.2127	0.0000 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ff_n40C_1v95	987	987	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ss_100C_1v60	987	987	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_tt_025C_1v80	987	987	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
clock__skew__worst_hold__corner:min_ff_n40C_1v95	-3.1920	-3.1920	0.0000 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ff_n40C_1v95	987	987	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ss_100C_1v60	987	987	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_tt_025C_1v80	987	987	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
clock__skew__worst_hold__corner:nom_ff_n40C_1v95	-3.2007	-3.2007	0.0000 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ff_n40C_1v95	987	987	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ss_100C_1v60	987	987	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
clock__skew__worst_hold__corner:nom_tt_025C_1v80	-3.2998	-3.2998	0.0000 (0.0000%) ⭕
clock__skew__worst_setup__corner:nom_tt_025C_1v80	0.3097	0.3097	0.0000 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_tt_025C_1v80	987	987	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕

sky130A/sky130_fd_sc_hd/blink

Metric	Before	After	Delta
clock__skew__worst_hold	0.0066	0.0086	0.0020 (+30.4830%) ❗
clock__skew__worst_hold__corner:max_ff_n40C_1v95	0.0039	0.0047	0.0007 (+18.8679%) ❗
clock__skew__worst_hold__corner:max_ss_100C_1v60	0.0066	0.0086	0.0020 (+30.4830%) ❗
clock__skew__worst_hold__corner:max_tt_025C_1v80	0.0045	0.0056	0.0010 (+22.6602%) ❗
clock__skew__worst_hold__corner:min_ff_n40C_1v95	0.0027	0.0033	0.0006 (+23.0451%) ❗
clock__skew__worst_hold__corner:min_ss_100C_1v60	0.0053	0.0068	0.0016 (+29.4896%) ❗
clock__skew__worst_hold__corner:min_tt_025C_1v80	0.0033	0.0041	0.0008 (+25.2828%) ❗
clock__skew__worst_hold__corner:nom_ff_n40C_1v95	0.0030	0.0038	0.0007 (+24.0582%) ❗
clock__skew__worst_hold__corner:nom_ss_100C_1v60	0.0057	0.0075	0.0019 (+33.1157%) ❗
clock__skew__worst_hold__corner:nom_tt_025C_1v80	0.0036	0.0046	0.0010 (+27.1727%) ❗
clock__skew__worst_setup	0.0027	0.0033	0.0006 (+23.0451%) ⭕
ir__drop__avg	0.0001	0.0001	-0.0000 (-31.7935%) ⭕
ir__drop__worst	0.0003	0.0002	-0.0001 (-39.5062%) ⭕
power__internal__total	0.0002	0.0002	-0.0000 (-0.0072%) ⭕
power__switching__total	0.0000	0.0000	-0.0000 (-2.0896%) ⭕
power__total	0.0002	0.0002	-0.0000 (-0.3895%) ⭕
clock__skew__worst_setup__corner:max_ff_n40C_1v95	0.0039	0.0047	0.0007 (+18.8679%) ⭕
clock__skew__worst_setup__corner:max_ss_100C_1v60	0.0066	0.0086	0.0020 (+30.4830%) ⭕
clock__skew__worst_setup__corner:max_tt_025C_1v80	0.0045	0.0056	0.0010 (+22.6602%) ⭕
clock__skew__worst_setup__corner:min_ff_n40C_1v95	0.0027	0.0033	0.0006 (+23.0451%) ⭕
clock__skew__worst_setup__corner:min_ss_100C_1v60	0.0053	0.0068	0.0016 (+29.4896%) ⭕
clock__skew__worst_setup__corner:min_tt_025C_1v80	0.0033	0.0041	0.0008 (+25.2828%) ⭕
clock__skew__worst_setup__corner:nom_ff_n40C_1v95	0.0030	0.0038	0.0007 (+24.0582%) ⭕
clock__skew__worst_setup__corner:nom_ss_100C_1v60	0.0057	0.0075	0.0019 (+33.1157%) ⭕
clock__skew__worst_setup__corner:nom_tt_025C_1v80	0.0036	0.0046	0.0010 (+27.1727%) ⭕
antenna__violating__nets	0	0	0 (0.0000%) ⭕
antenna__violating__pins	0	0	0 (0.0000%) ⭕
design__core__area	2387.2900	2387.2900	0.0000 (0.0000%) ⭕
design__die__area	4273.3200	4273.3200	0.0000 (0.0000%) ⭕
design__instance__area	1393.8400	1393.8400	0.0000 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count	0	0	0 (0.0000%) ⭕
ir__voltage__worst	1.8000	1.8000	0.0000 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
power__leakage__total	0.0000	0.0000	0.0000 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕
timing__hold__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__hold_vio__count	0	0	0 (0.0000%) ⭕
timing__setup__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__setup_vio__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ff_n40C_1v95	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ss_100C_1v60	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_tt_025C_1v80	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ff_n40C_1v95	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ss_100C_1v60	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_tt_025C_1v80	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ff_n40C_1v95	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ss_100C_1v60	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_tt_025C_1v80	2	2	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕

sky130A/sky130_fd_sc_hd/caravel_upw

Metric	Before	After	Delta
design__max_cap_violation__count	5	365	360 (+7200.0000%) ❗
design__max_slew_violation__count	15	1098	1083 (+7220.0000%) ❗
ir__voltage__worst	1	0	-1 (-100.0000%) ❗
design__max_cap_violation__count__corner:max_ff_n40C_1v95	5	365	360 (+7200.0000%) ❗
design__max_slew_violation__count__corner:max_ff_n40C_1v95	15	1089	1074 (+7160.0000%) ❗
design__max_cap_violation__count__corner:max_ss_100C_1v60	5	365	360 (+7200.0000%) ❗
design__max_slew_violation__count__corner:max_ss_100C_1v60	15	1098	1083 (+7220.0000%) ❗
design__max_cap_violation__count__corner:max_tt_025C_1v80	5	365	360 (+7200.0000%) ❗
design__max_slew_violation__count__corner:max_tt_025C_1v80	15	1095	1080 (+7200.0000%) ❗
design__max_cap_violation__count__corner:min_ff_n40C_1v95	5	360	355 (+7100.0000%) ❗
design__max_slew_violation__count__corner:min_ff_n40C_1v95	15	1074	1059 (+7060.0000%) ❗
design__max_cap_violation__count__corner:min_ss_100C_1v60	5	360	355 (+7100.0000%) ❗
design__max_slew_violation__count__corner:min_ss_100C_1v60	15	1098	1083 (+7220.0000%) ❗
design__max_cap_violation__count__corner:min_tt_025C_1v80	5	360	355 (+7100.0000%) ❗
design__max_slew_violation__count__corner:min_tt_025C_1v80	15	1095	1080 (+7200.0000%) ❗
design__max_cap_violation__count__corner:nom_ff_n40C_1v95	5	363	358 (+7160.0000%) ❗
design__max_slew_violation__count__corner:nom_ff_n40C_1v95	15	1083	1068 (+7120.0000%) ❗
design__max_cap_violation__count__corner:nom_ss_100C_1v60	5	363	358 (+7160.0000%) ❗
design__max_slew_violation__count__corner:nom_ss_100C_1v60	15	1098	1083 (+7220.0000%) ❗
design__max_cap_violation__count__corner:nom_tt_025C_1v80	5	363	358 (+7160.0000%) ❗
design__max_slew_violation__count__corner:nom_tt_025C_1v80	15	1095	1080 (+7200.0000%) ❗
antenna__violating__nets	0	0	0 (0.0000%) ⭕
antenna__violating__pins	0	0	0 (0.0000%) ⭕
clock__skew__worst_hold	0.0000	0.0000	0.0000 (0.0000%) ⭕
clock__skew__worst_setup	0.0000	0.0000	0.0000 (0.0000%) ⭕
design__core__area	10174000	10174000	0 (0.0000%) ⭕
design__die__area	10278400	10278400	0 (0.0000%) ⭕
design__instance__area	1080000	1080000	0 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count	0	0	0 (0.0000%) ⭕
ir__drop__avg	0	0	0 (0.0000%) ⭕
ir__drop__worst	0	0	0 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
power__internal__total	0.0000	0.0000	0.0000 (0.0000%) ⭕
power__leakage__total	0.0000	0.0000	0.0000 (0.0000%) ⭕
power__switching__total	0.0000	0.0000	0.0000 (0.0000%) ⭕
power__total	0.0000	0.0000	0.0000 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	240	240	0 (0.0000%) ⭕
timing__hold__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__hold_vio__count	0	0	0 (0.0000%) ⭕
timing__setup__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__setup_vio__count	0	0	0 (0.0000%) ⭕
clock__skew__worst_hold__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
clock__skew__worst_setup__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
clock__skew__worst_hold__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
clock__skew__worst_setup__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
clock__skew__worst_hold__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
clock__skew__worst_setup__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
clock__skew__worst_hold__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
clock__skew__worst_setup__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
clock__skew__worst_hold__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
clock__skew__worst_setup__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
clock__skew__worst_hold__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
clock__skew__worst_setup__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
clock__skew__worst_hold__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
clock__skew__worst_setup__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
clock__skew__worst_hold__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
clock__skew__worst_setup__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
clock__skew__worst_hold__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
clock__skew__worst_setup__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕

sky130A/sky130_fd_sc_hd/cell_inverter

Metric	Before	After	Delta
design__lint_error__count	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕

sky130A/sky130_fd_sc_hd/dual_spm

Metric	Before	After	Delta
clock__skew__worst_hold	0.0112	0.0134	0.0022 (+19.7657%) ❗
design__instance__area	22872.3000	22889.8000	17.5000 (+0.0765%) ❗
power__leakage__total	0.0000	0.0000	0.0000 (+0.4102%) ❗
clock__skew__worst_hold__corner:max_ff_n40C_1v95	0.0065	0.0073	0.0008 (+12.0874%) ❗
clock__skew__worst_hold__corner:max_ss_100C_1v60	0.0112	0.0134	0.0022 (+19.7657%) ❗
clock__skew__worst_hold__corner:max_tt_025C_1v80	0.0083	0.0096	0.0013 (+15.7047%) ❗
clock__skew__worst_hold__corner:min_ff_n40C_1v95	0.0055	0.0064	0.0009 (+15.6432%) ❗
clock__skew__worst_hold__corner:min_ss_100C_1v60	0.0101	0.0120	0.0019 (+18.7698%) ❗
clock__skew__worst_hold__corner:min_tt_025C_1v80	0.0072	0.0084	0.0012 (+17.0529%) ❗
clock__skew__worst_hold__corner:nom_ff_n40C_1v95	0.0058	0.0067	0.0009 (+15.4418%) ❗
clock__skew__worst_hold__corner:nom_ss_100C_1v60	-0.0104	0.0125	0.0229 (-219.8712%) ❗
clock__skew__worst_hold__corner:nom_tt_025C_1v80	0.0075	0.0088	0.0013 (+17.5539%) ❗
clock__skew__worst_setup	-0.0104	0.0064	0.0168 (-161.1608%) ⭕
power__internal__total	0.0018	0.0018	-0.0000 (-0.0215%) ⭕
power__switching__total	0.0007	0.0007	-0.0000 (-3.6877%) ⭕
power__total	0.0025	0.0025	-0.0000 (-1.0933%) ⭕
clock__skew__worst_setup__corner:max_ff_n40C_1v95	0.0065	0.0073	0.0008 (+12.0874%) ⭕
clock__skew__worst_setup__corner:max_ss_100C_1v60	0.0112	0.0134	0.0022 (+19.7657%) ⭕
clock__skew__worst_setup__corner:max_tt_025C_1v80	0.0083	0.0096	0.0013 (+15.7047%) ⭕
clock__skew__worst_setup__corner:min_ff_n40C_1v95	0.0055	0.0064	0.0009 (+15.6432%) ⭕
clock__skew__worst_setup__corner:min_ss_100C_1v60	0.0101	0.0120	0.0019 (+18.7698%) ⭕
clock__skew__worst_setup__corner:min_tt_025C_1v80	0.0072	0.0084	0.0012 (+17.0529%) ⭕
clock__skew__worst_setup__corner:nom_ff_n40C_1v95	0.0058	0.0067	0.0009 (+15.4418%) ⭕
clock__skew__worst_setup__corner:nom_ss_100C_1v60	-0.0104	0.0125	0.0229 (-219.8712%) ⭕
clock__skew__worst_setup__corner:nom_tt_025C_1v80	0.0075	0.0088	0.0013 (+17.5539%) ⭕
antenna__violating__nets	0	0	0 (0.0000%) ⭕
antenna__violating__pins	0	0	0 (0.0000%) ⭕
design__core__area	232536	232536	0 (0.0000%) ⭕
design__die__area	250000	250000	0 (0.0000%) ⭕
design__lint_error__count	0	0	0 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count	0	0	0 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕
timing__hold__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__hold_vio__count	0	0	0 (0.0000%) ⭕
timing__setup__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__setup_vio__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕

sky130A/sky130_fd_sc_hd/gcd

Metric	Before	After	Delta
clock__skew__worst_hold	0.0121	0.0175	0.0054 (+44.9099%) ❗
design__instance__area	4499.3200	4514.3300	15.0100 (+0.3336%) ❗
power__internal__total	0.0004	0.0004	0.0000 (+0.2234%) ❗
clock__skew__worst_hold__corner:max_ff_n40C_1v95	0.0076	0.0084	0.0008 (+10.3025%) ❗
clock__skew__worst_hold__corner:max_ss_100C_1v60	0.0121	0.0175	0.0054 (+44.9099%) ❗
clock__skew__worst_hold__corner:max_tt_025C_1v80	0.0092	0.0108	0.0016 (+17.6829%) ❗
clock__skew__worst_hold__corner:min_ff_n40C_1v95	0.0052	0.0072	0.0020 (+38.1467%) ❗
clock__skew__worst_hold__corner:min_ss_100C_1v60	0.0106	0.0164	0.0058 (+55.2333%) ❗
clock__skew__worst_hold__corner:min_tt_025C_1v80	0.0067	0.0094	0.0027 (+40.7502%) ❗
clock__skew__worst_hold__corner:nom_ff_n40C_1v95	0.0058	0.0074	0.0016 (+27.4859%) ❗
clock__skew__worst_hold__corner:nom_ss_100C_1v60	0.0108	0.0163	0.0055 (+50.6697%) ❗
clock__skew__worst_hold__corner:nom_tt_025C_1v80	0.0074	0.0097	0.0023 (+31.6885%) ❗
clock__skew__worst_setup	0.0052	0.0072	0.0020 (+38.1467%) ⭕
ir__drop__avg	0.0000	0.0000	-0.0000 (-31.4488%) ⭕
ir__drop__worst	0.0001	0.0001	-0.0000 (-38.2353%) ⭕
power__leakage__total	0.0000	0.0000	-0.0000 (-0.4138%) ⭕
power__switching__total	0.0004	0.0004	-0.0000 (-2.0116%) ⭕
power__total	0.0008	0.0008	-0.0000 (-0.8583%) ⭕
clock__skew__worst_setup__corner:max_ff_n40C_1v95	0.0076	0.0084	0.0008 (+10.3025%) ⭕
clock__skew__worst_setup__corner:max_ss_100C_1v60	0.0121	0.0175	0.0054 (+44.9099%) ⭕
clock__skew__worst_setup__corner:max_tt_025C_1v80	0.0092	0.0108	0.0016 (+17.6829%) ⭕
clock__skew__worst_setup__corner:min_ff_n40C_1v95	0.0052	0.0072	0.0020 (+38.1467%) ⭕
clock__skew__worst_setup__corner:min_ss_100C_1v60	0.0106	0.0164	0.0058 (+55.2333%) ⭕
clock__skew__worst_setup__corner:min_tt_025C_1v80	0.0067	0.0094	0.0027 (+40.7502%) ⭕
clock__skew__worst_setup__corner:nom_ff_n40C_1v95	0.0058	0.0074	0.0016 (+27.4859%) ⭕
clock__skew__worst_setup__corner:nom_ss_100C_1v60	0.0108	0.0163	0.0055 (+50.6697%) ⭕
clock__skew__worst_setup__corner:nom_tt_025C_1v80	0.0074	0.0097	0.0023 (+31.6885%) ⭕
antenna__violating__nets	0	0	0 (0.0000%) ⭕
antenna__violating__pins	0	0	0 (0.0000%) ⭕
design__core__area	67039.3000	67039.3000	0.0000 (0.0000%) ⭕
design__die__area	78425.2000	78425.2000	0.0000 (0.0000%) ⭕
design__lint_error__count	0	0	0 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count	0	0	0 (0.0000%) ⭕
ir__voltage__worst	1.8000	1.8000	0.0000 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕
timing__hold__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__hold_vio__count	0	0	0 (0.0000%) ⭕
timing__setup__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__setup_vio__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕

sky130A/sky130_fd_sc_hd/inverter

Metric	Before	After	Delta
antenna__violating__nets	0	0	0 (0.0000%) ⭕
antenna__violating__pins	0	0	0 (0.0000%) ⭕
design__core__area	1051.0100	1051.0100	0.0000 (0.0000%) ⭕
design__die__area	2500	2500	0 (0.0000%) ⭕
design__instance__area	18.7680	18.7680	0.0000 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕

sky130A/sky130_fd_sc_hd/io_placer

Metric	Before	After	Delta
design__core__area	10174000	12273800	2099800 (+20.6389%) ❗
design__die__area	10278400	12390400	2112000 (+20.5479%) ❗
design__max_cap_violation__count	5	363	358 (+7160.0000%) ❗
design__max_slew_violation__count	15	1092	1077 (+7180.0000%) ❗
ir__voltage__worst	1	0	-1 (-100.0000%) ❗
design__max_cap_violation__count__corner:max_ff_n40C_1v95	5	363	358 (+7160.0000%) ❗
design__max_slew_violation__count__corner:max_ff_n40C_1v95	15	1089	1074 (+7160.0000%) ❗
design__max_cap_violation__count__corner:max_ss_100C_1v60	5	363	358 (+7160.0000%) ❗
design__max_slew_violation__count__corner:max_ss_100C_1v60	15	1092	1077 (+7180.0000%) ❗
design__max_cap_violation__count__corner:max_tt_025C_1v80	5	363	358 (+7160.0000%) ❗
design__max_slew_violation__count__corner:max_tt_025C_1v80	15	1089	1074 (+7160.0000%) ❗
design__max_cap_violation__count__corner:min_ff_n40C_1v95	5	363	358 (+7160.0000%) ❗
design__max_slew_violation__count__corner:min_ff_n40C_1v95	15	1089	1074 (+7160.0000%) ❗
design__max_cap_violation__count__corner:min_ss_100C_1v60	5	363	358 (+7160.0000%) ❗
design__max_slew_violation__count__corner:min_ss_100C_1v60	15	1092	1077 (+7180.0000%) ❗
design__max_cap_violation__count__corner:min_tt_025C_1v80	5	363	358 (+7160.0000%) ❗
design__max_slew_violation__count__corner:min_tt_025C_1v80	15	1089	1074 (+7160.0000%) ❗
design__max_cap_violation__count__corner:nom_ff_n40C_1v95	5	363	358 (+7160.0000%) ❗
design__max_slew_violation__count__corner:nom_ff_n40C_1v95	15	1089	1074 (+7160.0000%) ❗
design__max_cap_violation__count__corner:nom_ss_100C_1v60	5	363	358 (+7160.0000%) ❗
design__max_slew_violation__count__corner:nom_ss_100C_1v60	15	1092	1077 (+7180.0000%) ❗
design__max_cap_violation__count__corner:nom_tt_025C_1v80	5	363	358 (+7160.0000%) ❗
design__max_slew_violation__count__corner:nom_tt_025C_1v80	15	1089	1074 (+7160.0000%) ❗
antenna__violating__nets	0	0	0 (0.0000%) ⭕
antenna__violating__pins	0	0	0 (0.0000%) ⭕
clock__skew__worst_hold	0.0000	0.0000	0.0000 (0.0000%) ⭕
clock__skew__worst_setup	0.0000	0.0000	0.0000 (0.0000%) ⭕
design__instance__area	1080000	1080000	0 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count	0	0	0 (0.0000%) ⭕
ir__drop__avg	0	0	0 (0.0000%) ⭕
ir__drop__worst	0	0	0 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
power__internal__total	0.0000	0.0000	0.0000 (0.0000%) ⭕
power__leakage__total	0.0000	0.0000	0.0000 (0.0000%) ⭕
power__switching__total	0.0000	0.0000	0.0000 (0.0000%) ⭕
power__total	0.0000	0.0000	0.0000 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	240	240	0 (0.0000%) ⭕
timing__hold__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__hold_vio__count	0	0	0 (0.0000%) ⭕
timing__setup__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__setup_vio__count	0	0	0 (0.0000%) ⭕
clock__skew__worst_hold__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
clock__skew__worst_setup__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
clock__skew__worst_hold__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
clock__skew__worst_setup__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
clock__skew__worst_hold__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
clock__skew__worst_setup__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
clock__skew__worst_hold__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
clock__skew__worst_setup__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
clock__skew__worst_hold__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
clock__skew__worst_setup__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
clock__skew__worst_hold__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
clock__skew__worst_setup__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
clock__skew__worst_hold__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
clock__skew__worst_setup__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
clock__skew__worst_hold__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
clock__skew__worst_setup__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
clock__skew__worst_hold__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
clock__skew__worst_setup__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕

sky130A/sky130_fd_sc_hd/latch_bad

Metric	Before	After	Delta
design__instance__area	15.0144	15.0144	0.0000 (0.0000%) ⭕
design__lint_error__count	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕

sky130A/sky130_fd_sc_hd/latch_good

Metric	Before	After	Delta
design__instance__area	15.0144	15.0144	0.0000 (0.0000%) ⭕
design__lint_error__count	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕

sky130A/sky130_fd_sc_hd/manual_macro_placement_test

Metric	Before	After	Delta
clock__skew__worst_setup	0.0136	0.0000	-0.0136 (-100.0000%) ❗
clock__skew__worst_setup__corner:max_ff_n40C_1v95	0.0357	0.0000	-0.0357 (-100.0000%) ❗
clock__skew__worst_setup__corner:max_ss_100C_1v60	0.0354	0.0000	-0.0354 (-100.0000%) ❗
clock__skew__worst_setup__corner:max_tt_025C_1v80	0.0357	0.0000	-0.0357 (-100.0000%) ❗
clock__skew__worst_setup__corner:min_ff_n40C_1v95	0.0143	0.0000	-0.0143 (-100.0000%) ❗
clock__skew__worst_setup__corner:min_ss_100C_1v60	0.0136	0.0000	-0.0136 (-100.0000%) ❗
clock__skew__worst_setup__corner:min_tt_025C_1v80	0.0140	0.0000	-0.0140 (-100.0000%) ❗
clock__skew__worst_setup__corner:nom_ff_n40C_1v95	0.0202	0.0000	-0.0202 (-100.0000%) ❗
clock__skew__worst_setup__corner:nom_ss_100C_1v60	0.0193	0.0000	-0.0193 (-100.0000%) ❗
clock__skew__worst_setup__corner:nom_tt_025C_1v80	0.0198	0.0000	-0.0198 (-100.0000%) ❗
clock__skew__worst_hold	0.0357	0.0000	-0.0357 (-100.0000%) ⭕
power__internal__total	0.0001	0.0001	-0.0000 (-0.4354%) ⭕
power__switching__total	0.0000	0.0000	-0.0000 (-1.3990%) ⭕
power__total	0.0002	0.0002	-0.0000 (-0.6964%) ⭕
clock__skew__worst_hold__corner:max_ff_n40C_1v95	0.0357	0.0000	-0.0357 (-100.0000%) ⭕
clock__skew__worst_hold__corner:max_ss_100C_1v60	0.0354	0.0000	-0.0354 (-100.0000%) ⭕
clock__skew__worst_hold__corner:max_tt_025C_1v80	0.0357	0.0000	-0.0357 (-100.0000%) ⭕
clock__skew__worst_hold__corner:min_ff_n40C_1v95	0.0143	0.0000	-0.0143 (-100.0000%) ⭕
clock__skew__worst_hold__corner:min_ss_100C_1v60	0.0136	0.0000	-0.0136 (-100.0000%) ⭕
clock__skew__worst_hold__corner:min_tt_025C_1v80	0.0140	0.0000	-0.0140 (-100.0000%) ⭕
clock__skew__worst_hold__corner:nom_ff_n40C_1v95	0.0202	0.0000	-0.0202 (-100.0000%) ⭕
clock__skew__worst_hold__corner:nom_ss_100C_1v60	0.0193	0.0000	-0.0193 (-100.0000%) ⭕
clock__skew__worst_hold__corner:nom_tt_025C_1v80	0.0198	0.0000	-0.0198 (-100.0000%) ⭕
antenna__violating__nets	1	1	0 (0.0000%) ⭕
antenna__violating__pins	1	1	0 (0.0000%) ⭕
design__core__area	80146.9000	80146.9000	0.0000 (0.0000%) ⭕
design__die__area	90000	90000	0 (0.0000%) ⭕
design__instance__area	23540.6000	23540.6000	0.0000 (0.0000%) ⭕
design__lint_error__count	0	0	0 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count	32	32	0 (0.0000%) ⭕
design__max_slew_violation__count	0	0	0 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
power__leakage__total	0.0000	0.0000	0.0000 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕
timing__hold__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__hold_vio__count	0	0	0 (0.0000%) ⭕
timing__setup__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__setup_vio__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ff_n40C_1v95	32	32	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ss_100C_1v60	32	32	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_tt_025C_1v80	32	32	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ff_n40C_1v95	32	32	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ss_100C_1v60	32	32	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_tt_025C_1v80	32	32	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ff_n40C_1v95	32	32	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ss_100C_1v60	32	32	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_tt_025C_1v80	32	32	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕

sky130A/sky130_fd_sc_hd/s44

Metric	Before	After	Delta
clock__skew__worst_hold	-0.0055	-0.0053	0.0002 (-3.8942%) ❗
clock__skew__worst_hold__corner:max_ff_n40C_1v95	-0.0063	-0.0060	0.0002 (-3.8897%) ❗
clock__skew__worst_hold__corner:max_ss_100C_1v60	-0.0115	-0.0111	0.0004 (-3.5254%) ❗
clock__skew__worst_hold__corner:max_tt_025C_1v80	-0.0083	-0.0080	0.0003 (-3.6850%) ❗
clock__skew__worst_hold__corner:min_ff_n40C_1v95	-0.0055	-0.0053	0.0002 (-3.8942%) ❗
clock__skew__worst_hold__corner:min_ss_100C_1v60	-0.0104	-0.0099	0.0004 (-4.3336%) ❗
clock__skew__worst_hold__corner:min_tt_025C_1v80	-0.0075	-0.0072	0.0003 (-4.0080%) ❗
clock__skew__worst_hold__corner:nom_ff_n40C_1v95	-0.0058	-0.0055	0.0003 (-5.0999%) ❗
clock__skew__worst_hold__corner:nom_ss_100C_1v60	-0.0109	-0.0103	0.0006 (-5.4676%) ❗
clock__skew__worst_hold__corner:nom_tt_025C_1v80	-0.0078	-0.0074	0.0004 (-5.1420%) ❗
clock__skew__worst_setup	-0.0115	-0.0111	0.0004 (-3.5254%) ⭕
design__instance__area	2611.2500	2583.7300	-27.5200 (-1.0539%) ⭕
ir__drop__avg	0.0000	0.0000	-0.0000 (-19.9038%) ⭕
ir__drop__worst	0.0003	0.0001	-0.0001 (-55.3030%) ⭕
power__internal__total	0.0001	0.0001	-0.0000 (-0.6686%) ⭕
power__leakage__total	0.0000	0.0000	-0.0000 (-1.1070%) ⭕
power__switching__total	0.0000	0.0000	-0.0000 (-1.8053%) ⭕
power__total	0.0001	0.0001	-0.0000 (-0.9579%) ⭕
clock__skew__worst_setup__corner:max_ff_n40C_1v95	-0.0063	-0.0060	0.0002 (-3.8897%) ⭕
clock__skew__worst_setup__corner:max_ss_100C_1v60	-0.0115	-0.0111	0.0004 (-3.5254%) ⭕
clock__skew__worst_setup__corner:max_tt_025C_1v80	-0.0083	-0.0080	0.0003 (-3.6850%) ⭕
clock__skew__worst_setup__corner:min_ff_n40C_1v95	-0.0055	-0.0053	0.0002 (-3.8942%) ⭕
clock__skew__worst_setup__corner:min_ss_100C_1v60	-0.0104	-0.0099	0.0004 (-4.3336%) ⭕
clock__skew__worst_setup__corner:min_tt_025C_1v80	-0.0075	-0.0072	0.0003 (-4.0080%) ⭕
clock__skew__worst_setup__corner:nom_ff_n40C_1v95	-0.0058	-0.0055	0.0003 (-5.0999%) ⭕
clock__skew__worst_setup__corner:nom_ss_100C_1v60	-0.0109	-0.0103	0.0006 (-5.4676%) ⭕
clock__skew__worst_setup__corner:nom_tt_025C_1v80	-0.0078	-0.0074	0.0004 (-5.1420%) ⭕
antenna__violating__nets	0	0	0 (0.0000%) ⭕
antenna__violating__pins	0	0	0 (0.0000%) ⭕
design__core__area	33280.7000	33280.7000	0.0000 (0.0000%) ⭕
design__die__area	39709.7000	39709.7000	0.0000 (0.0000%) ⭕
design__lint_error__count	0	0	0 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count	0	0	0 (0.0000%) ⭕
ir__voltage__worst	1.8000	1.8000	0.0000 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕
timing__hold__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__hold_vio__count	0	0	0 (0.0000%) ⭕
timing__setup__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__setup_vio__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕

sky130A/sky130_fd_sc_hd/spm

Metric	Before	After	Delta
clock__skew__worst_setup	0.0095	-0.0206	-0.0301 (-315.8270%) ❗
clock__skew__worst_setup__corner:max_ff_n40C_1v95	0.0144	-0.0134	-0.0278 (-193.3932%) ❗
clock__skew__worst_setup__corner:max_ss_100C_1v60	0.0228	-0.0206	-0.0434 (-190.0469%) ❗
clock__skew__worst_setup__corner:max_tt_025C_1v80	0.0172	-0.0161	-0.0333 (-193.2591%) ❗
clock__skew__worst_setup__corner:min_ff_n40C_1v95	0.0095	0.0091	-0.0004 (-4.4710%) ❗
clock__skew__worst_hold__corner:min_ss_100C_1v60	0.0170	0.0172	0.0002 (+1.0069%) ❗
clock__skew__worst_setup__corner:min_tt_025C_1v80	0.0122	0.0115	-0.0007 (-5.8223%) ❗
clock__skew__worst_setup__corner:nom_ff_n40C_1v95	0.0110	0.0103	-0.0007 (-6.2801%) ❗
clock__skew__worst_setup__corner:nom_ss_100C_1v60	0.0190	0.0179	-0.0011 (-5.7960%) ❗
clock__skew__worst_setup__corner:nom_tt_025C_1v80	0.0138	0.0128	-0.0010 (-7.2327%) ❗
clock__skew__worst_hold	0.0228	0.0179	-0.0049 (-21.6403%) ⭕
design__instance__area	3590.9400	3584.6900	-6.2500 (-0.1740%) ⭕
ir__drop__avg	0.0002	0.0002	-0.0000 (-19.0476%) ⭕
ir__drop__worst	0.0017	0.0008	-0.0009 (-51.5385%) ⭕
power__internal__total	0.0008	0.0008	-0.0000 (-0.1908%) ⭕
power__leakage__total	0.0000	0.0000	-0.0000 (-1.8523%) ⭕
power__switching__total	0.0004	0.0004	-0.0000 (-0.3659%) ⭕
power__total	0.0011	0.0011	-0.0000 (-0.2454%) ⭕
clock__skew__worst_hold__corner:max_ff_n40C_1v95	0.0144	-0.0134	-0.0278 (-193.3932%) ⭕
clock__skew__worst_hold__corner:max_ss_100C_1v60	0.0228	-0.0206	-0.0434 (-190.0469%) ⭕
clock__skew__worst_hold__corner:max_tt_025C_1v80	0.0172	-0.0161	-0.0333 (-193.2591%) ⭕
clock__skew__worst_hold__corner:min_ff_n40C_1v95	0.0095	0.0091	-0.0004 (-4.4710%) ⭕
clock__skew__worst_setup__corner:min_ss_100C_1v60	0.0170	0.0172	0.0002 (+1.0069%) ⭕
clock__skew__worst_hold__corner:min_tt_025C_1v80	0.0122	0.0115	-0.0007 (-5.8223%) ⭕
clock__skew__worst_hold__corner:nom_ff_n40C_1v95	0.0110	0.0103	-0.0007 (-6.2801%) ⭕
clock__skew__worst_hold__corner:nom_ss_100C_1v60	0.0190	0.0179	-0.0011 (-5.7960%) ⭕
clock__skew__worst_hold__corner:nom_tt_025C_1v80	0.0138	0.0128	-0.0010 (-7.2327%) ⭕
antenna__violating__nets	0	0	0 (0.0000%) ⭕
antenna__violating__pins	0	0	0 (0.0000%) ⭕
design__core__area	8051.4700	8051.4700	0.0000 (0.0000%) ⭕
design__die__area	11317.8000	11317.8000	0.0000 (0.0000%) ⭕
design__lint_error__count	0	0	0 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count	0	0	0 (0.0000%) ⭕
ir__voltage__worst	1.8000	1.8000	0.0000 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕
timing__hold__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__hold_vio__count	0	0	0 (0.0000%) ⭕
timing__setup__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__setup_vio__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕

sky130A/sky130_fd_sc_hd/test_sram_macro

Metric	Before	After	Delta
clock__skew__worst_hold	-0.1393	-0.1389	0.0004 (-0.3102%) ❗
design__max_fanout_violation__count	4	5	1 (+25.0000%) ❗
design__max_slew_violation__count	173	214	41 (+23.6994%) ❗
power__internal__total	0.0018	0.0018	0.0000 (+0.0012%) ❗
power__leakage__total	0.0000	0.0000	0.0000 (+0.0002%) ❗
power__switching__total	0.0002	0.0002	0.0000 (+0.1481%) ❗
power__total	0.0020	0.0020	0.0000 (+0.0173%) ❗
clock__skew__worst_hold__corner:max_ff_n40C_1v95	-0.1393	-0.1389	0.0004 (-0.3102%) ❗
design__max_cap_violation__count__corner:max_ff_n40C_1v95	14	15	1 (+7.1429%) ❗
design__max_fanout_violation__count__corner:max_ff_n40C_1v95	4	5	1 (+25.0000%) ❗
clock__skew__worst_hold__corner:max_ss_100C_1v60	-0.4395	-0.4389	0.0006 (-0.1295%) ❗
design__max_fanout_violation__count__corner:max_ss_100C_1v60	4	5	1 (+25.0000%) ❗
design__max_slew_violation__count__corner:max_ss_100C_1v60	173	214	41 (+23.6994%) ❗
clock__skew__worst_hold__corner:max_tt_025C_1v80	-0.2589	-0.2588	0.0000 (-0.0155%) ❗
design__max_cap_violation__count__corner:max_tt_025C_1v80	14	15	1 (+7.1429%) ❗
design__max_fanout_violation__count__corner:max_tt_025C_1v80	4	5	1 (+25.0000%) ❗
design__max_slew_violation__count__corner:max_tt_025C_1v80	105	137	32 (+30.4762%) ❗
clock__skew__worst_hold__corner:min_ff_n40C_1v95	-0.1491	-0.1487	0.0004 (-0.2648%) ❗
design__max_cap_violation__count__corner:min_ff_n40C_1v95	10	11	1 (+10.0000%) ❗
design__max_fanout_violation__count__corner:min_ff_n40C_1v95	4	5	1 (+25.0000%) ❗
clock__skew__worst_hold__corner:min_ss_100C_1v60	-0.3893	-0.3890	0.0003 (-0.0729%) ❗
design__max_fanout_violation__count__corner:min_ss_100C_1v60	4	5	1 (+25.0000%) ❗
design__max_slew_violation__count__corner:min_ss_100C_1v60	130	177	47 (+36.1538%) ❗
clock__skew__worst_hold__corner:min_tt_025C_1v80	-0.2436	-0.2436	0.0001 (-0.0238%) ❗
design__max_fanout_violation__count__corner:min_tt_025C_1v80	4	5	1 (+25.0000%) ❗
design__max_slew_violation__count__corner:min_tt_025C_1v80	62	82	20 (+32.2581%) ❗
clock__skew__worst_hold__corner:nom_ff_n40C_1v95	-0.1470	-0.1466	0.0003 (-0.2245%) ❗
design__max_cap_violation__count__corner:nom_ff_n40C_1v95	12	13	1 (+8.3333%) ❗
design__max_fanout_violation__count__corner:nom_ff_n40C_1v95	4	5	1 (+25.0000%) ❗
clock__skew__worst_hold__corner:nom_ss_100C_1v60	-0.4181	-0.4181	0.0000 (-0.0026%) ❗
design__max_cap_violation__count__corner:nom_ss_100C_1v60	13	14	1 (+7.6923%) ❗
design__max_fanout_violation__count__corner:nom_ss_100C_1v60	4	5	1 (+25.0000%) ❗
design__max_slew_violation__count__corner:nom_ss_100C_1v60	148	197	49 (+33.1081%) ❗
clock__skew__worst_hold__corner:nom_tt_025C_1v80	-0.2566	-0.2564	0.0002 (-0.0639%) ❗
design__max_cap_violation__count__corner:nom_tt_025C_1v80	12	13	1 (+8.3333%) ❗
design__max_fanout_violation__count__corner:nom_tt_025C_1v80	4	5	1 (+25.0000%) ❗
design__max_slew_violation__count__corner:nom_tt_025C_1v80	98	124	26 (+26.5306%) ❗
antenna__violating__nets	18	11	-7 (-38.8889%) ⭕
antenna__violating__pins	18	11	-7 (-38.8889%) ⭕
clock__skew__worst_setup	-0.4395	-0.4389	0.0006 (-0.1295%) ⭕
ir__drop__avg	0.0000	0.0000	-0.0000 (-37.1622%) ⭕
ir__drop__worst	0.0003	0.0002	-0.0001 (-20.4473%) ⭕
clock__skew__worst_setup__corner:max_ff_n40C_1v95	-0.1393	-0.1389	0.0004 (-0.3102%) ⭕
clock__skew__worst_setup__corner:max_ss_100C_1v60	-0.4395	-0.4389	0.0006 (-0.1295%) ⭕
clock__skew__worst_setup__corner:max_tt_025C_1v80	-0.2589	-0.2588	0.0000 (-0.0155%) ⭕
clock__skew__worst_setup__corner:min_ff_n40C_1v95	-0.1491	-0.1487	0.0004 (-0.2648%) ⭕
clock__skew__worst_setup__corner:min_ss_100C_1v60	-0.3893	-0.3890	0.0003 (-0.0729%) ⭕
clock__skew__worst_setup__corner:min_tt_025C_1v80	-0.2436	-0.2436	0.0001 (-0.0238%) ⭕
clock__skew__worst_setup__corner:nom_ff_n40C_1v95	-0.1470	-0.1466	0.0003 (-0.2245%) ⭕
design__max_slew_violation__count__corner:nom_ff_n40C_1v95	33	27	-6 (-18.1818%) ⭕
clock__skew__worst_setup__corner:nom_ss_100C_1v60	-0.4181	-0.4181	0.0000 (-0.0026%) ⭕
clock__skew__worst_setup__corner:nom_tt_025C_1v80	-0.2566	-0.2564	0.0002 (-0.0639%) ⭕
design__core__area	906252	906252	0 (0.0000%) ⭕
design__die__area	937500	937500	0 (0.0000%) ⭕
design__instance__area	395673	395673	0 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count	18	18	0 (0.0000%) ⭕
ir__voltage__worst	1.8000	1.8000	0.0000 (0.0000%) ⭕
magic__drc_error__count	5666674	5666674	0 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕
timing__hold__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__hold_vio__count	0	0	0 (0.0000%) ⭕
timing__setup__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__setup_vio__count	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ff_n40C_1v95	38	38	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ss_100C_1v60	18	18	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ff_n40C_1v95	24	24	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ss_100C_1v60	11	11	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_tt_025C_1v80	11	11	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕

sky130A/sky130_fd_sc_hd/usb

Metric	Before	After	Delta
clock__skew__worst_hold	-0.0287	0.0504	0.0791 (-275.7409%) ❗
power__switching__total	0.0004	0.0004	0.0000 (+0.4588%) ❗
clock__skew__worst_hold__corner:max_ff_n40C_1v95	-0.0325	0.0244	0.0570 (-175.0914%) ❗
clock__skew__worst_hold__corner:max_ss_100C_1v60	-0.0632	0.0495	0.1127 (-178.2433%) ❗
clock__skew__worst_hold__corner:max_tt_025C_1v80	-0.0416	0.0315	0.0731 (-175.6263%) ❗
clock__skew__worst_hold__corner:min_ff_n40C_1v95	-0.0287	0.0238	0.0524 (-182.8499%) ❗
clock__skew__worst_hold__corner:min_ss_100C_1v60	-0.0575	0.0500	0.1075 (-186.9533%) ❗
clock__skew__worst_hold__corner:min_tt_025C_1v80	-0.0369	0.0312	0.0682 (-184.4642%) ❗
clock__skew__worst_hold__corner:nom_ff_n40C_1v95	-0.0302	0.0241	0.0543 (-179.6680%) ❗
clock__skew__worst_hold__corner:nom_ss_100C_1v60	-0.0602	0.0504	0.1106 (-183.7253%) ❗
clock__skew__worst_hold__corner:nom_tt_025C_1v80	-0.0389	0.0317	0.0707 (-181.5384%) ❗
clock__skew__worst_setup	-0.0632	0.0238	0.0870 (-137.5812%) ⭕
design__instance__area	11969.0000	11873.9000	-95.1000 (-0.7946%) ⭕
ir__drop__avg	0.0003	0.0003	-0.0001 (-25.0746%) ⭕
ir__drop__worst	0.0018	0.0009	-0.0009 (-49.0110%) ⭕
power__internal__total	0.0010	0.0010	-0.0000 (-1.2137%) ⭕
power__leakage__total	0.0000	0.0000	-0.0000 (-1.9743%) ⭕
power__total	0.0014	0.0014	-0.0000 (-0.7361%) ⭕
clock__skew__worst_setup__corner:max_ff_n40C_1v95	-0.0325	0.0244	0.0570 (-175.0914%) ⭕
clock__skew__worst_setup__corner:max_ss_100C_1v60	-0.0632	0.0495	0.1127 (-178.2433%) ⭕
clock__skew__worst_setup__corner:max_tt_025C_1v80	-0.0416	0.0315	0.0731 (-175.6263%) ⭕
clock__skew__worst_setup__corner:min_ff_n40C_1v95	-0.0287	0.0238	0.0524 (-182.8499%) ⭕
clock__skew__worst_setup__corner:min_ss_100C_1v60	-0.0575	0.0500	0.1075 (-186.9533%) ⭕
clock__skew__worst_setup__corner:min_tt_025C_1v80	-0.0369	0.0312	0.0682 (-184.4642%) ⭕
clock__skew__worst_setup__corner:nom_ff_n40C_1v95	-0.0302	0.0241	0.0543 (-179.6680%) ⭕
clock__skew__worst_setup__corner:nom_ss_100C_1v60	-0.0602	0.0504	0.1106 (-183.7253%) ⭕
clock__skew__worst_setup__corner:nom_tt_025C_1v80	-0.0389	0.0317	0.0707 (-181.5384%) ⭕
antenna__violating__nets	0	0	0 (0.0000%) ⭕
antenna__violating__pins	0	0	0 (0.0000%) ⭕
design__core__area	24891.4000	24891.4000	0.0000 (0.0000%) ⭕
design__die__area	30400.6000	30400.6000	0.0000 (0.0000%) ⭕
design__lint_error__count	0	0	0 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count	19	19	0 (0.0000%) ⭕
design__max_slew_violation__count	4	4	0 (0.0000%) ⭕
ir__voltage__worst	1.8000	1.8000	0.0000 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕
timing__hold__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__hold_vio__count	0	0	0 (0.0000%) ⭕
timing__setup__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__setup_vio__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ff_n40C_1v95	19	19	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ss_100C_1v60	19	19	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ss_100C_1v60	4	4	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_tt_025C_1v80	19	19	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ff_n40C_1v95	19	19	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ss_100C_1v60	19	19	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ss_100C_1v60	4	4	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_tt_025C_1v80	19	19	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ff_n40C_1v95	19	19	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ss_100C_1v60	19	19	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ss_100C_1v60	4	4	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_tt_025C_1v80	19	19	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕

sky130A/sky130_fd_sc_hd/usb_cdc_core

Metric	Before	After	Delta
clock__skew__worst_setup	0.0339	-0.0824	-0.1163 (-342.6223%) ❗
design__instance__area	22366	22429	63 (+0.2817%) ❗
design__max_fanout_violation__count	21	25	4 (+19.0476%) ❗
power__switching__total	0.0006	0.0006	0.0000 (+0.6540%) ❗
power__total	0.0021	0.0021	0.0000 (+0.0515%) ❗
clock__skew__worst_hold__corner:max_ff_n40C_1v95	0.0381	0.0401	0.0020 (+5.2897%) ❗
design__max_fanout_violation__count__corner:max_ff_n40C_1v95	21	25	4 (+19.0476%) ❗
clock__skew__worst_setup__corner:max_ss_100C_1v60	0.0806	-0.0824	-0.1629 (-202.2457%) ❗
design__max_fanout_violation__count__corner:max_ss_100C_1v60	21	25	4 (+19.0476%) ❗
clock__skew__worst_hold__corner:max_tt_025C_1v80	0.0496	0.0519	0.0023 (+4.5887%) ❗
design__max_fanout_violation__count__corner:max_tt_025C_1v80	21	25	4 (+19.0476%) ❗
clock__skew__worst_setup__corner:min_ff_n40C_1v95	0.0339	-0.0343	-0.0683 (-201.0929%) ❗
design__max_fanout_violation__count__corner:min_ff_n40C_1v95	21	25	4 (+19.0476%) ❗
clock__skew__worst_setup__corner:min_ss_100C_1v60	0.0728	-0.0745	-0.1473 (-202.3489%) ❗
design__max_fanout_violation__count__corner:min_ss_100C_1v60	21	25	4 (+19.0476%) ❗
clock__skew__worst_setup__corner:min_tt_025C_1v80	0.0445	-0.0454	-0.0899 (-201.9393%) ❗
design__max_fanout_violation__count__corner:min_tt_025C_1v80	21	25	4 (+19.0476%) ❗
clock__skew__worst_hold__corner:nom_ff_n40C_1v95	0.0357	0.0363	0.0006 (+1.6690%) ❗
design__max_fanout_violation__count__corner:nom_ff_n40C_1v95	21	25	4 (+19.0476%) ❗
clock__skew__worst_setup__corner:nom_ss_100C_1v60	0.0765	-0.0788	-0.1553 (-203.0095%) ❗
design__max_fanout_violation__count__corner:nom_ss_100C_1v60	21	25	4 (+19.0476%) ❗
clock__skew__worst_setup__corner:nom_tt_025C_1v80	0.0467	-0.0476	-0.0943 (-201.7933%) ❗
design__max_fanout_violation__count__corner:nom_tt_025C_1v80	21	25	4 (+19.0476%) ❗
antenna__violating__nets	1	0	-1 (-100.0000%) ⭕
antenna__violating__pins	1	0	-1 (-100.0000%) ⭕
clock__skew__worst_hold	0.0806	0.0519	-0.0287 (-35.5724%) ⭕
ir__drop__avg	0.0001	0.0001	-0.0000 (-30.2558%) ⭕
ir__drop__worst	0.0008	0.0003	-0.0004 (-57.5558%) ⭕
power__internal__total	0.0015	0.0015	-0.0000 (-0.1912%) ⭕
power__leakage__total	0.0000	0.0000	-0.0000 (-0.9955%) ⭕
clock__skew__worst_setup__corner:max_ff_n40C_1v95	0.0381	0.0401	0.0020 (+5.2897%) ⭕
clock__skew__worst_hold__corner:max_ss_100C_1v60	0.0806	-0.0824	-0.1629 (-202.2457%) ⭕
clock__skew__worst_setup__corner:max_tt_025C_1v80	0.0496	0.0519	0.0023 (+4.5887%) ⭕
clock__skew__worst_hold__corner:min_ff_n40C_1v95	0.0339	-0.0343	-0.0683 (-201.0929%) ⭕
clock__skew__worst_hold__corner:min_ss_100C_1v60	0.0728	-0.0745	-0.1473 (-202.3489%) ⭕
clock__skew__worst_hold__corner:min_tt_025C_1v80	0.0445	-0.0454	-0.0899 (-201.9393%) ⭕
clock__skew__worst_setup__corner:nom_ff_n40C_1v95	0.0357	0.0363	0.0006 (+1.6690%) ⭕
clock__skew__worst_hold__corner:nom_ss_100C_1v60	0.0765	-0.0788	-0.1553 (-203.0095%) ⭕
clock__skew__worst_hold__corner:nom_tt_025C_1v80	0.0467	-0.0476	-0.0943 (-201.7933%) ⭕
design__core__area	62620.1000	62620.1000	0.0000 (0.0000%) ⭕
design__die__area	71190.9000	71190.9000	0.0000 (0.0000%) ⭕
design__lint_error__count	0	0	0 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count	2	2	0 (0.0000%) ⭕
ir__voltage__worst	1.8000	1.8000	0.0000 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕
timing__hold__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__hold_vio__count	0	0	0 (0.0000%) ⭕
timing__setup__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__setup_vio__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ss_100C_1v60	2	2	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ss_100C_1v60	2	2	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ss_100C_1v60	2	2	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕

sky130A/sky130_fd_sc_hd/user_proj_timer

Metric	Before	After	Delta
clock__skew__worst_hold	-0.0098	0.0170	0.0268 (-274.1916%) ❗
design__instance__area	17767.0000	17802.1000	35.1000 (+0.1976%) ❗
design__max_cap_violation__count	2	3	1 (+50.0000%) ❗
design__max_fanout_violation__count	4	5	1 (+25.0000%) ❗
design__max_slew_violation__count	5	105	100 (+2000.0000%) ❗
power__leakage__total	0.0000	0.0000	0.0000 (+0.5328%) ❗
power__switching__total	0.0001	0.0001	0.0000 (+1.8146%) ❗
power__total	0.0003	0.0003	0.0000 (+0.3857%) ❗
clock__skew__worst_hold__corner:max_ff_n40C_1v95	-0.0121	0.0085	0.0206 (-170.3109%) ❗
design__max_cap_violation__count__corner:max_ff_n40C_1v95	2	3	1 (+50.0000%) ❗
design__max_fanout_violation__count__corner:max_ff_n40C_1v95	4	5	1 (+25.0000%) ❗
clock__skew__worst_hold__corner:max_ss_100C_1v60	-0.0225	0.0170	0.0395 (-175.6971%) ❗
design__max_cap_violation__count__corner:max_ss_100C_1v60	2	3	1 (+50.0000%) ❗
design__max_fanout_violation__count__corner:max_ss_100C_1v60	4	5	1 (+25.0000%) ❗
design__max_slew_violation__count__corner:max_ss_100C_1v60	5	105	100 (+2000.0000%) ❗
clock__skew__worst_hold__corner:max_tt_025C_1v80	-0.0144	0.0102	0.0245 (-170.7317%) ❗
design__max_cap_violation__count__corner:max_tt_025C_1v80	2	3	1 (+50.0000%) ❗
design__max_fanout_violation__count__corner:max_tt_025C_1v80	4	5	1 (+25.0000%) ❗
clock__skew__worst_hold__corner:min_ff_n40C_1v95	-0.0098	0.0069	0.0167 (-170.9476%) ❗
design__max_cap_violation__count__corner:min_ff_n40C_1v95	0	2	2 ❗
design__max_fanout_violation__count__corner:min_ff_n40C_1v95	4	5	1 (+25.0000%) ❗
clock__skew__worst_hold__corner:min_ss_100C_1v60	-0.0191	0.0145	0.0337 (-176.0684%) ❗
design__max_cap_violation__count__corner:min_ss_100C_1v60	0	3	3 ❗
design__max_fanout_violation__count__corner:min_ss_100C_1v60	4	5	1 (+25.0000%) ❗
design__max_slew_violation__count__corner:min_ss_100C_1v60	3	39	36 (+1200.0000%) ❗
clock__skew__worst_hold__corner:min_tt_025C_1v80	-0.0119	0.0083	0.0202 (-169.7786%) ❗
design__max_cap_violation__count__corner:min_tt_025C_1v80	0	3	3 ❗
design__max_fanout_violation__count__corner:min_tt_025C_1v80	4	5	1 (+25.0000%) ❗
clock__skew__worst_hold__corner:nom_ff_n40C_1v95	-0.0106	0.0074	0.0180 (-169.4222%) ❗
design__max_cap_violation__count__corner:nom_ff_n40C_1v95	0	3	3 ❗
design__max_fanout_violation__count__corner:nom_ff_n40C_1v95	4	5	1 (+25.0000%) ❗
clock__skew__worst_hold__corner:nom_ss_100C_1v60	-0.0206	0.0154	0.0359 (-174.8358%) ❗
design__max_cap_violation__count__corner:nom_ss_100C_1v60	1	3	2 (+200.0000%) ❗
design__max_fanout_violation__count__corner:nom_ss_100C_1v60	4	5	1 (+25.0000%) ❗
design__max_slew_violation__count__corner:nom_ss_100C_1v60	3	105	102 (+3400.0000%) ❗
clock__skew__worst_hold__corner:nom_tt_025C_1v80	-0.0128	0.0089	0.0217 (-169.1510%) ❗
design__max_cap_violation__count__corner:nom_tt_025C_1v80	1	3	2 (+200.0000%) ❗
design__max_fanout_violation__count__corner:nom_tt_025C_1v80	4	5	1 (+25.0000%) ❗
clock__skew__worst_setup	-0.0225	0.0069	0.0294 (-130.8311%) ⭕
ir__drop__avg	0.0000	0.0000	-0.0000 (-31.1047%) ⭕
ir__drop__worst	0.0001	0.0001	-0.0001 (-39.8561%) ⭕
power__internal__total	0.0002	0.0002	-0.0000 (-0.0375%) ⭕
clock__skew__worst_setup__corner:max_ff_n40C_1v95	-0.0121	0.0085	0.0206 (-170.3109%) ⭕
clock__skew__worst_setup__corner:max_ss_100C_1v60	-0.0225	0.0170	0.0395 (-175.6971%) ⭕
clock__skew__worst_setup__corner:max_tt_025C_1v80	-0.0144	0.0102	0.0245 (-170.7317%) ⭕
clock__skew__worst_setup__corner:min_ff_n40C_1v95	-0.0098	0.0069	0.0167 (-170.9476%) ⭕
clock__skew__worst_setup__corner:min_ss_100C_1v60	-0.0191	0.0145	0.0337 (-176.0684%) ⭕
clock__skew__worst_setup__corner:min_tt_025C_1v80	-0.0119	0.0083	0.0202 (-169.7786%) ⭕
clock__skew__worst_setup__corner:nom_ff_n40C_1v95	-0.0106	0.0074	0.0180 (-169.4222%) ⭕
clock__skew__worst_setup__corner:nom_ss_100C_1v60	-0.0206	0.0154	0.0359 (-174.8358%) ⭕
clock__skew__worst_setup__corner:nom_tt_025C_1v80	-0.0128	0.0089	0.0217 (-169.1510%) ⭕
antenna__violating__nets	0	0	0 (0.0000%) ⭕
antenna__violating__pins	0	0	0 (0.0000%) ⭕
design__core__area	655604	655604	0 (0.0000%) ⭕
design__die__area	700000	700000	0 (0.0000%) ⭕
design__lint_error__count	0	0	0 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
ir__voltage__worst	1.8000	1.8000	0.0000 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕
timing__hold__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__hold_vio__count	0	0	0 (0.0000%) ⭕
timing__setup__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__setup_vio__count	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕

sky130A/sky130_fd_sc_hd/wbqspiflash

Metric	Before	After	Delta
clock__skew__worst_setup	0.1199	-0.3589	-0.4788 (-399.1780%) ❗
design__instance__area	27371.3000	27580.2000	208.9000 (+0.7632%) ❗
power__internal__total	0.0029	0.0030	0.0000 (+1.2975%) ❗
power__leakage__total	0.0000	0.0000	0.0000 (+2.2577%) ❗
power__switching__total	0.0028	0.0029	0.0000 (+1.1994%) ❗
power__total	0.0058	0.0059	0.0001 (+1.2494%) ❗
clock__skew__worst_setup__corner:max_ff_n40C_1v95	0.1262	-0.1400	-0.2662 (-211.0008%) ❗
clock__skew__worst_setup__corner:max_ss_100C_1v60	0.3231	-0.3589	-0.6819 (-211.0753%) ❗
clock__skew__worst_setup__corner:max_tt_025C_1v80	0.1849	-0.2065	-0.3913 (-211.6793%) ❗
clock__skew__worst_setup__corner:min_ff_n40C_1v95	0.1199	-0.1323	-0.2522 (-210.2960%) ❗
clock__skew__worst_setup__corner:min_ss_100C_1v60	0.3090	-0.3389	-0.6479 (-209.6773%) ❗
clock__skew__worst_setup__corner:min_tt_025C_1v80	0.1760	-0.1945	-0.3705 (-210.5271%) ❗
clock__skew__worst_setup__corner:nom_ff_n40C_1v95	0.1228	-0.1361	-0.2589 (-210.7878%) ❗
clock__skew__worst_setup__corner:nom_ss_100C_1v60	0.3156	-0.3480	-0.6636 (-210.2369%) ❗
clock__skew__worst_setup__corner:nom_tt_025C_1v80	0.1803	-0.2000	-0.3803 (-210.9488%) ❗
antenna__violating__nets	3	2	-1 (-33.3333%) ⭕
antenna__violating__pins	3	2	-1 (-33.3333%) ⭕
clock__skew__worst_hold	0.3231	-0.1323	-0.4554 (-140.9494%) ⭕
design__max_fanout_violation__count	46	37	-9 (-19.5652%) ⭕
design__max_slew_violation__count	48	26	-22 (-45.8333%) ⭕
ir__drop__avg	0.0003	0.0002	-0.0001 (-28.7719%) ⭕
ir__drop__worst	0.0019	0.0012	-0.0008 (-40.2062%) ⭕
clock__skew__worst_hold__corner:max_ff_n40C_1v95	0.1262	-0.1400	-0.2662 (-211.0008%) ⭕
design__max_fanout_violation__count__corner:max_ff_n40C_1v95	46	37	-9 (-19.5652%) ⭕
clock__skew__worst_hold__corner:max_ss_100C_1v60	0.3231	-0.3589	-0.6819 (-211.0753%) ⭕
design__max_fanout_violation__count__corner:max_ss_100C_1v60	46	37	-9 (-19.5652%) ⭕
design__max_slew_violation__count__corner:max_ss_100C_1v60	48	26	-22 (-45.8333%) ⭕
clock__skew__worst_hold__corner:max_tt_025C_1v80	0.1849	-0.2065	-0.3913 (-211.6793%) ⭕
design__max_fanout_violation__count__corner:max_tt_025C_1v80	46	37	-9 (-19.5652%) ⭕
clock__skew__worst_hold__corner:min_ff_n40C_1v95	0.1199	-0.1323	-0.2522 (-210.2960%) ⭕
design__max_fanout_violation__count__corner:min_ff_n40C_1v95	46	37	-9 (-19.5652%) ⭕
clock__skew__worst_hold__corner:min_ss_100C_1v60	0.3090	-0.3389	-0.6479 (-209.6773%) ⭕
design__max_fanout_violation__count__corner:min_ss_100C_1v60	46	37	-9 (-19.5652%) ⭕
design__max_slew_violation__count__corner:min_ss_100C_1v60	13	9	-4 (-30.7692%) ⭕
clock__skew__worst_hold__corner:min_tt_025C_1v80	0.1760	-0.1945	-0.3705 (-210.5271%) ⭕
design__max_fanout_violation__count__corner:min_tt_025C_1v80	46	37	-9 (-19.5652%) ⭕
clock__skew__worst_hold__corner:nom_ff_n40C_1v95	0.1228	-0.1361	-0.2589 (-210.7878%) ⭕
design__max_fanout_violation__count__corner:nom_ff_n40C_1v95	46	37	-9 (-19.5652%) ⭕
clock__skew__worst_hold__corner:nom_ss_100C_1v60	0.3156	-0.3480	-0.6636 (-210.2369%) ⭕
design__max_fanout_violation__count__corner:nom_ss_100C_1v60	46	37	-9 (-19.5652%) ⭕
design__max_slew_violation__count__corner:nom_ss_100C_1v60	25	19	-6 (-24.0000%) ⭕
clock__skew__worst_hold__corner:nom_tt_025C_1v80	0.1803	-0.2000	-0.3803 (-210.9488%) ⭕
design__max_fanout_violation__count__corner:nom_tt_025C_1v80	46	37	-9 (-19.5652%) ⭕
design__core__area	74571.5000	74571.5000	0.0000 (0.0000%) ⭕
design__die__area	84643.5000	84643.5000	0.0000 (0.0000%) ⭕
design__lint_error__count	0	0	0 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count	0	0	0 (0.0000%) ⭕
ir__voltage__worst	1.8000	1.8000	0.0000 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕
timing__hold__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__hold_vio__count	0	0	0 (0.0000%) ⭕
timing__setup__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__setup_vio__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕

sky130A/sky130_fd_sc_hd/xtea

Metric	Before	After	Delta
timing__setup__tns	-211.4914	-213.3552	-1.8638 (+0.8813%) ‼️
timing__setup__wns	-6.8976	-6.7804	0.1172 (-1.6993%) ‼️
timing__setup_r2r_vio__count	187	192	5 (+2.6738%) ‼️
timing__setup_vio__count	187	192	5 (+2.6738%) ‼️
timing__setup__tns__corner:max_ss_100C_1v60	-211.4914	-213.3552	-1.8638 (+0.8813%) ‼️
timing__setup__wns__corner:max_ss_100C_1v60	-6.8976	-6.7804	0.1172 (-1.6993%) ‼️
timing__setup_r2r_vio__count__corner:max_ss_100C_1v60	63	64	1 (+1.5873%) ‼️
timing__setup_vio__count__corner:max_ss_100C_1v60	63	64	1 (+1.5873%) ‼️
timing__setup__tns__corner:min_ss_100C_1v60	-194.9052	-198.9737	-4.0685 (+2.0874%) ‼️
timing__setup__wns__corner:min_ss_100C_1v60	-6.6469	-6.4648	0.1822 (-2.7405%) ‼️
timing__setup_r2r_vio__count__corner:min_ss_100C_1v60	62	64	2 (+3.2258%) ‼️
timing__setup_vio__count__corner:min_ss_100C_1v60	62	64	2 (+3.2258%) ‼️
timing__setup__tns__corner:nom_ss_100C_1v60	-202.9236	-205.8921	-2.9685 (+1.4629%) ‼️
timing__setup__wns__corner:nom_ss_100C_1v60	-6.7582	-6.6264	0.1319 (-1.9510%) ‼️
timing__setup_r2r_vio__count__corner:nom_ss_100C_1v60	62	64	2 (+3.2258%) ‼️
timing__setup_vio__count__corner:nom_ss_100C_1v60	62	64	2 (+3.2258%) ‼️
clock__skew__worst_setup	0.0235	0.0226	-0.0009 (-3.7844%) ❗
design__instance__area	24113.1000	24329.6000	216.5000 (+0.8979%) ❗
power__internal__total	0.0082	0.0083	0.0002 (+2.2537%) ❗
power__leakage__total	0.0000	0.0000	0.0000 (+1.6462%) ❗
power__switching__total	0.0099	0.0100	0.0001 (+0.9961%) ❗
power__total	0.0180	0.0183	0.0003 (+1.5653%) ❗
clock__skew__worst_setup__corner:max_ff_n40C_1v95	0.0276	0.0274	-0.0002 (-0.7184%) ❗
clock__skew__worst_setup__corner:max_ss_100C_1v60	0.0572	0.0521	-0.0051 (-8.8866%) ❗
clock__skew__worst_setup__corner:max_tt_025C_1v80	0.0362	0.0357	-0.0004 (-1.2138%) ❗
clock__skew__worst_setup__corner:min_ff_n40C_1v95	0.0235	0.0226	-0.0009 (-3.7844%) ❗
clock__skew__worst_setup__corner:min_ss_100C_1v60	0.0498	0.0444	-0.0054 (-10.7971%) ❗
clock__skew__worst_setup__corner:min_tt_025C_1v80	0.0312	0.0298	-0.0014 (-4.5460%) ❗
clock__skew__worst_setup__corner:nom_ff_n40C_1v95	0.0252	0.0245	-0.0007 (-2.9370%) ❗
clock__skew__worst_setup__corner:nom_ss_100C_1v60	0.0529	0.0473	-0.0055 (-10.4878%) ❗
design__max_slew_violation__count__corner:nom_ss_100C_1v60	0	3	3 ❗
clock__skew__worst_setup__corner:nom_tt_025C_1v80	0.0335	0.0323	-0.0013 (-3.7426%) ❗
antenna__violating__nets	1	0	-1 (-100.0000%) ⭕
antenna__violating__pins	1	0	-1 (-100.0000%) ⭕
clock__skew__worst_hold	0.0572	0.0521	-0.0051 (-8.8866%) ⭕
design__max_slew_violation__count	11	8	-3 (-27.2727%) ⭕
ir__drop__avg	0.0009	0.0007	-0.0002 (-25.4605%) ⭕
ir__drop__worst	0.0041	0.0021	-0.0020 (-48.6618%) ⭕
clock__skew__worst_hold__corner:max_ff_n40C_1v95	0.0276	0.0274	-0.0002 (-0.7184%) ⭕
clock__skew__worst_hold__corner:max_ss_100C_1v60	0.0572	0.0521	-0.0051 (-8.8866%) ⭕
design__max_slew_violation__count__corner:max_ss_100C_1v60	11	8	-3 (-27.2727%) ⭕
clock__skew__worst_hold__corner:max_tt_025C_1v80	0.0362	0.0357	-0.0004 (-1.2138%) ⭕
clock__skew__worst_hold__corner:min_ff_n40C_1v95	0.0235	0.0226	-0.0009 (-3.7844%) ⭕
clock__skew__worst_hold__corner:min_ss_100C_1v60	0.0498	0.0444	-0.0054 (-10.7971%) ⭕
clock__skew__worst_hold__corner:min_tt_025C_1v80	0.0312	0.0298	-0.0014 (-4.5460%) ⭕
clock__skew__worst_hold__corner:nom_ff_n40C_1v95	0.0252	0.0245	-0.0007 (-2.9370%) ⭕
clock__skew__worst_hold__corner:nom_ss_100C_1v60	0.0529	0.0473	-0.0055 (-10.4878%) ⭕
clock__skew__worst_hold__corner:nom_tt_025C_1v80	0.0335	0.0323	-0.0013 (-3.7426%) ⭕
design__core__area	46358.2000	46358.2000	0.0000 (0.0000%) ⭕
design__die__area	54022.9000	54022.9000	0.0000 (0.0000%) ⭕
design__lint_error__count	0	0	0 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count	11	11	0 (0.0000%) ⭕
ir__voltage__worst	1.8000	1.8000	0.0000 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕
timing__hold__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__hold_vio__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ff_n40C_1v95	11	11	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_ss_100C_1v60	11	11	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:max_tt_025C_1v80	11	11	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ff_n40C_1v95	11	11	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_ss_100C_1v60	11	11	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:min_tt_025C_1v80	11	11	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ff_n40C_1v95	11	11	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_ss_100C_1v60	11	11	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_fanout_violation__count__corner:nom_tt_025C_1v80	11	11	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕

sky130A/sky130_fd_sc_hd/zipdiv

Metric	Before	After	Delta
clock__skew__worst_hold	-0.0344	0.0753	0.1097 (-319.1939%) ❗
design__instance__area	13067.5000	13127.6000	60.1000 (+0.4599%) ❗
power__internal__total	0.0006	0.0006	0.0000 (+0.2779%) ❗
power__leakage__total	0.0000	0.0000	0.0000 (+0.2517%) ❗
power__total	0.0010	0.0010	0.0000 (+0.1118%) ❗
clock__skew__worst_hold__corner:max_ff_n40C_1v95	-0.0388	0.0391	0.0778 (-200.8387%) ❗
clock__skew__worst_hold__corner:max_ss_100C_1v60	-0.0757	0.0753	0.1510 (-199.5428%) ❗
clock__skew__worst_hold__corner:max_tt_025C_1v80	-0.0502	0.0502	0.1004 (-199.9801%) ❗
clock__skew__worst_hold__corner:min_ff_n40C_1v95	-0.0344	0.0341	0.0685 (-199.2551%) ❗
clock__skew__worst_hold__corner:min_ss_100C_1v60	-0.0689	0.0680	0.1369 (-198.6863%) ❗
clock__skew__worst_hold__corner:min_tt_025C_1v80	-0.0450	0.0445	0.0895 (-198.7923%) ❗
clock__skew__worst_hold__corner:nom_ff_n40C_1v95	-0.0360	0.0358	0.0718 (-199.6193%) ❗
clock__skew__worst_hold__corner:nom_ss_100C_1v60	-0.0717	0.0708	0.1425 (-198.7129%) ❗
clock__skew__worst_hold__corner:nom_tt_025C_1v80	-0.0470	0.0466	0.0936 (-198.9670%) ❗
clock__skew__worst_setup	-0.0757	0.0341	0.1098 (-145.0748%) ⭕
design__max_fanout_violation__count	16	15	-1 (-6.2500%) ⭕
design__max_slew_violation__count	12	0	-12 (-100.0000%) ⭕
ir__drop__avg	0.0001	0.0001	-0.0000 (-18.2482%) ⭕
ir__drop__worst	0.0005	0.0003	-0.0002 (-42.7975%) ⭕
power__switching__total	0.0004	0.0004	-0.0000 (-0.1435%) ⭕
clock__skew__worst_setup__corner:max_ff_n40C_1v95	-0.0388	0.0391	0.0778 (-200.8387%) ⭕
design__max_fanout_violation__count__corner:max_ff_n40C_1v95	16	15	-1 (-6.2500%) ⭕
clock__skew__worst_setup__corner:max_ss_100C_1v60	-0.0757	0.0753	0.1510 (-199.5428%) ⭕
design__max_fanout_violation__count__corner:max_ss_100C_1v60	16	15	-1 (-6.2500%) ⭕
design__max_slew_violation__count__corner:max_ss_100C_1v60	12	0	-12 (-100.0000%) ⭕
clock__skew__worst_setup__corner:max_tt_025C_1v80	-0.0502	0.0502	0.1004 (-199.9801%) ⭕
design__max_fanout_violation__count__corner:max_tt_025C_1v80	16	15	-1 (-6.2500%) ⭕
clock__skew__worst_setup__corner:min_ff_n40C_1v95	-0.0344	0.0341	0.0685 (-199.2551%) ⭕
design__max_fanout_violation__count__corner:min_ff_n40C_1v95	16	15	-1 (-6.2500%) ⭕
clock__skew__worst_setup__corner:min_ss_100C_1v60	-0.0689	0.0680	0.1369 (-198.6863%) ⭕
design__max_fanout_violation__count__corner:min_ss_100C_1v60	16	15	-1 (-6.2500%) ⭕
clock__skew__worst_setup__corner:min_tt_025C_1v80	-0.0450	0.0445	0.0895 (-198.7923%) ⭕
design__max_fanout_violation__count__corner:min_tt_025C_1v80	16	15	-1 (-6.2500%) ⭕
clock__skew__worst_setup__corner:nom_ff_n40C_1v95	-0.0360	0.0358	0.0718 (-199.6193%) ⭕
design__max_fanout_violation__count__corner:nom_ff_n40C_1v95	16	15	-1 (-6.2500%) ⭕
clock__skew__worst_setup__corner:nom_ss_100C_1v60	-0.0717	0.0708	0.1425 (-198.7129%) ⭕
design__max_fanout_violation__count__corner:nom_ss_100C_1v60	16	15	-1 (-6.2500%) ⭕
design__max_slew_violation__count__corner:nom_ss_100C_1v60	4	0	-4 (-100.0000%) ⭕
clock__skew__worst_setup__corner:nom_tt_025C_1v80	-0.0470	0.0466	0.0936 (-198.9670%) ⭕
design__max_fanout_violation__count__corner:nom_tt_025C_1v80	16	15	-1 (-6.2500%) ⭕
antenna__violating__nets	0	0	0 (0.0000%) ⭕
antenna__violating__pins	0	0	0 (0.0000%) ⭕
design__core__area	29796.1000	29796.1000	0.0000 (0.0000%) ⭕
design__die__area	36193	36193	0 (0.0000%) ⭕
design__lint_error__count	0	0	0 (0.0000%) ⭕
design__lvs_error__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count	0	0	0 (0.0000%) ⭕
ir__voltage__worst	1.8000	1.8000	0.0000 (0.0000%) ⭕
magic__drc_error__count	0	0	0 (0.0000%) ⭕
route__drc_errors	0	0	0 (0.0000%) ⭕
synthesis__check_error__count	0	0	0 (0.0000%) ⭕
timing__hold__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__hold_vio__count	0	0	0 (0.0000%) ⭕
timing__setup__tns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count	0	0	0 (0.0000%) ⭕
timing__setup_vio__count	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:max_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:max_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:min_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:min_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ff_n40C_1v95	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ff_n40C_1v95	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_ss_100C_1v60	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_ss_100C_1v60	0	0	0 (0.0000%) ⭕
design__max_cap_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
design__max_slew_violation__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__hold_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__hold_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup__tns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup__wns__corner:nom_tt_025C_1v80	0.0000	0.0000	0.0000 (0.0000%) ⭕
timing__setup_r2r_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕
timing__setup_vio__count__corner:nom_tt_025C_1v80	0	0	0 (0.0000%) ⭕