e2e_failure_partial_log.log

Debug: 12382 1056 riscv-013.c:783 execute_abstract_command(): command=0x22100e; access register, size=32, postexec=0, transfer=1, write=0, regno=0x100e
Debug: 12383 1056 mpsse.c:630 mpsse_set_data_bits_high_byte(): -
Debug: 12384 1056 mpsse.c:445 buffer_write_byte(): 82
Debug: 12385 1056 mpsse.c:445 buffer_write_byte(): 09
Debug: 12386 1056 mpsse.c:445 buffer_write_byte(): 0b
Debug: 12387 1056 ftdi.c:424 ftdi_execute_scan(): IRSCAN type:2
Debug: 12388 1056 ftdi.c:254 move_to_state(): start=RUN/IDLE goal=IRSHIFT
Debug: 12389 1056 ftdi.c:258 move_to_state(): tap_set_state(DRSELECT)
Debug: 12390 1056 ftdi.c:258 move_to_state(): tap_set_state(IRSELECT)
Debug: 12391 1056 ftdi.c:258 move_to_state(): tap_set_state(IRCAPTURE)
Debug: 12392 1056 ftdi.c:258 move_to_state(): tap_set_state(IRSHIFT)
Debug: 12393 1056 mpsse.c:563 mpsse_clock_tms_cs(): out 4 bits, tdi=0
Debug: 12394 1056 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12395 1056 mpsse.c:445 buffer_write_byte(): 03
Debug: 12396 1056 mpsse.c:445 buffer_write_byte(): 03
Debug: 12397 1056 ftdi.c:454 ftdi_execute_scan(): out field 0/1 5 bits
Debug: 12398 1056 mpsse.c:487 mpsse_clock_data(): out 4 bits
Debug: 12399 1056 mpsse.c:445 buffer_write_byte(): 1b
Debug: 12400 1056 mpsse.c:445 buffer_write_byte(): 03
Debug: 12401 1056 mpsse.c:453 buffer_write(): 4 bits
Debug: 12402 1056 mpsse.c:563 mpsse_clock_tms_cs(): out 1 bits, tdi=1
Debug: 12403 1056 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12404 1056 mpsse.c:445 buffer_write_byte(): 00
Debug: 12405 1056 mpsse.c:445 buffer_write_byte(): 81
Debug: 12406 1056 ftdi.c:487 ftdi_execute_scan(): tap_set_state(IREXIT1)
Debug: 12407 1056 mpsse.c:563 mpsse_clock_tms_cs(): out 2 bits, tdi=1
Debug: 12408 1056 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12409 1056 mpsse.c:445 buffer_write_byte(): 01
Debug: 12410 1056 mpsse.c:445 buffer_write_byte(): 81
Debug: 12411 1056 ftdi.c:495 ftdi_execute_scan(): tap_set_state(IRUPDATE)
Debug: 12412 1056 ftdi.c:496 ftdi_execute_scan(): tap_set_state(RUN/IDLE)
Debug: 12413 1056 ftdi.c:519 ftdi_execute_scan(): IR scan, 5 bits, end in RUN/IDLE
Debug: 12414 1056 ftdi.c:424 ftdi_execute_scan(): DRSCAN type:3
Debug: 12415 1056 ftdi.c:254 move_to_state(): start=RUN/IDLE goal=DRSHIFT
Debug: 12416 1056 ftdi.c:258 move_to_state(): tap_set_state(DRSELECT)
Debug: 12417 1056 ftdi.c:258 move_to_state(): tap_set_state(DRCAPTURE)
Debug: 12418 1056 ftdi.c:258 move_to_state(): tap_set_state(DRSHIFT)
Debug: 12419 1056 mpsse.c:563 mpsse_clock_tms_cs(): out 3 bits, tdi=0
Debug: 12420 1057 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12421 1057 mpsse.c:445 buffer_write_byte(): 02
Debug: 12422 1057 mpsse.c:445 buffer_write_byte(): 01
Debug: 12423 1057 ftdi.c:454 ftdi_execute_scan(): inout field 0/1 41 bits
Debug: 12424 1057 mpsse.c:487 mpsse_clock_data(): inout 40 bits
Debug: 12425 1057 mpsse.c:445 buffer_write_byte(): 39
Debug: 12426 1057 mpsse.c:445 buffer_write_byte(): 04
Debug: 12427 1057 mpsse.c:445 buffer_write_byte(): 00
Debug: 12428 1057 mpsse.c:453 buffer_write(): 40 bits
Debug: 12429 1057 mpsse.c:463 buffer_add_read(): 40 bits, offset 0
Debug: 12430 1057 mpsse.c:563 mpsse_clock_tms_cs(): inout 1 bits, tdi=0
Debug: 12431 1057 mpsse.c:445 buffer_write_byte(): 6b
Debug: 12432 1057 mpsse.c:445 buffer_write_byte(): 00
Debug: 12433 1057 mpsse.c:445 buffer_write_byte(): 01
Debug: 12434 1057 mpsse.c:463 buffer_add_read(): 1 bits, offset 7
Debug: 12435 1057 ftdi.c:487 ftdi_execute_scan(): tap_set_state(DREXIT1)
Debug: 12436 1057 mpsse.c:563 mpsse_clock_tms_cs(): out 2 bits, tdi=0
Debug: 12437 1057 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12438 1057 mpsse.c:445 buffer_write_byte(): 01
Debug: 12439 1057 mpsse.c:445 buffer_write_byte(): 01
Debug: 12440 1057 ftdi.c:495 ftdi_execute_scan(): tap_set_state(DRUPDATE)
Debug: 12441 1057 ftdi.c:496 ftdi_execute_scan(): tap_set_state(RUN/IDLE)
Debug: 12442 1057 ftdi.c:519 ftdi_execute_scan(): DR scan, 41 bits, end in RUN/IDLE
Debug: 12443 1057 ftdi.c:316 ftdi_execute_runtest(): runtest 2 cycles, end in RUN/IDLE
Debug: 12444 1057 mpsse.c:563 mpsse_clock_tms_cs(): out 2 bits, tdi=0
Debug: 12445 1057 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12446 1057 mpsse.c:445 buffer_write_byte(): 01
Debug: 12447 1057 mpsse.c:445 buffer_write_byte(): 00
Debug: 12448 1057 ftdi.c:337 ftdi_execute_runtest(): runtest: 2, end in RUN/IDLE
Debug: 12449 1057 mpsse.c:630 mpsse_set_data_bits_high_byte(): -
Debug: 12450 1057 mpsse.c:445 buffer_write_byte(): 82
Debug: 12451 1057 mpsse.c:445 buffer_write_byte(): 01
Debug: 12452 1057 mpsse.c:445 buffer_write_byte(): 0b
Debug: 12453 1057 mpsse.c:844 mpsse_flush(): write 38+1, read 6
Debug: 12454 1057 mpsse.c:445 buffer_write_byte(): 87
Debug: 12455 1057 mpsse.c:819 write_cb(): transferred 39 of 39
Debug: 12456 1057 mpsse.c:821 write_cb():  82 09 0b 4b 03 03 1b 03 01 4b 00 81 4b 01 81 4b 02 01 39 04 00 3a 40 88 00 5c 6b 00 01 4b 01 01
Debug: 12457 1057 mpsse.c:821 write_cb():  4b 01 00 82 01 0b 87
Debug: 12458 1057 mpsse.c:781 read_cb():  32 60 f8 ff ff ff ff ff
Debug: 12459 1057 mpsse.c:804 read_cb(): raw chunk 8, transferred 6 of 6
Debug: 12460 1057 core.c:960 default_interface_jtag_execute_queue(): JTAG IR SCAN to RUN/IDLE
Debug: 12461 1057 core.c:967 default_interface_jtag_execute_queue():   5b out: 11
Debug: 12462 1057 core.c:960 default_interface_jtag_execute_queue(): JTAG DR SCAN to RUN/IDLE
Debug: 12463 1057 core.c:967 default_interface_jtag_execute_queue():   41b out: 005c0088403a
Debug: 12464 1057 core.c:972 default_interface_jtag_execute_queue():   41b  in: 01fffffffff8
Debug: 12465 1057 core.c:982 default_interface_jtag_execute_queue(): JTAG RUNTEST 2 cycles to RUN/IDLE
Debug: 12466 1057 riscv-013.c:397 scan(): 41b w 0022100e @17 -> + fffffffe @7f; 2i
Debug: 12467 1057 mpsse.c:630 mpsse_set_data_bits_high_byte(): -
Debug: 12468 1057 mpsse.c:445 buffer_write_byte(): 82
Debug: 12469 1057 mpsse.c:445 buffer_write_byte(): 09
Debug: 12470 1057 mpsse.c:445 buffer_write_byte(): 0b
Debug: 12471 1057 ftdi.c:424 ftdi_execute_scan(): IRSCAN type:2
Debug: 12472 1057 ftdi.c:254 move_to_state(): start=RUN/IDLE goal=IRSHIFT
Debug: 12473 1057 ftdi.c:258 move_to_state(): tap_set_state(DRSELECT)
Debug: 12474 1057 ftdi.c:258 move_to_state(): tap_set_state(IRSELECT)
Debug: 12475 1057 ftdi.c:258 move_to_state(): tap_set_state(IRCAPTURE)
Debug: 12476 1057 ftdi.c:258 move_to_state(): tap_set_state(IRSHIFT)
Debug: 12477 1057 mpsse.c:563 mpsse_clock_tms_cs(): out 4 bits, tdi=0
Debug: 12478 1057 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12479 1057 mpsse.c:445 buffer_write_byte(): 03
Debug: 12480 1057 mpsse.c:445 buffer_write_byte(): 03
Debug: 12481 1057 ftdi.c:454 ftdi_execute_scan(): out field 0/1 5 bits
Debug: 12482 1057 mpsse.c:487 mpsse_clock_data(): out 4 bits
Debug: 12483 1057 mpsse.c:445 buffer_write_byte(): 1b
Debug: 12484 1057 mpsse.c:445 buffer_write_byte(): 03
Debug: 12485 1057 mpsse.c:453 buffer_write(): 4 bits
Debug: 12486 1057 mpsse.c:563 mpsse_clock_tms_cs(): out 1 bits, tdi=1
Debug: 12487 1057 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12488 1057 mpsse.c:445 buffer_write_byte(): 00
Debug: 12489 1057 mpsse.c:445 buffer_write_byte(): 81
Debug: 12490 1057 ftdi.c:487 ftdi_execute_scan(): tap_set_state(IREXIT1)
Debug: 12491 1057 mpsse.c:563 mpsse_clock_tms_cs(): out 2 bits, tdi=1
Debug: 12492 1057 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12493 1057 mpsse.c:445 buffer_write_byte(): 01
Debug: 12494 1057 mpsse.c:445 buffer_write_byte(): 81
Debug: 12495 1057 ftdi.c:495 ftdi_execute_scan(): tap_set_state(IRUPDATE)
Debug: 12496 1057 ftdi.c:496 ftdi_execute_scan(): tap_set_state(RUN/IDLE)
Debug: 12497 1057 ftdi.c:519 ftdi_execute_scan(): IR scan, 5 bits, end in RUN/IDLE
Debug: 12498 1057 ftdi.c:424 ftdi_execute_scan(): DRSCAN type:3
Debug: 12499 1057 ftdi.c:254 move_to_state(): start=RUN/IDLE goal=DRSHIFT
Debug: 12500 1057 ftdi.c:258 move_to_state(): tap_set_state(DRSELECT)
Debug: 12501 1057 ftdi.c:258 move_to_state(): tap_set_state(DRCAPTURE)
Debug: 12502 1057 ftdi.c:258 move_to_state(): tap_set_state(DRSHIFT)
Debug: 12503 1057 mpsse.c:563 mpsse_clock_tms_cs(): out 3 bits, tdi=0
Debug: 12504 1057 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12505 1057 mpsse.c:445 buffer_write_byte(): 02
Debug: 12506 1057 mpsse.c:445 buffer_write_byte(): 01
Debug: 12507 1057 ftdi.c:454 ftdi_execute_scan(): inout field 0/1 41 bits
Debug: 12508 1057 mpsse.c:487 mpsse_clock_data(): inout 40 bits
Debug: 12509 1057 mpsse.c:445 buffer_write_byte(): 39
Debug: 12510 1057 mpsse.c:445 buffer_write_byte(): 04
Debug: 12511 1057 mpsse.c:445 buffer_write_byte(): 00
Debug: 12512 1057 mpsse.c:453 buffer_write(): 40 bits
Debug: 12513 1057 mpsse.c:463 buffer_add_read(): 40 bits, offset 0
Debug: 12514 1057 mpsse.c:563 mpsse_clock_tms_cs(): inout 1 bits, tdi=0
Debug: 12515 1057 mpsse.c:445 buffer_write_byte(): 6b
Debug: 12516 1057 mpsse.c:445 buffer_write_byte(): 00
Debug: 12517 1057 mpsse.c:445 buffer_write_byte(): 01
Debug: 12518 1057 mpsse.c:463 buffer_add_read(): 1 bits, offset 7
Debug: 12519 1057 ftdi.c:487 ftdi_execute_scan(): tap_set_state(DREXIT1)
Debug: 12520 1057 mpsse.c:563 mpsse_clock_tms_cs(): out 2 bits, tdi=0
Debug: 12521 1057 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12522 1057 mpsse.c:445 buffer_write_byte(): 01
Debug: 12523 1057 mpsse.c:445 buffer_write_byte(): 01
Debug: 12524 1057 ftdi.c:495 ftdi_execute_scan(): tap_set_state(DRUPDATE)
Debug: 12525 1057 ftdi.c:496 ftdi_execute_scan(): tap_set_state(RUN/IDLE)
Debug: 12526 1057 ftdi.c:519 ftdi_execute_scan(): DR scan, 41 bits, end in RUN/IDLE
Debug: 12527 1057 ftdi.c:316 ftdi_execute_runtest(): runtest 2 cycles, end in RUN/IDLE
Debug: 12528 1057 mpsse.c:563 mpsse_clock_tms_cs(): out 2 bits, tdi=0
Debug: 12529 1057 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12530 1057 mpsse.c:445 buffer_write_byte(): 01
Debug: 12531 1057 mpsse.c:445 buffer_write_byte(): 00
Debug: 12532 1057 ftdi.c:337 ftdi_execute_runtest(): runtest: 2, end in RUN/IDLE
Debug: 12533 1057 mpsse.c:630 mpsse_set_data_bits_high_byte(): -
Debug: 12534 1057 mpsse.c:445 buffer_write_byte(): 82
Debug: 12535 1057 mpsse.c:445 buffer_write_byte(): 01
Debug: 12536 1057 mpsse.c:445 buffer_write_byte(): 0b
Debug: 12537 1057 mpsse.c:844 mpsse_flush(): write 38+1, read 6
Debug: 12538 1057 mpsse.c:445 buffer_write_byte(): 87
Debug: 12539 1057 mpsse.c:819 write_cb(): transferred 39 of 39
Debug: 12540 1057 mpsse.c:821 write_cb():  82 09 0b 4b 03 03 1b 03 01 4b 00 81 4b 01 81 4b 02 01 39 04 00 01 00 00 00 58 6b 00 01 4b 01 01
Debug: 12541 1057 mpsse.c:821 write_cb():  4b 01 00 82 01 0b 87
Debug: 12542 1057 mpsse.c:781 read_cb():  32 60 ff ff ff ff ff ff
Debug: 12543 1057 mpsse.c:804 read_cb(): raw chunk 8, transferred 6 of 6
Debug: 12544 1057 core.c:960 default_interface_jtag_execute_queue(): JTAG IR SCAN to RUN/IDLE
Debug: 12545 1057 core.c:967 default_interface_jtag_execute_queue():   5b out: 11
Debug: 12546 1057 core.c:960 default_interface_jtag_execute_queue(): JTAG DR SCAN to RUN/IDLE
Debug: 12547 1057 core.c:967 default_interface_jtag_execute_queue():   41b out: 005800000001
Debug: 12548 1057 core.c:972 default_interface_jtag_execute_queue():   41b  in: 01ffffffffff
Debug: 12549 1057 core.c:982 default_interface_jtag_execute_queue(): JTAG RUNTEST 2 cycles to RUN/IDLE
Debug: 12550 1057 riscv-013.c:397 scan(): 41b r 00000000 @16 -> b ffffffff @7f; 2i
Debug: 12551 1057 riscv-013.c:460 increase_dmi_busy_delay(): dtmcs_idle=1, dmi_busy_delay=3, ac_busy_delay=0
Debug: 12552 1057 mpsse.c:630 mpsse_set_data_bits_high_byte(): -
Debug: 12553 1057 mpsse.c:445 buffer_write_byte(): 82
Debug: 12554 1057 mpsse.c:445 buffer_write_byte(): 09
Debug: 12555 1057 mpsse.c:445 buffer_write_byte(): 0b
Debug: 12556 1057 ftdi.c:424 ftdi_execute_scan(): IRSCAN type:2
Debug: 12557 1057 ftdi.c:254 move_to_state(): start=RUN/IDLE goal=IRSHIFT
Debug: 12558 1057 ftdi.c:258 move_to_state(): tap_set_state(DRSELECT)
Debug: 12559 1057 ftdi.c:258 move_to_state(): tap_set_state(IRSELECT)
Debug: 12560 1057 ftdi.c:258 move_to_state(): tap_set_state(IRCAPTURE)
Debug: 12561 1057 ftdi.c:258 move_to_state(): tap_set_state(IRSHIFT)
Debug: 12562 1057 mpsse.c:563 mpsse_clock_tms_cs(): out 4 bits, tdi=0
Debug: 12563 1057 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12564 1057 mpsse.c:445 buffer_write_byte(): 03
Debug: 12565 1057 mpsse.c:445 buffer_write_byte(): 03
Debug: 12566 1057 ftdi.c:454 ftdi_execute_scan(): out field 0/1 5 bits
Debug: 12567 1057 mpsse.c:487 mpsse_clock_data(): out 4 bits
Debug: 12568 1057 mpsse.c:445 buffer_write_byte(): 1b
Debug: 12569 1057 mpsse.c:445 buffer_write_byte(): 03
Debug: 12570 1057 mpsse.c:453 buffer_write(): 4 bits
Debug: 12571 1057 mpsse.c:563 mpsse_clock_tms_cs(): out 1 bits, tdi=1
Debug: 12572 1057 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12573 1057 mpsse.c:445 buffer_write_byte(): 00
Debug: 12574 1057 mpsse.c:445 buffer_write_byte(): 81
Debug: 12575 1057 ftdi.c:487 ftdi_execute_scan(): tap_set_state(IREXIT1)
Debug: 12576 1057 mpsse.c:563 mpsse_clock_tms_cs(): out 2 bits, tdi=1
Debug: 12577 1057 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12578 1057 mpsse.c:445 buffer_write_byte(): 01
Debug: 12579 1057 mpsse.c:445 buffer_write_byte(): 81
Debug: 12580 1057 ftdi.c:495 ftdi_execute_scan(): tap_set_state(IRUPDATE)
Debug: 12581 1057 ftdi.c:496 ftdi_execute_scan(): tap_set_state(RUN/IDLE)
Debug: 12582 1057 ftdi.c:519 ftdi_execute_scan(): IR scan, 5 bits, end in RUN/IDLE
Debug: 12583 1057 ftdi.c:424 ftdi_execute_scan(): DRSCAN type:3
Debug: 12584 1057 ftdi.c:254 move_to_state(): start=RUN/IDLE goal=DRSHIFT
Debug: 12585 1057 ftdi.c:258 move_to_state(): tap_set_state(DRSELECT)
Debug: 12586 1057 ftdi.c:258 move_to_state(): tap_set_state(DRCAPTURE)
Debug: 12587 1057 ftdi.c:258 move_to_state(): tap_set_state(DRSHIFT)
Debug: 12588 1057 mpsse.c:563 mpsse_clock_tms_cs(): out 3 bits, tdi=0
Debug: 12589 1057 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12590 1057 mpsse.c:445 buffer_write_byte(): 02
Debug: 12591 1057 mpsse.c:445 buffer_write_byte(): 01
Debug: 12592 1057 ftdi.c:454 ftdi_execute_scan(): inout field 0/1 32 bits
Debug: 12593 1057 mpsse.c:487 mpsse_clock_data(): inout 31 bits
Debug: 12594 1057 mpsse.c:445 buffer_write_byte(): 39
Debug: 12595 1057 mpsse.c:445 buffer_write_byte(): 02
Debug: 12596 1057 mpsse.c:445 buffer_write_byte(): 00
Debug: 12597 1057 mpsse.c:453 buffer_write(): 24 bits
Debug: 12598 1057 mpsse.c:463 buffer_add_read(): 24 bits, offset 0
Debug: 12599 1057 mpsse.c:445 buffer_write_byte(): 3b
Debug: 12600 1057 mpsse.c:445 buffer_write_byte(): 06
Debug: 12601 1057 mpsse.c:453 buffer_write(): 7 bits
Debug: 12602 1057 mpsse.c:463 buffer_add_read(): 7 bits, offset 1
Debug: 12603 1057 mpsse.c:563 mpsse_clock_tms_cs(): inout 1 bits, tdi=0
Debug: 12604 1057 mpsse.c:445 buffer_write_byte(): 6b
Debug: 12605 1057 mpsse.c:445 buffer_write_byte(): 00
Debug: 12606 1057 mpsse.c:445 buffer_write_byte(): 01
Debug: 12607 1057 mpsse.c:463 buffer_add_read(): 1 bits, offset 7
Debug: 12608 1057 ftdi.c:487 ftdi_execute_scan(): tap_set_state(DREXIT1)
Debug: 12609 1057 mpsse.c:563 mpsse_clock_tms_cs(): out 2 bits, tdi=0
Debug: 12610 1057 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12611 1057 mpsse.c:445 buffer_write_byte(): 01
Debug: 12612 1057 mpsse.c:445 buffer_write_byte(): 01
Debug: 12613 1057 ftdi.c:495 ftdi_execute_scan(): tap_set_state(DRUPDATE)
Debug: 12614 1057 ftdi.c:496 ftdi_execute_scan(): tap_set_state(RUN/IDLE)
Debug: 12615 1057 ftdi.c:519 ftdi_execute_scan(): DR scan, 32 bits, end in RUN/IDLE
Debug: 12616 1057 ftdi.c:424 ftdi_execute_scan(): IRSCAN type:2
Debug: 12617 1057 ftdi.c:254 move_to_state(): start=RUN/IDLE goal=IRSHIFT
Debug: 12618 1057 ftdi.c:258 move_to_state(): tap_set_state(DRSELECT)
Debug: 12619 1057 ftdi.c:258 move_to_state(): tap_set_state(IRSELECT)
Debug: 12620 1057 ftdi.c:258 move_to_state(): tap_set_state(IRCAPTURE)
Debug: 12621 1057 ftdi.c:258 move_to_state(): tap_set_state(IRSHIFT)
Debug: 12622 1057 mpsse.c:563 mpsse_clock_tms_cs(): out 4 bits, tdi=0
Debug: 12623 1057 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12624 1057 mpsse.c:445 buffer_write_byte(): 03
Debug: 12625 1057 mpsse.c:445 buffer_write_byte(): 03
Debug: 12626 1057 ftdi.c:454 ftdi_execute_scan(): out field 0/1 5 bits
Debug: 12627 1057 mpsse.c:487 mpsse_clock_data(): out 4 bits
Debug: 12628 1057 mpsse.c:445 buffer_write_byte(): 1b
Debug: 12629 1057 mpsse.c:445 buffer_write_byte(): 03
Debug: 12630 1057 mpsse.c:453 buffer_write(): 4 bits
Debug: 12631 1057 mpsse.c:563 mpsse_clock_tms_cs(): out 1 bits, tdi=1
Debug: 12632 1057 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12633 1057 mpsse.c:445 buffer_write_byte(): 00
Debug: 12634 1057 mpsse.c:445 buffer_write_byte(): 81
Debug: 12635 1057 ftdi.c:487 ftdi_execute_scan(): tap_set_state(IREXIT1)
Debug: 12636 1057 mpsse.c:563 mpsse_clock_tms_cs(): out 2 bits, tdi=1
Debug: 12637 1057 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12638 1057 mpsse.c:445 buffer_write_byte(): 01
Debug: 12639 1057 mpsse.c:445 buffer_write_byte(): 81
Debug: 12640 1057 ftdi.c:495 ftdi_execute_scan(): tap_set_state(IRUPDATE)
Debug: 12641 1057 ftdi.c:496 ftdi_execute_scan(): tap_set_state(RUN/IDLE)
Debug: 12642 1057 ftdi.c:519 ftdi_execute_scan(): IR scan, 5 bits, end in RUN/IDLE
Debug: 12643 1057 mpsse.c:630 mpsse_set_data_bits_high_byte(): -
Debug: 12644 1057 mpsse.c:445 buffer_write_byte(): 82
Debug: 12645 1057 mpsse.c:445 buffer_write_byte(): 01
Debug: 12646 1057 mpsse.c:445 buffer_write_byte(): 0b
Debug: 12647 1057 mpsse.c:844 mpsse_flush(): write 48+1, read 5
Debug: 12648 1057 mpsse.c:445 buffer_write_byte(): 87
Debug: 12649 1058 mpsse.c:819 write_cb(): transferred 49 of 49
Debug: 12650 1058 mpsse.c:821 write_cb():  82 09 0b 4b 03 03 1b 03 00 4b 00 81 4b 01 81 4b 02 01 39 02 00 00 00 01 3b 06 00 6b 00 01 4b 01
Debug: 12651 1058 mpsse.c:821 write_cb():  01 4b 03 03 1b 03 81 4b 00 81 4b 01 81 82 01 0b 87
Debug: 12652 1058 mpsse.c:781 read_cb():  32 60 ff ff ff ff ff
Debug: 12653 1058 mpsse.c:804 read_cb(): raw chunk 7, transferred 5 of 5
Debug: 12654 1058 core.c:960 default_interface_jtag_execute_queue(): JTAG IR SCAN to RUN/IDLE
Debug: 12655 1058 core.c:967 default_interface_jtag_execute_queue():   5b out: 10
Debug: 12656 1058 core.c:960 default_interface_jtag_execute_queue(): JTAG DR SCAN to RUN/IDLE
Debug: 12657 1058 core.c:967 default_interface_jtag_execute_queue():   32b out: 00010000
Debug: 12658 1058 core.c:972 default_interface_jtag_execute_queue():   32b  in: ffffffff
Debug: 12659 1058 core.c:960 default_interface_jtag_execute_queue(): JTAG IR SCAN to RUN/IDLE
Debug: 12660 1058 core.c:967 default_interface_jtag_execute_queue():   5b out: 11
Debug: 12661 1058 riscv-013.c:451 dtmcontrol_scan(): DTMCS: 0x10000 -> 0xffffffff
Debug: 12662 1058 mpsse.c:630 mpsse_set_data_bits_high_byte(): -
Debug: 12663 1058 mpsse.c:445 buffer_write_byte(): 82
Debug: 12664 1058 mpsse.c:445 buffer_write_byte(): 09
Debug: 12665 1058 mpsse.c:445 buffer_write_byte(): 0b
Debug: 12666 1058 ftdi.c:424 ftdi_execute_scan(): DRSCAN type:3
Debug: 12667 1058 ftdi.c:254 move_to_state(): start=RUN/IDLE goal=DRSHIFT
Debug: 12668 1058 ftdi.c:258 move_to_state(): tap_set_state(DRSELECT)
Debug: 12669 1058 ftdi.c:258 move_to_state(): tap_set_state(DRCAPTURE)
Debug: 12670 1058 ftdi.c:258 move_to_state(): tap_set_state(DRSHIFT)
Debug: 12671 1058 mpsse.c:563 mpsse_clock_tms_cs(): out 3 bits, tdi=0
Debug: 12672 1058 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12673 1058 mpsse.c:445 buffer_write_byte(): 02
Debug: 12674 1058 mpsse.c:445 buffer_write_byte(): 01
Debug: 12675 1058 ftdi.c:454 ftdi_execute_scan(): inout field 0/1 41 bits
Debug: 12676 1058 mpsse.c:487 mpsse_clock_data(): inout 40 bits
Debug: 12677 1058 mpsse.c:445 buffer_write_byte(): 39
Debug: 12678 1058 mpsse.c:445 buffer_write_byte(): 04
Debug: 12679 1058 mpsse.c:445 buffer_write_byte(): 00
Debug: 12680 1058 mpsse.c:453 buffer_write(): 40 bits
Debug: 12681 1058 mpsse.c:463 buffer_add_read(): 40 bits, offset 0
Debug: 12682 1058 mpsse.c:563 mpsse_clock_tms_cs(): inout 1 bits, tdi=0
Debug: 12683 1058 mpsse.c:445 buffer_write_byte(): 6b
Debug: 12684 1058 mpsse.c:445 buffer_write_byte(): 00
Debug: 12685 1058 mpsse.c:445 buffer_write_byte(): 01
Debug: 12686 1058 mpsse.c:463 buffer_add_read(): 1 bits, offset 7
Debug: 12687 1058 ftdi.c:487 ftdi_execute_scan(): tap_set_state(DREXIT1)
Debug: 12688 1058 mpsse.c:563 mpsse_clock_tms_cs(): out 2 bits, tdi=0
Debug: 12689 1058 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12690 1058 mpsse.c:445 buffer_write_byte(): 01
Debug: 12691 1058 mpsse.c:445 buffer_write_byte(): 01
Debug: 12692 1058 ftdi.c:495 ftdi_execute_scan(): tap_set_state(DRUPDATE)
Debug: 12693 1058 ftdi.c:496 ftdi_execute_scan(): tap_set_state(RUN/IDLE)
Debug: 12694 1058 ftdi.c:519 ftdi_execute_scan(): DR scan, 41 bits, end in RUN/IDLE
Debug: 12695 1058 ftdi.c:316 ftdi_execute_runtest(): runtest 3 cycles, end in RUN/IDLE
Debug: 12696 1058 mpsse.c:563 mpsse_clock_tms_cs(): out 3 bits, tdi=0
Debug: 12697 1058 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12698 1058 mpsse.c:445 buffer_write_byte(): 02
Debug: 12699 1058 mpsse.c:445 buffer_write_byte(): 00
Debug: 12700 1058 ftdi.c:337 ftdi_execute_runtest(): runtest: 3, end in RUN/IDLE
Debug: 12701 1058 mpsse.c:630 mpsse_set_data_bits_high_byte(): -
Debug: 12702 1058 mpsse.c:445 buffer_write_byte(): 82
Debug: 12703 1058 mpsse.c:445 buffer_write_byte(): 01
Debug: 12704 1058 mpsse.c:445 buffer_write_byte(): 0b
Debug: 12705 1058 mpsse.c:844 mpsse_flush(): write 26+1, read 6
Debug: 12706 1058 mpsse.c:445 buffer_write_byte(): 87
Debug: 12707 1058 mpsse.c:819 write_cb(): transferred 27 of 27
Debug: 12708 1058 mpsse.c:821 write_cb():  82 09 0b 4b 02 01 39 04 00 01 00 00 00 58 6b 00 01 4b 01 01 4b 02 00 82 01 0b 87
Debug: 12709 1058 mpsse.c:781 read_cb():  32 60 ff ff ff ff ff ff
Debug: 12710 1058 mpsse.c:804 read_cb(): raw chunk 8, transferred 6 of 6
Debug: 12711 1058 core.c:960 default_interface_jtag_execute_queue(): JTAG DR SCAN to RUN/IDLE
Debug: 12712 1058 core.c:967 default_interface_jtag_execute_queue():   41b out: 005800000001
Debug: 12713 1058 core.c:972 default_interface_jtag_execute_queue():   41b  in: 01ffffffffff
Debug: 12714 1058 core.c:982 default_interface_jtag_execute_queue(): JTAG RUNTEST 3 cycles to RUN/IDLE
Debug: 12715 1058 riscv-013.c:397 scan(): 41b r 00000000 @16 -> b ffffffff @7f; 3i
Debug: 12716 1058 riscv-013.c:460 increase_dmi_busy_delay(): dtmcs_idle=1, dmi_busy_delay=4, ac_busy_delay=0
Debug: 12717 1058 mpsse.c:630 mpsse_set_data_bits_high_byte(): -
Debug: 12718 1058 mpsse.c:445 buffer_write_byte(): 82
Debug: 12719 1058 mpsse.c:445 buffer_write_byte(): 09
Debug: 12720 1058 mpsse.c:445 buffer_write_byte(): 0b
Debug: 12721 1058 ftdi.c:424 ftdi_execute_scan(): IRSCAN type:2
Debug: 12722 1058 ftdi.c:254 move_to_state(): start=RUN/IDLE goal=IRSHIFT
Debug: 12723 1058 ftdi.c:258 move_to_state(): tap_set_state(DRSELECT)
Debug: 12724 1058 ftdi.c:258 move_to_state(): tap_set_state(IRSELECT)
Debug: 12725 1058 ftdi.c:258 move_to_state(): tap_set_state(IRCAPTURE)
Debug: 12726 1058 ftdi.c:258 move_to_state(): tap_set_state(IRSHIFT)
Debug: 12727 1058 mpsse.c:563 mpsse_clock_tms_cs(): out 4 bits, tdi=0
Debug: 12728 1058 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12729 1058 mpsse.c:445 buffer_write_byte(): 03
Debug: 12730 1058 mpsse.c:445 buffer_write_byte(): 03
Debug: 12731 1058 ftdi.c:454 ftdi_execute_scan(): out field 0/1 5 bits
Debug: 12732 1058 mpsse.c:487 mpsse_clock_data(): out 4 bits
Debug: 12733 1058 mpsse.c:445 buffer_write_byte(): 1b
Debug: 12734 1058 mpsse.c:445 buffer_write_byte(): 03
Debug: 12735 1058 mpsse.c:453 buffer_write(): 4 bits
Debug: 12736 1058 mpsse.c:563 mpsse_clock_tms_cs(): out 1 bits, tdi=1
Debug: 12737 1058 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12738 1058 mpsse.c:445 buffer_write_byte(): 00
Debug: 12739 1058 mpsse.c:445 buffer_write_byte(): 81
Debug: 12740 1058 ftdi.c:487 ftdi_execute_scan(): tap_set_state(IREXIT1)
Debug: 12741 1058 mpsse.c:563 mpsse_clock_tms_cs(): out 2 bits, tdi=1
Debug: 12742 1058 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12743 1058 mpsse.c:445 buffer_write_byte(): 01
Debug: 12744 1058 mpsse.c:445 buffer_write_byte(): 81
Debug: 12745 1058 ftdi.c:495 ftdi_execute_scan(): tap_set_state(IRUPDATE)
Debug: 12746 1058 ftdi.c:496 ftdi_execute_scan(): tap_set_state(RUN/IDLE)
Debug: 12747 1058 ftdi.c:519 ftdi_execute_scan(): IR scan, 5 bits, end in RUN/IDLE
Debug: 12748 1058 ftdi.c:424 ftdi_execute_scan(): DRSCAN type:3
Debug: 12749 1058 ftdi.c:254 move_to_state(): start=RUN/IDLE goal=DRSHIFT
Debug: 12750 1058 ftdi.c:258 move_to_state(): tap_set_state(DRSELECT)
Debug: 12751 1058 ftdi.c:258 move_to_state(): tap_set_state(DRCAPTURE)
Debug: 12752 1058 ftdi.c:258 move_to_state(): tap_set_state(DRSHIFT)
Debug: 12753 1058 mpsse.c:563 mpsse_clock_tms_cs(): out 3 bits, tdi=0
Debug: 12754 1058 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12755 1058 mpsse.c:445 buffer_write_byte(): 02
Debug: 12756 1058 mpsse.c:445 buffer_write_byte(): 01
Debug: 12757 1058 ftdi.c:454 ftdi_execute_scan(): inout field 0/1 32 bits
Debug: 12758 1058 mpsse.c:487 mpsse_clock_data(): inout 31 bits
Debug: 12759 1058 mpsse.c:445 buffer_write_byte(): 39
Debug: 12760 1058 mpsse.c:445 buffer_write_byte(): 02
Debug: 12761 1058 mpsse.c:445 buffer_write_byte(): 00
Debug: 12762 1058 mpsse.c:453 buffer_write(): 24 bits
Debug: 12763 1058 mpsse.c:463 buffer_add_read(): 24 bits, offset 0
Debug: 12764 1058 mpsse.c:445 buffer_write_byte(): 3b
Debug: 12765 1058 mpsse.c:445 buffer_write_byte(): 06
Debug: 12766 1058 mpsse.c:453 buffer_write(): 7 bits
Debug: 12767 1058 mpsse.c:463 buffer_add_read(): 7 bits, offset 1
Debug: 12768 1058 mpsse.c:563 mpsse_clock_tms_cs(): inout 1 bits, tdi=0
Debug: 12769 1058 mpsse.c:445 buffer_write_byte(): 6b
Debug: 12770 1058 mpsse.c:445 buffer_write_byte(): 00
Debug: 12771 1058 mpsse.c:445 buffer_write_byte(): 01
Debug: 12772 1058 mpsse.c:463 buffer_add_read(): 1 bits, offset 7
Debug: 12773 1058 ftdi.c:487 ftdi_execute_scan(): tap_set_state(DREXIT1)
Debug: 12774 1058 mpsse.c:563 mpsse_clock_tms_cs(): out 2 bits, tdi=0
Debug: 12775 1058 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12776 1058 mpsse.c:445 buffer_write_byte(): 01
Debug: 12777 1058 mpsse.c:445 buffer_write_byte(): 01
Debug: 12778 1058 ftdi.c:495 ftdi_execute_scan(): tap_set_state(DRUPDATE)
Debug: 12779 1058 ftdi.c:496 ftdi_execute_scan(): tap_set_state(RUN/IDLE)
Debug: 12780 1058 ftdi.c:519 ftdi_execute_scan(): DR scan, 32 bits, end in RUN/IDLE
Debug: 12781 1058 ftdi.c:424 ftdi_execute_scan(): IRSCAN type:2
Debug: 12782 1058 ftdi.c:254 move_to_state(): start=RUN/IDLE goal=IRSHIFT
Debug: 12783 1058 ftdi.c:258 move_to_state(): tap_set_state(DRSELECT)
Debug: 12784 1058 ftdi.c:258 move_to_state(): tap_set_state(IRSELECT)
Debug: 12785 1058 ftdi.c:258 move_to_state(): tap_set_state(IRCAPTURE)
Debug: 12786 1058 ftdi.c:258 move_to_state(): tap_set_state(IRSHIFT)
Debug: 12787 1058 mpsse.c:563 mpsse_clock_tms_cs(): out 4 bits, tdi=0
Debug: 12788 1058 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12789 1058 mpsse.c:445 buffer_write_byte(): 03
Debug: 12790 1058 mpsse.c:445 buffer_write_byte(): 03
Debug: 12791 1058 ftdi.c:454 ftdi_execute_scan(): out field 0/1 5 bits
Debug: 12792 1058 mpsse.c:487 mpsse_clock_data(): out 4 bits
Debug: 12793 1058 mpsse.c:445 buffer_write_byte(): 1b
Debug: 12794 1058 mpsse.c:445 buffer_write_byte(): 03
Debug: 12795 1058 mpsse.c:453 buffer_write(): 4 bits
Debug: 12796 1058 mpsse.c:563 mpsse_clock_tms_cs(): out 1 bits, tdi=1
Debug: 12797 1058 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12798 1058 mpsse.c:445 buffer_write_byte(): 00
Debug: 12799 1058 mpsse.c:445 buffer_write_byte(): 81
Debug: 12800 1058 ftdi.c:487 ftdi_execute_scan(): tap_set_state(IREXIT1)
Debug: 12801 1058 mpsse.c:563 mpsse_clock_tms_cs(): out 2 bits, tdi=1
Debug: 12802 1058 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12803 1058 mpsse.c:445 buffer_write_byte(): 01
Debug: 12804 1058 mpsse.c:445 buffer_write_byte(): 81
Debug: 12805 1058 ftdi.c:495 ftdi_execute_scan(): tap_set_state(IRUPDATE)
Debug: 12806 1058 ftdi.c:496 ftdi_execute_scan(): tap_set_state(RUN/IDLE)
Debug: 12807 1058 ftdi.c:519 ftdi_execute_scan(): IR scan, 5 bits, end in RUN/IDLE
Debug: 12808 1058 mpsse.c:630 mpsse_set_data_bits_high_byte(): -
Debug: 12809 1058 mpsse.c:445 buffer_write_byte(): 82
Debug: 12810 1058 mpsse.c:445 buffer_write_byte(): 01
Debug: 12811 1058 mpsse.c:445 buffer_write_byte(): 0b
Debug: 12812 1058 mpsse.c:844 mpsse_flush(): write 48+1, read 5
Debug: 12813 1058 mpsse.c:445 buffer_write_byte(): 87
Debug: 12814 1058 mpsse.c:819 write_cb(): transferred 49 of 49
Debug: 12815 1058 mpsse.c:821 write_cb():  82 09 0b 4b 03 03 1b 03 00 4b 00 81 4b 01 81 4b 02 01 39 02 00 00 00 01 3b 06 80 6b 00 01 4b 01
Debug: 12816 1058 mpsse.c:821 write_cb():  01 4b 03 03 1b 03 81 4b 00 81 4b 01 81 82 01 0b 87
Debug: 12817 1059 mpsse.c:781 read_cb():  32 60 ff ff ff ff ff
Debug: 12818 1059 mpsse.c:804 read_cb(): raw chunk 7, transferred 5 of 5
Debug: 12819 1059 core.c:960 default_interface_jtag_execute_queue(): JTAG IR SCAN to RUN/IDLE
Debug: 12820 1059 core.c:967 default_interface_jtag_execute_queue():   5b out: 10
Debug: 12821 1059 core.c:960 default_interface_jtag_execute_queue(): JTAG DR SCAN to RUN/IDLE
Debug: 12822 1059 core.c:967 default_interface_jtag_execute_queue():   32b out: 00010000
Debug: 12823 1059 core.c:972 default_interface_jtag_execute_queue():   32b  in: ffffffff
Debug: 12824 1059 core.c:960 default_interface_jtag_execute_queue(): JTAG IR SCAN to RUN/IDLE
Debug: 12825 1059 core.c:967 default_interface_jtag_execute_queue():   5b out: 11
Debug: 12826 1059 riscv-013.c:451 dtmcontrol_scan(): DTMCS: 0x10000 -> 0xffffffff
Debug: 12827 1059 mpsse.c:630 mpsse_set_data_bits_high_byte(): -
Debug: 12828 1059 mpsse.c:445 buffer_write_byte(): 82
Debug: 12829 1059 mpsse.c:445 buffer_write_byte(): 09
Debug: 12830 1059 mpsse.c:445 buffer_write_byte(): 0b
Debug: 12831 1059 ftdi.c:424 ftdi_execute_scan(): DRSCAN type:3
Debug: 12832 1059 ftdi.c:254 move_to_state(): start=RUN/IDLE goal=DRSHIFT
Debug: 12833 1059 ftdi.c:258 move_to_state(): tap_set_state(DRSELECT)
Debug: 12834 1059 ftdi.c:258 move_to_state(): tap_set_state(DRCAPTURE)
Debug: 12835 1059 ftdi.c:258 move_to_state(): tap_set_state(DRSHIFT)
Debug: 12836 1059 mpsse.c:563 mpsse_clock_tms_cs(): out 3 bits, tdi=0
Debug: 12837 1059 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12838 1059 mpsse.c:445 buffer_write_byte(): 02
Debug: 12839 1059 mpsse.c:445 buffer_write_byte(): 01
Debug: 12840 1059 ftdi.c:454 ftdi_execute_scan(): inout field 0/1 41 bits
Debug: 12841 1059 mpsse.c:487 mpsse_clock_data(): inout 40 bits
Debug: 12842 1059 mpsse.c:445 buffer_write_byte(): 39
Debug: 12843 1059 mpsse.c:445 buffer_write_byte(): 04
Debug: 12844 1059 mpsse.c:445 buffer_write_byte(): 00
Debug: 12845 1059 mpsse.c:453 buffer_write(): 40 bits
Debug: 12846 1059 mpsse.c:463 buffer_add_read(): 40 bits, offset 0
Debug: 12847 1059 mpsse.c:563 mpsse_clock_tms_cs(): inout 1 bits, tdi=0
Debug: 12848 1059 mpsse.c:445 buffer_write_byte(): 6b
Debug: 12849 1059 mpsse.c:445 buffer_write_byte(): 00
Debug: 12850 1059 mpsse.c:445 buffer_write_byte(): 01
Debug: 12851 1059 mpsse.c:463 buffer_add_read(): 1 bits, offset 7
Debug: 12852 1059 ftdi.c:487 ftdi_execute_scan(): tap_set_state(DREXIT1)
Debug: 12853 1059 mpsse.c:563 mpsse_clock_tms_cs(): out 2 bits, tdi=0
Debug: 12854 1059 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12855 1059 mpsse.c:445 buffer_write_byte(): 01
Debug: 12856 1059 mpsse.c:445 buffer_write_byte(): 01
Debug: 12857 1059 ftdi.c:495 ftdi_execute_scan(): tap_set_state(DRUPDATE)
Debug: 12858 1059 ftdi.c:496 ftdi_execute_scan(): tap_set_state(RUN/IDLE)
Debug: 12859 1059 ftdi.c:519 ftdi_execute_scan(): DR scan, 41 bits, end in RUN/IDLE
Debug: 12860 1059 ftdi.c:316 ftdi_execute_runtest(): runtest 4 cycles, end in RUN/IDLE
Debug: 12861 1059 mpsse.c:563 mpsse_clock_tms_cs(): out 4 bits, tdi=0
Debug: 12862 1059 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12863 1059 mpsse.c:445 buffer_write_byte(): 03
Debug: 12864 1059 mpsse.c:445 buffer_write_byte(): 00
Debug: 12865 1059 ftdi.c:337 ftdi_execute_runtest(): runtest: 4, end in RUN/IDLE
Debug: 12866 1059 mpsse.c:630 mpsse_set_data_bits_high_byte(): -
Debug: 12867 1059 mpsse.c:445 buffer_write_byte(): 82
Debug: 12868 1059 mpsse.c:445 buffer_write_byte(): 01
Debug: 12869 1059 mpsse.c:445 buffer_write_byte(): 0b
Debug: 12870 1059 mpsse.c:844 mpsse_flush(): write 26+1, read 6
Debug: 12871 1059 mpsse.c:445 buffer_write_byte(): 87
Debug: 12872 1059 mpsse.c:819 write_cb(): transferred 27 of 27
Debug: 12873 1059 mpsse.c:821 write_cb():  82 09 0b 4b 02 01 39 04 00 01 00 00 00 58 6b 00 01 4b 01 01 4b 03 00 82 01 0b 87
Debug: 12874 1059 mpsse.c:781 read_cb():  32 60 4d 48 f5 04 01 00
Debug: 12875 1059 mpsse.c:804 read_cb(): raw chunk 8, transferred 6 of 6
Debug: 12876 1059 core.c:960 default_interface_jtag_execute_queue(): JTAG DR SCAN to RUN/IDLE
Debug: 12877 1059 core.c:967 default_interface_jtag_execute_queue():   41b out: 005800000001
Debug: 12878 1059 core.c:972 default_interface_jtag_execute_queue():   41b  in: 000104f5484d
Debug: 12879 1059 core.c:982 default_interface_jtag_execute_queue(): JTAG RUNTEST 4 cycles to RUN/IDLE
Debug: 12880 1059 riscv-013.c:397 scan(): 41b r 00000000 @16 -> ? 413d5213 @00; 4i
Error: 12881 1059 riscv-013.c:606 dmi_op_timeout(): failed read at 0x16, status=1
Debug: 12882 1059 mpsse.c:630 mpsse_set_data_bits_high_byte(): -
Debug: 12883 1059 mpsse.c:445 buffer_write_byte(): 82
Debug: 12884 1059 mpsse.c:445 buffer_write_byte(): 09
Debug: 12885 1059 mpsse.c:445 buffer_write_byte(): 0b
Debug: 12886 1059 ftdi.c:424 ftdi_execute_scan(): IRSCAN type:2
Debug: 12887 1059 ftdi.c:254 move_to_state(): start=RUN/IDLE goal=IRSHIFT
Debug: 12888 1059 ftdi.c:258 move_to_state(): tap_set_state(DRSELECT)
Debug: 12889 1059 ftdi.c:258 move_to_state(): tap_set_state(IRSELECT)
Debug: 12890 1059 ftdi.c:258 move_to_state(): tap_set_state(IRCAPTURE)
Debug: 12891 1059 ftdi.c:258 move_to_state(): tap_set_state(IRSHIFT)
Debug: 12892 1059 mpsse.c:563 mpsse_clock_tms_cs(): out 4 bits, tdi=0
Debug: 12893 1059 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12894 1059 mpsse.c:445 buffer_write_byte(): 03
Debug: 12895 1059 mpsse.c:445 buffer_write_byte(): 03
Debug: 12896 1059 ftdi.c:454 ftdi_execute_scan(): out field 0/1 5 bits
Debug: 12897 1059 mpsse.c:487 mpsse_clock_data(): out 4 bits
Debug: 12898 1059 mpsse.c:445 buffer_write_byte(): 1b
Debug: 12899 1059 mpsse.c:445 buffer_write_byte(): 03
Debug: 12900 1059 mpsse.c:453 buffer_write(): 4 bits
Debug: 12901 1059 mpsse.c:563 mpsse_clock_tms_cs(): out 1 bits, tdi=1
Debug: 12902 1059 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12903 1059 mpsse.c:445 buffer_write_byte(): 00
Debug: 12904 1059 mpsse.c:445 buffer_write_byte(): 81
Debug: 12905 1059 ftdi.c:487 ftdi_execute_scan(): tap_set_state(IREXIT1)
Debug: 12906 1059 mpsse.c:563 mpsse_clock_tms_cs(): out 2 bits, tdi=1
Debug: 12907 1059 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12908 1059 mpsse.c:445 buffer_write_byte(): 01
Debug: 12909 1059 mpsse.c:445 buffer_write_byte(): 81
Debug: 12910 1059 ftdi.c:495 ftdi_execute_scan(): tap_set_state(IRUPDATE)
Debug: 12911 1059 ftdi.c:496 ftdi_execute_scan(): tap_set_state(RUN/IDLE)
Debug: 12912 1059 ftdi.c:519 ftdi_execute_scan(): IR scan, 5 bits, end in RUN/IDLE
Debug: 12913 1059 ftdi.c:424 ftdi_execute_scan(): DRSCAN type:3
Debug: 12914 1059 ftdi.c:254 move_to_state(): start=RUN/IDLE goal=DRSHIFT
Debug: 12915 1059 ftdi.c:258 move_to_state(): tap_set_state(DRSELECT)
Debug: 12916 1059 ftdi.c:258 move_to_state(): tap_set_state(DRCAPTURE)
Debug: 12917 1059 ftdi.c:258 move_to_state(): tap_set_state(DRSHIFT)
Debug: 12918 1059 mpsse.c:563 mpsse_clock_tms_cs(): out 3 bits, tdi=0
Debug: 12919 1059 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12920 1059 mpsse.c:445 buffer_write_byte(): 02
Debug: 12921 1059 mpsse.c:445 buffer_write_byte(): 01
Debug: 12922 1059 ftdi.c:454 ftdi_execute_scan(): inout field 0/1 32 bits
Debug: 12923 1059 mpsse.c:487 mpsse_clock_data(): inout 31 bits
Debug: 12924 1059 mpsse.c:445 buffer_write_byte(): 39
Debug: 12925 1059 mpsse.c:445 buffer_write_byte(): 02
Debug: 12926 1059 mpsse.c:445 buffer_write_byte(): 00
Debug: 12927 1059 mpsse.c:453 buffer_write(): 24 bits
Debug: 12928 1059 mpsse.c:463 buffer_add_read(): 24 bits, offset 0
Debug: 12929 1059 mpsse.c:445 buffer_write_byte(): 3b
Debug: 12930 1059 mpsse.c:445 buffer_write_byte(): 06
Debug: 12931 1059 mpsse.c:453 buffer_write(): 7 bits
Debug: 12932 1059 mpsse.c:463 buffer_add_read(): 7 bits, offset 1
Debug: 12933 1059 mpsse.c:563 mpsse_clock_tms_cs(): inout 1 bits, tdi=0
Debug: 12934 1059 mpsse.c:445 buffer_write_byte(): 6b
Debug: 12935 1059 mpsse.c:445 buffer_write_byte(): 00
Debug: 12936 1059 mpsse.c:445 buffer_write_byte(): 01
Debug: 12937 1059 mpsse.c:463 buffer_add_read(): 1 bits, offset 7
Debug: 12938 1059 ftdi.c:487 ftdi_execute_scan(): tap_set_state(DREXIT1)
Debug: 12939 1059 mpsse.c:563 mpsse_clock_tms_cs(): out 2 bits, tdi=0
Debug: 12940 1059 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12941 1059 mpsse.c:445 buffer_write_byte(): 01
Debug: 12942 1059 mpsse.c:445 buffer_write_byte(): 01
Debug: 12943 1059 ftdi.c:495 ftdi_execute_scan(): tap_set_state(DRUPDATE)
Debug: 12944 1059 ftdi.c:496 ftdi_execute_scan(): tap_set_state(RUN/IDLE)
Debug: 12945 1059 ftdi.c:519 ftdi_execute_scan(): DR scan, 32 bits, end in RUN/IDLE
Debug: 12946 1059 ftdi.c:424 ftdi_execute_scan(): IRSCAN type:2
Debug: 12947 1059 ftdi.c:254 move_to_state(): start=RUN/IDLE goal=IRSHIFT
Debug: 12948 1059 ftdi.c:258 move_to_state(): tap_set_state(DRSELECT)
Debug: 12949 1059 ftdi.c:258 move_to_state(): tap_set_state(IRSELECT)
Debug: 12950 1059 ftdi.c:258 move_to_state(): tap_set_state(IRCAPTURE)
Debug: 12951 1059 ftdi.c:258 move_to_state(): tap_set_state(IRSHIFT)
Debug: 12952 1059 mpsse.c:563 mpsse_clock_tms_cs(): out 4 bits, tdi=0
Debug: 12953 1059 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12954 1059 mpsse.c:445 buffer_write_byte(): 03
Debug: 12955 1059 mpsse.c:445 buffer_write_byte(): 03
Debug: 12956 1059 ftdi.c:454 ftdi_execute_scan(): out field 0/1 5 bits
Debug: 12957 1059 mpsse.c:487 mpsse_clock_data(): out 4 bits
Debug: 12958 1059 mpsse.c:445 buffer_write_byte(): 1b
Debug: 12959 1059 mpsse.c:445 buffer_write_byte(): 03
Debug: 12960 1059 mpsse.c:453 buffer_write(): 4 bits
Debug: 12961 1059 mpsse.c:563 mpsse_clock_tms_cs(): out 1 bits, tdi=1
Debug: 12962 1059 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12963 1059 mpsse.c:445 buffer_write_byte(): 00
Debug: 12964 1059 mpsse.c:445 buffer_write_byte(): 81
Debug: 12965 1059 ftdi.c:487 ftdi_execute_scan(): tap_set_state(IREXIT1)
Debug: 12966 1059 mpsse.c:563 mpsse_clock_tms_cs(): out 2 bits, tdi=1
Debug: 12967 1059 mpsse.c:445 buffer_write_byte(): 4b
Debug: 12968 1059 mpsse.c:445 buffer_write_byte(): 01
Debug: 12969 1059 mpsse.c:445 buffer_write_byte(): 81
Debug: 12970 1059 ftdi.c:495 ftdi_execute_scan(): tap_set_state(IRUPDATE)
Debug: 12971 1059 ftdi.c:496 ftdi_execute_scan(): tap_set_state(RUN/IDLE)
Debug: 12972 1059 ftdi.c:519 ftdi_execute_scan(): IR scan, 5 bits, end in RUN/IDLE
Debug: 12973 1059 mpsse.c:630 mpsse_set_data_bits_high_byte(): -
Debug: 12974 1059 mpsse.c:445 buffer_write_byte(): 82
Debug: 12975 1059 mpsse.c:445 buffer_write_byte(): 01
Debug: 12976 1059 mpsse.c:445 buffer_write_byte(): 0b
Debug: 12977 1059 mpsse.c:844 mpsse_flush(): write 48+1, read 5
Debug: 12978 1059 mpsse.c:445 buffer_write_byte(): 87
Debug: 12979 1059 mpsse.c:819 write_cb(): transferred 49 of 49
Debug: 12980 1059 mpsse.c:821 write_cb():  82 09 0b 4b 03 03 1b 03 00 4b 00 81 4b 01 81 4b 02 01 39 02 00 00 00 01 3b 06 80 6b 00 01 4b 01
Debug: 12981 1059 mpsse.c:821 write_cb():  01 4b 03 03 1b 03 81 4b 00 81 4b 01 81 82 01 0b 87
Debug: 12982 1060 mpsse.c:781 read_cb():  32 60 71 10 00 00 00
Debug: 12983 1060 mpsse.c:804 read_cb(): raw chunk 7, transferred 5 of 5
Debug: 12984 1060 core.c:960 default_interface_jtag_execute_queue(): JTAG IR SCAN to RUN/IDLE
Debug: 12985 1060 core.c:967 default_interface_jtag_execute_queue():   5b out: 10
Debug: 12986 1060 core.c:960 default_interface_jtag_execute_queue(): JTAG DR SCAN to RUN/IDLE
Debug: 12987 1060 core.c:967 default_interface_jtag_execute_queue():   32b out: 00010000
Debug: 12988 1060 core.c:972 default_interface_jtag_execute_queue():   32b  in: 00001071
Debug: 12989 1060 core.c:960 default_interface_jtag_execute_queue(): JTAG IR SCAN to RUN/IDLE
Debug: 12990 1060 core.c:967 default_interface_jtag_execute_queue():   5b out: 11
Debug: 12991 1060 riscv-013.c:451 dtmcontrol_scan(): DTMCS: 0x10000 -> 0x1071
Debug: 12992 1060 riscv-013.c:806 execute_abstract_command(): command 0x22100e failed; abstractcs=0x0
Debug: 12993 1060 mpsse.c:630 mpsse_set_data_bits_high_byte(): -
Debug: 12994 1060 mpsse.c:445 buffer_write_byte(): 82
Debug: 12995 1060 mpsse.c:445 buffer_write_byte(): 09
Debug: 12996 1060 mpsse.c:445 buffer_write_byte(): 0b
Debug: 12997 1060 ftdi.c:424 ftdi_execute_scan(): IRSCAN type:2
Debug: 12998 1060 ftdi.c:254 move_to_state(): start=RUN/IDLE goal=IRSHIFT
Debug: 12999 1060 ftdi.c:258 move_to_state(): tap_set_state(DRSELECT)
Debug: 13000 1060 ftdi.c:258 move_to_state(): tap_set_state(IRSELECT)
Debug: 13001 1060 ftdi.c:258 move_to_state(): tap_set_state(IRCAPTURE)
Debug: 13002 1060 ftdi.c:258 move_to_state(): tap_set_state(IRSHIFT)
Debug: 13003 1060 mpsse.c:563 mpsse_clock_tms_cs(): out 4 bits, tdi=0
Debug: 13004 1060 mpsse.c:445 buffer_write_byte(): 4b
Debug: 13005 1060 mpsse.c:445 buffer_write_byte(): 03
Debug: 13006 1060 mpsse.c:445 buffer_write_byte(): 03
Debug: 13007 1060 ftdi.c:454 ftdi_execute_scan(): out field 0/1 5 bits
Debug: 13008 1060 mpsse.c:487 mpsse_clock_data(): out 4 bits
Debug: 13009 1060 mpsse.c:445 buffer_write_byte(): 1b
Debug: 13010 1060 mpsse.c:445 buffer_write_byte(): 03
Debug: 13011 1060 mpsse.c:453 buffer_write(): 4 bits
Debug: 13012 1060 mpsse.c:563 mpsse_clock_tms_cs(): out 1 bits, tdi=1
Debug: 13013 1060 mpsse.c:445 buffer_write_byte(): 4b
Debug: 13014 1060 mpsse.c:445 buffer_write_byte(): 00
Debug: 13015 1060 mpsse.c:445 buffer_write_byte(): 81
Debug: 13016 1060 ftdi.c:487 ftdi_execute_scan(): tap_set_state(IREXIT1)
Debug: 13017 1060 mpsse.c:563 mpsse_clock_tms_cs(): out 2 bits, tdi=1
Debug: 13018 1060 mpsse.c:445 buffer_write_byte(): 4b
Debug: 13019 1060 mpsse.c:445 buffer_write_byte(): 01
Debug: 13020 1060 mpsse.c:445 buffer_write_byte(): 81
Debug: 13021 1060 ftdi.c:495 ftdi_execute_scan(): tap_set_state(IRUPDATE)
Debug: 13022 1060 ftdi.c:496 ftdi_execute_scan(): tap_set_state(RUN/IDLE)
Debug: 13023 1060 ftdi.c:519 ftdi_execute_scan(): IR scan, 5 bits, end in RUN/IDLE
Debug: 13024 1060 ftdi.c:424 ftdi_execute_scan(): DRSCAN type:3
Debug: 13025 1060 ftdi.c:254 move_to_state(): start=RUN/IDLE goal=DRSHIFT
Debug: 13026 1060 ftdi.c:258 move_to_state(): tap_set_state(DRSELECT)
Debug: 13027 1060 ftdi.c:258 move_to_state(): tap_set_state(DRCAPTURE)
Debug: 13028 1060 ftdi.c:258 move_to_state(): tap_set_state(DRSHIFT)
Debug: 13029 1060 mpsse.c:563 mpsse_clock_tms_cs(): out 3 bits, tdi=0
Debug: 13030 1060 mpsse.c:445 buffer_write_byte(): 4b
Debug: 13031 1060 mpsse.c:445 buffer_write_byte(): 02
Debug: 13032 1060 mpsse.c:445 buffer_write_byte(): 01
Debug: 13033 1060 ftdi.c:454 ftdi_execute_scan(): inout field 0/1 41 bits
Debug: 13034 1060 mpsse.c:487 mpsse_clock_data(): inout 40 bits
Debug: 13035 1060 mpsse.c:445 buffer_write_byte(): 39
Debug: 13036 1060 mpsse.c:445 buffer_write_byte(): 04
Debug: 13037 1060 mpsse.c:445 buffer_write_byte(): 00
Debug: 13038 1060 mpsse.c:453 buffer_write(): 40 bits
Debug: 13039 1060 mpsse.c:463 buffer_add_read(): 40 bits, offset 0
Debug: 13040 1060 mpsse.c:563 mpsse_clock_tms_cs(): inout 1 bits, tdi=0
Debug: 13041 1060 mpsse.c:445 buffer_write_byte(): 6b
Debug: 13042 1060 mpsse.c:445 buffer_write_byte(): 00
Debug: 13043 1060 mpsse.c:445 buffer_write_byte(): 01
Debug: 13044 1060 mpsse.c:463 buffer_add_read(): 1 bits, offset 7
Debug: 13045 1060 ftdi.c:487 ftdi_execute_scan(): tap_set_state(DREXIT1)
Debug: 13046 1060 mpsse.c:563 mpsse_clock_tms_cs(): out 2 bits, tdi=0
Debug: 13047 1060 mpsse.c:445 buffer_write_byte(): 4b
Debug: 13048 1060 mpsse.c:445 buffer_write_byte(): 01
Debug: 13049 1060 mpsse.c:445 buffer_write_byte(): 01
Debug: 13050 1060 ftdi.c:495 ftdi_execute_scan(): tap_set_state(DRUPDATE)
Debug: 13051 1060 ftdi.c:496 ftdi_execute_scan(): tap_set_state(RUN/IDLE)
Debug: 13052 1060 ftdi.c:519 ftdi_execute_scan(): DR scan, 41 bits, end in RUN/IDLE
Debug: 13053 1060 ftdi.c:316 ftdi_execute_runtest(): runtest 4 cycles, end in RUN/IDLE
Debug: 13054 1060 mpsse.c:563 mpsse_clock_tms_cs(): out 4 bits, tdi=0
Debug: 13055 1060 mpsse.c:445 buffer_write_byte(): 4b
Debug: 13056 1060 mpsse.c:445 buffer_write_byte(): 03
Debug: 13057 1060 mpsse.c:445 buffer_write_byte(): 00
Debug: 13058 1060 ftdi.c:337 ftdi_execute_runtest(): runtest: 4, end in RUN/IDLE
Debug: 13059 1060 mpsse.c:630 mpsse_set_data_bits_high_byte(): -
Debug: 13060 1060 mpsse.c:445 buffer_write_byte(): 82
Debug: 13061 1060 mpsse.c:445 buffer_write_byte(): 01
Debug: 13062 1060 mpsse.c:445 buffer_write_byte(): 0b
Debug: 13063 1060 mpsse.c:844 mpsse_flush(): write 38+1, read 6
Debug: 13064 1060 mpsse.c:445 buffer_write_byte(): 87
Debug: 13065 1060 mpsse.c:819 write_cb(): transferred 39 of 39
Debug: 13066 1060 mpsse.c:821 write_cb():  82 09 0b 4b 03 03 1b 03 01 4b 00 81 4b 01 81 4b 02 01 39 04 00 02 1c 00 00 58 6b 00 01 4b 01 01
Debug: 13067 1060 mpsse.c:821 write_cb():  4b 03 00 82 01 0b 87
Debug: 13068 1060 mpsse.c:781 read_cb():  32 60 00 00 00 00 00 00
Debug: 13069 1060 mpsse.c:804 read_cb(): raw chunk 8, transferred 6 of 6
Debug: 13070 1060 core.c:960 default_interface_jtag_execute_queue(): JTAG IR SCAN to RUN/IDLE
Debug: 13071 1060 core.c:967 default_interface_jtag_execute_queue():   5b out: 11
Debug: 13072 1060 core.c:960 default_interface_jtag_execute_queue(): JTAG DR SCAN to RUN/IDLE
Debug: 13073 1060 core.c:967 default_interface_jtag_execute_queue():   41b out: 005800001c02
Debug: 13074 1060 core.c:972 default_interface_jtag_execute_queue():   41b  in: 000000000000
Debug: 13075 1060 core.c:982 default_interface_jtag_execute_queue(): JTAG RUNTEST 4 cycles to RUN/IDLE
Debug: 13076 1060 riscv-013.c:397 scan(): 41b w 00000700 @16 -> + 00000000 @00; 4i
Debug: 13077 1060 riscv-013.c:407 scan():  cmderr=7 -> 
Debug: 13078 1060 mpsse.c:630 mpsse_set_data_bits_high_byte(): -
Debug: 13079 1060 mpsse.c:445 buffer_write_byte(): 82
Debug: 13080 1060 mpsse.c:445 buffer_write_byte(): 09
Debug: 13081 1060 mpsse.c:445 buffer_write_byte(): 0b
Debug: 13082 1060 ftdi.c:424 ftdi_execute_scan(): DRSCAN type:3
Debug: 13083 1060 ftdi.c:254 move_to_state(): start=RUN/IDLE goal=DRSHIFT
Debug: 13084 1060 ftdi.c:258 move_to_state(): tap_set_state(DRSELECT)
Debug: 13085 1060 ftdi.c:258 move_to_state(): tap_set_state(DRCAPTURE)
Debug: 13086 1060 ftdi.c:258 move_to_state(): tap_set_state(DRSHIFT)
Debug: 13087 1060 mpsse.c:563 mpsse_clock_tms_cs(): out 3 bits, tdi=0
Debug: 13088 1060 mpsse.c:445 buffer_write_byte(): 4b
Debug: 13089 1060 mpsse.c:445 buffer_write_byte(): 02
Debug: 13090 1060 mpsse.c:445 buffer_write_byte(): 01
Debug: 13091 1060 ftdi.c:454 ftdi_execute_scan(): inout field 0/1 41 bits
Debug: 13092 1060 mpsse.c:487 mpsse_clock_data(): inout 40 bits
Debug: 13093 1060 mpsse.c:445 buffer_write_byte(): 39
Debug: 13094 1060 mpsse.c:445 buffer_write_byte(): 04
Debug: 13095 1060 mpsse.c:445 buffer_write_byte(): 00
Debug: 13096 1060 mpsse.c:453 buffer_write(): 40 bits
Debug: 13097 1060 mpsse.c:463 buffer_add_read(): 40 bits, offset 0
Debug: 13098 1060 mpsse.c:563 mpsse_clock_tms_cs(): inout 1 bits, tdi=0
Debug: 13099 1060 mpsse.c:445 buffer_write_byte(): 6b
Debug: 13100 1060 mpsse.c:445 buffer_write_byte(): 00
Debug: 13101 1060 mpsse.c:445 buffer_write_byte(): 01
Debug: 13102 1060 mpsse.c:463 buffer_add_read(): 1 bits, offset 7
Debug: 13103 1060 ftdi.c:487 ftdi_execute_scan(): tap_set_state(DREXIT1)
Debug: 13104 1060 mpsse.c:563 mpsse_clock_tms_cs(): out 2 bits, tdi=0
Debug: 13105 1060 mpsse.c:445 buffer_write_byte(): 4b
Debug: 13106 1060 mpsse.c:445 buffer_write_byte(): 01
Debug: 13107 1060 mpsse.c:445 buffer_write_byte(): 01
Debug: 13108 1060 ftdi.c:495 ftdi_execute_scan(): tap_set_state(DRUPDATE)
Debug: 13109 1060 ftdi.c:496 ftdi_execute_scan(): tap_set_state(RUN/IDLE)
Debug: 13110 1060 ftdi.c:519 ftdi_execute_scan(): DR scan, 41 bits, end in RUN/IDLE
Debug: 13111 1060 ftdi.c:316 ftdi_execute_runtest(): runtest 4 cycles, end in RUN/IDLE
Debug: 13112 1060 mpsse.c:563 mpsse_clock_tms_cs(): out 4 bits, tdi=0
Debug: 13113 1060 mpsse.c:445 buffer_write_byte(): 4b
Debug: 13114 1060 mpsse.c:445 buffer_write_byte(): 03
Debug: 13115 1060 mpsse.c:445 buffer_write_byte(): 00
Debug: 13116 1060 ftdi.c:337 ftdi_execute_runtest(): runtest: 4, end in RUN/IDLE
Debug: 13117 1060 mpsse.c:630 mpsse_set_data_bits_high_byte(): -
Debug: 13118 1060 mpsse.c:445 buffer_write_byte(): 82
Debug: 13119 1060 mpsse.c:445 buffer_write_byte(): 01
Debug: 13120 1060 mpsse.c:445 buffer_write_byte(): 0b
Debug: 13121 1060 mpsse.c:844 mpsse_flush(): write 26+1, read 6
Debug: 13122 1060 mpsse.c:445 buffer_write_byte(): 87
Debug: 13123 1060 mpsse.c:819 write_cb(): transferred 27 of 27
Debug: 13124 1060 mpsse.c:821 write_cb():  82 09 0b 4b 02 01 39 04 00 00 00 00 00 58 6b 00 01 4b 01 01 4b 03 00 82 01 0b 87
Debug: 13125 1060 mpsse.c:781 read_cb():  32 60 00 1c 00 00 58 2c
Debug: 13126 1060 mpsse.c:804 read_cb(): raw chunk 8, transferred 6 of 6
Debug: 13127 1060 core.c:960 default_interface_jtag_execute_queue(): JTAG DR SCAN to RUN/IDLE
Debug: 13128 1060 core.c:967 default_interface_jtag_execute_queue():   41b out: 005800000000
Debug: 13129 1060 core.c:972 default_interface_jtag_execute_queue():   41b  in: 005800001c00
Debug: 13130 1060 core.c:982 default_interface_jtag_execute_queue(): JTAG RUNTEST 4 cycles to RUN/IDLE
Debug: 13131 1060 riscv-013.c:397 scan(): 41b - 00000000 @16 -> + 00000700 @16; 4i
Debug: 13132 1060 riscv-013.c:407 scan():  ->  cmderr=7
Debug: 13133 1060 riscv.c:3450 riscv_get_register(): [riscv.tap.0] a4: ffffffffffffffff
Debug: 13134 1060 gdb_server.c:1483 gdb_error(): Reporting -4 to GDB as generic error
Debug: 13135 1060 gdb_server.c:406 gdb_log_outgoing_packet(): [riscv.tap.0] sending packet: $E0E#ba