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import os

os.system('ln -s D ../flag.txt .')

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#include <stdio.h>
#include <stdint.h>

// Function to enable PMP and set permissions for region 0
void enable_pmp(uintptr_t start, uintptr_t end, uint8_t permissions) {
    uint8_t pmpcfg = (permissions << 3) | 0x01;
    uintptr_t pmpaddr = ((start >> 2) << 2) | 0x08;

    // Calculate the PMP address mask
    uintptr_t pmpmask = ((end - start) >> 2) - 1;

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#
# GTKWave Grouping and colorizing script
#
# Load the trace with `gtkwave -S gtkwave.tcl yourtrace.vcd`
#
# Customize the inserted traces in the TOPlevel section below
# and at the bottom in the add_signals function calls
#

# Customize this section as needed

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def get_site_packages():  # pragma: no cover
    try:
        paths = site.getsitepackages()
        if site.ENABLE_USER_SITE:
            paths.append(site.getusersitepackages())
        return paths
    except Exception:
        try:
            from distutils.sysconfig import get_python_lib

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git clone https://github.com/chipsalliance/rocket-tools
cd rocket-tools
# Hash given in the rocket-chip repository (1.6 release)
git checkout e2c6d1577a75f506fe992c3eb20a75174504476e
# Replace git repo with https alternative
git submodule set-url fsf-binutils-gdb https://sourceware.org/git/binutils-gdb.git
git submodule sync
# Update GNU toolchain
git submodule update --init riscv-gnu-toolchain
cd riscv-gnu-toolchain

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#!/bin/bash
# source: https://cbs.centos.org/koji/rpminfo?rpmID=45050
set -xeuo pipefail
sudo yum install -y "tex(cmap.sty)" "tex(ecrm1000.tfm)" "tex(fancybox.sty)" "tex(footnote.sty)" "tex(framed.sty)" "tex(multirow.sty)" "tex(parskip.sty)" "tex(threeparttable.sty)" "tex(titlesec.sty)" "tex(upquote.sty)" "tex(wrapfig.sty)" "texlive-collection-fontsrecommended" "texlive-collection-latex" "tex(fncychap.sty)" python-sphinx > /dev/null

# Determine latex search directory
SEARCH_DIRECTORY="$(kpsewhich -var-value=TEXMFHOME)/tex/latex/local"
mkdir -p "$SEARCH_DIRECTORY"

# capt-of.sty has no Centos 7 package

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The repository for the assignment is public and Github does not allow the creation of private forks for public repositories.

The correct way of creating a private frok by duplicating the repo is documented here.

For this assignment the commands are:

1. Create a bare clone of the repository. (This is temporary and will be removed so just do it wherever.)

git clone --bare git@github.com:usi-systems/easytrace.git

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Interrupts management in the CV32E41P

In the CV32E41P current code, interrupts are mapped in a 32-bit signal. https://github.com/litex-hub/pythondata-cpu-cv32e41p/blob/master/pythondata_cpu_cv32e41p/system_verilog/rtl/cv32e41p_core.sv#L85

This interrupt signal goes into the mip CSR: https://github.com/litex-hub/pythondata-cpu-cv32e41p/blob/master/pythondata_cpu_cv32e41p/system_verilog/rtl/cv32e41p_int_controller.sv#L59-L70

LiteX software layer uses two fast interrupts (timer at index 1, uart at index 0). It must be mapped on bits 17 and 16 (the 2 first fast interrupts). => Added a 16-bit padding vector.