pinconf notes for beaglebone

pinconf notes

======================================================================
include/dt-bindings/pinctrl/hisi.h

/* iocg bit definition */
#define PULL_MASK       (3)
#define PULL_DIS        (0)
#define PULL_UP         (1 << 0)
#define PULL_DOWN       (1 << 1)


include/dt-bindings/pinctrl/hisi.h

                        boot_sel_cfg_func: boot_sel_cfg_func {
                                pinctrl-single,pins = <
                                        0x0    0x0      /* BOOT_SEL     (IOCFG000) */
                                >;
                                pinctrl-single,bias-pulldown  = <PULL_DIS  PULL_DOWN PULL_DIS  PULL_DOWN>;
                                pinctrl-single,bias-pullup    = <PULL_UP   PULL_UP   PULL_DIS  PULL_UP>;
                                pinctrl-single,drive-strength = <DRIVE1_02MA DRIVE_MASK>;
                        };

======================================================================
https://discuss.96boards.org/t/how-to-enable-internal-gpio-pull-up-down/4080/10

no, this is not a per-pin bias (though it’s not straightforward),
all pins of the group will have the same config. 
This one configures the pull-up. 
The ‘pinctrl-single,bias-pullup’ documentation [1] 
says that it’s an array of values that are used to configure the input bias pullup in the pinmux register.

the first element of the array is the configured value (to write)
the second is the enable pull up bits (value to write when pull-up is enabled)
the third is the disable pull up bits (value to write when pull-up is disabled) and 
the last one is the register mask for pull-up bits. 
TBH I’m not sure why this is so complicated but I assume it’s for genericity…


pinctrl-single,bias-pullup = <
                                PULL_UP  (pull-up enabled)
                                PULL_UP  (value for pull-up enabled)
                                PULL_DIS (value for pull-up disabled)
                                PULL_UP (pull-up  config mask to use when writing register)
                        >;

So here it simply says to configure the all the pins with PULL_UP (fist element),
that PULL_UP value can be used to enable PULL_UP (2nd element),
PULL_DIS value can be used for disabling pull-upand that 
PULL_UP value must be used as mask when writing the register.

======================================================================
======================================================================
MCASP0_ACLKX    mode1 ehrpwm0A
GPMC_A2         mode6 ehrpwm1A

5 rx_active     { 0: rx disable, 1: rx enabled }
4 pu_typesel    { 0: pulldown select, 1: pullup select }
3 puden         { 0: pud enable, 1: disabled }
2 mode
1 mode          
0 mode


        16      8       4       2       1
        2^4     2^3     2^2     2^1     2^0
mask    1       1       0       0       0       24
pull-up 1       1       0       0       0       24
pull-dn 0       1       0       0       0       8
none    0       0       0       0       0       0

                        
        ehrpwm0_pins: pinmux-ehrpwm0-pins {
                pinctrl-single,pins = <
                        AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE1) 
                        /* (A13) mcasp0_aclkx.ehrpwm0A */
                >;
                pinctrl-single,bias-pullup = <24 24 0 24>;
        };
                
        ehrpwm1_pins: pinmux-ehrpwm1-pins {
                pinctrl-single,pins = <
                        AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT_PULLDOWN, MUX_MODE6)      
                        /* (U14) gpmc_a2.ehrpwm1A */
                >;
                pinctrl-single,bias-pulldown = <8 8 0 24>;
        };
        
======================================================================
 0)   3.417 us    |    pinctrl_lookup_state();
 0)   3.500 us    |    pinctrl_lookup_state();
 0)               |    pinctrl_select_state() {
 0)               |      pinctrl_commit_state() {
 0)   2.667 us    |        pinctrl_generic_get_group_pins();
 0)               |        pcs_set_mux() {
 0)   2.667 us    |          pinctrl_dev_get_drvdata();
 0)   3.083 us    |          pcs_readl();
 0)   2.125 us    |          pcs_writel();
 0) # 6496.000 us |        }
 0)               |        pinconf_apply_setting() {
 0)               |          pcs_pinconf_group_set() {
 0)   2.625 us    |            pinctrl_generic_get_group_pins();
 0)               |            pcs_pinconf_set() {
 0)   2.542 us    |              pinctrl_dev_get_drvdata();
 0)               |              pcs_get_function() {
 0)   2.833 us    |                pinctrl_dev_get_drvdata();
 0)   8.375 us    |              }
 0)   2.792 us    |              pcs_readl();
 0)               |              pcs_pinconf_clear_bias() {
 0)               |                pcs_pinconf_set() {
 0)   2.792 us    |                  pinctrl_dev_get_drvdata();
 0)               |                  pcs_get_function() {
 0)   2.542 us    |                    pinctrl_dev_get_drvdata();
 0)   7.917 us    |                  }
 0) + 18.792 us   |                }
 0)               |                pcs_pinconf_set() {
 0)   2.792 us    |                  pinctrl_dev_get_drvdata();
 0)               |                  pcs_get_function() {
 0)   2.583 us    |                    pinctrl_dev_get_drvdata();
 0)   7.875 us    |                  }
 0)   2.833 us    |                  pcs_readl();
 0)   2.708 us    |                  pcs_writel();
 0) + 29.541 us   |                }
 0) + 56.084 us   |              }
 0)   2.834 us    |              pcs_writel();
 0) + 90.875 us   |            }
 0) ! 102.083 us  |          }
 0) ! 108.375 us  |        }
 0) * 14341.04 us |      }
 0) * 14346.16 us |    }