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linux-riscv reference: 'git diff' against 3335068f8721 ("riscv: Use PUD/P4D/PGD pages for the linear mapping")
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diff --git a/arch/riscv/net/bpf_jit_comp64.c b/arch/riscv/net/bpf_jit_comp64.c | |
index f5a668736c79..b066215bbbf2 100644 | |
--- a/arch/riscv/net/bpf_jit_comp64.c | |
+++ b/arch/riscv/net/bpf_jit_comp64.c | |
@@ -11,6 +11,7 @@ | |
#include <linux/memory.h> | |
#include <linux/stop_machine.h> | |
#include "bpf_jit.h" | |
+#include <asm/patch.h> | |
#define RV_REG_TCC RV_REG_A6 | |
#define RV_REG_TCC_SAVED RV_REG_S6 /* Store A6 in S6 if program do calls */ | |
diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c | |
index d1490469184b..b37e69b881ea 100644 | |
--- a/drivers/mmc/host/sdhci-of-dwcmshc.c | |
+++ b/drivers/mmc/host/sdhci-of-dwcmshc.c | |
@@ -330,6 +330,11 @@ static void rk35xx_sdhci_reset(struct sdhci_host *host, u8 mask) | |
sdhci_reset(host, mask); | |
} | |
+static void mysoc1_sdhci_reset(struct sdhci_host *host, u8 mask) | |
+{ | |
+ return; | |
+} | |
+ | |
static const struct sdhci_ops sdhci_dwcmshc_ops = { | |
.set_clock = sdhci_set_clock, | |
.set_bus_width = sdhci_set_bus_width, | |
@@ -339,6 +344,15 @@ static const struct sdhci_ops sdhci_dwcmshc_ops = { | |
.adma_write_desc = dwcmshc_adma_write_desc, | |
}; | |
+static const struct sdhci_ops sdhci_dwcmshc_mysoc1_ops = { | |
+ .set_clock = sdhci_set_clock, | |
+ .set_bus_width = sdhci_set_bus_width, | |
+ .set_uhs_signaling = dwcmshc_set_uhs_signaling, | |
+ .get_max_clock = dwcmshc_get_max_clock, | |
+ .reset = mysoc1_sdhci_reset, | |
+ .adma_write_desc = dwcmshc_adma_write_desc, | |
+}; | |
+ | |
static const struct sdhci_ops sdhci_dwcmshc_rk35xx_ops = { | |
.set_clock = dwcmshc_rk3568_set_clock, | |
.set_bus_width = sdhci_set_bus_width, | |
@@ -363,6 +377,13 @@ static const struct sdhci_pltfm_data sdhci_dwcmshc_bf3_pdata = { | |
}; | |
#endif | |
+static const struct sdhci_pltfm_data sdhci_dwcmshc_mysoc1_pdata = { | |
+ .ops = &sdhci_dwcmshc_mysoc1_ops, | |
+ .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN | | |
+ SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_BROKEN_DMA, | |
+ .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN, | |
+}; | |
+ | |
static const struct sdhci_pltfm_data sdhci_dwcmshc_rk35xx_pdata = { | |
.ops = &sdhci_dwcmshc_rk35xx_ops, | |
.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN | | |
@@ -427,6 +448,10 @@ static void dwcmshc_rk35xx_postinit(struct sdhci_host *host, struct dwcmshc_priv | |
} | |
static const struct of_device_id sdhci_dwcmshc_dt_ids[] = { | |
+ { | |
+ .compatible = "mycorp,mysoc1-dwcmshc", | |
+ .data = &sdhci_dwcmshc_mysoc1_pdata, | |
+ }, | |
{ | |
.compatible = "rockchip,rk3588-dwcmshc", | |
.data = &sdhci_dwcmshc_rk35xx_pdata, | |
@@ -539,6 +564,9 @@ static int dwcmshc_probe(struct platform_device *pdev) | |
sdhci_enable_v4_mode(host); | |
#endif | |
+ if (pltfm_data == &sdhci_dwcmshc_mysoc1_pdata) | |
+ sdhci_enable_v4_mode(host); | |
+ | |
host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY; | |
err = sdhci_setup_host(host); |
Author
pdp7
commented
May 20, 2023
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