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penartur/md5.asm

Created May 16, 2017 13:44
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Инициализация MD5
Raw
md5.asm
mov r11, rsp
push rbp
sub rsp, 800 ; 00000320H
vmovaps XMMWORD PTR [r11-24], xmm6
vmovaps XMMWORD PTR [r11-40], xmm7
vmovaps XMMWORD PTR [r11-56], xmm8
vmovaps XMMWORD PTR [r11-72], xmm9
vmovaps XMMWORD PTR [r11-88], xmm10
vmovaps XMMWORD PTR [r11-104], xmm11
vmovaps XMMWORD PTR [r11-120], xmm12
vmovaps XMMWORD PTR [r11-136], xmm13
vmovaps XMMWORD PTR [r11-152], xmm14
vmovaps XMMWORD PTR [r11-168], xmm15
lea rbp, QWORD PTR [rsp+32]
and rbp, -32 ; ffffffffffffffe0H
; 80 : return MD5Vector(
vmovd xmm1, DWORD PTR [rcx]
vpinsrd xmm1, xmm1, DWORD PTR [rcx+32], 1
vpinsrd xmm1, xmm1, DWORD PTR [rcx+64], 2
vpinsrd xmm1, xmm1, DWORD PTR [rcx+96], 3
vmovd xmm0, DWORD PTR [rcx+128]
vpinsrd xmm0, xmm0, DWORD PTR [rcx+160], 1
vpinsrd xmm0, xmm0, DWORD PTR [rcx+192], 2
vpinsrd xmm0, xmm0, DWORD PTR [rcx+224], 3
vinsertf128 ymm3, ymm1, xmm0, 1
vmovd xmm1, DWORD PTR [rcx+256]
vpinsrd xmm1, xmm1, DWORD PTR [rcx+288], 1
vpinsrd xmm1, xmm1, DWORD PTR [rcx+320], 2
vpinsrd xmm1, xmm1, DWORD PTR [rcx+352], 3
vmovd xmm0, DWORD PTR [rcx+384]
vpinsrd xmm0, xmm0, DWORD PTR [rcx+416], 1
vpinsrd xmm0, xmm0, DWORD PTR [rcx+448], 2
vpinsrd xmm0, xmm0, DWORD PTR [rcx+480], 3
vinsertf128 ymm2, ymm1, xmm0, 1
vmovd xmm1, DWORD PTR [rcx+4]
vpinsrd xmm1, xmm1, DWORD PTR [rcx+36], 1
vpinsrd xmm1, xmm1, DWORD PTR [rcx+68], 2
vpinsrd xmm1, xmm1, DWORD PTR [rcx+100], 3
vmovd xmm0, DWORD PTR [rcx+132]
vpinsrd xmm0, xmm0, DWORD PTR [rcx+164], 1
vpinsrd xmm0, xmm0, DWORD PTR [rcx+196], 2
vpinsrd xmm0, xmm0, DWORD PTR [rcx+228], 3
vinsertf128 ymm0, ymm1, xmm0, 1
vmovd xmm1, DWORD PTR [rcx+260]
vpinsrd xmm1, xmm1, DWORD PTR [rcx+292], 1
vpinsrd xmm1, xmm1, DWORD PTR [rcx+324], 2
vpinsrd xmm1, xmm1, DWORD PTR [rcx+356], 3
; 77 : __forceinline const MD5Vector CREATE_VECTOR(const int a) { return MD5Vector(_mm256_set1_epi32(a), _mm256_set1_epi32(a)); }
vmovdqu ymm12, YMMWORD PTR __ymm@efcdab89efcdab89efcdab89efcdab89efcdab89efcdab89efcdab89efcdab89
vmovdqu ymm11, YMMWORD PTR __ymm@98badcfe98badcfe98badcfe98badcfe98badcfe98badcfe98badcfe98badcfe
vmovdqu ymm9, YMMWORD PTR __ymm@1032547610325476103254761032547610325476103254761032547610325476
; 80 : return MD5Vector(
vmovdqu YMMWORD PTR inputVector1$1$[rbp], ymm0
vmovd xmm0, DWORD PTR [rcx+388]
vpinsrd xmm0, xmm0, DWORD PTR [rcx+420], 1
vpinsrd xmm0, xmm0, DWORD PTR [rcx+452], 2
vpinsrd xmm0, xmm0, DWORD PTR [rcx+484], 3
vinsertf128 ymm10, ymm1, xmm0, 1
vmovd xmm1, DWORD PTR [rcx+8]
vpinsrd xmm1, xmm1, DWORD PTR [rcx+40], 1
vpinsrd xmm1, xmm1, DWORD PTR [rcx+72], 2
vpinsrd xmm1, xmm1, DWORD PTR [rcx+104], 3
vmovd xmm0, DWORD PTR [rcx+136]
vpinsrd xmm0, xmm0, DWORD PTR [rcx+168], 1
vpinsrd xmm0, xmm0, DWORD PTR [rcx+200], 2
vpinsrd xmm0, xmm0, DWORD PTR [rcx+232], 3
vinsertf128 ymm14, ymm1, xmm0, 1
vmovd xmm1, DWORD PTR [rcx+264]
vpinsrd xmm1, xmm1, DWORD PTR [rcx+296], 1
vpinsrd xmm1, xmm1, DWORD PTR [rcx+328], 2
vpinsrd xmm1, xmm1, DWORD PTR [rcx+360], 3
vmovd xmm0, DWORD PTR [rcx+392]
vpinsrd xmm0, xmm0, DWORD PTR [rcx+424], 1
vpinsrd xmm0, xmm0, DWORD PTR [rcx+456], 2
vpinsrd xmm0, xmm0, DWORD PTR [rcx+488], 3
vinsertf128 ymm13, ymm1, xmm0, 1
vmovd xmm1, DWORD PTR [rcx+12]
vpinsrd xmm1, xmm1, DWORD PTR [rcx+44], 1
vpinsrd xmm1, xmm1, DWORD PTR [rcx+76], 2
vpinsrd xmm1, xmm1, DWORD PTR [rcx+108], 3
vmovd xmm0, DWORD PTR [rcx+140]
vpinsrd xmm0, xmm0, DWORD PTR [rcx+172], 1
vpinsrd xmm0, xmm0, DWORD PTR [rcx+204], 2
vpinsrd xmm0, xmm0, DWORD PTR [rcx+236], 3
vinsertf128 ymm0, ymm1, xmm0, 1
vmovd xmm1, DWORD PTR [rcx+268]
vpinsrd xmm1, xmm1, DWORD PTR [rcx+300], 1
vpinsrd xmm1, xmm1, DWORD PTR [rcx+332], 2
vpinsrd xmm1, xmm1, DWORD PTR [rcx+364], 3
vmovdqu YMMWORD PTR inputVector3$1$[rbp], ymm0
vmovd xmm0, DWORD PTR [rcx+396]
vpinsrd xmm0, xmm0, DWORD PTR [rcx+428], 1
vpinsrd xmm0, xmm0, DWORD PTR [rcx+460], 2
vpinsrd xmm0, xmm0, DWORD PTR [rcx+492], 3
vmovdqu YMMWORD PTR inputVector0$1$[rbp], ymm3
vmovdqu YMMWORD PTR inputVector0$2$[rbp], ymm2
vmovdqu YMMWORD PTR inputVector1$2$[rbp], ymm10
vmovdqu YMMWORD PTR inputVector2$1$[rbp], ymm14
vmovdqu YMMWORD PTR inputVector2$2$[rbp], ymm13
vinsertf128 ymm15, ymm1, xmm0, 1
vmovd xmm1, DWORD PTR [rcx+16]
vpinsrd xmm1, xmm1, DWORD PTR [rcx+48], 1
vpinsrd xmm1, xmm1, DWORD PTR [rcx+80], 2
vpinsrd xmm1, xmm1, DWORD PTR [rcx+112], 3
vmovd xmm0, DWORD PTR [rcx+144]
vpinsrd xmm0, xmm0, DWORD PTR [rcx+176], 1
vpinsrd xmm0, xmm0, DWORD PTR [rcx+208], 2
vpinsrd xmm0, xmm0, DWORD PTR [rcx+240], 3
vinsertf128 ymm0, ymm1, xmm0, 1
vmovd xmm1, DWORD PTR [rcx+272]
vpinsrd xmm1, xmm1, DWORD PTR [rcx+304], 1
vpinsrd xmm1, xmm1, DWORD PTR [rcx+336], 2
vpinsrd xmm1, xmm1, DWORD PTR [rcx+368], 3
vmovdqu YMMWORD PTR inputVector4$1$[rbp], ymm0
vmovd xmm0, DWORD PTR [rcx+400]
vpinsrd xmm0, xmm0, DWORD PTR [rcx+432], 1
vpinsrd xmm0, xmm0, DWORD PTR [rcx+464], 2
vpinsrd xmm0, xmm0, DWORD PTR [rcx+496], 3
vinsertf128 ymm0, ymm1, xmm0, 1
vmovd xmm1, DWORD PTR [rcx+20]
vpinsrd xmm1, xmm1, DWORD PTR [rcx+52], 1
vpinsrd xmm1, xmm1, DWORD PTR [rcx+84], 2
vpinsrd xmm1, xmm1, DWORD PTR [rcx+116], 3
vmovdqu YMMWORD PTR inputVector4$2$[rbp], ymm0
vmovd xmm0, DWORD PTR [rcx+148]
vpinsrd xmm0, xmm0, DWORD PTR [rcx+180], 1
vpinsrd xmm0, xmm0, DWORD PTR [rcx+212], 2
vpinsrd xmm0, xmm0, DWORD PTR [rcx+244], 3
vinsertf128 ymm0, ymm1, xmm0, 1
vmovd xmm1, DWORD PTR [rcx+276]
vpinsrd xmm1, xmm1, DWORD PTR [rcx+308], 1
vpinsrd xmm1, xmm1, DWORD PTR [rcx+340], 2
vpinsrd xmm1, xmm1, DWORD PTR [rcx+372], 3
vmovdqu YMMWORD PTR inputVector5$1$[rbp], ymm0
vmovd xmm0, DWORD PTR [rcx+404]
vpinsrd xmm0, xmm0, DWORD PTR [rcx+436], 1
vpinsrd xmm0, xmm0, DWORD PTR [rcx+468], 2
vpinsrd xmm0, xmm0, DWORD PTR [rcx+500], 3
vinsertf128 ymm0, ymm1, xmm0, 1
vmovd xmm1, DWORD PTR [rcx+24]
vpinsrd xmm1, xmm1, DWORD PTR [rcx+56], 1
vpinsrd xmm1, xmm1, DWORD PTR [rcx+88], 2
vpinsrd xmm1, xmm1, DWORD PTR [rcx+120], 3
vmovdqu YMMWORD PTR inputVector5$2$[rbp], ymm0
vmovd xmm0, DWORD PTR [rcx+152]
vpinsrd xmm0, xmm0, DWORD PTR [rcx+184], 1
vpinsrd xmm0, xmm0, DWORD PTR [rcx+216], 2
vpinsrd xmm0, xmm0, DWORD PTR [rcx+248], 3
vinsertf128 ymm0, ymm1, xmm0, 1
vmovd xmm1, DWORD PTR [rcx+280]
vpinsrd xmm1, xmm1, DWORD PTR [rcx+312], 1
vpinsrd xmm1, xmm1, DWORD PTR [rcx+344], 2
vpinsrd xmm1, xmm1, DWORD PTR [rcx+376], 3
vmovdqu YMMWORD PTR inputVector6$1$[rbp], ymm0
vmovd xmm0, DWORD PTR [rcx+408]
vpinsrd xmm0, xmm0, DWORD PTR [rcx+440], 1
vpinsrd xmm0, xmm0, DWORD PTR [rcx+472], 2
vpinsrd xmm0, xmm0, DWORD PTR [rcx+504], 3
vinsertf128 ymm0, ymm1, xmm0, 1
vmovd xmm1, DWORD PTR [rcx+28]
vpinsrd xmm1, xmm1, DWORD PTR [rcx+60], 1
vpinsrd xmm1, xmm1, DWORD PTR [rcx+92], 2
vpinsrd xmm1, xmm1, DWORD PTR [rcx+124], 3
vmovdqu YMMWORD PTR inputVector6$2$[rbp], ymm0
vmovd xmm0, DWORD PTR [rcx+156]
vpinsrd xmm0, xmm0, DWORD PTR [rcx+188], 1
vpinsrd xmm0, xmm0, DWORD PTR [rcx+220], 2
vpinsrd xmm0, xmm0, DWORD PTR [rcx+252], 3
vinsertf128 ymm0, ymm1, xmm0, 1
vmovd xmm1, DWORD PTR [rcx+284]
vpinsrd xmm1, xmm1, DWORD PTR [rcx+316], 1
vpinsrd xmm1, xmm1, DWORD PTR [rcx+348], 2
vpinsrd xmm1, xmm1, DWORD PTR [rcx+380], 3
vmovdqu YMMWORD PTR inputVector7$1$[rbp], ymm0
vmovd xmm0, DWORD PTR [rcx+412]
vpinsrd xmm0, xmm0, DWORD PTR [rcx+444], 1
vpinsrd xmm0, xmm0, DWORD PTR [rcx+476], 2
vpinsrd xmm0, xmm0, DWORD PTR [rcx+508], 3
vinsertf128 ymm0, ymm1, xmm0, 1
vmovdqu YMMWORD PTR inputVector3$2$[rbp], ymm15
; 37 : return MD5Vector(_mm256_add_epi32(m_V0, R.m_V0), _mm256_add_epi32(m_V1, R.m_V1));
vpaddd ymm1, ymm3, YMMWORD PTR __ymm@6745230167452301674523016745230167452301674523016745230167452301
vpaddd ymm5, ymm1, YMMWORD PTR __ymm@d76aa478d76aa478d76aa478d76aa478d76aa478d76aa478d76aa478d76aa478
vpaddd ymm2, ymm2, YMMWORD PTR __ymm@6745230167452301674523016745230167452301674523016745230167452301
vpaddd ymm6, ymm2, YMMWORD PTR __ymm@d76aa478d76aa478d76aa478d76aa478d76aa478d76aa478d76aa478d76aa478
; 80 : return MD5Vector(
vmovdqu YMMWORD PTR inputVector7$2$[rbp], ymm0
; 27 : return MD5Vector(_mm256_andnot_si256(m_V0, R.m_V0), _mm256_andnot_si256(m_V1, R.m_V1));
vpandn ymm3, ymm12, ymm9
; 22 : return MD5Vector(_mm256_and_si256(m_V0, R.m_V0), _mm256_and_si256(m_V1, R.m_V1));
vpand ymm0, ymm12, ymm11
; 32 : return MD5Vector(_mm256_or_si256(m_V0, R.m_V0), _mm256_or_si256(m_V1, R.m_V1));
vpor ymm2, ymm0, ymm3
; 37 : return MD5Vector(_mm256_add_epi32(m_V0, R.m_V0), _mm256_add_epi32(m_V1, R.m_V1));
vpaddd ymm0, ymm2, ymm5
; 47 : return MD5Vector(_mm256_srli_epi32(m_V0, shift), _mm256_srli_epi32(m_V1, shift));
vpsrld ymm2, ymm0, 25
; 42 : return MD5Vector(_mm256_slli_epi32(m_V0, shift), _mm256_slli_epi32(m_V1, shift));
vpslld ymm0, ymm0, 7
; 32 : return MD5Vector(_mm256_or_si256(m_V0, R.m_V0), _mm256_or_si256(m_V1, R.m_V1));
vpor ymm2, ymm0, ymm2
; 37 : return MD5Vector(_mm256_add_epi32(m_V0, R.m_V0), _mm256_add_epi32(m_V1, R.m_V1));
vpaddd ymm7, ymm2, ymm12
; 22 : return MD5Vector(_mm256_and_si256(m_V0, R.m_V0), _mm256_and_si256(m_V1, R.m_V1));
vpand ymm1, ymm11, ymm12
; 27 : return MD5Vector(_mm256_andnot_si256(m_V0, R.m_V0), _mm256_andnot_si256(m_V1, R.m_V1));
vpandn ymm4, ymm12, ymm9
; 32 : return MD5Vector(_mm256_or_si256(m_V0, R.m_V0), _mm256_or_si256(m_V1, R.m_V1));
vpor ymm3, ymm1, ymm4
; 37 : return MD5Vector(_mm256_add_epi32(m_V0, R.m_V0), _mm256_add_epi32(m_V1, R.m_V1));
vpaddd ymm1, ymm3, ymm6
; 47 : return MD5Vector(_mm256_srli_epi32(m_V0, shift), _mm256_srli_epi32(m_V1, shift));
vpsrld ymm3, ymm1, 25
; 42 : return MD5Vector(_mm256_slli_epi32(m_V0, shift), _mm256_slli_epi32(m_V1, shift));
vpslld ymm1, ymm1, 7
; 32 : return MD5Vector(_mm256_or_si256(m_V0, R.m_V0), _mm256_or_si256(m_V1, R.m_V1));
vpor ymm3, ymm1, ymm3
; 37 : return MD5Vector(_mm256_add_epi32(m_V0, R.m_V0), _mm256_add_epi32(m_V1, R.m_V1));
vpaddd ymm1, ymm9, YMMWORD PTR inputVector1$1$[rbp]
vpaddd ymm5, ymm1, YMMWORD PTR __ymm@e8c7b756e8c7b756e8c7b756e8c7b756e8c7b756e8c7b756e8c7b756e8c7b756
vpaddd ymm8, ymm3, ymm12
vpaddd ymm2, ymm10, ymm9
vpaddd ymm6, ymm2, YMMWORD PTR __ymm@e8c7b756e8c7b756e8c7b756e8c7b756e8c7b756e8c7b756e8c7b756e8c7b756
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