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; halt CPU (20 cycles) | |
sts TCCR2B, r0 ; TCCR2B = 0 | |
call delay16 ; wait a while so that the 6502 can finish whatever it was doing | |
cbi _SFR_IO_ADDR(PORTD), BUS_ENABLE ; disable bus | |
; ATmega can now do whatever dirty tricks it likes in the memory | |
; restart CPU (5 cycles) | |
sbi _SFR_IO_ADDR(PORTD), BUS_ENABLE ; enable bus | |
ldi r24, 1 | |
sts TCCR2B, r24 ; TCCR2B = 1 (prescaler 1 equals 1 MHz) |
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